ALU.vhd
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Update ALU
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2023-05-29 21:39:05 +02:00 |
IP.vhd
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added the alea handling and IP implementation
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2023-05-29 19:54:40 +02:00 |
Memory.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |
register.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |
Registers.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |
Stage_Di_Ex.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |
Stage_Ex_Mem.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |
Stage_Li_Di.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |
Stage_Mem_Re.vhd
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Added VHDL part of the project
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2023-05-29 13:58:26 +02:00 |