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added hardcoded operations (from cross compiler) in the InstructionMemory.vhd

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Raphaël LACROIX 2023-05-29 23:46:32 +02:00
parent 68b0a2ea01
commit c0b06b9565
1 changed files with 2 additions and 1 deletions
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VHDL/ALU/ALU.srcs/sources_1/new/InstructionMemory.vhd
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@ -40,7 +40,8 @@ end InstructionMemory;
architecture Behavioral of InstructionMemory is architecture Behavioral of InstructionMemory is
type Mem_array is array (0 to 255) of STD_LOGIC_VECTOR (31 downto 0); type Mem_array is array (0 to 255) of STD_LOGIC_VECTOR (31 downto 0);
signal Mem : Mem_array; signal Mem : Mem_array := ((x"06000200"),(x"08040000"),(x"07000400"),(x"08030000"),(x"07000000"),(x"08020000"),(x"06000200"),(x"08040000"),(x"07000200"),(x"07010400"),(x"01000001"),(x"08050000"),(x"07000500"),(x"08000000"),(x"07000300"),(x"08000000"),(x"06000500"),(x"08040000"),(x"07000400"),(x"08000000"),(x"06001300"),(x"08040000"),(x"06000200"),(x"08050000"),(x"07000400"),(x"07010500"),(x"01000001"),(x"08040000"),(x"06000500"),(x"08050000"),(x"07000500"),(x"07010000"),(x"02000001"),(x"08040000"),(x"06000800"),(x"08050000"),(x"07000400"),(x"07010500"),(x"01000001"),(x"08040000"),(x"06000200"),(x"08050000"),(x"07000400"),(x"07010500"),(x"02000001"),(x"08040000"),(x"07000400"),(x"07010400"),(x"03000001"),(x"08050000"),(x"07000500"),(x"08030000"), others => (x"ff000000"));
begin begin
process process