From c0b06b95654aa70b7295c0308ae70e40a894be9e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rapha=C3=ABl=20LACROIX?= Date: Mon, 29 May 2023 23:46:32 +0200 Subject: [PATCH] added hardcoded operations (from cross compiler) in the InstructionMemory.vhd --- VHDL/ALU/ALU.srcs/sources_1/new/InstructionMemory.vhd | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/VHDL/ALU/ALU.srcs/sources_1/new/InstructionMemory.vhd b/VHDL/ALU/ALU.srcs/sources_1/new/InstructionMemory.vhd index f067be7..4b9a49b 100644 --- a/VHDL/ALU/ALU.srcs/sources_1/new/InstructionMemory.vhd +++ b/VHDL/ALU/ALU.srcs/sources_1/new/InstructionMemory.vhd @@ -40,7 +40,8 @@ end InstructionMemory; architecture Behavioral of InstructionMemory is type Mem_array is array (0 to 255) of STD_LOGIC_VECTOR (31 downto 0); - signal Mem : Mem_array; + signal Mem : Mem_array := ((x"06000200"),(x"08040000"),(x"07000400"),(x"08030000"),(x"07000000"),(x"08020000"),(x"06000200"),(x"08040000"),(x"07000200"),(x"07010400"),(x"01000001"),(x"08050000"),(x"07000500"),(x"08000000"),(x"07000300"),(x"08000000"),(x"06000500"),(x"08040000"),(x"07000400"),(x"08000000"),(x"06001300"),(x"08040000"),(x"06000200"),(x"08050000"),(x"07000400"),(x"07010500"),(x"01000001"),(x"08040000"),(x"06000500"),(x"08050000"),(x"07000500"),(x"07010000"),(x"02000001"),(x"08040000"),(x"06000800"),(x"08050000"),(x"07000400"),(x"07010500"),(x"01000001"),(x"08040000"),(x"06000200"),(x"08050000"),(x"07000400"),(x"07010500"),(x"02000001"),(x"08040000"),(x"07000400"),(x"07010400"),(x"03000001"),(x"08050000"),(x"07000500"),(x"08030000"), others => (x"ff000000")); + begin process