35 lines
2.3 KiB
Text
35 lines
2.3 KiB
Text
Running: /usr/local/insa/Xilinx.ISE/13.4/ISE_DS/ISE/bin/lin64/unwrapped/fuse -relaunch -intstyle "ise" -incremental -lib "secureip" -o "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_isim_beh.exe" -prj "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_beh.prj" "work.process_test"
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ISim O.87xd (signature 0x8ddf5b5d)
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Number of CPUs detected in this system: 12
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Turning on mult-threading, number of parallel sub-compilation jobs: 24
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Determining compilation order of HDL files
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/pipeline.vhd" into library work
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/br.vhd" into library work
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_instr.vhd" into library work
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm.vhd" into library work
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/alu.vhd" into library work
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd" into library work
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Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test.vhd" into library work
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Starting static elaboration
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Completed static elaboration
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Fuse Memory Usage: 98520 KB
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Fuse CPU Usage: 760 ms
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Compiling package standard
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Compiling package std_logic_1164
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Compiling package std_logic_arith
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Compiling package std_logic_unsigned
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Compiling package numeric_std
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Compiling architecture behavioral of entity bm_instr [bm_instr_default]
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Compiling architecture behavioral of entity pipeline [pipeline_default]
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Compiling architecture behavioral of entity br [br_default]
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Compiling architecture behavioral of entity alu [alu_default]
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Compiling architecture behavioral of entity bm_data [bm_data_default]
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Compiling architecture behavioral of entity processeur [processeur_default]
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Compiling architecture behavior of entity process_test
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Time Resolution for simulation is 1ps.
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Waiting for 1 sub-compilation(s) to finish...
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Compiled 18 VHDL Units
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Built simulation executable /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_isim_beh.exe
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Fuse Memory Usage: 1723208 KB
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Fuse CPU Usage: 850 ms
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GCC CPU Usage: 120 ms
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