This commit is contained in:
Elies Tali 2021-05-12 19:50:59 +02:00
parent 78216ace0a
commit 1f7cd371e5
13 changed files with 3844 additions and 52 deletions

1809
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/* A Bison parser, made by GNU Bison 3.5.1. */
/* Bison interface for Yacc-like parsers in C
Copyright (C) 1984, 1989-1990, 2000-2015, 2018-2020 Free Software Foundation,
Inc.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* As a special exception, you may create a larger work that contains
part or all of the Bison parser skeleton and distribute that work
under terms of your choice, so long as that work isn't itself a
parser generator using the skeleton or a modified version thereof
as a parser skeleton. Alternatively, if you modify or redistribute
the parser skeleton itself, you may (at your option) remove this
special exception, which will cause the skeleton and the resulting
Bison output files to be licensed under the GNU General Public
License without this special exception.
This special exception was added by the Free Software Foundation in
version 2.2 of Bison. */
/* Undocumented macros, especially those whose name start with YY_,
are private implementation details. Do not rely on them. */
#ifndef YY_YY_AS_TAB_H_INCLUDED
# define YY_YY_AS_TAB_H_INCLUDED
/* Debug traces. */
#ifndef YYDEBUG
# define YYDEBUG 1
#endif
#if YYDEBUG
extern int yydebug;
#endif
/* Token type. */
#ifndef YYTOKENTYPE
# define YYTOKENTYPE
enum yytokentype
{
tMUL = 258,
tDIV = 259,
tADD = 260,
tSUB = 261,
tINF = 262,
tSUP = 263,
tEQU = 264,
tAFC = 265,
tCPY = 266,
tAFCA = 267,
tREAD = 268,
tWR = 269,
tJMP = 270,
tJMF = 271,
tGET = 272,
tPRI = 273,
tCALL = 274,
tRET = 275,
tSTOP = 276,
tNB = 277
};
#endif
/* Value type. */
#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
union YYSTYPE
{
#line 1 "as.y"
int nombre;
#line 84 "as.tab.h"
};
typedef union YYSTYPE YYSTYPE;
# define YYSTYPE_IS_TRIVIAL 1
# define YYSTYPE_IS_DECLARED 1
#endif
extern YYSTYPE yylval;
int yyparse (void);
#endif /* !YY_YY_AS_TAB_H_INCLUDED */

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@ -26,51 +26,51 @@ Programme : Instruction;
Instruction : tMUL tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(MUL, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
Instruction : tADD tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(ADD, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
Instruction : tDIV tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(DIV, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
Instruction : tSUB tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(SUB, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
Instruction : tINF tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(INF, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
Instruction : tSUP tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(SUP, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
Instruction : tEQU tNB tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src1 = get_reg_read($3, &added_instruction);
int reg_src2 = get_reg_read($4, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(EQU, reg_dest, reg_src1, reg_src2);
new_instruction(added_instruction + 1);};
@ -82,8 +82,8 @@ Instruction : tAFC tNB tNB {increment_time();
new_instruction(added_instruction + 1);};
Instruction : tCPY tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_src = get_reg_read($3, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(CPY, reg_dest, reg_src, 0);
new_instruction(added_instruction + 1);};
Instruction : tAFCA tNB tNB {increment_time();
@ -107,8 +107,8 @@ Instruction : tJMF tNB tNB {increment_time();
Instruction : tWR tNB tNB {increment_time();
int added_instruction = 0;
int reg_dest = get_reg_write($2, &added_instruction);
int reg_addr = get_reg_read($3, &added_instruction);
int reg_dest = get_reg_write($2, &added_instruction);
add_instruction(LOADI, reg_dest, reg_addr, 0);
new_instruction(added_instruction + 1);};
Instruction : tREAD tNB tNB {increment_time();
@ -132,8 +132,10 @@ Instruction : tPRI tNB {increment_time();
Instruction : tCALL tNB tNB {increment_time();
print();
int added_instruction = flush_and_init(file);
add_instruction(STOP, $2, $3, 0);
print();
add_instruction(CALL, $2, $3, 0);
new_instruction(added_instruction + 1);};
Instruction : tRET {increment_time();
int added_instruction = flush_and_init(file);
@ -149,6 +151,7 @@ Instruction : tSTOP tNB {increment_time();
int main(void) {
file = fopen("output.asm", "w");
file2 = fopen("output.bin", "w");
file = stdout;
init();
yyparse();
write_asm(file);

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@ -0,0 +1 @@
"00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "00000000000000000000000000000" & "10101000000000000000000000000" & "10001000000110000000000000000" & "01101000000110000001100000000" & "00001000000110000000000000011" & "00010000000110000000100000011" & "01001000000010000000100000000" & "01110000001010000000100000000" & "01001000000010000000000000000" & "01011000001100000000100000000" & "01001000000110000000000000000" & "01100000000100000000000000000" & "01001000000000000110000000000" & "01011000000100000000000000000" & "00001000000100000001100000010" & "00010000000100000000100000010" & "01001000000010000000100000000" & "01110000001000000000100000000" & "01001000000010000000000000000" & "01011000001010000000100000000" & "01001000000100000000100000000" & "01100000000000000001100000000" & "01001000000110000000100000000" & "00001000000000000001000000000" & "01010000000100000001100000000" & "00010000000000000000100000000" & "01001000000010000000100000000" & "01110000000110000000100000000" & "01001000000010000000000000000" & "01001000000000000000000000000" & "01111000000010000000000000000" &

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@ -14,8 +14,8 @@
#include "tables.h"
#define NB_REG 4
#define MEM_SIZE 16
#define NB_INSTRUCTIONS 64
#define MEM_INST_SIZE 64
#define NB_INSTRUCTIONS 128
#define MEM_INST_SIZE 128
#define NB_BITS_INSTRUCTION 5
#define NB_BITS 8
@ -115,7 +115,11 @@ void write_instruction_binary(FILE * file, struct str_instruction instr) {
char buff3[33];
char buff4[33];
convert_to_binary_on_N(instr.instruction, NB_BITS_INSTRUCTION, buff1);
convert_to_binary_on_N(instr.param1, NB_BITS, buff2);
if (instr.instruction == JMP || instr.instruction == JMZ || instr.instruction == CALL) {
convert_to_binary_on_N(traduction_JMP[instr.param1], NB_BITS, buff2);
} else {
convert_to_binary_on_N(instr.param1, NB_BITS, buff2);
}
convert_to_binary_on_N(instr.param2, NB_BITS, buff3);
convert_to_binary_on_N(instr.param3, NB_BITS, buff4);
fprintf(file, "\"%s%s%s%s\" & ", buff1, buff2, buff3, buff4);

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@ -21,6 +21,7 @@
enum instruction_t {NOP, ADD, MUL, SUB, DIV, INF, SUP, EQU, CPY, AFC, LOAD, STORE, LOADI, STOREI, STOREA, JMP, JMZ, PRI, GET, CALL, RET, STOP};
void init(void);
void print();
void increment_time();
int get_reg_read(int adresse, int * added_instruction);
int get_reg_write(int adresse, int * added_instruction);

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@ -1,41 +1,23 @@
JMP 31
AFC 1 1
COP 2 0
AFC 3 1
MUL 1 3 1
ADD 1 2 1
AFC 2 10
WR 1 2
AFC 1 0
COP 2 0
AFC 3 1
MUL 1 3 1
ADD 1 2 1
READ 1 1
PRI 1
STOP 15
AFC 1 2
COP 0 1
RET
AFC 1 0
COP 2 0
AFC 3 1
MUL 1 3 1
ADD 1 2 1
AFC 2 1
WR 1 2
COP 1 0
CALL 1 1
AFC 1 1
COP 0 1
RET
AFCA 5 0
CALL 19 5
JMP 1
AFC 2 0
AFCA 3 0
AFC 5 1
AFCA 6 0
AFC 7 1
MUL 5 7 5
ADD 5 6 5
READ 5 5
PRI 5
MUL 2 5 2
ADD 2 3 2
AFC 4 1
WR 2 4
AFC 3 1
AFCA 4 0
AFC 6 1
MUL 3 6 3
ADD 3 4 3
AFC 5 12
WR 3 5
AFC 4 0
AFCA 5 0
AFC 6 1
MUL 4 6 4
ADD 4 5 4
READ 4 4
PRI 4
STOP 0