Début de boucle à 1 + ajout des fichiers pour le challenge
This commit is contained in:
parent
181edb6831
commit
d7f33cd9af
10 changed files with 1498 additions and 8 deletions
7
.gitignore
vendored
7
.gitignore
vendored
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@ -12,4 +12,9 @@
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/2.2/*
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!/2.2/Src/
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!/2.2/Project.uvoptx
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!/2.2/Project.uvprojx
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!/2.2/Project.uvprojx
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!/challenge/
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/challenge/*
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!/challenge/Src/
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!/challenge/Project.uvoptx
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!/challenge/Project.uvprojx
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@ -157,18 +157,34 @@
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<Bp>
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<Filename>.\Src\principal.c</Filename>
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<BreakIfRCount>0</BreakIfRCount>
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<Filename>.\Src\calcul_dft.s</Filename>
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<ExecCommand></ExecCommand>
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<Expression>\\CHTI\Src/principal.c\10</Expression>
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<Expression></Expression>
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<Filename>.\Src\calcul_dft.s</Filename>
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<ExecCommand></ExecCommand>
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<Expression></Expression>
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</Bp>
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</Breakpoint>
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<WatchWindow1>
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@ -192,7 +208,7 @@
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<DebugFlag>
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<aSer1>0</aSer1>
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<aSer2>0</aSer2>
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@ -4,7 +4,7 @@ extern short* TabSig[N];
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int resultats[N];
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int main(void) {
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for(int i = 0; i < N; ++i){
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for(int i = 1; i < N; ++i){
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resultats[i] = dft(TabSig, i);
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}
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while(1){}
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316
challenge/Project.uvoptx
Normal file
316
challenge/Project.uvoptx
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@ -0,0 +1,316 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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<SchemaVersion>1.0</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Extensions>
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<cExt>*.c</cExt>
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<aExt>*.s*; *.src; *.a*</aExt>
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<oExt>*.obj; *.o</oExt>
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<lExt>*.lib</lExt>
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<tExt>*.txt; *.h; *.inc</tExt>
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<pExt>*.plm</pExt>
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<CppX>*.cpp</CppX>
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<tDlgDll></tDlgDll>
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<tDlgPa></tDlgPa>
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<tIfile></tIfile>
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<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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</DebugOpt>
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<TargetDriverDllRegistry>
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<ExecCommand></ExecCommand>
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
<pszMrulep></pszMrulep>
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||||
<pSingCmdsp></pSingCmdsp>
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||||
<pMultCmdsp></pMultCmdsp>
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||||
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|
||||
<Wi>
|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Sources</GroupName>
|
||||
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|
||||
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
|
||||
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|
||||
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|
||||
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|
||||
<File>
|
||||
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|
||||
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|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\principal.c</PathWithFileName>
|
||||
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
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|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\calcul_dft.s</PathWithFileName>
|
||||
<FilenameWithoutPath>calcul_dft.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>1</RteFlg>
|
||||
</Group>
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||||
|
||||
</ProjectOpt>
|
422
challenge/Project.uvprojx
Normal file
422
challenge/Project.uvprojx
Normal file
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@ -0,0 +1,422 @@
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|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>Simu</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F103RB</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Obj\</OutputDirectory>
|
||||
<OutputName>CHTI</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath></ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP</SimDllArguments>
|
||||
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4100</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x5000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x5000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--C99</MiscControls>
|
||||
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Sources</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup-rvds.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\startup-rvds.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>principal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\Src\principal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>calcul_dft.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\calcul_dft.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Simu"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
272
challenge/Src/calcul_dft.s
Normal file
272
challenge/Src/calcul_dft.s
Normal file
|
@ -0,0 +1,272 @@
|
|||
thumb
|
||||
AREA moncode, code, readonly
|
||||
export dft
|
||||
N equ 64
|
||||
|
||||
dft proc
|
||||
push {lr, r4, r5, r0} ; empilage de l'adresse de retour
|
||||
ldr r2, =TabCos ; on met l'addr de TabCos
|
||||
bl cal_comp ; on calcule Re(k) | format : 5.28
|
||||
smull r4, r5, r0, r0 ; (r4,r5) = Re(k)² | format : 10.54
|
||||
|
||||
pop {r0}
|
||||
ldr r2, =TabSin ; on met l'addr de TabSin
|
||||
bl cal_comp ; on calcule -Im(k) | format : 5.28
|
||||
smlal r4, r5, r0, r0 ; (r4,r5) = Re(k)² + Im(k)² | format : 10.54
|
||||
|
||||
mov r0, r5 ; On prend les 32 bits de poids fort pour convertir au format 10.22/3.29 ?
|
||||
|
||||
pop {pc, r4, r5} ; dépilage de l'adresse de retour
|
||||
endp
|
||||
|
||||
|
||||
cal_comp proc ; r0 = x (signal), r1 = k, r2 = sin ou cos
|
||||
push {r4, r5, r6, r7}
|
||||
mov r3, #0 ; r3 = i
|
||||
mov r5, #0 ; r5 = ik
|
||||
mov r7, #0 ; r7 = 0
|
||||
|
||||
deb_somme ldrh r4, [r0, r3, LSL #1] ; r4 = x[i], LSL #1 pour faire ×2 car chaque valeur est sur 2 octets | format 4.12
|
||||
ldrsh r6, [r2, r5, LSL #1] ; r6 = cos ou sin [ik%N] | format 1.15
|
||||
mla r7, r4, r6, r7 ; r7 += x[i] * cos|sin[ik%n] | format 5.27
|
||||
|
||||
add r5, r1 ; r5 = (i-1)k + k
|
||||
and r5, #N-1 ; r5 = r5 % 64
|
||||
add r3, #1 ; on incrémente i
|
||||
cmp r3, #N ;
|
||||
bne deb_somme
|
||||
|
||||
mov r0, r7
|
||||
pop {r4, r5, r6, r7}
|
||||
bx lr
|
||||
endp
|
||||
|
||||
|
||||
AREA Signal, DATA, READONLY
|
||||
export TabSig
|
||||
|
||||
; Fnor1 = 23.000
|
||||
; Ph1 = -26.565
|
||||
; A1 = 62.000 env. 50mV/3300mV
|
||||
; Fnor2 = 24.000
|
||||
; Ph2 = -116.565
|
||||
; A2 = 1024.000
|
||||
|
||||
; valeurs attendues pour k = 23 :
|
||||
; Re 0x0378FDBD
|
||||
; Im 0x01BAD0C5 env 0.5 * Re, car tan(26.565) ~= 0.5
|
||||
; M2 0x000F0D16 986390
|
||||
;
|
||||
; valeurs attendues pour k = 24 :
|
||||
; Re 0xE36136DD env -0.447 * 2^30
|
||||
; Im 0x393E61CA env -2 * Re, car tan(116.565) ~= 2.0
|
||||
; M2 0x0FFFF53C env 2^28
|
||||
;
|
||||
; pour les autres valeurs de k sauf les alias de 23 et 24 :
|
||||
; M2 < 0x0000000F
|
||||
|
||||
|
||||
TabSig
|
||||
DCW 1646 ; 0 0x066e 0.40186
|
||||
DCW 3006 ; 1 0x0bbe 0.73389
|
||||
DCW 1094 ; 2 0x0446 0.26709
|
||||
DCW 2434 ; 3 0x0982 0.59424
|
||||
DCW 2465 ; 4 0x09a1 0.60181
|
||||
DCW 1066 ; 5 0x042a 0.26025
|
||||
DCW 3018 ; 6 0x0bca 0.73682
|
||||
DCW 1666 ; 7 0x0682 0.40674
|
||||
DCW 1610 ; 8 0x064a 0.39307
|
||||
DCW 3052 ; 9 0x0bec 0.74512
|
||||
DCW 1071 ; 10 0x042f 0.26147
|
||||
DCW 2417 ; 11 0x0971 0.59009
|
||||
DCW 2510 ; 12 0x09ce 0.61279
|
||||
DCW 1026 ; 13 0x0402 0.25049
|
||||
DCW 3024 ; 14 0x0bd0 0.73828
|
||||
DCW 1699 ; 15 0x06a3 0.41479
|
||||
DCW 1562 ; 16 0x061a 0.38135
|
||||
DCW 3080 ; 17 0x0c08 0.75195
|
||||
DCW 1083 ; 18 0x043b 0.26440
|
||||
DCW 2374 ; 19 0x0946 0.57959
|
||||
DCW 2553 ; 20 0x09f9 0.62329
|
||||
DCW 1015 ; 21 0x03f7 0.24780
|
||||
DCW 2995 ; 22 0x0bb3 0.73120
|
||||
DCW 1746 ; 23 0x06d2 0.42627
|
||||
DCW 1531 ; 24 0x05fb 0.37378
|
||||
DCW 3072 ; 25 0x0c00 0.75000
|
||||
DCW 1124 ; 26 0x0464 0.27441
|
||||
DCW 2329 ; 27 0x0919 0.56860
|
||||
DCW 2568 ; 28 0x0a08 0.62695
|
||||
DCW 1041 ; 29 0x0411 0.25415
|
||||
DCW 2948 ; 30 0x0b84 0.71973
|
||||
DCW 1781 ; 31 0x06f5 0.43481
|
||||
DCW 1535 ; 32 0x05ff 0.37476
|
||||
DCW 3033 ; 33 0x0bd9 0.74048
|
||||
DCW 1170 ; 34 0x0492 0.28564
|
||||
DCW 2310 ; 35 0x0906 0.56396
|
||||
DCW 2547 ; 36 0x09f3 0.62183
|
||||
DCW 1087 ; 37 0x043f 0.26538
|
||||
DCW 2910 ; 38 0x0b5e 0.71045
|
||||
DCW 1782 ; 39 0x06f6 0.43506
|
||||
DCW 1570 ; 40 0x0622 0.38330
|
||||
DCW 2986 ; 41 0x0baa 0.72900
|
||||
DCW 1194 ; 42 0x04aa 0.29150
|
||||
DCW 2327 ; 43 0x0917 0.56812
|
||||
DCW 2502 ; 44 0x09c6 0.61084
|
||||
DCW 1127 ; 45 0x0467 0.27515
|
||||
DCW 2904 ; 46 0x0b58 0.70898
|
||||
DCW 1749 ; 47 0x06d5 0.42700
|
||||
DCW 1618 ; 48 0x0652 0.39502
|
||||
DCW 2959 ; 49 0x0b8f 0.72241
|
||||
DCW 1181 ; 50 0x049d 0.28833
|
||||
DCW 2370 ; 51 0x0942 0.57861
|
||||
DCW 2459 ; 52 0x099b 0.60034
|
||||
DCW 1138 ; 53 0x0472 0.27783
|
||||
DCW 2933 ; 54 0x0b75 0.71606
|
||||
DCW 1702 ; 55 0x06a6 0.41553
|
||||
DCW 1649 ; 56 0x0671 0.40259
|
||||
DCW 2967 ; 57 0x0b97 0.72437
|
||||
DCW 1140 ; 58 0x0474 0.27832
|
||||
DCW 2414 ; 59 0x096e 0.58936
|
||||
DCW 2444 ; 60 0x098c 0.59668
|
||||
DCW 1112 ; 61 0x0458 0.27148
|
||||
DCW 2980 ; 62 0x0ba4 0.72754
|
||||
DCW 1668 ; 63 0x0684 0.40723
|
||||
|
||||
|
||||
|
||||
AREA Trigo, DATA, READONLY
|
||||
export TabSin
|
||||
export TabCos
|
||||
|
||||
TabCos
|
||||
DCW 32767 ; 0 0x7fff 0.99997
|
||||
DCW 32610 ; 1 0x7f62 0.99518
|
||||
DCW 32138 ; 2 0x7d8a 0.98077
|
||||
DCW 31357 ; 3 0x7a7d 0.95694
|
||||
DCW 30274 ; 4 0x7642 0.92389
|
||||
DCW 28899 ; 5 0x70e3 0.88193
|
||||
DCW 27246 ; 6 0x6a6e 0.83148
|
||||
DCW 25330 ; 7 0x62f2 0.77301
|
||||
DCW 23170 ; 8 0x5a82 0.70709
|
||||
DCW 20788 ; 9 0x5134 0.63440
|
||||
DCW 18205 ; 10 0x471d 0.55557
|
||||
DCW 15447 ; 11 0x3c57 0.47141
|
||||
DCW 12540 ; 12 0x30fc 0.38269
|
||||
DCW 9512 ; 13 0x2528 0.29028
|
||||
DCW 6393 ; 14 0x18f9 0.19510
|
||||
DCW 3212 ; 15 0x0c8c 0.09802
|
||||
DCW 0 ; 16 0x0000 0.00000
|
||||
DCW -3212 ; 17 0xf374 -0.09802
|
||||
DCW -6393 ; 18 0xe707 -0.19510
|
||||
DCW -9512 ; 19 0xdad8 -0.29028
|
||||
DCW -12540 ; 20 0xcf04 -0.38269
|
||||
DCW -15447 ; 21 0xc3a9 -0.47141
|
||||
DCW -18205 ; 22 0xb8e3 -0.55557
|
||||
DCW -20788 ; 23 0xaecc -0.63440
|
||||
DCW -23170 ; 24 0xa57e -0.70709
|
||||
DCW -25330 ; 25 0x9d0e -0.77301
|
||||
DCW -27246 ; 26 0x9592 -0.83148
|
||||
DCW -28899 ; 27 0x8f1d -0.88193
|
||||
DCW -30274 ; 28 0x89be -0.92389
|
||||
DCW -31357 ; 29 0x8583 -0.95694
|
||||
DCW -32138 ; 30 0x8276 -0.98077
|
||||
DCW -32610 ; 31 0x809e -0.99518
|
||||
DCW -32768 ; 32 0x8000 -1.00000
|
||||
DCW -32610 ; 33 0x809e -0.99518
|
||||
DCW -32138 ; 34 0x8276 -0.98077
|
||||
DCW -31357 ; 35 0x8583 -0.95694
|
||||
DCW -30274 ; 36 0x89be -0.92389
|
||||
DCW -28899 ; 37 0x8f1d -0.88193
|
||||
DCW -27246 ; 38 0x9592 -0.83148
|
||||
DCW -25330 ; 39 0x9d0e -0.77301
|
||||
DCW -23170 ; 40 0xa57e -0.70709
|
||||
DCW -20788 ; 41 0xaecc -0.63440
|
||||
DCW -18205 ; 42 0xb8e3 -0.55557
|
||||
DCW -15447 ; 43 0xc3a9 -0.47141
|
||||
DCW -12540 ; 44 0xcf04 -0.38269
|
||||
DCW -9512 ; 45 0xdad8 -0.29028
|
||||
DCW -6393 ; 46 0xe707 -0.19510
|
||||
DCW -3212 ; 47 0xf374 -0.09802
|
||||
DCW 0 ; 48 0x0000 0.00000
|
||||
DCW 3212 ; 49 0x0c8c 0.09802
|
||||
DCW 6393 ; 50 0x18f9 0.19510
|
||||
DCW 9512 ; 51 0x2528 0.29028
|
||||
DCW 12540 ; 52 0x30fc 0.38269
|
||||
DCW 15447 ; 53 0x3c57 0.47141
|
||||
DCW 18205 ; 54 0x471d 0.55557
|
||||
DCW 20788 ; 55 0x5134 0.63440
|
||||
DCW 23170 ; 56 0x5a82 0.70709
|
||||
DCW 25330 ; 57 0x62f2 0.77301
|
||||
DCW 27246 ; 58 0x6a6e 0.83148
|
||||
DCW 28899 ; 59 0x70e3 0.88193
|
||||
DCW 30274 ; 60 0x7642 0.92389
|
||||
DCW 31357 ; 61 0x7a7d 0.95694
|
||||
DCW 32138 ; 62 0x7d8a 0.98077
|
||||
DCW 32610 ; 63 0x7f62 0.99518
|
||||
TabSin
|
||||
DCW 0 ; 0 0x0000 0.00000
|
||||
DCW 3212 ; 1 0x0c8c 0.09802
|
||||
DCW 6393 ; 2 0x18f9 0.19510
|
||||
DCW 9512 ; 3 0x2528 0.29028
|
||||
DCW 12540 ; 4 0x30fc 0.38269
|
||||
DCW 15447 ; 5 0x3c57 0.47141
|
||||
DCW 18205 ; 6 0x471d 0.55557
|
||||
DCW 20788 ; 7 0x5134 0.63440
|
||||
DCW 23170 ; 8 0x5a82 0.70709
|
||||
DCW 25330 ; 9 0x62f2 0.77301
|
||||
DCW 27246 ; 10 0x6a6e 0.83148
|
||||
DCW 28899 ; 11 0x70e3 0.88193
|
||||
DCW 30274 ; 12 0x7642 0.92389
|
||||
DCW 31357 ; 13 0x7a7d 0.95694
|
||||
DCW 32138 ; 14 0x7d8a 0.98077
|
||||
DCW 32610 ; 15 0x7f62 0.99518
|
||||
DCW 32767 ; 16 0x7fff 0.99997
|
||||
DCW 32610 ; 17 0x7f62 0.99518
|
||||
DCW 32138 ; 18 0x7d8a 0.98077
|
||||
DCW 31357 ; 19 0x7a7d 0.95694
|
||||
DCW 30274 ; 20 0x7642 0.92389
|
||||
DCW 28899 ; 21 0x70e3 0.88193
|
||||
DCW 27246 ; 22 0x6a6e 0.83148
|
||||
DCW 25330 ; 23 0x62f2 0.77301
|
||||
DCW 23170 ; 24 0x5a82 0.70709
|
||||
DCW 20788 ; 25 0x5134 0.63440
|
||||
DCW 18205 ; 26 0x471d 0.55557
|
||||
DCW 15447 ; 27 0x3c57 0.47141
|
||||
DCW 12540 ; 28 0x30fc 0.38269
|
||||
DCW 9512 ; 29 0x2528 0.29028
|
||||
DCW 6393 ; 30 0x18f9 0.19510
|
||||
DCW 3212 ; 31 0x0c8c 0.09802
|
||||
DCW 0 ; 32 0x0000 0.00000
|
||||
DCW -3212 ; 33 0xf374 -0.09802
|
||||
DCW -6393 ; 34 0xe707 -0.19510
|
||||
DCW -9512 ; 35 0xdad8 -0.29028
|
||||
DCW -12540 ; 36 0xcf04 -0.38269
|
||||
DCW -15447 ; 37 0xc3a9 -0.47141
|
||||
DCW -18205 ; 38 0xb8e3 -0.55557
|
||||
DCW -20788 ; 39 0xaecc -0.63440
|
||||
DCW -23170 ; 40 0xa57e -0.70709
|
||||
DCW -25330 ; 41 0x9d0e -0.77301
|
||||
DCW -27246 ; 42 0x9592 -0.83148
|
||||
DCW -28899 ; 43 0x8f1d -0.88193
|
||||
DCW -30274 ; 44 0x89be -0.92389
|
||||
DCW -31357 ; 45 0x8583 -0.95694
|
||||
DCW -32138 ; 46 0x8276 -0.98077
|
||||
DCW -32610 ; 47 0x809e -0.99518
|
||||
DCW -32768 ; 48 0x8000 -1.00000
|
||||
DCW -32610 ; 49 0x809e -0.99518
|
||||
DCW -32138 ; 50 0x8276 -0.98077
|
||||
DCW -31357 ; 51 0x8583 -0.95694
|
||||
DCW -30274 ; 52 0x89be -0.92389
|
||||
DCW -28899 ; 53 0x8f1d -0.88193
|
||||
DCW -27246 ; 54 0x9592 -0.83148
|
||||
DCW -25330 ; 55 0x9d0e -0.77301
|
||||
DCW -23170 ; 56 0xa57e -0.70709
|
||||
DCW -20788 ; 57 0xaecc -0.63440
|
||||
DCW -18205 ; 58 0xb8e3 -0.55557
|
||||
DCW -15447 ; 59 0xc3a9 -0.47141
|
||||
DCW -12540 ; 60 0xcf04 -0.38269
|
||||
DCW -9512 ; 61 0xdad8 -0.29028
|
||||
DCW -6393 ; 62 0xe707 -0.19510
|
||||
DCW -3212 ; 63 0xf374 -0.09802
|
||||
|
||||
END
|
115
challenge/Src/gassp72.h
Normal file
115
challenge/Src/gassp72.h
Normal file
|
@ -0,0 +1,115 @@
|
|||
/**
|
||||
* Bibliotheque GASSP 2013-02-15
|
||||
*
|
||||
* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
|
||||
*
|
||||
*/
|
||||
|
||||
// STM32F10X_CL : pour le STM32F107 "Communication Line"
|
||||
// STM32F10X_MD : pour le STM32F103 "Medium Density"
|
||||
|
||||
//#define STM32F10X_MD // 2019 fix for Keil 5.23
|
||||
|
||||
#include "stm32f10x.h"
|
||||
|
||||
// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
|
||||
void CLOCK_Configure(void);
|
||||
|
||||
// Timers 1, 2, 3, 4 -------------------------------------------------------
|
||||
// la duree entre deux debordements successifs doit etre donnnee en periodes
|
||||
// d'horloge CPU (typiquement 72 MHz)
|
||||
void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
|
||||
|
||||
// activation d'une fonction de traitement de l'interruption timer (callback)
|
||||
void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
|
||||
|
||||
// bloque le timer
|
||||
#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
|
||||
|
||||
// Lance timer
|
||||
#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
|
||||
|
||||
// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
|
||||
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
|
||||
// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
|
||||
// de valeurs acceptees pour moduler la largeur d'impulsion
|
||||
vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
|
||||
|
||||
// Timer systeme "SysTick" -------------------------------------------------
|
||||
|
||||
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
|
||||
void Systick_Period_ff( unsigned int Periode_ticks );
|
||||
|
||||
// activation d'une fonction de traitement de l'interruption timer (callback)
|
||||
void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
|
||||
|
||||
#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
|
||||
#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
|
||||
#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
|
||||
#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
|
||||
|
||||
// ADC - DMA ---------------------------------------------------------------
|
||||
// Analog-to-Digital Conversion, Direct Memory Access
|
||||
|
||||
// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
|
||||
// la fonction rend la duree totale de conversion (meme unites)
|
||||
u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
|
||||
|
||||
// choix d'un canal ADC unique
|
||||
void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
|
||||
|
||||
// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
|
||||
// Les sources de déclenchement possibles :
|
||||
#define TIM1_CC1 0
|
||||
#define TIM1_CC2 1
|
||||
#define TIM1_CC3 2
|
||||
#define TIM2_CC2 3
|
||||
#define TIM4_CC4 5
|
||||
void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
|
||||
|
||||
// initialisation d'acquisition en mode DMA
|
||||
// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
|
||||
void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
|
||||
|
||||
|
||||
// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
|
||||
// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
|
||||
void Start_DMA1( u16 NbEchDMA );
|
||||
|
||||
// arret DMA
|
||||
#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
|
||||
|
||||
// fonction d'attente (bloquante)
|
||||
// la duree depend de la periode d'acquisition et du nombre d'echantillons
|
||||
void Wait_On_End_Of_DMA1(void);
|
||||
|
||||
|
||||
// GPIO --------------------------------------------------------------------
|
||||
|
||||
// Sens
|
||||
#define INPUT 'i'
|
||||
#define OUTPUT 'o'
|
||||
|
||||
// Techno pour pin en entrée (INPUT)
|
||||
#define ANALOG 0
|
||||
#define INPUT_FLOATING 1
|
||||
#define INPUT_PULL_DOWN_UP 2
|
||||
|
||||
// Techno pour pin en sortie (OUTPUT)
|
||||
#define OUTPUT_PPULL 0
|
||||
#define OUTPUT_OPDRAIN 1
|
||||
#define ALT_PPULL 2
|
||||
#define ALT_OPDRAIN 3
|
||||
|
||||
// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
|
||||
// Exemple :
|
||||
// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
|
||||
// Place le bit 8 du port B en sortie Push-pull
|
||||
// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
|
||||
char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
|
||||
|
||||
// Spécifier le numéro de broche (0 à 15)
|
||||
// exemple : Port_IO_Set(GPIOB,8);
|
||||
#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
|
||||
|
||||
#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)
|
BIN
challenge/Src/gassp72.lib
Normal file
BIN
challenge/Src/gassp72.lib
Normal file
Binary file not shown.
9
challenge/Src/principal.c
Normal file
9
challenge/Src/principal.c
Normal file
|
@ -0,0 +1,9 @@
|
|||
const int N = 64;
|
||||
int dft(short* sig[N], int k);
|
||||
extern short* TabSig[N];
|
||||
int resultats[N];
|
||||
|
||||
int main(void) {
|
||||
resultats[5] = dft(TabSig, 5);
|
||||
while(1){}
|
||||
}
|
335
challenge/Src/startup-rvds.s
Normal file
335
challenge/Src/startup-rvds.s
Normal file
|
@ -0,0 +1,335 @@
|
|||
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f10x_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V3.5.0
|
||||
;* Date : 11-March-2011
|
||||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the clock system
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
||||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
;
|
||||
; Enable UsageFault, MemFault and Busfault interrupts
|
||||
;
|
||||
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
|
||||
LDR.W R0, =_SHCSR
|
||||
LDR R1, [R0] ; Read CPACR
|
||||
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
|
||||
STR R1, [R0] ; Write back the modified value to the CPACR
|
||||
DSB ; Wait for store to complete
|
||||
|
||||
;
|
||||
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
|
||||
;
|
||||
_AIRCR EQU 0xE000ED0C
|
||||
_AIRCR_VAL EQU 0x05FA0300
|
||||
LDR.W R0, =_AIRCR
|
||||
LDR.W R1, =_AIRCR_VAL
|
||||
STR R1,[R0]
|
||||
|
||||
;
|
||||
; Finaly, jump to main function (void main (void))
|
||||
;
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
SystemInit PROC
|
||||
EXPORT SystemInit [WEAK]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USB_HP_CAN1_TX_IRQHandler
|
||||
USB_LP_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBWakeUp_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
Loading…
Reference in a new issue