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7 commits

Author SHA1 Message Date
Raphaël LACROIX
30d2d7577d Merge remote-tracking branch 'origin/master' 2023-05-31 22:10:40 +02:00
Raphaël LACROIX
f1671ba4b6 added the new testFile's ASMs 2023-05-31 22:05:48 +02:00
Raphaël LACROIX
a6735071ad fixed typo 2023-05-31 22:03:32 +02:00
Raphaël LACROIX
52ea586362 fixed missing store in post process 2023-05-31 22:01:23 +02:00
Raphaël LACROIX
eb384e3018 wrapped import in order to check for the installation of packages 2023-05-31 22:00:18 +02:00
Raphaël LACROIX
4529d87b04 Added vhdl/inter make options 2023-05-31 21:59:52 +02:00
Raphaël LACROIX
0642e1bab6 Added fibonacci test file 2023-05-31 21:59:39 +02:00
8 changed files with 79 additions and 87 deletions

View file

@ -7,10 +7,9 @@ CFLAGS=-Wall -g
OBJ=yacc.tab.o lex.yy.o table.o operations.o blocs.o asmTable.o
all: $(BIN)
asm: $(BIN)
@touch testFile # to prevent an error in case of deletion
./out < testFile
./out < testFile
build: $(BIN)
@ -29,3 +28,9 @@ $(BIN): $(OBJ)
clean:
rm $(OBJ) yacc.tab.c yacc.tab.h lex.yy.c
vhdl: clean asm
python3 post-process.py
inter: clean asm
python3 graph_interpreter.py

37
asm
View file

@ -1,24 +1,13 @@
AFC 5 0
COP 0 5
AFC 5 20
COP 1 5
AFC 5 0
COP 3 5
AFC 5 1
COP 4 5
ADD 5 3 4
COP 2 5
AFC 5 3
SUB 6 1 5
COP 1 6
SUP 5 0 1
NOT 6 5
JMF 6 24
COP 3 4
COP 4 2
ADD 5 3 4
COP 2 5
AFC 5 1
ADD 6 0 5
COP 0 6
JMP 13
AFC 1 5
COP 0 1
AFC 1 8
EQ 2 0 1
NOT 3 2
JMF 3 13
AFC 4 20
INF 2 0 4
JMF 2 13
AFC 1 2
ADD 4 0 1
COP 0 4
JMP 6

67
asm2
View file

@ -1,58 +1,31 @@
AFC 0 0
STORE 5 0
LOAD 0 5
STORE 0 0
AFC 0 20
STORE 5 0
LOAD 0 5
AFC 0 5
STORE 1 0
AFC 0 0
STORE 5 0
LOAD 0 5
STORE 3 0
AFC 0 1
STORE 5 0
LOAD 0 5
STORE 4 0
LOAD 0 3
LOAD 1 4
ADD 0 0 1
STORE 5 0
LOAD 0 5
STORE 2 0
AFC 0 3
STORE 5 0
LOAD 0 1
LOAD 1 5
SUB 0 0 1
STORE 6 0
LOAD 0 6
STORE 0 0
AFC 0 8
STORE 1 0
LOAD 0 0
LOAD 1 1
SUP 2 1 0
STORE 5 2
LOAD 0 5
NOT 2 0
STORE 6 2
JMF 6 57
LOAD 0 4
STORE 3 0
EQ 2 1 0
STORE 2 2
LOAD 0 2
NOT 2 0
STORE 3 2
JMF 3 30
AFC 0 20
STORE 4 0
LOAD 0 3
LOAD 1 4
ADD 0 0 1
STORE 5 0
LOAD 0 5
STORE 2 0
AFC 0 1
STORE 5 0
LOAD 0 0
LOAD 1 5
LOAD 1 4
INF 2 0 1
STORE 2 2
JMF 2 30
AFC 0 2
STORE 1 0
LOAD 0 0
LOAD 1 1
ADD 0 0 1
STORE 6 0
LOAD 0 6
STORE 4 0
LOAD 0 4
STORE 0 0
JMP 30
JMP 14
NOP

2
asm3
View file

@ -1 +1 @@
((x"06000000"),(x"08050000"),(x"07000500"),(x"08000000"),(x"06001400"),(x"08050000"),(x"07000500"),(x"08010000"),(x"06000000"),(x"08050000"),(x"07000500"),(x"08030000"),(x"06000100"),(x"08050000"),(x"07000500"),(x"08040000"),(x"07000300"),(x"07010400"),(x"01000001"),(x"08050000"),(x"07000500"),(x"08020000"),(x"06000300"),(x"08050000"),(x"07000100"),(x"07010500"),(x"03000001"),(x"08060000"),(x"07000600"),(x"08010000"),(x"07000000"),(x"07010100"),(x"0A020100"),(x"08050200"),(x"07000500"),(x"0C020000"),(x"08060200"),(x"10063900"),(x"07000400"),(x"08030000"),(x"07000200"),(x"08040000"),(x"07000300"),(x"07010400"),(x"01000001"),(x"08050000"),(x"07000500"),(x"08020000"),(x"06000100"),(x"08050000"),(x"07000000"),(x"07010500"),(x"01000001"),(x"08060000"),(x"07000600"),(x"08000000"),(x"0F1E0000"),(x"FF000000"),others => (x"ff000000"))
((x"06000500"),(x"08010000"),(x"07000100"),(x"08000000"),(x"06000800"),(x"08010000"),(x"07000000"),(x"07010100"),(x"0B020100"),(x"08020200"),(x"07000200"),(x"0C020000"),(x"08030200"),(x"10031E00"),(x"06001400"),(x"08040000"),(x"07000000"),(x"07010400"),(x"09020001"),(x"08020200"),(x"10021E00"),(x"06000200"),(x"08010000"),(x"07000000"),(x"07010100"),(x"01000001"),(x"08040000"),(x"07000400"),(x"08000000"),(x"0F0E0000"),(x"FF000000"),others => (x"ff000000"))

View file

@ -1,9 +1,15 @@
import sys
from textual.color import Color
from textual import events
from textual.app import App, ComposeResult
from textual.containers import Container, VerticalScroll
from textual.widgets import Footer, Header, Static
try:
from textual.color import Color
from textual import events
from textual.app import App, ComposeResult
from textual.containers import Container, VerticalScroll
from textual.widgets import Footer, Header, Static
except:
print("please install textual and rich !")
def getLinesToShow(ip, lines):
if ip > 1 and ip + 2 < len(lines):

View file

@ -131,7 +131,7 @@ int cond_sup(int addr1, int addr2){
int cond_eq(int addr1, int addr2) {
int addr = addTempCONDAndGetAddress();
char s[ASM_TEXT_LEN];
sprintf(s, "EQU %d %d %d", addr, addr1, addr2);
sprintf(s, "EQ %d %d %d", addr, addr1, addr2);
printOp(s);
return addr;
}

View file

@ -75,44 +75,59 @@ def convertToRegister(s):
case "JMP":
l.append(" ".join(s))
case "JMF":
l.append(" ".join(s))
if len(s) == 3:
l.append(" ".join(s))
else :
l.append(s[0]+ " 0 " + s[1])
case "INF":
l.append(optionalFlag + "LOAD 0 " + s[2 + incr])
l.append("LOAD 1 " + s[3 + incr])
l.append("INF 2 0 1")
l.append("STORE " + s[1 + incr] + " 2")
case "SUP":
l.append(optionalFlag + "LOAD 0 " + s[2 + incr])
l.append("LOAD 1 " + s[3 + incr])
l.append("SUP 2 1 0")
l.append("STORE " + s[1 + incr] + " 2")
case "EQ":
l.append(optionalFlag + "LOAD 0 " + s[2 + incr])
l.append("LOAD 1 " + s[3 + incr])
l.append("EQ 2 1 0")
l.append("STORE " + s[1 + incr] + " 2")
case "PRI":
l.append(optionalFlag + "PRI " + s[2 + incr])
case "AND":
l.append(optionalFlag + "LOAD 0 " + s[2 + incr])
l.append("LOAD 1 " + s[3 + incr])
l.append("AND 2 0 1")
l.append("STORE " + s[1 + incr] + " 2")
case "OR":
l.append(optionalFlag + "LOAD 0 " + s[2 + incr])
l.append("LOAD 1 " + s[3 + incr])
l.append("OR 2 0 1")
l.append("STORE " + s[1 + incr] + " 2")
case "NOT":
l.append(optionalFlag + "LOAD 0 " + s[2 + incr])
l.append("NOT 2 0")
l.append("STORE " + s[1 + incr] + " 2")
case default:
l.append(" ".join(s))
""" R2 will contain the information whether to jump or not"""
return l
totalLine = 0 # TODO Check the number of line is never reached
totalLine = 0
labelCount = 0 # used to create a new label each time
fileInput = open("asm", "r")
ASMLines = list(map(lambda e: e.rstrip("\n"), fileInput.readlines()))
fileInput.close()
# added to prevent problems when cross compiling some code representing a jump to after the last line
ASMLines.append("NOP")
ASMLinesLabel = ASMLines[:] # will contain at the end of the first loop the code with labels inserted
ASMLinesRegister = [] # will contain at the end of the 2nd loop the registry-based code with labels
ASMLinesFinal = [] # will contain the output, register-based, code
@ -120,9 +135,7 @@ ASMLinesFinal = [] # will contain the output, register-based, code
for i, l in enumerate(ASMLines):
items = l.split(" ")
if items[0] in ["JMP", "JMF"]:
lineToJumpTo = int(items[
1 if items[0] == "JMP" else 2
])
lineToJumpTo = int(items[-1])
if re.match(r"\d_LABEL .*", ASMLinesLabel[lineToJumpTo]):
ASMLinesLabel[i] = " ".join(ASMLines[i].split()[:-1] + [ASMLinesLabel[lineToJumpTo].split()[0]])
else:
@ -158,6 +171,12 @@ for i, l in enumerate(ASMLinesFinal):
while len(arr) < 4:
arr.append(0)
lines.append(f"(x\"{opToBinOP[arr[0]]}{int(arr[1]):02X}{int(arr[2]):02X}{int(arr[3]):02X}\")")
ASMLinesConverted = "(" + ",".join(lines) + ",others => (x\"ff000000\")"
ASMLinesConverted = "(" + ",".join(lines) + ",others => (x\"ff000000\"))"
print("converted to VHDL-friendly format : " + ASMLinesConverted)
output(ASMLinesConverted, 3, True)
""" Used to generate the beautiful table in the report
for i in range(10):
print(f"{ASMLines[i]} & {ASMLinesFinal[i]} & {ASMLinesConverted.split(',')[i]} \\\\")
"""