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updated opcodes

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Raphaël LACROIX 2023-05-29 23:43:05 +02:00
parent 873502243b
commit 8f5be60008
1 changed files with 3 additions and 1 deletions
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VHDL/ALU/ALU.srcs/sources_1/new/Pipeline.vhd
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@ -279,6 +279,8 @@ Stage4 : Stage_Mem_Re PORT MAP (
-- NOT x"0C" -- NOT x"0C"
-- AND x"0D" -- AND x"0D"
-- OR x"0E" -- OR x"0E"
-- JMP x"0F"
-- JMF x"10"
-- NOP x"FF" -- NOP x"FF"
@ -334,4 +336,4 @@ end Behavioral;
-- in case of alea : replace li(31 downto 24) by NOP -- in case of alea : replace li(31 downto 24) by NOP
OP_LI_DI<= X"ff" when nop_Cntrl='1' else li(31 downto 24); OP_LI_DI<= X"ff" when nop_Cntrl='1' else li(31 downto 24);