Processeur/Processeur.srcs/sources_1/new/PeripheriqueClavier.vhd

107 lines
3.1 KiB
VHDL

----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 13.07.2021 09:30:08
-- Design Name:
-- Module Name: PeripheriqueClavier - Behavioral
-- Project Name:
-- Target Devices:
-- Tool Versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity PeripheriqueClavier is
Generic (Nb_Bits : Natural);
Port ( CLK : in STD_LOGIC;
RST : in STD_LOGIC;
PS2Clk : in STD_LOGIC;
PS2Data : in STD_LOGIC;
STD_IN : out STD_LOGIC_VECTOR (Nb_Bits - 1 downto 0);
STD_IN_Av : out STD_LOGIC;
STD_IN_Request : in STD_LOGIC;
STD_OUT : out STD_LOGIC_VECTOR (Nb_Bits - 1 downto 0);
STD_OUT_Av : out STD_LOGIC);
end PeripheriqueClavier;
architecture Behavioral of PeripheriqueClavier is
component KeyboardDriver
Generic (Nb_Bits : Natural);
Port (CLK : in STD_LOGIC;
Data_read : out STD_LOGIC;
Data_av : in STD_LOGIC;
Data : in STD_LOGIC_VECTOR (0 to 6);
STD_IN : out STD_LOGIC_VECTOR (Nb_Bits - 1 downto 0);
STD_IN_Av : out STD_LOGIC;
STD_IN_Request : in STD_LOGIC;
STD_OUT : out STD_LOGIC_VECTOR (Nb_Bits - 1 downto 0);
STD_OUT_Av : out STD_LOGIC);
end component;
component Keyboard
Port (CLK : in STD_LOGIC;
PS2Clk : in STD_LOGIC;
PS2Data : in STD_LOGIC;
Data_read : in STD_LOGIC;
Data_av : out STD_LOGIC;
Data : out STD_LOGIC_VECTOR (0 to 6);
alert : out STD_LOGIC);
end component;
signal Data_read : STD_LOGIC := '0';
signal Data_av : STD_LOGIC := '0';
signal Data : STD_LOGIC_VECTOR (0 to 6) := (others => '0');
signal nothing : STD_LOGIC := '0';
begin
instance_Keyboard : Keyboard
port map (CLK => CLK,
PS2Clk => PS2Clk,
PS2Data => PS2Data,
Data_read => Data_read,
Data_av => Data_av,
Data => Data,
alert => nothing);
instance_KeyboardDriver : KeyboardDriver
generic map (Nb_Bits => Nb_Bits)
port map (CLK => CLK,
Data_read => Data_read,
Data_av => Data_av,
Data => Data,
STD_IN => STD_IN,
STD_IN_Av => STD_IN_Av,
STD_IN_Request => STD_IN_Request,
STD_OUT => STD_OUT,
STD_OUT_Av => STD_OUT_Av);
end Behavioral;