OK a tester
This commit is contained in:
parent
80022a688b
commit
78216ace0a
5 changed files with 242 additions and 88 deletions
9
al.lex
9
al.lex
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@ -13,7 +13,7 @@ yyerror (char const *s)
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%%
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"ADD" { return tADD ;}
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"SUB" { return tSUB;}
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"SOU" { return tSUB;}
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"MUL" { return tMUL; }
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"DIV" { return tDIV; }
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"INF" { return tINF; }
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@ -23,7 +23,6 @@ yyerror (char const *s)
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"AFC" { return tAFC; }
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"COP" { return tCPY; }
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"AFCA" { return tAFCA; }
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"COPA" { return tCPYA; }
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"READ" { return tREAD; }
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@ -42,9 +41,9 @@ yyerror (char const *s)
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[0-9]+ { yylval.nombre = atoi(yytext); return tNB; }
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"\n"
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" "
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"\t"
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"\n" {}
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" " {}
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"\t" {}
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%%
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127
as.y
127
as.y
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@ -6,11 +6,12 @@
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#include <stdio.h>
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FILE * file;
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FILE * file2;
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%}
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%token tMUL tDIV tADD tSUB tINF tSUP tEQU
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%token tAFC tCPY tAFCA tCPYA
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%token tAFC tCPY tAFCA
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%token tREAD tWR
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%token tJMP tJMF
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%token tGET tPRI
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@ -25,134 +26,132 @@ Programme : Instruction;
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Instruction : tMUL tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "MUL %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(MUL, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tADD tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "ADD %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(ADD, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tDIV tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "DIV %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(DIV, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tSUB tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "SUB %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(SUB, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tINF tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "INF %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(INF, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tSUP tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "SUP %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(SUP, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tEQU tNB tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src1 = get_reg_read($3, file, &added_instruction);
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int reg_src2 = get_reg_read($4, file, &added_instruction);
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fprintf(file, "EQU %d %d %d\n", reg_dest, reg_src1, reg_src2);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src1 = get_reg_read($3, &added_instruction);
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int reg_src2 = get_reg_read($4, &added_instruction);
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add_instruction(EQU, reg_dest, reg_src1, reg_src2);
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new_instruction(added_instruction + 1);};
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Instruction : tAFC tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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fprintf(file, "AFC %d %d\n", reg_dest, $3);
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int reg_dest = get_reg_write($2, &added_instruction);
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add_instruction(AFC, reg_dest, $3, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tCPY tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src = get_reg_read($3, file, &added_instruction);
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fprintf(file, "CPY %d %d\n", reg_dest, reg_src);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_src = get_reg_read($3, &added_instruction);
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add_instruction(CPY, reg_dest, reg_src, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tAFCA tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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fprintf(file, "AFCA %d %d\n", reg_dest, $3);
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new_instruction(added_instruction + 1);};
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Instruction : tCPYA tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_src = get_reg_read($3, file, &added_instruction);
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fprintf(file, "CPYA %d %d\n", reg_dest, reg_src);
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new_instruction(added_instruction + 1);};
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int reg_aux = get_reg_write(-1, &added_instruction);
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add_instruction(AFC, reg_aux, $3, 0);
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add_instruction(STOREA, $2, reg_aux, 0);
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new_instruction(added_instruction + 2);};
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Instruction : tJMP tNB {increment_time();
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fprintf(file, "JMP %d\n", $2);
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add_instruction(JMP, $2, 0, 0);
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new_instruction(1);};
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Instruction : tJMF tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_src = get_reg_read($2, file, &added_instruction);
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int reg_aux = get_reg_write(-1, file, &added_instruction);
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fprintf(file, "SUB %d %d %d\n", reg_aux, reg_aux, reg_src);
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fprintf(file, "JMZ %d\n", $3);
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int reg_src = get_reg_read($2, &added_instruction);
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int reg_aux = get_reg_write(-1, &added_instruction);
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add_instruction(SUB, reg_aux, reg_aux, reg_src);
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add_instruction(JMZ, $3, 0, 0);
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new_instruction(added_instruction + 2);};
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Instruction : tWR tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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int reg_addr = get_reg_read($3, file, &added_instruction);
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fprintf(file, "LOADA %d %d\n", reg_dest, reg_addr);
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int reg_dest = get_reg_write($2, &added_instruction);
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int reg_addr = get_reg_read($3, &added_instruction);
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add_instruction(LOADI, reg_dest, reg_addr, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tREAD tNB tNB {increment_time();
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int added_instruction = 0;
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int reg_addr = get_reg_read($2, file, &added_instruction);
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int reg_value = get_reg_read($3, file, &added_instruction);
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fprintf(file, "STOREA %d %d\n", reg_addr, reg_value);
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int reg_addr = get_reg_read($2, &added_instruction);
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int reg_value = get_reg_read($3, &added_instruction);
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add_instruction(STOREI, reg_addr, reg_value, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tGET tNB {increment_time();
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int added_instruction = 0;
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int reg_dest = get_reg_write($2, file, &added_instruction);
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fprintf(file, "GET %d\n", reg_dest);
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int reg_dest = get_reg_write($2, &added_instruction);
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add_instruction(GET, reg_dest, 0, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tPRI tNB {increment_time();
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int added_instruction = 0;
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int reg_src = get_reg_read($2, file, &added_instruction);
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fprintf(file, "PRI %d\n", reg_src);
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int reg_src = get_reg_read($2, &added_instruction);
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add_instruction(PRI, reg_src, 0, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tCALL tNB tNB {increment_time();
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int added_instruction = flush_and_init(file);
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fprintf(file, "CALL %d %d\n", $2, $3);
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add_instruction(STOP, $2, $3, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tRET {increment_time();
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int added_instruction = flush_and_init(file);
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fprintf(file, "RET\n");
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add_instruction(RET, 0, 0, 0);
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new_instruction(added_instruction + 1);};
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Instruction : tSTOP {increment_time();
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fprintf(file, "STOP\n");
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Instruction : tSTOP tNB {increment_time();
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add_instruction(STOP, $2, 0, 0);
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new_instruction(1);};
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%%
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int main(void) {
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file = stdout;
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init();
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file = fopen("output.asm", "w");
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file2 = fopen("output.bin", "w");
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init();
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yyparse();
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write_asm(file);
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write_code_machine(file2);
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return 0;
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}
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138
tables.c
138
tables.c
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@ -13,9 +13,122 @@
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#include "tables.h"
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#define NB_REG 4
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#define MEM_SIZE 1024
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#define NB_INSTRUCTIONS 1024
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#define MEM_SIZE 16
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#define NB_INSTRUCTIONS 64
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#define MEM_INST_SIZE 64
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#define NB_BITS_INSTRUCTION 5
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#define NB_BITS 8
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int traduction_JMP[NB_INSTRUCTIONS];
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struct str_instruction {
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enum instruction_t instruction;
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int param1;
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int param2;
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int param3;
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};
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int last_instruction = 0;
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struct str_instruction buffer[3*NB_INSTRUCTIONS];
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void add_instruction(enum instruction_t inst, int param1, int param2, int param3) {
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struct str_instruction my_instruction = {inst, param1, param2, param3};
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buffer[last_instruction] = my_instruction;
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last_instruction++;
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}
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void write_asm(FILE * file) {
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int i = 0;
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while (i<MEM_INST_SIZE) {
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if (buffer[i].instruction == ADD) {
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fprintf(file, "ADD %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == SUB) {
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fprintf(file, "SUB %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == MUL) {
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fprintf(file, "MUL %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == DIV) {
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fprintf(file, "DIV %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == INF) {
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fprintf(file, "INF %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == SUP) {
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fprintf(file, "SUP %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == EQU) {
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fprintf(file, "EQU %d %d %d\n", buffer[i].param1, buffer[i].param2, buffer[i].param3);
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} else if (buffer[i].instruction == AFC) {
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fprintf(file, "AFC %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == CPY) {
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fprintf(file, "CPY %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == LOAD) {
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fprintf(file, "LOAD %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == STORE) {
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fprintf(file, "STORE %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == LOADI) {
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fprintf(file, "LOADI %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == STOREI) {
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fprintf(file, "STOREI %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == STOREA) {
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fprintf(file, "STOREA %d %d\n", buffer[i].param1, buffer[i].param2);
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} else if (buffer[i].instruction == JMP) {
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fprintf(file, "JMP %d\n", traduction_JMP[buffer[i].param1]);
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} else if (buffer[i].instruction == JMZ) {
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fprintf(file, "JMZ %d\n", traduction_JMP[buffer[i].param1]);
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} else if (buffer[i].instruction == GET) {
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fprintf(file, "GET %d\n", buffer[i].param1);
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} else if (buffer[i].instruction == PRI) {
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fprintf(file, "PRI %d\n", buffer[i].param1);
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} else if (buffer[i].instruction == CALL) {
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fprintf(file, "CALL %d %d\n", traduction_JMP[buffer[i].param1], buffer[i].param2);
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} else if (buffer[i].instruction == RET) {
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fprintf(file, "RET\n");
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} else if (buffer[i].instruction == STOP) {
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fprintf(file, "STOP %d\n", buffer[i].param1);
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}
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i++;
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}
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}
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void int_2_bin(char * buff, int n) {
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int _m = n;
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for (int i = 0; i < 32; i++) {
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buff[31 - i] = ((_m & (1 << 31)) ? '1' : '0');
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_m = _m << 1;
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}
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}
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void convert_to_binary_on_N(int value, int N, char * buff) {
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char tampon[33];
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int_2_bin(tampon, value);
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int i;
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for (i = N-1; i>=0; i--) {
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buff[N-1-i] = tampon[i];
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}
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buff[N] = '\0';
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}
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void write_instruction_binary(FILE * file, struct str_instruction instr) {
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char buff1[33];
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char buff2[33];
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char buff3[33];
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char buff4[33];
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convert_to_binary_on_N(instr.instruction, NB_BITS_INSTRUCTION, buff1);
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convert_to_binary_on_N(instr.param1, NB_BITS, buff2);
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convert_to_binary_on_N(instr.param2, NB_BITS, buff3);
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convert_to_binary_on_N(instr.param3, NB_BITS, buff4);
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fprintf(file, "\"%s%s%s%s\" & ", buff1, buff2, buff3, buff4);
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}
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void write_code_machine(FILE * file) {
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int i = MEM_INST_SIZE - 1;
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while (i>=0) {
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write_instruction_binary(file, buffer[i]);
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i--;
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}
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}
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struct case_adresse {
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@ -26,7 +139,6 @@ struct case_adresse {
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struct case_adresse tableau[MEM_SIZE];
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int registres[NB_REG];
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int traduction_JMP[NB_INSTRUCTIONS];
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void init (void) {
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int i;
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||||
|
@ -38,6 +150,10 @@ void init (void) {
|
|||
for (i=0; i<NB_REG; i++) {
|
||||
registres[i] = 0;
|
||||
}
|
||||
struct str_instruction nop = {NOP, 0, 0, 0};
|
||||
for (i=0; i<MEM_INST_SIZE; i++) {
|
||||
buffer[i] = nop;
|
||||
}
|
||||
}
|
||||
|
||||
void print_case_adresse(struct case_adresse case_courante) {
|
||||
|
@ -98,14 +214,14 @@ int get_register() {
|
|||
return index_max;
|
||||
}
|
||||
|
||||
int get_reg_write(int adresse, FILE * file, int * added_instruction) {
|
||||
int get_reg_write(int adresse, int * added_instruction) {
|
||||
if (adresse == -1) {
|
||||
int dispo = get_register();
|
||||
int previous_addr = get_adresse(dispo);
|
||||
if (previous_addr != -1) {
|
||||
struct case_adresse ancienne_case = get_info(previous_addr);
|
||||
if (ancienne_case.modifie == 1) {
|
||||
fprintf(file, "STORE %d %d\n", previous_addr, dispo);
|
||||
add_instruction(STORE, previous_addr, dispo, 0);
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
set_modifie(previous_addr, 0);
|
||||
}
|
||||
|
@ -122,7 +238,7 @@ int get_reg_write(int adresse, FILE * file, int * added_instruction) {
|
|||
struct case_adresse ancienne_case = get_info(previous_addr);
|
||||
if (ancienne_case.modifie == 1) {
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
fprintf(file, "STORE %d %d\n", previous_addr, dispo);
|
||||
add_instruction(STORE, previous_addr, dispo, 0);
|
||||
set_modifie(previous_addr, 0);
|
||||
}
|
||||
set_registre(previous_addr, -1);
|
||||
|
@ -137,7 +253,7 @@ int get_reg_write(int adresse, FILE * file, int * added_instruction) {
|
|||
}
|
||||
}
|
||||
|
||||
int get_reg_read(int adresse, FILE * file, int * added_instruction) {
|
||||
int get_reg_read(int adresse, int * added_instruction) {
|
||||
struct case_adresse ma_case = get_info(adresse);
|
||||
if (ma_case.registre == -1) {
|
||||
int dispo = get_register();
|
||||
|
@ -146,13 +262,13 @@ int get_reg_read(int adresse, FILE * file, int * added_instruction) {
|
|||
struct case_adresse ancienne_case = get_info(previous_addr);
|
||||
if (ancienne_case.modifie == 1) {
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
fprintf(file, "STORE %d %d\n", previous_addr, dispo);
|
||||
add_instruction(STORE, previous_addr, dispo, 0);
|
||||
set_modifie(previous_addr, 0);
|
||||
}
|
||||
set_registre(previous_addr, -1);
|
||||
}
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
fprintf(file, "LOAD %d %d\n", dispo, adresse);
|
||||
add_instruction(LOAD, dispo, adresse, 0);
|
||||
set_registre(adresse, dispo);
|
||||
refresh_registre(dispo);
|
||||
return dispo;
|
||||
|
@ -163,7 +279,7 @@ int get_reg_read(int adresse, FILE * file, int * added_instruction) {
|
|||
}
|
||||
|
||||
|
||||
int flush_and_init(FILE * file) {
|
||||
int flush_and_init() {
|
||||
int i;
|
||||
int added_instruction = 0;
|
||||
for (i = 0; i<MEM_SIZE; i++) {
|
||||
|
@ -171,7 +287,7 @@ int flush_and_init(FILE * file) {
|
|||
if (tableau[i].modifie == 0) {
|
||||
tableau[i].registre = -1;
|
||||
} else {
|
||||
fprintf(file, "STORE %d %d\n", i, tableau[i].registre);
|
||||
add_instruction(STORE, i, tableau[i].registre, 0);
|
||||
added_instruction++;
|
||||
tableau[i].registre = -1;
|
||||
tableau[i].modifie = 0;
|
||||
|
|
13
tables.h
13
tables.h
|
@ -13,14 +13,21 @@
|
|||
----------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
enum instruction_t {NOP, ADD, MUL, SUB, DIV, INF, SUP, EQU, CPY, AFC, LOAD, STORE, LOADI, STOREI, STOREA, JMP, JMZ, PRI, GET, CALL, RET, STOP};
|
||||
|
||||
void init(void);
|
||||
void increment_time();
|
||||
int get_reg_read(int adresse, FILE * file, int * added_instruction);
|
||||
int get_reg_write(int adresse, FILE * file, int * added_instruction);
|
||||
int flush_and_init(FILE * file);
|
||||
int get_reg_read(int adresse, int * added_instruction);
|
||||
int get_reg_write(int adresse, int * added_instruction);
|
||||
int flush_and_init();
|
||||
void new_instruction(int nb_inst);
|
||||
void write_asm(FILE * file);
|
||||
void write_code_machine(FILE * file);
|
||||
void add_instruction(enum instruction_t inst, int param1, int param2, int param3);
|
||||
|
||||
#endif
|
||||
|
|
43
toto.asm
43
toto.asm
|
@ -1,8 +1,41 @@
|
|||
AFC 0 1
|
||||
JMP 31
|
||||
AFC 1 1
|
||||
AFC 2 1
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
AFC 4 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
AFC 2 10
|
||||
WR 1 2
|
||||
AFC 1 0
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
READ 1 1
|
||||
PRI 1
|
||||
STOP 15
|
||||
AFC 1 2
|
||||
COP 0 1
|
||||
RET
|
||||
AFC 1 0
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
AFC 2 1
|
||||
WR 1 2
|
||||
COP 1 0
|
||||
CALL 1 1
|
||||
AFC 1 1
|
||||
COP 0 1
|
||||
RET
|
||||
AFCA 5 0
|
||||
CALL 19 5
|
||||
AFC 5 1
|
||||
AFC 6 1
|
||||
MUL 0 1 2
|
||||
AFCA 6 0
|
||||
AFC 7 1
|
||||
MUL 5 7 5
|
||||
ADD 5 6 5
|
||||
READ 5 5
|
||||
PRI 5
|
||||
STOP 0
|
||||
|
|
Loading…
Reference in a new issue