Début Nettoyage
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16 changed files with 409 additions and 4115 deletions
61
Makefile
61
Makefile
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@ -1,7 +1,54 @@
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build :
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gcc -Wall -c tables.c -o tables.o
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bison -d -t as.y
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flex -o lex.yy.c al.lex
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gcc -Wall -c as.tab.c -o as.tab.o
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gcc -Wall -c lex.yy.c -o lex.yy.o
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gcc as.tab.o lex.yy.o tables.o -ll -o rondoudou_cross_assembleur
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default :
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@echo "Spécifiez une cible"
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###########################
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### NETTOYAGE ###
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###########################
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clean_all : clean clean_Inputs clean_Outputs
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clean: clean_Lex_Yacc clean_Tables
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@rm -f rondoudou_cross_assembleur
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clean_Tables:
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@rm -f Tables/*.o
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clean_Lex_Yacc:
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@rm -f Lex_Yacc/as.output Lex_Yacc/as.tab.* Lex_Yacc/lex.yy.*
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clean_Inputs:
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@rm -f Inputs/*
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clean_Outputs:
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@rm -f Outputs/*
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###########################
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### COMPILATION ###
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###########################
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build : clean build_Tables build_Lex_Yacc
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gcc Lex_Yacc/as.tab.o Lex_Yacc/lex.yy.o Tables/tables.o -ll -o rondoudou_cross_assembleur
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build_Tables: clean_Tables
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gcc -c Tables/tables.c -o Tables/tables.o
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build_Lex_Yacc: clean_Lex_Yacc
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bison -g -v -d -t -b Lex_Yacc/as Lex_Yacc/as.y
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flex -o Lex_Yacc/lex.yy.c Lex_Yacc/al.lex
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gcc -c Lex_Yacc/as.tab.c -o Lex_Yacc/as.tab.o
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gcc -c Lex_Yacc/lex.yy.c -o Lex_Yacc/lex.yy.o
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###########################
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### EDITION ###
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###########################
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edit_Lex_Yacc:
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pluma Lex_Yacc/al.lex Lex_Yacc/as.y &
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edit_Tables:
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pluma Tables/tables.c Tables/tables.h &
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edit: edit_Lex_Yacc edit_Tables
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@ -1,26 +1,24 @@
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/*
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----------------------------------------
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| Adresse | Registre | Modifié |
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----------------------------------------
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| | | |
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| | | |
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| | | |
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| i | 0x777756b8 | int |
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| size | 0x777756b8 | int |
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----------------------------------------
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*/
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#include "tables.h"
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#define NB_REG 4
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#define MEM_SIZE 16
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#define NB_INSTRUCTIONS 128
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#define MEM_INST_SIZE 128
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#define NB_BITS_INSTRUCTION 5
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#define NB_BITS 8
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int traduction_JMP[NB_INSTRUCTIONS];
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/**************************************************/
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/**************************************************/
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/***************** Initialisation *****************/
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/**************************************************/
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/**************************************************/
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// Buffer to patch Jumps difference due to adding LOAD and STORE
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int traduction_JMP[MEM_INST_SIZE];
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// Index of the buffer
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int last_instruction = 0;
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// Structure coding an instruction
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struct str_instruction {
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enum instruction_t instruction;
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int param1;
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int param3;
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};
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int last_instruction = 0;
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struct str_instruction buffer[3*NB_INSTRUCTIONS];
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// Buffer to store registers oriented instructions
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struct str_instruction buffer[3*MEM_INST_SIZE];
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// Structure coding an address and the correpondance with a register
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struct case_adresse {
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int adresse;
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int registre;
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char modifie;
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};
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// Buffer of addresses (Memory)
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struct case_adresse tableau[MEM_SIZE];
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// Buffer to manage priority policy
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int registres[NB_REG];
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// Initialise all : the addresses-registers association table, the registers priority table, the instructions buffer, the instruction address association table
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void init (void) {
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int i;
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struct case_adresse case_courante = {0, -1, 0};
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for (i=0; i<MEM_SIZE; i++) {
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case_courante.adresse = i;
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tableau[i] = case_courante;
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}
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for (i=0; i<NB_REG; i++) {
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registres[i] = 0;
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}
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struct str_instruction nop = {NOP, 0, 0, 0};
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for (i=0; i<MEM_INST_SIZE; i++) {
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buffer[i] = nop;
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}
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}
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/**************************************************/
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/**************************************************/
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/************** Registers Management **************/
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/**************************************************/
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/**************************************************/
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// INTERN FUNCTION
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// Print a case address
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void print_case_adresse(struct case_adresse case_courante) {
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printf("{addr : %d ; reg : %d ; modi : %d}\n", case_courante.adresse, case_courante.registre, (int)case_courante.modifie);
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}
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// Print the adresses-registers correspondance table
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void print() {
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int i;
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for (i=0; i<MEM_SIZE; i++) {
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print_case_adresse(tableau[i]);
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}
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}
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// INTERN FUNCTION
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// return the case corresponding to the given address
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struct case_adresse get_info(int adresse) {
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return tableau[adresse];
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}
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// INTERN FUNCTION
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// return the address corresponding to the given register
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int get_adresse (int registre) {
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int i = 0;
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while (i < MEM_SIZE && tableau[i].registre != registre) {
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i++;
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}
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if (i == MEM_SIZE) {
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return -1;
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} else {
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return tableau[i].adresse;
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}
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}
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// INTERN FUNCTION
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// Set the given register to the given address
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void set_registre(int adresse, int registre) {
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tableau[adresse].registre = registre;
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}
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// INTERN FUNCTION
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// Set modifie to the address (0 the value in the memory is up to date, 1 the value in the register is more recent)
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void set_modifie(int adresse, char modifie) {
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tableau[adresse].modifie = modifie;
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}
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// Increment the register priority policy buffer
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void increment_time() {
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int i;
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for (i=0; i<NB_REG; i++) {
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registres[i]++;
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}
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}
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// INTERN FUNCTION
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// Specifie that the given register have been used
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void refresh_registre(int registre) {
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registres[registre] = 0;
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}
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// INTERN FUNCTION
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// Return the LRU register
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int get_register() {
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int i;
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int index_max = 0;
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for (i=0; i<NB_REG; i++) {
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if (registres[index_max] < registres[i]) {
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index_max = i;
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}
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}
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return index_max;
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}
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/* Ask for a register to read the value
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@param :
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- adresse : The address of value wanted
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- added_instruction : Address of an int storing the number of added_instructions
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@return : The number of the register corresponding to the given address
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*/
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int get_reg_read(int adresse, int * added_instruction) {
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struct case_adresse ma_case = get_info(adresse);
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if (ma_case.registre == -1) {
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int dispo = get_register();
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int previous_addr = get_adresse(dispo);
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if (previous_addr != -1) {
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struct case_adresse ancienne_case = get_info(previous_addr);
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if (ancienne_case.modifie == 1) {
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*added_instruction = (*added_instruction) + 1;
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add_instruction(STORE, previous_addr, dispo, 0);
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set_modifie(previous_addr, 0);
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}
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set_registre(previous_addr, -1);
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}
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*added_instruction = (*added_instruction) + 1;
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add_instruction(LOAD, dispo, adresse, 0);
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set_registre(adresse, dispo);
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refresh_registre(dispo);
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return dispo;
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} else {
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refresh_registre(ma_case.registre);
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return ma_case.registre;
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}
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}
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/* Ask for a register to write the value
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@param :
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- adresse : The address of value (if -1 return a free register without associating it to any address)
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- added_instruction : Address of an int storing the number of added_instructions
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@return : The number of the register corresponding to the given address
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WARNING : The value of the address will not be LOADED in the register
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Always ask READ registers before the WRITE register
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*/
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int get_reg_write(int adresse, int * added_instruction) {
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if (adresse == -1) {
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int dispo = get_register();
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int previous_addr = get_adresse(dispo);
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if (previous_addr != -1) {
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struct case_adresse ancienne_case = get_info(previous_addr);
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if (ancienne_case.modifie == 1) {
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add_instruction(STORE, previous_addr, dispo, 0);
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*added_instruction = (*added_instruction) + 1;
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set_modifie(previous_addr, 0);
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}
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set_registre(previous_addr, -1);
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}
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return dispo;
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} else {
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set_modifie(adresse, 1);
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struct case_adresse ma_case = get_info(adresse);
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if (ma_case.registre == -1) {
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int dispo = get_register();
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int previous_addr = get_adresse(dispo);
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if (previous_addr != -1) {
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struct case_adresse ancienne_case = get_info(previous_addr);
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if (ancienne_case.modifie == 1) {
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*added_instruction = (*added_instruction) + 1;
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add_instruction(STORE, previous_addr, dispo, 0);
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set_modifie(previous_addr, 0);
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}
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set_registre(previous_addr, -1);
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}
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set_registre(adresse, dispo);
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refresh_registre(dispo);
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return dispo;
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} else {
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refresh_registre(ma_case.registre);
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return ma_case.registre;
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}
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}
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}
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// Broke the association between adresse and its corresponding register
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void unlink(int adresse) {
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set_registre(adresse, -1);
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}
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// Store used register, init the association table between addresses and registers
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int flush_and_init() {
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int i;
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int added_instruction = 0;
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for (i = 0; i<MEM_SIZE; i++) {
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if (tableau[i].registre != -1) {
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if (tableau[i].modifie == 0) {
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tableau[i].registre = -1;
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} else {
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add_instruction(STORE, i, tableau[i].registre, 0);
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added_instruction++;
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tableau[i].registre = -1;
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tableau[i].modifie = 0;
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}
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}
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}
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for (i=0; i<NB_REG; i++) {
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registres[i] = 0;
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}
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return added_instruction;
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}
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/**************************************************/
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/**************************************************/
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/************** Instructions Writing **************/
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/**************************************************/
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/**************************************************/
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// Add a new Registers oriented instruction
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void add_instruction(enum instruction_t inst, int param1, int param2, int param3) {
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struct str_instruction my_instruction = {inst, param1, param2, param3};
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buffer[last_instruction] = my_instruction;
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last_instruction++;
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}
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// Specifie the number of Register oriented instructions corresponding to the memory oriented instruction
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void new_instruction(int nb_inst) {
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static int last_intruction_adresse = 0;
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static int current_instruction = 0;
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traduction_JMP[current_instruction] = last_intruction_adresse;
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current_instruction++;
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last_intruction_adresse += nb_inst;
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}
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// Write the new assembly in the given file
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void write_asm(FILE * file) {
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int i = 0;
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while (i<MEM_INST_SIZE) {
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@ -91,6 +329,8 @@ void write_asm(FILE * file) {
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}
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}
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// INTERN FUNCTION
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// Write binary value of n in buff
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void int_2_bin(char * buff, int n) {
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int _m = n;
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for (int i = 0; i < 32; i++) {
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@ -99,6 +339,8 @@ void int_2_bin(char * buff, int n) {
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}
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}
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// INTERN FUNCTION
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// Write binary value of value in buff on N bits
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void convert_to_binary_on_N(int value, int N, char * buff) {
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char tampon[33];
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int_2_bin(tampon, value);
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@ -109,6 +351,9 @@ void convert_to_binary_on_N(int value, int N, char * buff) {
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buff[N] = '\0';
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}
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// INTERN FUNCTION
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// Write a binary instruction in the given file
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// If not compact ("010..10" & ) else only (010..10)
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void write_instruction_binary(FILE * file, struct str_instruction instr, char compact) {
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char buff1[33];
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char buff2[33];
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}
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}
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void write_code_machine(FILE * file) {
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int i = MEM_INST_SIZE - 1;
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while (i>=0) {
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write_instruction_binary(file, buffer[i], 0);
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i--;
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}
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}
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void write_code_machine_compact(FILE * file) {
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printf(file, "\"");
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int i = MEM_INST_SIZE - 1;
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while (i>=0) {
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write_instruction_binary(file, buffer[i], 1);
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i--;
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}
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printf(file, "\"\n");
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}
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struct case_adresse {
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int adresse;
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int registre;
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char modifie;
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};
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struct case_adresse tableau[MEM_SIZE];
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int registres[NB_REG];
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void init (void) {
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int i;
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struct case_adresse case_courante = {0, -1, 0};
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for (i=0; i<MEM_SIZE; i++) {
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case_courante.adresse = i;
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tableau[i] = case_courante;
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}
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for (i=0; i<NB_REG; i++) {
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registres[i] = 0;
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}
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struct str_instruction nop = {NOP, 0, 0, 0};
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for (i=0; i<MEM_INST_SIZE; i++) {
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buffer[i] = nop;
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}
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}
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void print_case_adresse(struct case_adresse case_courante) {
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printf("{addr : %d ; reg : %d ; modi : %d}\n", case_courante.adresse, case_courante.registre, (int)case_courante.modifie);
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}
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void print() {
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int i;
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for (i=0; i<MEM_SIZE; i++) {
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print_case_adresse(tableau[i]);
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}
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}
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struct case_adresse get_info(int adresse) {
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return tableau[adresse];
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}
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int get_adresse (int registre) {
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int i = 0;
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while (i < MEM_SIZE && tableau[i].registre != registre) {
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i++;
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}
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if (i == MEM_SIZE) {
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return -1;
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// Write the binary code in the given file
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void write_code_machine(FILE * file, char compact) {
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if (compact) {
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int i = MEM_INST_SIZE - 1;
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while (i>=0) {
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write_instruction_binary(file, buffer[i], 0);
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i--;
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}
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} else {
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return tableau[i].adresse;
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}
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}
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void set_registre(int adresse, int registre) {
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tableau[adresse].registre = registre;
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}
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void set_modifie(int adresse, char modifie) {
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tableau[adresse].modifie = modifie;
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}
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void increment_time() {
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int i;
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for (i=0; i<NB_REG; i++) {
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registres[i]++;
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}
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}
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void refresh_registre(int registre) {
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registres[registre] = 0;
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}
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int get_register() {
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int i;
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int index_max = 0;
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for (i=0; i<NB_REG; i++) {
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if (registres[index_max] < registres[i]) {
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index_max = i;
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}
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||||
}
|
||||
return index_max;
|
||||
}
|
||||
|
||||
int get_reg_write(int adresse, int * added_instruction) {
|
||||
if (adresse == -1) {
|
||||
int dispo = get_register();
|
||||
int previous_addr = get_adresse(dispo);
|
||||
if (previous_addr != -1) {
|
||||
struct case_adresse ancienne_case = get_info(previous_addr);
|
||||
if (ancienne_case.modifie == 1) {
|
||||
add_instruction(STORE, previous_addr, dispo, 0);
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
set_modifie(previous_addr, 0);
|
||||
}
|
||||
set_registre(previous_addr, -1);
|
||||
}
|
||||
return dispo;
|
||||
} else {
|
||||
set_modifie(adresse, 1);
|
||||
struct case_adresse ma_case = get_info(adresse);
|
||||
if (ma_case.registre == -1) {
|
||||
int dispo = get_register();
|
||||
int previous_addr = get_adresse(dispo);
|
||||
if (previous_addr != -1) {
|
||||
struct case_adresse ancienne_case = get_info(previous_addr);
|
||||
if (ancienne_case.modifie == 1) {
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
add_instruction(STORE, previous_addr, dispo, 0);
|
||||
set_modifie(previous_addr, 0);
|
||||
}
|
||||
set_registre(previous_addr, -1);
|
||||
}
|
||||
set_registre(adresse, dispo);
|
||||
refresh_registre(dispo);
|
||||
return dispo;
|
||||
} else {
|
||||
refresh_registre(ma_case.registre);
|
||||
return ma_case.registre;
|
||||
printf(file, "\"");
|
||||
int i = MEM_INST_SIZE - 1;
|
||||
while (i>=0) {
|
||||
write_instruction_binary(file, buffer[i], 1);
|
||||
i--;
|
||||
}
|
||||
printf(file, "\"\n");
|
||||
}
|
||||
}
|
||||
|
||||
int get_reg_read(int adresse, int * added_instruction) {
|
||||
struct case_adresse ma_case = get_info(adresse);
|
||||
if (ma_case.registre == -1) {
|
||||
int dispo = get_register();
|
||||
int previous_addr = get_adresse(dispo);
|
||||
if (previous_addr != -1) {
|
||||
struct case_adresse ancienne_case = get_info(previous_addr);
|
||||
if (ancienne_case.modifie == 1) {
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
add_instruction(STORE, previous_addr, dispo, 0);
|
||||
set_modifie(previous_addr, 0);
|
||||
}
|
||||
set_registre(previous_addr, -1);
|
||||
}
|
||||
*added_instruction = (*added_instruction) + 1;
|
||||
add_instruction(LOAD, dispo, adresse, 0);
|
||||
set_registre(adresse, dispo);
|
||||
refresh_registre(dispo);
|
||||
return dispo;
|
||||
} else {
|
||||
refresh_registre(ma_case.registre);
|
||||
return ma_case.registre;
|
||||
}
|
||||
}
|
||||
|
||||
void unlink(int adresse) {
|
||||
set_registre(adresse, -1);
|
||||
}
|
||||
|
||||
int flush_and_init() {
|
||||
int i;
|
||||
int added_instruction = 0;
|
||||
for (i = 0; i<MEM_SIZE; i++) {
|
||||
if (tableau[i].registre != -1) {
|
||||
if (tableau[i].modifie == 0) {
|
||||
tableau[i].registre = -1;
|
||||
} else {
|
||||
add_instruction(STORE, i, tableau[i].registre, 0);
|
||||
added_instruction++;
|
||||
tableau[i].registre = -1;
|
||||
tableau[i].modifie = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
for (i=0; i<NB_REG; i++) {
|
||||
registres[i] = 0;
|
||||
}
|
||||
return added_instruction;
|
||||
}
|
||||
|
||||
void new_instruction(int nb_inst) {
|
||||
static int last_intruction_adresse = 0;
|
||||
static int current_instruction = 0;
|
||||
traduction_JMP[current_instruction] = last_intruction_adresse;
|
||||
current_instruction++;
|
||||
last_intruction_adresse += nb_inst;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
79
Tables/tables.h
Normal file
79
Tables/tables.h
Normal file
|
@ -0,0 +1,79 @@
|
|||
#ifndef TABLE_H
|
||||
#define TABLE_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
|
||||
// Initialise all : the addresses-registers association table, the registers priority table, the instructions buffer, the instruction address association table
|
||||
void init(void);
|
||||
|
||||
|
||||
|
||||
|
||||
/**************************************************/
|
||||
/**************************************************/
|
||||
/************** Registers Management **************/
|
||||
/**************************************************/
|
||||
/**************************************************/
|
||||
|
||||
// Print the addresses-registers association table
|
||||
void print();
|
||||
|
||||
// Increment the input instruction counter
|
||||
void increment_time();
|
||||
|
||||
/* Ask for a register to read the value
|
||||
|
||||
@param :
|
||||
- adresse : The address of value wanted
|
||||
- added_instruction : Address of an int storing the number of added_instructions
|
||||
@return : The number of the register corresponding to the given address
|
||||
*/
|
||||
int get_reg_read(int adresse, int * added_instruction);
|
||||
|
||||
/* Ask for a register to write the value
|
||||
|
||||
@param :
|
||||
- adresse : The address of value (if -1 return a free register without associating it to any address)
|
||||
- added_instruction : Address of an int storing the number of added_instructions
|
||||
@return : The number of the register corresponding to the given address
|
||||
|
||||
WARNING : The value of the address will not be LOADED in the register
|
||||
Always ask READ registers before the WRITE register
|
||||
*/
|
||||
int get_reg_write(int adresse, int * added_instruction);
|
||||
|
||||
// Broke the association between adresse and its corresponding register
|
||||
void unlink(int adresse);
|
||||
|
||||
// Store used register, init the association table between addresses and registers
|
||||
int flush_and_init();
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**************************************************/
|
||||
/**************************************************/
|
||||
/************** Instructions Writing **************/
|
||||
/**************************************************/
|
||||
/**************************************************/
|
||||
|
||||
|
||||
// Enum of the register oriented instruction (warning order correspond to the binary code)
|
||||
enum instruction_t {NOP, ADD, MUL, SUB, DIV, INF, SUP, EQU, CPY, AFC, LOAD, STORE, LOADI, STOREI, STOREA, JMP, JMZ, PRI, GET, CALL, RET, STOP};
|
||||
|
||||
// Add a new Registers oriented instruction
|
||||
void add_instruction(enum instruction_t inst, int param1, int param2, int param3);
|
||||
|
||||
// Specifie the number of Register oriented instructions corresponding to the memory oriented instruction
|
||||
void new_instruction(int nb_inst);
|
||||
|
||||
// Write the new assembly in the given file
|
||||
void write_asm(FILE * file);
|
||||
|
||||
// Write the binary code in the given file
|
||||
void write_code_machine(FILE * file, char compact);
|
||||
|
||||
#endif
|
93
as.tab.h
93
as.tab.h
|
@ -1,93 +0,0 @@
|
|||
/* A Bison parser, made by GNU Bison 3.0.4. */
|
||||
|
||||
/* Bison interface for Yacc-like parsers in C
|
||||
|
||||
Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc.
|
||||
|
||||
This program is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||
|
||||
/* As a special exception, you may create a larger work that contains
|
||||
part or all of the Bison parser skeleton and distribute that work
|
||||
under terms of your choice, so long as that work isn't itself a
|
||||
parser generator using the skeleton or a modified version thereof
|
||||
as a parser skeleton. Alternatively, if you modify or redistribute
|
||||
the parser skeleton itself, you may (at your option) remove this
|
||||
special exception, which will cause the skeleton and the resulting
|
||||
Bison output files to be licensed under the GNU General Public
|
||||
License without this special exception.
|
||||
|
||||
This special exception was added by the Free Software Foundation in
|
||||
version 2.2 of Bison. */
|
||||
|
||||
#ifndef YY_YY_AS_TAB_H_INCLUDED
|
||||
# define YY_YY_AS_TAB_H_INCLUDED
|
||||
/* Debug traces. */
|
||||
#ifndef YYDEBUG
|
||||
# define YYDEBUG 1
|
||||
#endif
|
||||
#if YYDEBUG
|
||||
extern int yydebug;
|
||||
#endif
|
||||
|
||||
/* Token type. */
|
||||
#ifndef YYTOKENTYPE
|
||||
# define YYTOKENTYPE
|
||||
enum yytokentype
|
||||
{
|
||||
tMUL = 258,
|
||||
tDIV = 259,
|
||||
tADD = 260,
|
||||
tSUB = 261,
|
||||
tINF = 262,
|
||||
tSUP = 263,
|
||||
tEQU = 264,
|
||||
tAFC = 265,
|
||||
tCPY = 266,
|
||||
tAFCA = 267,
|
||||
tREAD = 268,
|
||||
tWR = 269,
|
||||
tJMP = 270,
|
||||
tJMF = 271,
|
||||
tGET = 272,
|
||||
tPRI = 273,
|
||||
tCALL = 274,
|
||||
tRET = 275,
|
||||
tSTOP = 276,
|
||||
tNB = 277
|
||||
};
|
||||
#endif
|
||||
|
||||
/* Value type. */
|
||||
#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
|
||||
|
||||
union YYSTYPE
|
||||
{
|
||||
#line 1 "as.y" /* yacc.c:1909 */
|
||||
|
||||
int nombre;
|
||||
|
||||
#line 81 "as.tab.h" /* yacc.c:1909 */
|
||||
};
|
||||
|
||||
typedef union YYSTYPE YYSTYPE;
|
||||
# define YYSTYPE_IS_TRIVIAL 1
|
||||
# define YYSTYPE_IS_DECLARED 1
|
||||
#endif
|
||||
|
||||
|
||||
extern YYSTYPE yylval;
|
||||
|
||||
int yyparse (void);
|
||||
|
||||
#endif /* !YY_YY_AS_TAB_H_INCLUDED */
|
BIN
as.tab.o
BIN
as.tab.o
Binary file not shown.
BIN
lex.yy.o
BIN
lex.yy.o
Binary file not shown.
84
output.asm
84
output.asm
|
@ -1,84 +0,0 @@
|
|||
JMP 48
|
||||
AFC 0 1
|
||||
LOAD 1 0
|
||||
CPY 2 1
|
||||
AFC 3 1
|
||||
MUL 0 3 0
|
||||
ADD 0 2 0
|
||||
LOADI 0 0
|
||||
PRI 0
|
||||
AFC 0 0
|
||||
CPY 2 1
|
||||
AFC 3 1
|
||||
MUL 0 3 0
|
||||
ADD 0 2 0
|
||||
AFC 2 14
|
||||
STOREI 0 2
|
||||
AFC 0 2
|
||||
CPY 1 0
|
||||
STORE 0 1
|
||||
STORE 1 0
|
||||
STORE 2 2
|
||||
STORE 3 3
|
||||
RET
|
||||
AFC 0 0
|
||||
LOAD 1 0
|
||||
CPY 2 1
|
||||
AFC 3 1
|
||||
MUL 0 3 0
|
||||
ADD 0 2 0
|
||||
LOADI 0 0
|
||||
PRI 0
|
||||
AFC 0 1
|
||||
CPY 2 1
|
||||
AFC 3 1
|
||||
MUL 0 3 0
|
||||
ADD 0 2 0
|
||||
AFC 2 10
|
||||
STOREI 0 2
|
||||
CPY 0 1
|
||||
STORE 1 0
|
||||
STORE 2 2
|
||||
STORE 3 3
|
||||
CALL 1 1
|
||||
AFC 0 1
|
||||
CPY 1 0
|
||||
STORE 0 1
|
||||
STORE 1 0
|
||||
RET
|
||||
AFC 0 0
|
||||
AFC 1 0
|
||||
STOREA 3 1
|
||||
AFC 1 1
|
||||
MUL 0 1 0
|
||||
LOAD 2 3
|
||||
ADD 0 2 0
|
||||
AFC 3 1
|
||||
STOREI 0 3
|
||||
AFC 2 1
|
||||
STORE 5 1
|
||||
AFC 1 0
|
||||
STOREA 4 1
|
||||
AFC 1 1
|
||||
MUL 2 1 2
|
||||
STORE 2 0
|
||||
LOAD 0 4
|
||||
ADD 2 0 2
|
||||
AFC 3 12
|
||||
STOREI 2 3
|
||||
STORE 6 1
|
||||
AFC 1 0
|
||||
STOREA 4 1
|
||||
STORE 3 2
|
||||
STORE 5 3
|
||||
CALL 23 4
|
||||
AFC 0 0
|
||||
AFC 1 0
|
||||
STOREA 5 1
|
||||
AFC 1 1
|
||||
MUL 0 1 0
|
||||
LOAD 2 5
|
||||
ADD 0 2 0
|
||||
LOADI 0 0
|
||||
PRI 0
|
||||
STOP 0
|
|
@ -1 +0,0 @@
|
|||
0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101010000000000000000000000001000100000000000000000000000001100000000000000000000000000000010000000000000010000000000101000000010000001010000000000010000000000000000100000000010010000000100000001000000000111000000101000000010000000001001000000010000000000000000010010000000000000000000000001001100010111000001000000000001011000001010000001100000000010110000001100000010000000000111000000100000000010000000001001000000010000000000000000010110000011000000001000000000110100000010000000110000000001001000000110000110000000000000010000001000000000000000100101000000000000001000000000001011000000100000000000000000000100000001000000001000000100100100000001000000010000000001110000001000000000100000000010010000000100000000000000000101100000101000000010000000001001000000100000000100000000011010000000000000011000000000100100000011000000010000000000001000000000000001000000000010100000001000000011000000000001000000000000000010000000001001000000010000000100000000011100000001100000001000000000100100000001000000000000000001001000000000000000000000000101000000000000000000000000000101100000001000000000000000001011000000000000000100000000010000000000100000000000000000100100000000000000010000000010011000000010000000100000000010110000001100000011000000000101100000010000000100000000001011000000010000000000000000010000000000000000001000000000110100000000000000100000000001001000000100000101000000000000010000000000000010000000000001000000000000000110000000001001000000110000000100000000010000000001000000001000000000100100000000000000010000000010001000000000000000000000000011000000000000000000000000000000100000000000000100000000000010000000000000001100000000010010000001100000001000000000100000000010000000010000000001010000000010000000000000000010010000000000000000000000001010000000000000000000000000001011000000110000001100000000010110000001000000010000000000101100000001000000000000000001011000000000000000100000000010000000000100000000000000000100100000000000000100000000001101000000000000001000000000010010000001000001110000000000000100000000000000100000000000010000000000000001100000000010010000001100000001000000000100000000010000000010000000001001000000000000000000000000100010000000000000000000000000110000000000000000000000000000001000000000000001000000000000100000000000000011000000000100100000011000000010000000001000000000100000000100000000010100000000100000000000000000100100000000000000010000000001111001100000000000000000000
|
Binary file not shown.
35
tables.h
35
tables.h
|
@ -1,35 +0,0 @@
|
|||
#ifndef TABLE_H
|
||||
#define TABLE_H
|
||||
|
||||
/*
|
||||
----------------------------------------
|
||||
| Adresse | Registre | Modifié |
|
||||
----------------------------------------
|
||||
| | | |
|
||||
| | | |
|
||||
| | | |
|
||||
| i | 0x777756b8 | int |
|
||||
| size | 0x777756b8 | int |
|
||||
----------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
enum instruction_t {NOP, ADD, MUL, SUB, DIV, INF, SUP, EQU, CPY, AFC, LOAD, STORE, LOADI, STOREI, STOREA, JMP, JMZ, PRI, GET, CALL, RET, STOP};
|
||||
|
||||
void init(void);
|
||||
void print();
|
||||
void increment_time();
|
||||
int get_reg_read(int adresse, int * added_instruction);
|
||||
int get_reg_write(int adresse, int * added_instruction);
|
||||
void unlink(int adresse);
|
||||
int flush_and_init();
|
||||
void new_instruction(int nb_inst);
|
||||
void write_asm(FILE * file);
|
||||
void write_code_machine(FILE * file);
|
||||
void add_instruction(enum instruction_t inst, int param1, int param2, int param3);
|
||||
|
||||
#endif
|
BIN
tables.o
BIN
tables.o
Binary file not shown.
62
toto.asm
62
toto.asm
|
@ -1,62 +0,0 @@
|
|||
JMP 37
|
||||
AFC 1 1
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
READ 1 1
|
||||
PRI 1
|
||||
AFC 1 0
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
AFC 2 14
|
||||
WR 1 2
|
||||
AFC 1 2
|
||||
COP 0 1
|
||||
RET
|
||||
AFC 1 0
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
READ 1 1
|
||||
PRI 1
|
||||
AFC 1 1
|
||||
COP 2 0
|
||||
AFC 3 1
|
||||
MUL 1 3 1
|
||||
ADD 1 2 1
|
||||
AFC 2 10
|
||||
WR 1 2
|
||||
COP 1 0
|
||||
CALL 1 1
|
||||
AFC 1 1
|
||||
COP 0 1
|
||||
RET
|
||||
AFC 2 0
|
||||
AFCA 3 0
|
||||
AFC 5 1
|
||||
MUL 2 5 2
|
||||
ADD 2 3 2
|
||||
AFC 4 1
|
||||
WR 2 4
|
||||
AFC 3 1
|
||||
AFCA 4 0
|
||||
AFC 6 1
|
||||
MUL 3 6 3
|
||||
ADD 3 4 3
|
||||
AFC 5 12
|
||||
WR 3 5
|
||||
AFCA 4 0
|
||||
CALL 18 4
|
||||
AFC 4 0
|
||||
AFCA 5 0
|
||||
AFC 6 1
|
||||
MUL 4 6 4
|
||||
ADD 4 5 4
|
||||
READ 4 4
|
||||
PRI 4
|
||||
STOP 0
|
||||
|
Loading…
Reference in a new issue