etape 1
This commit is contained in:
Nabzzz
parent
c395711e15
commit
dce171cb25
14 changed files with 5016 additions and 1 deletions
36
PROJ_DEUX/DebugConfig/Simu_STM32F103RB_1.0.0.dbgconf
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36
PROJ_DEUX/DebugConfig/Simu_STM32F103RB_1.0.0.dbgconf
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// File: STM32F101_102_103_105_107.dbgconf
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// Version: 1.0.0
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// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
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// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Debug MCU configuration register (DBGMCU_CR)
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// <i> Reserved bits must be kept at reset value
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// <o.30> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
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// <o.29> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
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// <o.28> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
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// <o.27> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
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// <o.26> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
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// <o.25> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
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// <o.21> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
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// <o.20> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
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// <o.19> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
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// <o.18> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
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// <o.17> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
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// <o.16> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
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// <o.15> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
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// <o.14> DBG_CAN1_STOP <i> Debug CAN1 stopped when Core is halted
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// <o.13> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
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// <o.12> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
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// <o.11> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
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// <o.10> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
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// <o.9> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
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// <o.8> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
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// <o.2> DBG_STANDBY <i> Debug standby mode
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// <o.1> DBG_STOP <i> Debug stop mode
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// <o.0> DBG_SLEEP <i> Debug sleep mode
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// </h>
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DbgMCU_CR = 0x00000007;
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// <<< end of configuration section >>>
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0
PROJ_DEUX/Etape1a.c
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0
PROJ_DEUX/Etape1a.c
Normal file
1860
PROJ_DEUX/Project.uvguix.nmouk
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1860
PROJ_DEUX/Project.uvguix.nmouk
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File diff suppressed because one or more lines are too long
279
PROJ_DEUX/Project.uvoptx
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279
PROJ_DEUX/Project.uvoptx
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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<SchemaVersion>1.0</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Extensions>
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<cExt>*.c</cExt>
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<aExt>*.s*; *.src; *.a*</aExt>
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<oExt>*.obj; *.o</oExt>
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<lExt>*.lib</lExt>
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<tExt>*.txt; *.h; *.inc</tExt>
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<pExt>*.plm</pExt>
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<CppX>*.cpp</CppX>
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<nMigrate>0</nMigrate>
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</Extensions>
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<DaveTm>
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<dwLowDateTime>0</dwLowDateTime>
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<dwHighDateTime>0</dwHighDateTime>
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</DaveTm>
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<Target>
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<TargetName>Simu</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<CLKADS>8000000</CLKADS>
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<OPTTT>
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<gFlags>1</gFlags>
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<BeepAtEnd>1</BeepAtEnd>
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<RunSim>0</RunSim>
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<RunTarget>1</RunTarget>
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<RunAbUc>0</RunAbUc>
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</OPTTT>
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<OPTHX>
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<HexSelection>1</HexSelection>
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<FlashByte>65535</FlashByte>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<HexOffset>0</HexOffset>
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</OPTHX>
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<OPTLEX>
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<PageWidth>79</PageWidth>
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<PageLength>66</PageLength>
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<TabStop>8</TabStop>
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<ListingPath></ListingPath>
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</OPTLEX>
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<ListingPage>
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<CreateCListing>1</CreateCListing>
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<CreateAListing>1</CreateAListing>
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<CreateLListing>1</CreateLListing>
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<CreateIListing>0</CreateIListing>
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<AsmCond>1</AsmCond>
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<AsmSymb>1</AsmSymb>
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<AsmXref>0</AsmXref>
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<CCond>1</CCond>
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<CCode>0</CCode>
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<CListInc>0</CListInc>
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<CSymb>0</CSymb>
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<LinkerCodeListing>0</LinkerCodeListing>
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</ListingPage>
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<OPTXL>
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<LMap>1</LMap>
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<LComments>1</LComments>
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<LGenerateSymbols>1</LGenerateSymbols>
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<LLibSym>1</LLibSym>
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<LLines>1</LLines>
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<LLocSym>1</LLocSym>
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<LPubSym>1</LPubSym>
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<LXref>0</LXref>
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<LExpSel>0</LExpSel>
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</OPTXL>
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<OPTFL>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<IsCurrentTarget>1</IsCurrentTarget>
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</OPTFL>
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<CpuCode>18</CpuCode>
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<DebugOpt>
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<uSim>1</uSim>
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<uTrg>0</uTrg>
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<sLdApp>1</sLdApp>
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<sGomain>1</sGomain>
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<sRbreak>1</sRbreak>
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<sRwatch>1</sRwatch>
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<sRmem>1</sRmem>
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<sRfunc>1</sRfunc>
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<sRbox>1</sRbox>
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<tLdApp>1</tLdApp>
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<tGomain>1</tGomain>
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<tRbreak>1</tRbreak>
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<tRwatch>1</tRwatch>
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<tRmem>1</tRmem>
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<tRfunc>1</tRfunc>
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<tRbox>1</tRbox>
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<tRtrace>1</tRtrace>
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<sRSysVw>1</sRSysVw>
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<tRSysVw>1</tRSysVw>
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<sRunDeb>0</sRunDeb>
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<sLrtime>0</sLrtime>
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<bEvRecOn>1</bEvRecOn>
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<bSchkAxf>0</bSchkAxf>
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<bTchkAxf>0</bTchkAxf>
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<nTsel>5</nTsel>
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<sDll></sDll>
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<sDllPa></sDllPa>
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<sDlgDll></sDlgDll>
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<sDlgPa></sDlgPa>
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<sIfile></sIfile>
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<tDll></tDll>
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<tDllPa></tDllPa>
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<tDlgDll></tDlgDll>
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<tDlgPa></tDlgPa>
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<tIfile></tIfile>
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<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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</DebugOpt>
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<TargetDriverDllRegistry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>DLGDARM</Key>
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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=1312,154,1733,580,1)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ARMRTXEVENTFLAGS</Key>
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<Name>-L70 -Z18 -C0 -M0 -T1</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>DLGTARM</Key>
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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ARMDBGFLAGS</Key>
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<Name>-T0</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>DLGUARM</Key>
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<Name>(105=-1,-1,-1,-1,0)</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>UL2CM3</Key>
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<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ST-LINKIII-KEIL_SWO</Key>
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<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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<Tracepoint>
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<THDelay>0</THDelay>
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</Tracepoint>
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<DebugFlag>
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<trace>0</trace>
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<periodic>1</periodic>
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<aLwin>1</aLwin>
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<aCover>0</aCover>
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<aSer1>0</aSer1>
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<aSer2>0</aSer2>
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<aPa>0</aPa>
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<viewmode>1</viewmode>
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<vrSel>0</vrSel>
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<aSym>0</aSym>
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<aTbox>0</aTbox>
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<AscS1>0</AscS1>
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<AscS2>0</AscS2>
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<AscS3>0</AscS3>
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<aSer3>0</aSer3>
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<eProf>0</eProf>
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<aLa>0</aLa>
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<aPa1>0</aPa1>
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<AscS4>0</AscS4>
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<aSer4>0</aSer4>
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<StkLoc>0</StkLoc>
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<TrcWin>0</TrcWin>
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||||
<newCpu>0</newCpu>
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<uProt>0</uProt>
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</DebugFlag>
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<LintExecutable></LintExecutable>
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<LintConfigFile></LintConfigFile>
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<bLintAuto>0</bLintAuto>
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<bAutoGenD>0</bAutoGenD>
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<LntExFlags>0</LntExFlags>
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||||
<pMisraName></pMisraName>
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<pszMrule></pszMrule>
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<pSingCmds></pSingCmds>
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<pMultCmds></pMultCmds>
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||||
<pMisraNamep></pMisraNamep>
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||||
<pszMrulep></pszMrulep>
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||||
<pSingCmdsp></pSingCmdsp>
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||||
<pMultCmdsp></pMultCmdsp>
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||||
<SystemViewers>
|
||||
<Entry>
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||||
<Name>System Viewer\GPIOB</Name>
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||||
<WinId>35905</WinId>
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||||
</Entry>
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||||
</SystemViewers>
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||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>0</EnableFlashSeq>
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||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
</DebugDescription>
|
||||
</TargetOption>
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||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Sources</GroupName>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>1</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
|
||||
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>2</FileNumber>
|
||||
<FileType>1</FileType>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\principal.c</PathWithFileName>
|
||||
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>3</FileNumber>
|
||||
<FileType>2</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\callback.s</PathWithFileName>
|
||||
<FilenameWithoutPath>callback.s</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
<File>
|
||||
<GroupNumber>1</GroupNumber>
|
||||
<FileNumber>4</FileNumber>
|
||||
<FileType>4</FileType>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<bDave2>0</bDave2>
|
||||
<PathWithFileName>.\Src\gassp72.lib</PathWithFileName>
|
||||
<FilenameWithoutPath>gassp72.lib</FilenameWithoutPath>
|
||||
<RteFlg>0</RteFlg>
|
||||
<bShared>0</bShared>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>1</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
427
PROJ_DEUX/Project.uvprojx
Normal file
427
PROJ_DEUX/Project.uvprojx
Normal file
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@ -0,0 +1,427 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>Simu</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F103RB</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId></DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Obj\</OutputDirectory>
|
||||
<OutputName>CHTI</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath></ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>0</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP</SimDllArguments>
|
||||
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4100</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x5000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x5000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls>--C99</MiscControls>
|
||||
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Sources</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup-rvds.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Src\startup-rvds.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>principal.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\Src\principal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>callback.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\callback.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>gassp72.lib</FileName>
|
||||
<FileType>4</FileType>
|
||||
<FilePath>.\Src\gassp72.lib</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
|
||||
<targetInfos>
|
||||
<targetInfo name="Simu"/>
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
21
PROJ_DEUX/RTE/_Simu/RTE_Components.h
Normal file
21
PROJ_DEUX/RTE/_Simu/RTE_Components.h
Normal file
|
|
@ -0,0 +1,21 @@
|
|||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'Project'
|
||||
* Target: 'Simu'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "stm32f10x.h"
|
||||
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
||||
115
PROJ_DEUX/Src/gassp72.h
Normal file
115
PROJ_DEUX/Src/gassp72.h
Normal file
|
|
@ -0,0 +1,115 @@
|
|||
/**
|
||||
* Bibliotheque GASSP 2013-02-15
|
||||
*
|
||||
* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
|
||||
*
|
||||
*/
|
||||
|
||||
// STM32F10X_CL : pour le STM32F107 "Communication Line"
|
||||
// STM32F10X_MD : pour le STM32F103 "Medium Density"
|
||||
|
||||
//#define STM32F10X_MD // 2019 fix for Keil 5.23
|
||||
|
||||
#include "stm32f10x.h"
|
||||
|
||||
// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
|
||||
void CLOCK_Configure(void);
|
||||
|
||||
// Timers 1, 2, 3, 4 -------------------------------------------------------
|
||||
// la duree entre deux debordements successifs doit etre donnnee en periodes
|
||||
// d'horloge CPU (typiquement 72 MHz)
|
||||
void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
|
||||
|
||||
// activation d'une fonction de traitement de l'interruption timer (callback)
|
||||
void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
|
||||
|
||||
// bloque le timer
|
||||
#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
|
||||
|
||||
// Lance timer
|
||||
#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
|
||||
|
||||
// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
|
||||
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
|
||||
// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
|
||||
// de valeurs acceptees pour moduler la largeur d'impulsion
|
||||
vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
|
||||
|
||||
// Timer systeme "SysTick" -------------------------------------------------
|
||||
|
||||
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
|
||||
void Systick_Period_ff( unsigned int Periode_ticks );
|
||||
|
||||
// activation d'une fonction de traitement de l'interruption timer (callback)
|
||||
void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
|
||||
|
||||
#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
|
||||
#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
|
||||
#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
|
||||
#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
|
||||
|
||||
// ADC - DMA ---------------------------------------------------------------
|
||||
// Analog-to-Digital Conversion, Direct Memory Access
|
||||
|
||||
// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
|
||||
// la fonction rend la duree totale de conversion (meme unites)
|
||||
u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
|
||||
|
||||
// choix d'un canal ADC unique
|
||||
void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
|
||||
|
||||
// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
|
||||
// Les sources de déclenchement possibles :
|
||||
#define TIM1_CC1 0
|
||||
#define TIM1_CC2 1
|
||||
#define TIM1_CC3 2
|
||||
#define TIM2_CC2 3
|
||||
#define TIM4_CC4 5
|
||||
void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
|
||||
|
||||
// initialisation d'acquisition en mode DMA
|
||||
// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
|
||||
void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
|
||||
|
||||
|
||||
// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
|
||||
// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
|
||||
void Start_DMA1( u16 NbEchDMA );
|
||||
|
||||
// arret DMA
|
||||
#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
|
||||
|
||||
// fonction d'attente (bloquante)
|
||||
// la duree depend de la periode d'acquisition et du nombre d'echantillons
|
||||
void Wait_On_End_Of_DMA1(void);
|
||||
|
||||
|
||||
// GPIO --------------------------------------------------------------------
|
||||
|
||||
// Sens
|
||||
#define INPUT 'i'
|
||||
#define OUTPUT 'o'
|
||||
|
||||
// Techno pour pin en entrée (INPUT)
|
||||
#define ANALOG 0
|
||||
#define INPUT_FLOATING 1
|
||||
#define INPUT_PULL_DOWN_UP 2
|
||||
|
||||
// Techno pour pin en sortie (OUTPUT)
|
||||
#define OUTPUT_PPULL 0
|
||||
#define OUTPUT_OPDRAIN 1
|
||||
#define ALT_PPULL 2
|
||||
#define ALT_OPDRAIN 3
|
||||
|
||||
// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
|
||||
// Exemple :
|
||||
// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
|
||||
// Place le bit 8 du port B en sortie Push-pull
|
||||
// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
|
||||
char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
|
||||
|
||||
// Spécifier le numéro de broche (0 à 15)
|
||||
// exemple : Port_IO_Set(GPIOB,8);
|
||||
#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
|
||||
|
||||
#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)
|
||||
BIN
PROJ_DEUX/Src/gassp72.lib
Normal file
BIN
PROJ_DEUX/Src/gassp72.lib
Normal file
Binary file not shown.
7
PROJ_DEUX/Src/principal.c
Normal file
7
PROJ_DEUX/Src/principal.c
Normal file
|
|
@ -0,0 +1,7 @@
|
|||
|
||||
int main(void)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
335
PROJ_DEUX/Src/startup-rvds.s
Normal file
335
PROJ_DEUX/Src/startup-rvds.s
Normal file
|
|
@ -0,0 +1,335 @@
|
|||
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f10x_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V3.5.0
|
||||
;* Date : 11-March-2011
|
||||
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
|
||||
;* toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the clock system
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
||||
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
||||
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
||||
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
||||
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_IRQHandler ; Tamper
|
||||
DCD RTC_IRQHandler ; RTC
|
||||
DCD FLASH_IRQHandler ; Flash
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_2_IRQHandler ; ADC1_2
|
||||
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
||||
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
||||
;
|
||||
; Enable UsageFault, MemFault and Busfault interrupts
|
||||
;
|
||||
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
|
||||
LDR.W R0, =_SHCSR
|
||||
LDR R1, [R0] ; Read CPACR
|
||||
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
|
||||
STR R1, [R0] ; Write back the modified value to the CPACR
|
||||
DSB ; Wait for store to complete
|
||||
|
||||
;
|
||||
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
|
||||
;
|
||||
_AIRCR EQU 0xE000ED0C
|
||||
_AIRCR_VAL EQU 0x05FA0300
|
||||
LDR.W R0, =_AIRCR
|
||||
LDR.W R1, =_AIRCR_VAL
|
||||
STR R1,[R0]
|
||||
|
||||
;
|
||||
; Finaly, jump to main function (void main (void))
|
||||
;
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
SystemInit PROC
|
||||
EXPORT SystemInit [WEAK]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_2_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTCAlarm_IRQHandler [WEAK]
|
||||
EXPORT USBWakeUp_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_2_IRQHandler
|
||||
USB_HP_CAN1_TX_IRQHandler
|
||||
USB_LP_CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTCAlarm_IRQHandler
|
||||
USBWakeUp_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
||||
38
PROJ_DEUX/callback.s
Normal file
38
PROJ_DEUX/callback.s
Normal file
|
|
@ -0,0 +1,38 @@
|
|||
; ce programme est pour l'assembleur RealView (Keil)
|
||||
thumb
|
||||
area madata, data, readwrite
|
||||
export echelon
|
||||
echelon dcd 0
|
||||
|
||||
area moncode, code, readonly
|
||||
export timer_callback
|
||||
|
||||
timer_callback proc
|
||||
|
||||
GPIOB_BSRR equ 0x40010C10 ; Bit Set/Reset register
|
||||
|
||||
ldr r2, =echelon
|
||||
ldr r0,[r2]
|
||||
CBZ r0, misea1
|
||||
|
||||
|
||||
; mise a zero de PB1
|
||||
ldr r3, =GPIOB_BSRR
|
||||
mov r1, #0x00020000
|
||||
str r1, [r3]
|
||||
add r0, #-1
|
||||
str r0,[r2]
|
||||
B finn
|
||||
|
||||
; mise a 1 de PB1
|
||||
misea1 ldr r3, =GPIOB_BSRR
|
||||
mov r1, #0x00000002
|
||||
str r1, [r3]
|
||||
add r0, #1
|
||||
str r0,[r2]
|
||||
; N.B. le registre BSRR est write-only, on ne peut pas le relire
|
||||
|
||||
finn bx lr;
|
||||
endp
|
||||
;
|
||||
end
|
||||
1887
PROJ_UN/Project.uvguix.nmouk
Normal file
1887
PROJ_UN/Project.uvguix.nmouk
Normal file
File diff suppressed because one or more lines are too long
|
|
@ -101,6 +101,8 @@
|
|||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>5</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
|
|
@ -190,6 +192,10 @@
|
|||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
<SystemViewers>
|
||||
<Entry>
|
||||
<Name>System Viewer\GPIOB</Name>
|
||||
|
|
@ -198,6 +204,7 @@
|
|||
</SystemViewers>
|
||||
<DebugDescription>
|
||||
<Enable>1</Enable>
|
||||
<EnableFlashSeq>0</EnableFlashSeq>
|
||||
<EnableLog>0</EnableLog>
|
||||
<Protocol>2</Protocol>
|
||||
<DbgClock>10000000</DbgClock>
|
||||
|
|
|
|||
|
|
@ -11,11 +11,12 @@
|
|||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F103RB</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<PackID>Keil.STM32F1xx_DFP.2.2.0</PackID>
|
||||
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
|
||||
<PackURL>http://www.keil.com/pack/</PackURL>
|
||||
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
|
|
@ -183,6 +184,7 @@
|
|||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
|
|
@ -323,6 +325,7 @@
|
|||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
|
|
|
|||
Loading…
Reference in a new issue