Nabzzz 4 years ago
parent
commit
dce171cb25

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- 0
PROJ_DEUX/DebugConfig/Simu_STM32F103RB_1.0.0.dbgconf View File

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1
+// File: STM32F101_102_103_105_107.dbgconf
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+// Version: 1.0.0
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+// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
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+//                STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
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+
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+// <<< Use Configuration Wizard in Context Menu >>>
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+
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+// <h> Debug MCU configuration register (DBGMCU_CR)
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+//                                   <i> Reserved bits must be kept at reset value
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+//   <o.30> DBG_TIM11_STOP           <i> TIM11 counter stopped when core is halted
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+//   <o.29> DBG_TIM10_STOP           <i> TIM10 counter stopped when core is halted
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+//   <o.28> DBG_TIM9_STOP            <i> TIM9 counter stopped when core is halted
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+//   <o.27> DBG_TIM14_STOP           <i> TIM14 counter stopped when core is halted
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+//   <o.26> DBG_TIM13_STOP           <i> TIM13 counter stopped when core is halted
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+//   <o.25> DBG_TIM12_STOP           <i> TIM12 counter stopped when core is halted
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+//   <o.21> DBG_CAN2_STOP            <i> Debug CAN2 stopped when core is halted
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+//   <o.20> DBG_TIM7_STOP            <i> TIM7 counter stopped when core is halted
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+//   <o.19> DBG_TIM6_STOP            <i> TIM6 counter stopped when core is halted
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+//   <o.18> DBG_TIM5_STOP            <i> TIM5 counter stopped when core is halted
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+//   <o.17> DBG_TIM8_STOP            <i> TIM8 counter stopped when core is halted
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+//   <o.16> DBG_I2C2_SMBUS_TIMEOUT   <i> SMBUS timeout mode stopped when core is halted
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+//   <o.15> DBG_I2C1_SMBUS_TIMEOUT   <i> SMBUS timeout mode stopped when core is halted
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+//   <o.14> DBG_CAN1_STOP            <i> Debug CAN1 stopped when Core is halted
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+//   <o.13> DBG_TIM4_STOP            <i> TIM4 counter stopped when core is halted
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+//   <o.12> DBG_TIM3_STOP            <i> TIM3 counter stopped when core is halted
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+//   <o.11> DBG_TIM2_STOP            <i> TIM2 counter stopped when core is halted
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+//   <o.10> DBG_TIM1_STOP            <i> TIM1 counter stopped when core is halted
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+//   <o.9>  DBG_WWDG_STOP            <i> Debug window watchdog stopped when core is halted
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+//   <o.8>  DBG_IWDG_STOP            <i> Debug independent watchdog stopped when core is halted
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+//   <o.2>  DBG_STANDBY              <i> Debug standby mode
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+//   <o.1>  DBG_STOP                 <i> Debug stop mode
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+//   <o.0>  DBG_SLEEP                <i> Debug sleep mode
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+// </h>
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+DbgMCU_CR = 0x00000007;
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+
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+// <<< end of configuration section >>>

+ 0
- 0
PROJ_DEUX/Etape1a.c View File


+ 1860
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PROJ_DEUX/Project.uvguix.nmouk
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+ 279
- 0
PROJ_DEUX/Project.uvoptx View File

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+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
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+
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+  <SchemaVersion>1.0</SchemaVersion>
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+
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+  <Header>### uVision Project, (C) Keil Software</Header>
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+
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+  <Extensions>
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+    <cExt>*.c</cExt>
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+    <aExt>*.s*; *.src; *.a*</aExt>
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+    <oExt>*.obj; *.o</oExt>
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+    <lExt>*.lib</lExt>
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+    <tExt>*.txt; *.h; *.inc</tExt>
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+    <pExt>*.plm</pExt>
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+    <CppX>*.cpp</CppX>
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+    <nMigrate>0</nMigrate>
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+  </Extensions>
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+
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+  <DaveTm>
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+    <dwLowDateTime>0</dwLowDateTime>
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+    <dwHighDateTime>0</dwHighDateTime>
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+  </DaveTm>
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+
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+  <Target>
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+    <TargetName>Simu</TargetName>
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+    <ToolsetNumber>0x4</ToolsetNumber>
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+    <ToolsetName>ARM-ADS</ToolsetName>
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+    <TargetOption>
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+      <CLKADS>8000000</CLKADS>
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+      <OPTTT>
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+        <gFlags>1</gFlags>
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+        <BeepAtEnd>1</BeepAtEnd>
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+        <RunSim>0</RunSim>
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+        <RunTarget>1</RunTarget>
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+        <RunAbUc>0</RunAbUc>
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+      </OPTTT>
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+      <OPTHX>
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+        <HexSelection>1</HexSelection>
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+        <FlashByte>65535</FlashByte>
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+        <HexRangeLowAddress>0</HexRangeLowAddress>
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+        <HexRangeHighAddress>0</HexRangeHighAddress>
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+        <HexOffset>0</HexOffset>
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+      </OPTHX>
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+      <OPTLEX>
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+        <PageWidth>79</PageWidth>
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+        <PageLength>66</PageLength>
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+        <TabStop>8</TabStop>
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+        <ListingPath></ListingPath>
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+      </OPTLEX>
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+      <ListingPage>
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+        <CreateCListing>1</CreateCListing>
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+        <CreateAListing>1</CreateAListing>
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+        <CreateLListing>1</CreateLListing>
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+        <CreateIListing>0</CreateIListing>
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+        <AsmCond>1</AsmCond>
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+        <AsmSymb>1</AsmSymb>
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+        <AsmXref>0</AsmXref>
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+        <CCond>1</CCond>
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+        <CCode>0</CCode>
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+        <CListInc>0</CListInc>
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+        <CSymb>0</CSymb>
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+        <LinkerCodeListing>0</LinkerCodeListing>
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+      </ListingPage>
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+      <OPTXL>
65
+        <LMap>1</LMap>
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+        <LComments>1</LComments>
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+        <LGenerateSymbols>1</LGenerateSymbols>
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+        <LLibSym>1</LLibSym>
69
+        <LLines>1</LLines>
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+        <LLocSym>1</LLocSym>
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+        <LPubSym>1</LPubSym>
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+        <LXref>0</LXref>
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+        <LExpSel>0</LExpSel>
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+      </OPTXL>
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+      <OPTFL>
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+        <tvExp>1</tvExp>
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+        <tvExpOptDlg>0</tvExpOptDlg>
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+        <IsCurrentTarget>1</IsCurrentTarget>
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+      </OPTFL>
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+      <CpuCode>18</CpuCode>
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+      <DebugOpt>
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+        <uSim>1</uSim>
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+        <uTrg>0</uTrg>
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+        <sLdApp>1</sLdApp>
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+        <sGomain>1</sGomain>
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+        <sRbreak>1</sRbreak>
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+        <sRwatch>1</sRwatch>
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+        <sRmem>1</sRmem>
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+        <sRfunc>1</sRfunc>
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+        <sRbox>1</sRbox>
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+        <tLdApp>1</tLdApp>
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+        <tGomain>1</tGomain>
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+        <tRbreak>1</tRbreak>
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+        <tRwatch>1</tRwatch>
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+        <tRmem>1</tRmem>
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+        <tRfunc>1</tRfunc>
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+        <tRbox>1</tRbox>
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+        <tRtrace>1</tRtrace>
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+        <sRSysVw>1</sRSysVw>
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+        <tRSysVw>1</tRSysVw>
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+        <sRunDeb>0</sRunDeb>
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+        <sLrtime>0</sLrtime>
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+        <bEvRecOn>1</bEvRecOn>
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+        <bSchkAxf>0</bSchkAxf>
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+        <bTchkAxf>0</bTchkAxf>
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+        <nTsel>5</nTsel>
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+        <sDll></sDll>
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+        <sDllPa></sDllPa>
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+        <sDlgDll></sDlgDll>
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+        <sDlgPa></sDlgPa>
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+        <sIfile></sIfile>
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+        <tDll></tDll>
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+        <tDllPa></tDllPa>
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+        <tDlgDll></tDlgDll>
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+        <tDlgPa></tDlgPa>
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+        <tIfile></tIfile>
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+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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+      </DebugOpt>
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+      <TargetDriverDllRegistry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>DLGDARM</Key>
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+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=1312,154,1733,580,1)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
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+        </SetRegEntry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>ARMRTXEVENTFLAGS</Key>
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+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
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+        </SetRegEntry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>DLGTARM</Key>
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+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
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+        </SetRegEntry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>ARMDBGFLAGS</Key>
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+          <Name>-T0</Name>
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+        </SetRegEntry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>DLGUARM</Key>
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+          <Name>(105=-1,-1,-1,-1,0)</Name>
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+        </SetRegEntry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>UL2CM3</Key>
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+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
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+        </SetRegEntry>
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+        <SetRegEntry>
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+          <Number>0</Number>
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+          <Key>ST-LINKIII-KEIL_SWO</Key>
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+          <Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
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+        </SetRegEntry>
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+      </TargetDriverDllRegistry>
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+      <Breakpoint/>
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+      <Tracepoint>
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+        <THDelay>0</THDelay>
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+      </Tracepoint>
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+      <DebugFlag>
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+        <trace>0</trace>
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+        <periodic>1</periodic>
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+        <aLwin>1</aLwin>
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+        <aCover>0</aCover>
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+        <aSer1>0</aSer1>
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+        <aSer2>0</aSer2>
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+        <aPa>0</aPa>
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+        <viewmode>1</viewmode>
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+        <vrSel>0</vrSel>
170
+        <aSym>0</aSym>
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+        <aTbox>0</aTbox>
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+        <AscS1>0</AscS1>
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+        <AscS2>0</AscS2>
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+        <AscS3>0</AscS3>
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+        <aSer3>0</aSer3>
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+        <eProf>0</eProf>
177
+        <aLa>0</aLa>
178
+        <aPa1>0</aPa1>
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+        <AscS4>0</AscS4>
180
+        <aSer4>0</aSer4>
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+        <StkLoc>0</StkLoc>
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+        <TrcWin>0</TrcWin>
183
+        <newCpu>0</newCpu>
184
+        <uProt>0</uProt>
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+      </DebugFlag>
186
+      <LintExecutable></LintExecutable>
187
+      <LintConfigFile></LintConfigFile>
188
+      <bLintAuto>0</bLintAuto>
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+      <bAutoGenD>0</bAutoGenD>
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+      <LntExFlags>0</LntExFlags>
191
+      <pMisraName></pMisraName>
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+      <pszMrule></pszMrule>
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+      <pSingCmds></pSingCmds>
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+      <pMultCmds></pMultCmds>
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+      <pMisraNamep></pMisraNamep>
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+      <pszMrulep></pszMrulep>
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+      <pSingCmdsp></pSingCmdsp>
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+      <pMultCmdsp></pMultCmdsp>
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+      <SystemViewers>
200
+        <Entry>
201
+          <Name>System Viewer\GPIOB</Name>
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+          <WinId>35905</WinId>
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+        </Entry>
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+      </SystemViewers>
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+      <DebugDescription>
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+        <Enable>1</Enable>
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+        <EnableFlashSeq>0</EnableFlashSeq>
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+        <EnableLog>0</EnableLog>
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+        <Protocol>2</Protocol>
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+        <DbgClock>10000000</DbgClock>
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+      </DebugDescription>
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+    </TargetOption>
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+  </Target>
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+
215
+  <Group>
216
+    <GroupName>Sources</GroupName>
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+    <tvExp>1</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>0</RteFlg>
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+    <File>
222
+      <GroupNumber>1</GroupNumber>
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+      <FileNumber>1</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
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+      <FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
231
+      <bShared>0</bShared>
232
+    </File>
233
+    <File>
234
+      <GroupNumber>1</GroupNumber>
235
+      <FileNumber>2</FileNumber>
236
+      <FileType>1</FileType>
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+      <tvExp>1</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
239
+      <bDave2>0</bDave2>
240
+      <PathWithFileName>.\Src\principal.c</PathWithFileName>
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+      <FilenameWithoutPath>principal.c</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+    <File>
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+      <GroupNumber>1</GroupNumber>
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+      <FileNumber>3</FileNumber>
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+      <FileType>2</FileType>
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+      <tvExp>0</tvExp>
250
+      <tvExpOptDlg>0</tvExpOptDlg>
251
+      <bDave2>0</bDave2>
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+      <PathWithFileName>.\callback.s</PathWithFileName>
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+      <FilenameWithoutPath>callback.s</FilenameWithoutPath>
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+      <RteFlg>0</RteFlg>
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+      <bShared>0</bShared>
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+    </File>
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+    <File>
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+      <GroupNumber>1</GroupNumber>
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+      <FileNumber>4</FileNumber>
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+      <FileType>4</FileType>
261
+      <tvExp>0</tvExp>
262
+      <tvExpOptDlg>0</tvExpOptDlg>
263
+      <bDave2>0</bDave2>
264
+      <PathWithFileName>.\Src\gassp72.lib</PathWithFileName>
265
+      <FilenameWithoutPath>gassp72.lib</FilenameWithoutPath>
266
+      <RteFlg>0</RteFlg>
267
+      <bShared>0</bShared>
268
+    </File>
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+  </Group>
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+
271
+  <Group>
272
+    <GroupName>::CMSIS</GroupName>
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+    <tvExp>0</tvExp>
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+    <tvExpOptDlg>0</tvExpOptDlg>
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+    <cbSel>0</cbSel>
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+    <RteFlg>1</RteFlg>
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+  </Group>
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+
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+</ProjectOpt>

+ 427
- 0
PROJ_DEUX/Project.uvprojx View File

@@ -0,0 +1,427 @@
1
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
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+
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+  <SchemaVersion>2.1</SchemaVersion>
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+
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+  <Header>### uVision Project, (C) Keil Software</Header>
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+
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+  <Targets>
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+    <Target>
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+      <TargetName>Simu</TargetName>
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+      <ToolsetNumber>0x4</ToolsetNumber>
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+      <ToolsetName>ARM-ADS</ToolsetName>
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+      <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
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+      <uAC6>0</uAC6>
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+      <TargetOption>
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+        <TargetCommonOption>
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+          <Device>STM32F103RB</Device>
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+          <Vendor>STMicroelectronics</Vendor>
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+          <PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
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+          <PackURL>http://www.keil.com/pack/</PackURL>
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+          <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
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+          <FlashUtilSpec></FlashUtilSpec>
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+          <StartupFile></StartupFile>
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+          <FlashDriverDll></FlashDriverDll>
25
+          <DeviceId></DeviceId>
26
+          <RegisterFile></RegisterFile>
27
+          <MemoryEnv></MemoryEnv>
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+          <Cmp></Cmp>
29
+          <Asm></Asm>
30
+          <Linker></Linker>
31
+          <OHString></OHString>
32
+          <InfinionOptionDll></InfinionOptionDll>
33
+          <SLE66CMisc></SLE66CMisc>
34
+          <SLE66AMisc></SLE66AMisc>
35
+          <SLE66LinkerMisc></SLE66LinkerMisc>
36
+          <SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
37
+          <bCustSvd>0</bCustSvd>
38
+          <UseEnv>0</UseEnv>
39
+          <BinPath></BinPath>
40
+          <IncludePath></IncludePath>
41
+          <LibPath></LibPath>
42
+          <RegisterFilePath></RegisterFilePath>
43
+          <DBRegisterFilePath></DBRegisterFilePath>
44
+          <TargetStatus>
45
+            <Error>0</Error>
46
+            <ExitCodeStop>0</ExitCodeStop>
47
+            <ButtonStop>0</ButtonStop>
48
+            <NotGenerated>0</NotGenerated>
49
+            <InvalidFlash>1</InvalidFlash>
50
+          </TargetStatus>
51
+          <OutputDirectory>.\Obj\</OutputDirectory>
52
+          <OutputName>CHTI</OutputName>
53
+          <CreateExecutable>1</CreateExecutable>
54
+          <CreateLib>0</CreateLib>
55
+          <CreateHexFile>1</CreateHexFile>
56
+          <DebugInformation>1</DebugInformation>
57
+          <BrowseInformation>1</BrowseInformation>
58
+          <ListingPath></ListingPath>
59
+          <HexFormatSelection>1</HexFormatSelection>
60
+          <Merge32K>0</Merge32K>
61
+          <CreateBatchFile>0</CreateBatchFile>
62
+          <BeforeCompile>
63
+            <RunUserProg1>0</RunUserProg1>
64
+            <RunUserProg2>0</RunUserProg2>
65
+            <UserProg1Name></UserProg1Name>
66
+            <UserProg2Name></UserProg2Name>
67
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
68
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
69
+            <nStopU1X>0</nStopU1X>
70
+            <nStopU2X>0</nStopU2X>
71
+          </BeforeCompile>
72
+          <BeforeMake>
73
+            <RunUserProg1>0</RunUserProg1>
74
+            <RunUserProg2>0</RunUserProg2>
75
+            <UserProg1Name></UserProg1Name>
76
+            <UserProg2Name></UserProg2Name>
77
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
78
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
79
+            <nStopB1X>0</nStopB1X>
80
+            <nStopB2X>0</nStopB2X>
81
+          </BeforeMake>
82
+          <AfterMake>
83
+            <RunUserProg1>0</RunUserProg1>
84
+            <RunUserProg2>0</RunUserProg2>
85
+            <UserProg1Name></UserProg1Name>
86
+            <UserProg2Name></UserProg2Name>
87
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
88
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
89
+            <nStopA1X>0</nStopA1X>
90
+            <nStopA2X>0</nStopA2X>
91
+          </AfterMake>
92
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
93
+          <SVCSIdString></SVCSIdString>
94
+        </TargetCommonOption>
95
+        <CommonProperty>
96
+          <UseCPPCompiler>0</UseCPPCompiler>
97
+          <RVCTCodeConst>0</RVCTCodeConst>
98
+          <RVCTZI>0</RVCTZI>
99
+          <RVCTOtherData>0</RVCTOtherData>
100
+          <ModuleSelection>0</ModuleSelection>
101
+          <IncludeInBuild>1</IncludeInBuild>
102
+          <AlwaysBuild>0</AlwaysBuild>
103
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
104
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
105
+          <PublicsOnly>0</PublicsOnly>
106
+          <StopOnExitCode>3</StopOnExitCode>
107
+          <CustomArgument></CustomArgument>
108
+          <IncludeLibraryModules></IncludeLibraryModules>
109
+          <ComprImg>0</ComprImg>
110
+        </CommonProperty>
111
+        <DllOption>
112
+          <SimDllName>SARMCM3.DLL</SimDllName>
113
+          <SimDllArguments>-REMAP</SimDllArguments>
114
+          <SimDlgDll>DARMSTM.DLL</SimDlgDll>
115
+          <SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
116
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
117
+          <TargetDllArguments></TargetDllArguments>
118
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
119
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
120
+        </DllOption>
121
+        <DebugOption>
122
+          <OPTHX>
123
+            <HexSelection>1</HexSelection>
124
+            <HexRangeLowAddress>0</HexRangeLowAddress>
125
+            <HexRangeHighAddress>0</HexRangeHighAddress>
126
+            <HexOffset>0</HexOffset>
127
+            <Oh166RecLen>16</Oh166RecLen>
128
+          </OPTHX>
129
+        </DebugOption>
130
+        <Utilities>
131
+          <Flash1>
132
+            <UseTargetDll>1</UseTargetDll>
133
+            <UseExternalTool>0</UseExternalTool>
134
+            <RunIndependent>0</RunIndependent>
135
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
136
+            <Capability>1</Capability>
137
+            <DriverSelection>4100</DriverSelection>
138
+          </Flash1>
139
+          <bUseTDR>1</bUseTDR>
140
+          <Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
141
+          <Flash3>"" ()</Flash3>
142
+          <Flash4></Flash4>
143
+          <pFcarmOut></pFcarmOut>
144
+          <pFcarmGrp></pFcarmGrp>
145
+          <pFcArmRoot></pFcArmRoot>
146
+          <FcArmLst>0</FcArmLst>
147
+        </Utilities>
148
+        <TargetArmAds>
149
+          <ArmAdsMisc>
150
+            <GenerateListings>0</GenerateListings>
151
+            <asHll>1</asHll>
152
+            <asAsm>1</asAsm>
153
+            <asMacX>1</asMacX>
154
+            <asSyms>1</asSyms>
155
+            <asFals>1</asFals>
156
+            <asDbgD>1</asDbgD>
157
+            <asForm>1</asForm>
158
+            <ldLst>0</ldLst>
159
+            <ldmm>1</ldmm>
160
+            <ldXref>1</ldXref>
161
+            <BigEnd>0</BigEnd>
162
+            <AdsALst>1</AdsALst>
163
+            <AdsACrf>1</AdsACrf>
164
+            <AdsANop>0</AdsANop>
165
+            <AdsANot>0</AdsANot>
166
+            <AdsLLst>1</AdsLLst>
167
+            <AdsLmap>1</AdsLmap>
168
+            <AdsLcgr>1</AdsLcgr>
169
+            <AdsLsym>1</AdsLsym>
170
+            <AdsLszi>1</AdsLszi>
171
+            <AdsLtoi>1</AdsLtoi>
172
+            <AdsLsun>1</AdsLsun>
173
+            <AdsLven>1</AdsLven>
174
+            <AdsLsxf>1</AdsLsxf>
175
+            <RvctClst>0</RvctClst>
176
+            <GenPPlst>0</GenPPlst>
177
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
178
+            <RvctDeviceName></RvctDeviceName>
179
+            <mOS>0</mOS>
180
+            <uocRom>0</uocRom>
181
+            <uocRam>0</uocRam>
182
+            <hadIROM>1</hadIROM>
183
+            <hadIRAM>1</hadIRAM>
184
+            <hadXRAM>0</hadXRAM>
185
+            <uocXRam>0</uocXRam>
186
+            <RvdsVP>0</RvdsVP>
187
+            <RvdsMve>0</RvdsMve>
188
+            <hadIRAM2>0</hadIRAM2>
189
+            <hadIROM2>0</hadIROM2>
190
+            <StupSel>8</StupSel>
191
+            <useUlib>1</useUlib>
192
+            <EndSel>0</EndSel>
193
+            <uLtcg>0</uLtcg>
194
+            <nSecure>0</nSecure>
195
+            <RoSelD>3</RoSelD>
196
+            <RwSelD>3</RwSelD>
197
+            <CodeSel>0</CodeSel>
198
+            <OptFeed>0</OptFeed>
199
+            <NoZi1>0</NoZi1>
200
+            <NoZi2>0</NoZi2>
201
+            <NoZi3>0</NoZi3>
202
+            <NoZi4>0</NoZi4>
203
+            <NoZi5>0</NoZi5>
204
+            <Ro1Chk>0</Ro1Chk>
205
+            <Ro2Chk>0</Ro2Chk>
206
+            <Ro3Chk>0</Ro3Chk>
207
+            <Ir1Chk>1</Ir1Chk>
208
+            <Ir2Chk>0</Ir2Chk>
209
+            <Ra1Chk>0</Ra1Chk>
210
+            <Ra2Chk>0</Ra2Chk>
211
+            <Ra3Chk>0</Ra3Chk>
212
+            <Im1Chk>1</Im1Chk>
213
+            <Im2Chk>0</Im2Chk>
214
+            <OnChipMemories>
215
+              <Ocm1>
216
+                <Type>0</Type>
217
+                <StartAddress>0x0</StartAddress>
218
+                <Size>0x0</Size>
219
+              </Ocm1>
220
+              <Ocm2>
221
+                <Type>0</Type>
222
+                <StartAddress>0x0</StartAddress>
223
+                <Size>0x0</Size>
224
+              </Ocm2>
225
+              <Ocm3>
226
+                <Type>0</Type>
227
+                <StartAddress>0x0</StartAddress>
228
+                <Size>0x0</Size>
229
+              </Ocm3>
230
+              <Ocm4>
231
+                <Type>0</Type>
232
+                <StartAddress>0x0</StartAddress>
233
+                <Size>0x0</Size>
234
+              </Ocm4>
235
+              <Ocm5>
236
+                <Type>0</Type>
237
+                <StartAddress>0x0</StartAddress>
238
+                <Size>0x0</Size>
239
+              </Ocm5>
240
+              <Ocm6>
241
+                <Type>0</Type>
242
+                <StartAddress>0x0</StartAddress>
243
+                <Size>0x0</Size>
244
+              </Ocm6>
245
+              <IRAM>
246
+                <Type>0</Type>
247
+                <StartAddress>0x20000000</StartAddress>
248
+                <Size>0x5000</Size>
249
+              </IRAM>
250
+              <IROM>
251
+                <Type>1</Type>
252
+                <StartAddress>0x8000000</StartAddress>
253
+                <Size>0x20000</Size>
254
+              </IROM>
255
+              <XRAM>
256
+                <Type>0</Type>
257
+                <StartAddress>0x0</StartAddress>
258
+                <Size>0x0</Size>
259
+              </XRAM>
260
+              <OCR_RVCT1>
261
+                <Type>1</Type>
262
+                <StartAddress>0x0</StartAddress>
263
+                <Size>0x0</Size>
264
+              </OCR_RVCT1>
265
+              <OCR_RVCT2>
266
+                <Type>1</Type>
267
+                <StartAddress>0x0</StartAddress>
268
+                <Size>0x0</Size>
269
+              </OCR_RVCT2>
270
+              <OCR_RVCT3>
271
+                <Type>1</Type>
272
+                <StartAddress>0x0</StartAddress>
273
+                <Size>0x0</Size>
274
+              </OCR_RVCT3>
275
+              <OCR_RVCT4>
276
+                <Type>1</Type>
277
+                <StartAddress>0x8000000</StartAddress>
278
+                <Size>0x20000</Size>
279
+              </OCR_RVCT4>
280
+              <OCR_RVCT5>
281
+                <Type>1</Type>
282
+                <StartAddress>0x0</StartAddress>
283
+                <Size>0x0</Size>
284
+              </OCR_RVCT5>
285
+              <OCR_RVCT6>
286
+                <Type>0</Type>
287
+                <StartAddress>0x0</StartAddress>
288
+                <Size>0x0</Size>
289
+              </OCR_RVCT6>
290
+              <OCR_RVCT7>
291
+                <Type>0</Type>
292
+                <StartAddress>0x0</StartAddress>
293
+                <Size>0x0</Size>
294
+              </OCR_RVCT7>
295
+              <OCR_RVCT8>
296
+                <Type>0</Type>
297
+                <StartAddress>0x0</StartAddress>
298
+                <Size>0x0</Size>
299
+              </OCR_RVCT8>
300
+              <OCR_RVCT9>
301
+                <Type>0</Type>
302
+                <StartAddress>0x20000000</StartAddress>
303
+                <Size>0x5000</Size>
304
+              </OCR_RVCT9>
305
+              <OCR_RVCT10>
306
+                <Type>0</Type>
307
+                <StartAddress>0x0</StartAddress>
308
+                <Size>0x0</Size>
309
+              </OCR_RVCT10>
310
+            </OnChipMemories>
311
+            <RvctStartVector></RvctStartVector>
312
+          </ArmAdsMisc>
313
+          <Cads>
314
+            <interw>1</interw>
315
+            <Optim>1</Optim>
316
+            <oTime>0</oTime>
317
+            <SplitLS>0</SplitLS>
318
+            <OneElfS>1</OneElfS>
319
+            <Strict>0</Strict>
320
+            <EnumInt>0</EnumInt>
321
+            <PlainCh>0</PlainCh>
322
+            <Ropi>0</Ropi>
323
+            <Rwpi>0</Rwpi>
324
+            <wLevel>2</wLevel>
325
+            <uThumb>0</uThumb>
326
+            <uSurpInc>0</uSurpInc>
327
+            <uC99>0</uC99>
328
+            <uGnu>0</uGnu>
329
+            <useXO>0</useXO>
330
+            <v6Lang>1</v6Lang>
331
+            <v6LangP>1</v6LangP>
332
+            <vShortEn>1</vShortEn>
333
+            <vShortWch>1</vShortWch>
334
+            <v6Lto>0</v6Lto>
335
+            <v6WtE>0</v6WtE>
336
+            <v6Rtti>0</v6Rtti>
337
+            <VariousControls>
338
+              <MiscControls>--C99</MiscControls>
339
+              <Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
340
+              <Undefine></Undefine>
341
+              <IncludePath></IncludePath>
342
+            </VariousControls>
343
+          </Cads>
344
+          <Aads>
345
+            <interw>1</interw>
346
+            <Ropi>0</Ropi>
347
+            <Rwpi>0</Rwpi>
348
+            <thumb>0</thumb>
349
+            <SplitLS>0</SplitLS>
350
+            <SwStkChk>0</SwStkChk>
351
+            <NoWarn>0</NoWarn>
352
+            <uSurpInc>0</uSurpInc>
353
+            <useXO>0</useXO>
354
+            <uClangAs>0</uClangAs>
355
+            <VariousControls>
356
+              <MiscControls></MiscControls>
357
+              <Define></Define>
358
+              <Undefine></Undefine>
359
+              <IncludePath></IncludePath>
360
+            </VariousControls>
361
+          </Aads>
362
+          <LDads>
363
+            <umfTarg>1</umfTarg>
364
+            <Ropi>0</Ropi>
365
+            <Rwpi>0</Rwpi>
366
+            <noStLib>0</noStLib>
367
+            <RepFail>1</RepFail>
368
+            <useFile>0</useFile>
369
+            <TextAddressRange>0x08000000</TextAddressRange>
370
+            <DataAddressRange>0x20000000</DataAddressRange>
371
+            <pXoBase></pXoBase>
372
+            <ScatterFile></ScatterFile>
373
+            <IncludeLibs></IncludeLibs>
374
+            <IncludeLibsPath></IncludeLibsPath>
375
+            <Misc></Misc>
376
+            <LinkerInputFile></LinkerInputFile>
377
+            <DisabledWarnings></DisabledWarnings>
378
+          </LDads>
379
+        </TargetArmAds>
380
+      </TargetOption>
381
+      <Groups>
382
+        <Group>
383
+          <GroupName>Sources</GroupName>
384
+          <Files>
385
+            <File>
386
+              <FileName>startup-rvds.s</FileName>
387
+              <FileType>2</FileType>
388
+              <FilePath>.\Src\startup-rvds.s</FilePath>
389
+            </File>
390
+            <File>
391
+              <FileName>principal.c</FileName>
392
+              <FileType>1</FileType>
393
+              <FilePath>.\Src\principal.c</FilePath>
394
+            </File>
395
+            <File>
396
+              <FileName>callback.s</FileName>
397
+              <FileType>2</FileType>
398
+              <FilePath>.\callback.s</FilePath>
399
+            </File>
400
+            <File>
401
+              <FileName>gassp72.lib</FileName>
402
+              <FileType>4</FileType>
403
+              <FilePath>.\Src\gassp72.lib</FilePath>
404
+            </File>
405
+          </Files>
406
+        </Group>
407
+        <Group>
408
+          <GroupName>::CMSIS</GroupName>
409
+        </Group>
410
+      </Groups>
411
+    </Target>
412
+  </Targets>
413
+
414
+  <RTE>
415
+    <apis/>
416
+    <components>
417
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
418
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
419
+        <targetInfos>
420
+          <targetInfo name="Simu"/>
421
+        </targetInfos>
422
+      </component>
423
+    </components>
424
+    <files/>
425
+  </RTE>
426
+
427
+</Project>

+ 21
- 0
PROJ_DEUX/RTE/_Simu/RTE_Components.h View File

@@ -0,0 +1,21 @@
1
+
2
+/*
3
+ * Auto generated Run-Time-Environment Configuration File
4
+ *      *** Do not modify ! ***
5
+ *
6
+ * Project: 'Project' 
7
+ * Target:  'Simu' 
8
+ */
9
+
10
+#ifndef RTE_COMPONENTS_H
11
+#define RTE_COMPONENTS_H
12
+
13
+
14
+/*
15
+ * Define the Device Header File: 
16
+ */
17
+#define CMSIS_device_header "stm32f10x.h"
18
+
19
+
20
+
21
+#endif /* RTE_COMPONENTS_H */

+ 115
- 0
PROJ_DEUX/Src/gassp72.h View File

@@ -0,0 +1,115 @@
1
+/**
2
+ * Bibliotheque GASSP 2013-02-15
3
+ *
4
+ * GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
5
+ *
6
+ */
7
+
8
+// STM32F10X_CL : pour le STM32F107 "Communication Line"
9
+// STM32F10X_MD : pour le STM32F103 "Medium Density"
10
+
11
+//#define STM32F10X_MD	// 2019 fix for Keil 5.23
12
+
13
+#include "stm32f10x.h"
14
+
15
+// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
16
+void CLOCK_Configure(void);
17
+
18
+// Timers 1, 2, 3, 4 -------------------------------------------------------
19
+// la duree entre deux debordements successifs doit etre donnnee en periodes
20
+// d'horloge CPU (typiquement 72 MHz)
21
+void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
22
+
23
+// activation d'une fonction de traitement de l'interruption timer (callback)
24
+void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
25
+
26
+// bloque le timer
27
+#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
28
+
29
+// Lance timer
30
+#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
31
+
32
+// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
33
+// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
34
+// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
35
+// de valeurs acceptees pour moduler la largeur d'impulsion
36
+vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
37
+
38
+// Timer systeme "SysTick" -------------------------------------------------
39
+
40
+// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
41
+void Systick_Period_ff( unsigned int Periode_ticks );
42
+
43
+// activation d'une fonction de traitement de l'interruption timer (callback)
44
+void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
45
+
46
+#define  SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
47
+#define  SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
48
+#define  SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
49
+#define  SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
50
+
51
+// ADC - DMA ---------------------------------------------------------------
52
+// Analog-to-Digital Conversion, Direct Memory Access
53
+
54
+// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
55
+// la fonction rend la duree totale de conversion (meme unites)
56
+u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
57
+
58
+// choix d'un canal ADC unique
59
+void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
60
+
61
+// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
62
+// Les sources de déclenchement possibles :
63
+#define TIM1_CC1 0
64
+#define TIM1_CC2 1
65
+#define TIM1_CC3 2
66
+#define TIM2_CC2 3
67
+#define TIM4_CC4 5
68
+void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
69
+
70
+// initialisation d'acquisition en mode DMA
71
+// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
72
+void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
73
+
74
+
75
+// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
76
+// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction  Init_ADC1_DMA1
77
+void Start_DMA1( u16 NbEchDMA );
78
+
79
+// arret DMA
80
+#define  Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
81
+
82
+// fonction d'attente (bloquante)
83
+// la duree depend de la periode d'acquisition et du nombre d'echantillons
84
+void Wait_On_End_Of_DMA1(void);
85
+
86
+
87
+// GPIO --------------------------------------------------------------------
88
+
89
+// Sens
90
+#define INPUT   'i'
91
+#define OUTPUT  'o'
92
+
93
+// Techno pour pin en entrée (INPUT)
94
+#define ANALOG              0
95
+#define INPUT_FLOATING      1
96
+#define INPUT_PULL_DOWN_UP  2
97
+
98
+// Techno pour pin en sortie (OUTPUT)
99
+#define OUTPUT_PPULL    0
100
+#define OUTPUT_OPDRAIN  1
101
+#define ALT_PPULL       2
102
+#define ALT_OPDRAIN     3
103
+
104
+// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
105
+// Exemple :
106
+// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
107
+// Place le bit 8 du port B en sortie Push-pull
108
+// Renvoie 0 si tout est OK,  et 1 s'il y a un problème (plage d'entrée non respectée)
109
+char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
110
+
111
+// Spécifier le numéro de broche (0 à 15)
112
+// exemple : Port_IO_Set(GPIOB,8);
113
+#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
114
+
115
+#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)

BIN
PROJ_DEUX/Src/gassp72.lib View File


+ 7
- 0
PROJ_DEUX/Src/principal.c View File

@@ -0,0 +1,7 @@
1
+
2
+int main(void)
3
+{
4
+while	(1)
5
+	{
6
+	}
7
+}

+ 335
- 0
PROJ_DEUX/Src/startup-rvds.s View File

@@ -0,0 +1,335 @@
1
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
2
+;* File Name          : startup_stm32f10x_md.s
3
+;* Author             : MCD Application Team
4
+;* Version            : V3.5.0
5
+;* Date               : 11-March-2011
6
+;* Description        : STM32F10x Medium Density Devices vector table for MDK-ARM 
7
+;*                      toolchain.  
8
+;*                      This module performs:
9
+;*                      - Set the initial SP
10
+;*                      - Set the initial PC == Reset_Handler
11
+;*                      - Set the vector table entries with the exceptions ISR address
12
+;*                      - Configure the clock system
13
+;*                      - Branches to __main in the C library (which eventually
14
+;*                        calls main()).
15
+;*                      After Reset the CortexM3 processor is in Thread mode,
16
+;*                      priority is Privileged, and the Stack is set to Main.
17
+;* <<< Use Configuration Wizard in Context Menu >>>   
18
+;*******************************************************************************
19
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
20
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
21
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
22
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
23
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
24
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
25
+;*******************************************************************************
26
+
27
+; Amount of memory (in bytes) allocated for Stack
28
+; Tailor this value to your application needs
29
+; <h> Stack Configuration
30
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
31
+; </h>
32
+
33
+Stack_Size      EQU     0x00000400
34
+
35
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
36
+Stack_Mem       SPACE   Stack_Size
37
+__initial_sp
38
+
39
+
40
+; <h> Heap Configuration
41
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
42
+; </h>
43
+
44
+Heap_Size       EQU     0x00000200
45
+
46
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
47
+__heap_base
48
+Heap_Mem        SPACE   Heap_Size
49
+__heap_limit
50
+
51
+                PRESERVE8
52
+                THUMB
53
+
54
+
55
+; Vector Table Mapped to Address 0 at Reset
56
+                AREA    RESET, DATA, READONLY
57
+                EXPORT  __Vectors
58
+                EXPORT  __Vectors_End
59
+                EXPORT  __Vectors_Size
60
+
61
+__Vectors       DCD     __initial_sp               ; Top of Stack
62
+                DCD     Reset_Handler              ; Reset Handler
63
+                DCD     NMI_Handler                ; NMI Handler
64
+                DCD     HardFault_Handler          ; Hard Fault Handler
65
+                DCD     MemManage_Handler          ; MPU Fault Handler
66
+                DCD     BusFault_Handler           ; Bus Fault Handler
67
+                DCD     UsageFault_Handler         ; Usage Fault Handler
68
+                DCD     0                          ; Reserved
69
+                DCD     0                          ; Reserved
70
+                DCD     0                          ; Reserved
71
+                DCD     0                          ; Reserved
72
+                DCD     SVC_Handler                ; SVCall Handler
73
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
74
+                DCD     0                          ; Reserved
75
+                DCD     PendSV_Handler             ; PendSV Handler
76
+                DCD     SysTick_Handler            ; SysTick Handler
77
+
78
+                ; External Interrupts
79
+                DCD     WWDG_IRQHandler            ; Window Watchdog
80
+                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
81
+                DCD     TAMPER_IRQHandler          ; Tamper
82
+                DCD     RTC_IRQHandler             ; RTC
83
+                DCD     FLASH_IRQHandler           ; Flash
84
+                DCD     RCC_IRQHandler             ; RCC
85
+                DCD     EXTI0_IRQHandler           ; EXTI Line 0
86
+                DCD     EXTI1_IRQHandler           ; EXTI Line 1
87
+                DCD     EXTI2_IRQHandler           ; EXTI Line 2
88
+                DCD     EXTI3_IRQHandler           ; EXTI Line 3
89
+                DCD     EXTI4_IRQHandler           ; EXTI Line 4
90
+                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
91
+                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
92
+                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
93
+                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
94
+                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
95
+                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
96
+                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
97
+                DCD     ADC1_2_IRQHandler          ; ADC1_2
98
+                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
99
+                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
100
+                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
101
+                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
102
+                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
103
+                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
104
+                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
105
+                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
106
+                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
107
+                DCD     TIM2_IRQHandler            ; TIM2
108
+                DCD     TIM3_IRQHandler            ; TIM3
109
+                DCD     TIM4_IRQHandler            ; TIM4
110
+                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
111
+                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
112
+                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
113
+                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
114
+                DCD     SPI1_IRQHandler            ; SPI1
115
+                DCD     SPI2_IRQHandler            ; SPI2
116
+                DCD     USART1_IRQHandler          ; USART1
117
+                DCD     USART2_IRQHandler          ; USART2
118
+                DCD     USART3_IRQHandler          ; USART3
119
+                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
120
+                DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line
121
+                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
122
+__Vectors_End
123
+
124
+__Vectors_Size  EQU  __Vectors_End - __Vectors
125
+
126
+                AREA    |.text|, CODE, READONLY
127
+
128
+; Reset handler
129
+Reset_Handler    PROC
130
+                 EXPORT  Reset_Handler             [WEAK]
131
+     IMPORT  __main
132
+     
133
+                 LDR     R0, =SystemInit
134
+                 BLX     R0
135
+
136
+;
137
+; Enable UsageFault, MemFault and Busfault interrupts
138
+;
139
+_SHCSR			EQU     0xE000ED24		; SHCSR is located at address 0xE000ED24
140
+				LDR.W	R0, =_SHCSR				
141
+				LDR 	R1, [R0]				; Read CPACR
142
+				ORR 	R1, R1, #(0x7 << 16)	; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
143
+				STR 	R1, [R0]				; Write back the modified value to the CPACR
144
+				DSB								; Wait for store to complete
145
+
146
+;
147
+; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
148
+;
149
+_AIRCR			EQU		0xE000ED0C
150
+_AIRCR_VAL		EQU		0x05FA0300
151
+				LDR.W	R0, =_AIRCR
152
+				LDR.W	R1, =_AIRCR_VAL
153
+				STR		R1,[R0]
154
+		
155
+;
156
+; Finaly, jump to main function (void main (void))
157
+;
158
+                LDR     R0, =__main
159
+                BX      R0
160
+                ENDP
161
+
162
+SystemInit		PROC				 
163
+				EXPORT  SystemInit                    [WEAK]    
164
+				BX		LR
165
+				ENDP
166
+
167
+; Dummy Exception Handlers (infinite loops which can be modified)
168
+
169
+NMI_Handler     PROC
170
+                EXPORT  NMI_Handler                [WEAK]
171
+                B       .
172
+                ENDP
173
+HardFault_Handler\
174
+                PROC
175
+                EXPORT  HardFault_Handler          [WEAK]
176
+                B       .
177
+                ENDP
178
+MemManage_Handler\
179
+                PROC
180
+                EXPORT  MemManage_Handler          [WEAK]
181
+                B       .
182
+                ENDP
183
+BusFault_Handler\
184
+                PROC
185
+                EXPORT  BusFault_Handler           [WEAK]
186
+                B       .
187
+                ENDP
188
+UsageFault_Handler\
189
+                PROC
190
+                EXPORT  UsageFault_Handler         [WEAK]
191
+                B       .
192
+                ENDP
193
+SVC_Handler     PROC
194
+                EXPORT  SVC_Handler                [WEAK]
195
+                B       .
196
+                ENDP
197
+DebugMon_Handler\
198
+                PROC
199
+                EXPORT  DebugMon_Handler           [WEAK]
200
+                B       .
201
+                ENDP
202
+PendSV_Handler  PROC
203
+                EXPORT  PendSV_Handler             [WEAK]
204
+                B       .
205
+                ENDP
206
+SysTick_Handler PROC
207
+                EXPORT  SysTick_Handler            [WEAK]
208
+                B       .
209
+                ENDP
210
+
211
+Default_Handler PROC
212
+
213
+                EXPORT  WWDG_IRQHandler            [WEAK]
214
+                EXPORT  PVD_IRQHandler             [WEAK]
215
+                EXPORT  TAMPER_IRQHandler          [WEAK]
216
+                EXPORT  RTC_IRQHandler             [WEAK]
217
+                EXPORT  FLASH_IRQHandler           [WEAK]
218
+                EXPORT  RCC_IRQHandler             [WEAK]
219
+                EXPORT  EXTI0_IRQHandler           [WEAK]
220
+                EXPORT  EXTI1_IRQHandler           [WEAK]
221
+                EXPORT  EXTI2_IRQHandler           [WEAK]
222
+                EXPORT  EXTI3_IRQHandler           [WEAK]
223
+                EXPORT  EXTI4_IRQHandler           [WEAK]
224
+                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
225
+                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
226
+                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
227
+                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
228
+                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
229
+                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
230
+                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
231
+                EXPORT  ADC1_2_IRQHandler          [WEAK]
232
+                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
233
+                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
234
+                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
235
+                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
236
+                EXPORT  EXTI9_5_IRQHandler         [WEAK]
237
+                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
238
+                EXPORT  TIM1_UP_IRQHandler         [WEAK]
239
+                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
240
+                EXPORT  TIM1_CC_IRQHandler         [WEAK]
241
+                EXPORT  TIM2_IRQHandler            [WEAK]
242
+                EXPORT  TIM3_IRQHandler            [WEAK]
243
+                EXPORT  TIM4_IRQHandler            [WEAK]
244
+                EXPORT  I2C1_EV_IRQHandler         [WEAK]
245
+                EXPORT  I2C1_ER_IRQHandler         [WEAK]
246
+                EXPORT  I2C2_EV_IRQHandler         [WEAK]
247
+                EXPORT  I2C2_ER_IRQHandler         [WEAK]
248
+                EXPORT  SPI1_IRQHandler            [WEAK]
249
+                EXPORT  SPI2_IRQHandler            [WEAK]
250
+                EXPORT  USART1_IRQHandler          [WEAK]
251
+                EXPORT  USART2_IRQHandler          [WEAK]
252
+                EXPORT  USART3_IRQHandler          [WEAK]
253
+                EXPORT  EXTI15_10_IRQHandler       [WEAK]
254
+                EXPORT  RTCAlarm_IRQHandler        [WEAK]
255
+                EXPORT  USBWakeUp_IRQHandler       [WEAK]
256
+
257
+WWDG_IRQHandler
258
+PVD_IRQHandler
259
+TAMPER_IRQHandler
260
+RTC_IRQHandler
261
+FLASH_IRQHandler
262
+RCC_IRQHandler
263
+EXTI0_IRQHandler
264
+EXTI1_IRQHandler
265
+EXTI2_IRQHandler
266
+EXTI3_IRQHandler
267
+EXTI4_IRQHandler
268
+DMA1_Channel1_IRQHandler
269
+DMA1_Channel2_IRQHandler
270
+DMA1_Channel3_IRQHandler
271
+DMA1_Channel4_IRQHandler
272
+DMA1_Channel5_IRQHandler
273
+DMA1_Channel6_IRQHandler
274
+DMA1_Channel7_IRQHandler
275
+ADC1_2_IRQHandler
276
+USB_HP_CAN1_TX_IRQHandler
277
+USB_LP_CAN1_RX0_IRQHandler
278
+CAN1_RX1_IRQHandler
279
+CAN1_SCE_IRQHandler
280
+EXTI9_5_IRQHandler
281
+TIM1_BRK_IRQHandler
282
+TIM1_UP_IRQHandler
283
+TIM1_TRG_COM_IRQHandler
284
+TIM1_CC_IRQHandler
285
+TIM2_IRQHandler
286
+TIM3_IRQHandler
287
+TIM4_IRQHandler
288
+I2C1_EV_IRQHandler
289
+I2C1_ER_IRQHandler
290
+I2C2_EV_IRQHandler
291
+I2C2_ER_IRQHandler
292
+SPI1_IRQHandler
293
+SPI2_IRQHandler
294
+USART1_IRQHandler
295
+USART2_IRQHandler
296
+USART3_IRQHandler
297
+EXTI15_10_IRQHandler
298
+RTCAlarm_IRQHandler
299
+USBWakeUp_IRQHandler
300
+
301
+                B       .
302
+
303
+                ENDP
304
+
305
+                ALIGN
306
+
307
+;*******************************************************************************
308
+; User Stack and Heap initialization
309
+;*******************************************************************************
310
+                 IF      :DEF:__MICROLIB           
311
+                
312
+                 EXPORT  __initial_sp
313
+                 EXPORT  __heap_base
314
+                 EXPORT  __heap_limit
315
+                
316
+                 ELSE
317
+                
318
+                 IMPORT  __use_two_region_memory
319
+                 EXPORT  __user_initial_stackheap
320
+                 
321
+__user_initial_stackheap
322
+
323
+                 LDR     R0, =  Heap_Mem
324
+                 LDR     R1, =(Stack_Mem + Stack_Size)
325
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
326
+                 LDR     R3, = Stack_Mem
327
+                 BX      LR
328
+
329
+                 ALIGN
330
+
331
+                 ENDIF
332
+
333
+                 END
334
+
335
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

+ 38
- 0
PROJ_DEUX/callback.s View File

@@ -0,0 +1,38 @@
1
+; ce programme est pour l'assembleur RealView (Keil)
2
+	thumb
3
+	area  madata, data, readwrite
4
+	export echelon
5
+echelon		dcd	0
6
+	
7
+	area  moncode, code, readonly
8
+	export timer_callback
9
+	
10
+timer_callback proc
11
+	
12
+GPIOB_BSRR	equ	0x40010C10	; Bit Set/Reset register
13
+
14
+	ldr 	r2, =echelon
15
+	ldr	r0,[r2]
16
+	CBZ	r0, misea1
17
+
18
+
19
+; mise a zero de PB1
20
+	ldr	r3, =GPIOB_BSRR
21
+	mov	r1, #0x00020000
22
+	str	r1, [r3]
23
+	add	r0, #-1
24
+	str	r0,[r2]
25
+	B	finn
26
+
27
+; mise a 1 de PB1
28
+misea1	ldr	r3, =GPIOB_BSRR
29
+	mov	r1, #0x00000002
30
+	str	r1, [r3]
31
+	add	r0, #1
32
+	str	r0,[r2]
33
+; N.B. le registre BSRR est write-only, on ne peut pas le relire
34
+
35
+finn	bx lr;
36
+	endp
37
+;
38
+	end

+ 1887
- 0
PROJ_UN/Project.uvguix.nmouk
File diff suppressed because it is too large
View File


+ 7
- 0
PROJ_UN/Project.uvoptx View File

@@ -101,6 +101,8 @@
101 101
         <sRunDeb>0</sRunDeb>
102 102
         <sLrtime>0</sLrtime>
103 103
         <bEvRecOn>1</bEvRecOn>
104
+        <bSchkAxf>0</bSchkAxf>
105
+        <bTchkAxf>0</bTchkAxf>
104 106
         <nTsel>5</nTsel>
105 107
         <sDll></sDll>
106 108
         <sDllPa></sDllPa>
@@ -190,6 +192,10 @@
190 192
       <pszMrule></pszMrule>
191 193
       <pSingCmds></pSingCmds>
192 194
       <pMultCmds></pMultCmds>
195
+      <pMisraNamep></pMisraNamep>
196
+      <pszMrulep></pszMrulep>
197
+      <pSingCmdsp></pSingCmdsp>
198
+      <pMultCmdsp></pMultCmdsp>
193 199
       <SystemViewers>
194 200
         <Entry>
195 201
           <Name>System Viewer\GPIOB</Name>
@@ -198,6 +204,7 @@
198 204
       </SystemViewers>
199 205
       <DebugDescription>
200 206
         <Enable>1</Enable>
207
+        <EnableFlashSeq>0</EnableFlashSeq>
201 208
         <EnableLog>0</EnableLog>
202 209
         <Protocol>2</Protocol>
203 210
         <DbgClock>10000000</DbgClock>

+ 4
- 1
PROJ_UN/Project.uvprojx View File

@@ -11,11 +11,12 @@
11 11
       <ToolsetNumber>0x4</ToolsetNumber>
12 12
       <ToolsetName>ARM-ADS</ToolsetName>
13 13
       <pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
14
+      <uAC6>0</uAC6>
14 15
       <TargetOption>
15 16
         <TargetCommonOption>
16 17
           <Device>STM32F103RB</Device>
17 18
           <Vendor>STMicroelectronics</Vendor>
18
-          <PackID>Keil.STM32F1xx_DFP.2.2.0</PackID>
19
+          <PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
19 20
           <PackURL>http://www.keil.com/pack/</PackURL>
20 21
           <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
21 22
           <FlashUtilSpec></FlashUtilSpec>
@@ -183,6 +184,7 @@
183 184
             <hadXRAM>0</hadXRAM>
184 185
             <uocXRam>0</uocXRam>
185 186
             <RvdsVP>0</RvdsVP>
187
+            <RvdsMve>0</RvdsMve>
186 188
             <hadIRAM2>0</hadIRAM2>
187 189
             <hadIROM2>0</hadIROM2>
188 190
             <StupSel>8</StupSel>
@@ -323,6 +325,7 @@
323 325
             <uThumb>0</uThumb>
324 326
             <uSurpInc>0</uSurpInc>
325 327
             <uC99>0</uC99>
328
+            <uGnu>0</uGnu>
326 329
             <useXO>0</useXO>
327 330
             <v6Lang>1</v6Lang>
328 331
             <v6LangP>1</v6LangP>

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