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Nabzzz 2020-03-21 18:27:02 +01:00
parent dce171cb25
commit 24ff4477ed
36 changed files with 8140 additions and 0 deletions
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24
PROJ_DEUX/Src/principal.c
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#include "gassp72.h"
void timer_callback(void );
//on se retrouve sur l'oscillo à une fréquence d'environ 36Hz
int Periode_en_Tck=1000000;
extern unsigned int echelon;
int main(void) int main(void)
{ {
// activation de la PLL qui multiplie la fréquence du quartz par 9
CLOCK_Configure();
// config port PB1 pour être utilisé en sortie
GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
// initialisation du timer 4
// Periode_en_Tck doit fournir la durée entre interruptions,
// exprimée en périodes Tck de l'horloge principale du STM32 (72 MHz)
Timer_1234_Init_ff( TIM4, Periode_en_Tck );
// enregistrement de la fonction de traitement de l'interruption timer
// ici le 2 est la priorité, timer_callback est l'adresse de cette fonction, a créér en asm,
// cette fonction doit être conforme à l'AAPCS
Active_IT_Debordement_Timer( TIM4, 2, timer_callback );
// lancement du timer
Run_Timer( TIM4 );
while (1) while (1)
{ {
} }

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PROJ_TROIS/DebugConfig/Simu_STM32F103RB_1.0.0.dbgconf Normal file
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// File: STM32F101_102_103_105_107.dbgconf
// Version: 1.0.0
// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <i> Reserved bits must be kept at reset value
// <o.30> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.29> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.28> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.27> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.26> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.25> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.21> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.20> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.19> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.18> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.17> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.16> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.15> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.14> DBG_CAN1_STOP <i> Debug CAN1 stopped when Core is halted
// <o.13> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.12> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.11> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// <o.10> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// <o.9> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.8> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

9
PROJ_TROIS/EventRecorderStub.scvd Normal file
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<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

BIN
PROJ_TROIS/Obj/CHTI.axf Normal file
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PROJ_TROIS/Obj/CHTI.build_log.htm Normal file
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<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: µVision V5.29.0.0
Copyright (C) 2019 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: Nabil Moukhlis, None, LIC=----
Tool Versions:
Toolchain: MDK-Lite Version: 5.29.0.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.29.0.0
Dialog DLL: DARMSTM.DLL V1.68.0.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.7.0
Dialog DLL: TCM.DLL V1.36.5.0
<h2>Project:</h2>
C:\Users\nmouk\Desktop\BE chti\BE-CHTI\PROJ_TROIS\Project.uvprojx
Project File Date: 03/20/2020
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Rebuild target 'Simu'
assembling tab.asm...
assembling startup-rvds.s...
compiling principal.c...
assembling Tableau.s...
Tableau.s(154): warning: A1581W: Added 2 bytes of padding at address 0x16
linking...
Program Size: Code=380 RO-data=268 RW-data=268 ZI-data=1028
FromELF: creating hex file...
".\Obj\CHTI.axf" - 0 Error(s), 1 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.3.0.pack
Keil.STM32F1xx_DFP.2.3.0
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_Simu
C:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:01
</pre>
</body>
</html>

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PROJ_TROIS/Obj/CHTI.hex Normal file
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:020000040800F2
:100000003005002001010008250100082701000833
:10001000290100082B0100082D0100080000000044
:100020000000000000000000000000002F01000898
:10003000310100080000000033010008350100080C
:1000400037010008370100083701000837010008B0
:1000500037010008370100083701000837010008A0
:100060003701000837010008370100083701000890
:100070003701000837010008370100083701000880
:100080003701000837010008370100083701000870
:100090003701000837010008370100083701000860
:1000A0003701000837010008370100083701000850
:1000B0003701000837010008370100083701000840
:1000C0003701000837010008370100083701000830
:1000D0003701000837010008370100083701000820
:1000E000370100083701000837010008DFF80CD09D
:1000F00000F02CF800480047F90100083005002006
:100100000D488047DFF83400016841F4E0210160C8
:10011000BFF34F8FDFF82800DFF8281001600A488E
:1001200000477047FEE7FEE7FEE7FEE7FEE7FEE773
:10013000FEE7FEE7FEE7FEE72301000824ED00E00E
:100140000CED00E00003FA05ED000008064C074D39
:1001500006E0E06840F0010394E807009847103497
:10016000AC42F6D3FFF7C6FF480200086802000859
:1001700070B58D1810F8014B14F0030201D110F87E
:10018000012B231106D110F8013B03E010F8016B9D
:1001900001F8016B521EF9D1ABB110F8012B04F03C
:1001A0000C048A1A0C2C03D0A2EB84129B1C08E0CE
:1001B00010F8014BA2EB0422F8E712F8014B01F80A
:1001C000014B5B1EF9D5A942D4D3002070BD40F28B
:1001D000010CC2F2000C604702E008C8121F08C1FF
:1001E000002AFAD170477047002001E001C1121FB8
:1001F000002AFBD17047000010B5002419E020460A
:10020000FFF7E5FF0D490860084600680C490968DA
:10021000884203DD0948006809490860074800680A
:1002200008490968884203DA0448006805490860FB
:10023000641C402CE3DB002010BD000028000020DF
:100240002000002024000020680200080000002098
:100250002C010000700100081C0300082C01002084
:1002600004040000E80100083007054B33F91010C2
:100270000610132001FB01F102FB02107047000081
:10028000AC0000202C04100900000080FFFFFF7F5D
:100290000800821E00FF7F627F8A7D7D7A4276E3BE
:1002A000706E6AF262825A34511D47573CFC302806
:1002B00025F9188C0C000074F307E7D8DA04CFA9ED
:1002C000C3E3B8CCAE7EA50E9D92951D8FBE8983EB
:1002D0008576829E8000809E8076828385BE891D81
:1002E0008F92950E9D7EA5CCAEE3B8A9C304CFD85E
:1002F000DA07E774F300008C0CF9182825FC305756
:100300003C1D473451825AF2626E6AE37042767D38
:0C0310007A8A7D627F20015EA000000060
:04000005080000ED02
:00000001FF

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PROJ_TROIS/Obj/CHTI.htm Normal file
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html><head>
<title>Static Call Graph - [.\Obj\CHTI.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\Obj\CHTI.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Sat Mar 21 18:21:42 2020
<BR><P>
<H3>Maximum Stack Usage = 8 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
<LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
<LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
<LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
<LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
<LI><a href="#[6]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">SVC_Handler</a><BR>
<LI><a href="#[7]">DebugMon_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[7]">DebugMon_Handler</a><BR>
<LI><a href="#[8]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[8]">PendSV_Handler</a><BR>
<LI><a href="#[9]">SysTick_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[9]">SysTick_Handler</a><BR>
<LI><a href="#[1c]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC1_2_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
<LI><a href="#[1c]">ADC1_2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[4]">BusFault_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[15]">DMA1_Channel1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[16]">DMA1_Channel2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[17]">DMA1_Channel3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[18]">DMA1_Channel4_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[19]">DMA1_Channel5_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1a]">DMA1_Channel6_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1b]">DMA1_Channel7_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[7]">DebugMon_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[10]">EXTI0_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[11]">EXTI1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[12]">EXTI2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[13]">EXTI3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[14]">EXTI4_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[e]">FLASH_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2]">HardFault_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[3]">MemManage_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1]">NMI_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[b]">PVD_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[8]">PendSV_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[f]">RCC_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[33]">RTCAlarm_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[d]">RTC_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[0]">Reset_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2d]">SPI1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2e]">SPI2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[6]">SVC_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[9]">SysTick_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[36]">SystemInit</a> from startup-rvds.o(.text) referenced from startup-rvds.o(.text)
<LI><a href="#[c]">TAMPER_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[26]">TIM2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[27]">TIM3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[28]">TIM4_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2f]">USART1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[30]">USART2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[31]">USART3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[34]">USBWakeUp_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1d]">USB_HP_CAN1_TX_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1e]">USB_LP_CAN1_RX0_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[5]">UsageFault_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[a]">WWDG_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[37]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup-rvds.o(.text)
<LI><a href="#[35]">main</a> from principal.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[37]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(.text)
</UL>
<P><STRONG><a name="[3c]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
<P><STRONG><a name="[38]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>
<P><STRONG><a name="[3a]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>
<P><STRONG><a name="[3d]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
<P><STRONG><a name="[3e]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
<P><STRONG><a name="[3f]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
<P><STRONG><a name="[40]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
<P><STRONG><a name="[41]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>SystemInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(.text)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTCAlarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>
<P><STRONG><a name="[42]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
<P><STRONG><a name="[43]"></a>__decompress</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __dclz77c.o(.text), UNUSED)
<P><STRONG><a name="[44]"></a>__decompress2</STRONG> (Thumb, 94 bytes, Stack size unknown bytes, __dclz77c.o(.text), UNUSED)
<P><STRONG><a name="[45]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
<P><STRONG><a name="[46]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
<P><STRONG><a name="[47]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
<P><STRONG><a name="[35]"></a>main</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, principal.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = main
</UL>
<BR>[Calls]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;carre (via Veneer)
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[3b]"></a>carre</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, tableau.o(moncode))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main (via Veneer)
</UL>
<P>
<H3>
Local Symbols
</H3><P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>

9
PROJ_TROIS/Obj/CHTI.lnp Normal file
View file

@ -0,0 +1,9 @@
--cpu Cortex-M3
".\obj\startup-rvds.o"
".\obj\principal.o"
".\obj\tableau.o"
".\obj\tab.o"
--library_type=microlib --strict --scatter ".\Obj\CHTI.sct"
--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list "CHTI.map" -o .\Obj\CHTI.axf

304
PROJ_TROIS/Obj/CHTI.map Normal file
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@ -0,0 +1,304 @@
Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
==============================================================================
Section Cross References
startup-rvds.o(RESET) refers to startup-rvds.o(STACK) for __initial_sp
startup-rvds.o(RESET) refers to startup-rvds.o(.text) for Reset_Handler
startup-rvds.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main
principal.o(i.main) refers to tableau.o(moncode) for carre
principal.o(i.main) refers to principal.o(.data) for S
tableau.o(moncode) refers to tableau.o(Trigo) for TabSin
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk
entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000
entry2.o(.ARM.Collect$$$$00002712) refers to startup-rvds.o(STACK) for __initial_sp
entry2.o(__vectab_stack_and_reset_area) refers to startup-rvds.o(STACK) for __initial_sp
entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main
entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload
entry9a.o(.ARM.Collect$$$$0000000B) refers to principal.o(i.main) for main
entry9b.o(.ARM.Collect$$$$0000000C) refers to principal.o(i.main) for main
init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload
==============================================================================
Removing Unused input sections from the image.
Removing startup-rvds.o(HEAP), (512 bytes).
Removing tab.o(Trigo), (256 bytes).
2 unused section(s) (total 768 bytes) removed from the image.
==============================================================================
Adding Veneers to the image
Adding TT veneer (10 bytes, Long) for call to 'carre' from principal.o(i.main).
1 Veneer(s) (total 10 bytes) added to the image.
==============================================================================
Image Symbol Table
Local Symbols
Symbol Name Value Ov Type Size Object(Section)
../clib/../cmprslib/lz77c.c 0x00000000 Number 0 __dclz77c.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE
Src\principal.c 0x00000000 Number 0 principal.o ABSOLUTE
Src\startup-rvds.s 0x00000000 Number 0 startup-rvds.o ABSOLUTE
Tableau.s 0x00000000 Number 0 tableau.o ABSOLUTE
dc.s 0x00000000 Number 0 dc.o ABSOLUTE
handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE
init.s 0x00000000 Number 0 init.o ABSOLUTE
tab.asm 0x00000000 Number 0 tab.o ABSOLUTE
RESET 0x08000000 Section 236 startup-rvds.o(RESET)
.ARM.Collect$$$$00000000 0x080000ec Section 0 entry.o(.ARM.Collect$$$$00000000)
.ARM.Collect$$$$00000001 0x080000ec Section 4 entry2.o(.ARM.Collect$$$$00000001)
.ARM.Collect$$$$00000004 0x080000f0 Section 4 entry5.o(.ARM.Collect$$$$00000004)
.ARM.Collect$$$$00000008 0x080000f4 Section 0 entry7b.o(.ARM.Collect$$$$00000008)
.ARM.Collect$$$$0000000A 0x080000f4 Section 0 entry8b.o(.ARM.Collect$$$$0000000A)
.ARM.Collect$$$$0000000B 0x080000f4 Section 8 entry9a.o(.ARM.Collect$$$$0000000B)
.ARM.Collect$$$$0000000D 0x080000fc Section 0 entry10a.o(.ARM.Collect$$$$0000000D)
.ARM.Collect$$$$0000000F 0x080000fc Section 0 entry11a.o(.ARM.Collect$$$$0000000F)
.ARM.Collect$$$$00002712 0x080000fc Section 4 entry2.o(.ARM.Collect$$$$00002712)
__lit__00000000 0x080000fc Data 4 entry2.o(.ARM.Collect$$$$00002712)
.text 0x08000100 Section 76 startup-rvds.o(.text)
.text 0x0800014c Section 36 init.o(.text)
.text 0x08000170 Section 0 __dclz77c.o(.text)
i.__scatterload_copy 0x080001d8 Section 14 handlers.o(i.__scatterload_copy)
i.__scatterload_null 0x080001e6 Section 2 handlers.o(i.__scatterload_null)
i.__scatterload_zeroinit 0x080001e8 Section 14 handlers.o(i.__scatterload_zeroinit)
i.main 0x080001f8 Section 0 principal.o(i.main)
moncode 0x20000000 Section 32 tableau.o(moncode)
.data 0x20000020 Section 12 principal.o(.data)
Trigo 0x2000002c Section 256 tableau.o(Trigo)
TabCos 0x2000002c Data 0 tableau.o(Trigo)
TabSin 0x200000ac Data 0 tableau.o(Trigo)
STACK 0x20000130 Section 1024 startup-rvds.o(STACK)
Global Symbols
Symbol Name Value Ov Type Size Object(Section)
BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE
__ARM_use_no_argv 0x00000000 Number 0 principal.o ABSOLUTE
__cpp_initialize__aeabi_ - Undefined Weak Reference
__cxa_finalize - Undefined Weak Reference
_clock_init - Undefined Weak Reference
_microlib_exit - Undefined Weak Reference
__Vectors_Size 0x000000ec Number 0 startup-rvds.o ABSOLUTE
__Vectors 0x08000000 Data 4 startup-rvds.o(RESET)
__Vectors_End 0x080000ec Data 0 startup-rvds.o(RESET)
__main 0x080000ed Thumb Code 0 entry.o(.ARM.Collect$$$$00000000)
_main_stk 0x080000ed Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001)
_main_scatterload 0x080000f1 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004)
__main_after_scatterload 0x080000f5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004)
_main_clock 0x080000f5 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008)
_main_cpp_init 0x080000f5 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A)
_main_init 0x080000f5 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B)
__rt_final_cpp 0x080000fd Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D)
__rt_final_exit 0x080000fd Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F)
Reset_Handler 0x08000101 Thumb Code 34 startup-rvds.o(.text)
SystemInit 0x08000123 Thumb Code 2 startup-rvds.o(.text)
NMI_Handler 0x08000125 Thumb Code 2 startup-rvds.o(.text)
HardFault_Handler 0x08000127 Thumb Code 2 startup-rvds.o(.text)
MemManage_Handler 0x08000129 Thumb Code 2 startup-rvds.o(.text)
BusFault_Handler 0x0800012b Thumb Code 2 startup-rvds.o(.text)
UsageFault_Handler 0x0800012d Thumb Code 2 startup-rvds.o(.text)
SVC_Handler 0x0800012f Thumb Code 2 startup-rvds.o(.text)
DebugMon_Handler 0x08000131 Thumb Code 2 startup-rvds.o(.text)
PendSV_Handler 0x08000133 Thumb Code 2 startup-rvds.o(.text)
SysTick_Handler 0x08000135 Thumb Code 2 startup-rvds.o(.text)
ADC1_2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
CAN1_RX1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
CAN1_SCE_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel5_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel6_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel7_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI0_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI15_10_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI9_5_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
FLASH_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C1_ER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C1_EV_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C2_ER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C2_EV_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
PVD_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
RCC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
RTCAlarm_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
RTC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
SPI1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
SPI2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TAMPER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_BRK_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_CC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_TRG_COM_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_UP_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USART1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USART2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USART3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USBWakeUp_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USB_HP_CAN1_TX_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USB_LP_CAN1_RX0_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
WWDG_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
__scatterload 0x0800014d Thumb Code 28 init.o(.text)
__scatterload_rt2 0x0800014d Thumb Code 0 init.o(.text)
__decompress 0x08000171 Thumb Code 0 __dclz77c.o(.text)
__decompress2 0x08000171 Thumb Code 94 __dclz77c.o(.text)
Long Thumb to Thumb Veneer to carre 0x080001cf Thumb Code 10 anon$$obj.o(Veneer$$Code)
__scatterload_copy 0x080001d9 Thumb Code 14 handlers.o(i.__scatterload_copy)
__scatterload_null 0x080001e7 Thumb Code 2 handlers.o(i.__scatterload_null)
__scatterload_zeroinit 0x080001e9 Thumb Code 14 handlers.o(i.__scatterload_zeroinit)
main 0x080001f9 Thumb Code 66 principal.o(i.main)
Region$$Table$$Base 0x08000248 Number 0 anon$$obj.o(Region$$Table)
Region$$Table$$Limit 0x08000268 Number 0 anon$$obj.o(Region$$Table)
carre 0x20000001 Thumb Code 20 tableau.o(moncode)
Smax 0x20000020 Data 4 principal.o(.data)
Smin 0x20000024 Data 4 principal.o(.data)
S 0x20000028 Data 4 principal.o(.data)
__initial_sp 0x20000530 Data 0 startup-rvds.o(STACK)
==============================================================================
Memory Map of the image
Image Entry point : 0x080000ed
Load Region LR_IROM1 (Base: 0x08000000, Size: 0x00000394, Max: 0x00020000, ABSOLUTE, COMPRESSED[0x0000031c])
Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00000268, Max: 0x00020000, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x08000000 0x08000000 0x000000ec Data RO 3 RESET startup-rvds.o
0x080000ec 0x080000ec 0x00000000 Code RO 35 * .ARM.Collect$$$$00000000 mc_w.l(entry.o)
0x080000ec 0x080000ec 0x00000004 Code RO 38 .ARM.Collect$$$$00000001 mc_w.l(entry2.o)
0x080000f0 0x080000f0 0x00000004 Code RO 41 .ARM.Collect$$$$00000004 mc_w.l(entry5.o)
0x080000f4 0x080000f4 0x00000000 Code RO 43 .ARM.Collect$$$$00000008 mc_w.l(entry7b.o)
0x080000f4 0x080000f4 0x00000000 Code RO 45 .ARM.Collect$$$$0000000A mc_w.l(entry8b.o)
0x080000f4 0x080000f4 0x00000008 Code RO 46 .ARM.Collect$$$$0000000B mc_w.l(entry9a.o)
0x080000fc 0x080000fc 0x00000000 Code RO 48 .ARM.Collect$$$$0000000D mc_w.l(entry10a.o)
0x080000fc 0x080000fc 0x00000000 Code RO 50 .ARM.Collect$$$$0000000F mc_w.l(entry11a.o)
0x080000fc 0x080000fc 0x00000004 Code RO 39 .ARM.Collect$$$$00002712 mc_w.l(entry2.o)
0x08000100 0x08000100 0x0000004c Code RO 4 .text startup-rvds.o
0x0800014c 0x0800014c 0x00000024 Code RO 52 .text mc_w.l(init.o)
0x08000170 0x08000170 0x0000005e Code RO 62 .text mc_w.l(__dclz77c.o)
0x080001ce 0x080001ce 0x0000000a Ven RO 64 Veneer$$Code anon$$obj.o
0x080001d8 0x080001d8 0x0000000e Code RO 56 i.__scatterload_copy mc_w.l(handlers.o)
0x080001e6 0x080001e6 0x00000002 Code RO 57 i.__scatterload_null mc_w.l(handlers.o)
0x080001e8 0x080001e8 0x0000000e Code RO 58 i.__scatterload_zeroinit mc_w.l(handlers.o)
0x080001f6 0x080001f6 0x00000002 PAD
0x080001f8 0x080001f8 0x00000050 Code RO 10 i.main principal.o
0x08000248 0x08000248 0x00000020 Data RO 54 Region$$Table anon$$obj.o
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08000268, Size: 0x00000530, Max: 0x00005000, ABSOLUTE, COMPRESSED[0x000000b4])
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x20000000 COMPRESSED 0x00000020 Code RW 30 moncode tableau.o
0x20000020 COMPRESSED 0x0000000c Data RW 11 .data principal.o
0x2000002c COMPRESSED 0x00000100 Data RW 29 Trigo tableau.o
0x2000012c COMPRESSED 0x00000004 PAD
0x20000130 - 0x00000400 Zero RW 1 STACK startup-rvds.o
==============================================================================
Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
80 14 0 12 0 2205 principal.o
76 20 236 0 1024 836 startup-rvds.o
32 10 0 256 0 308 tableau.o
----------------------------------------------------------------------
198 44 268 268 1028 3349 Object Totals
10 0 32 0 0 0 (incl. Generated)
0 0 0 0 4 0 (incl. Padding)
----------------------------------------------------------------------
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
94 0 0 0 0 0 __dclz77c.o
0 0 0 0 0 0 entry.o
0 0 0 0 0 0 entry10a.o
0 0 0 0 0 0 entry11a.o
8 4 0 0 0 0 entry2.o
4 0 0 0 0 0 entry5.o
0 0 0 0 0 0 entry7b.o
0 0 0 0 0 0 entry8b.o
8 4 0 0 0 0 entry9a.o
30 0 0 0 0 0 handlers.o
36 8 0 0 0 68 init.o
----------------------------------------------------------------------
182 16 0 0 0 68 Library Totals
2 0 0 0 0 0 (incl. Padding)
----------------------------------------------------------------------
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
180 16 0 0 0 68 mc_w.l
----------------------------------------------------------------------
182 16 0 0 0 68 Library Totals
----------------------------------------------------------------------
==============================================================================
Code (inc. data) RO Data RW Data ZI Data Debug
380 60 268 268 1028 3597 Grand Totals
380 60 268 180 1028 3597 ELF Image Totals (compressed)
380 60 268 180 0 0 ROM Totals
==============================================================================
Total RO Size (Code + RO Data) 648 ( 0.63kB)
Total RW Size (RW Data + ZI Data) 1296 ( 1.27kB)
Total ROM Size (Code + RO Data + RW Data) 828 ( 0.81kB)
==============================================================================

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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00020000 { ; load region size_region
ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00005000 { ; RW data
.ANY (+RW +ZI)
}
}

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Dependencies for Project 'Project', Target 'Simu': (DO NOT MODIFY !)
CompilerVersion: 5060750::V5.06 update 6 (build 750)::ARMCC
F (.\Src\startup-rvds.s)(0x51CAF88C)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list startup-rvds.lst --xref -o .\obj\startup-rvds.o --depend .\obj\startup-rvds.d)
F (.\Src\principal.c)(0x5E764CCA)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections --C99 -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="529" -D_RTE_ -DSTM32F10X_MD -DSTM32F103xB -DUSE_FULL_LL_DRIVER -o .\obj\principal.o --omf_browse .\obj\principal.crf --depend .\obj\principal.d)
I (C:\Keil_v5\ARM\ARMCC\include\limits.h)(0x5D9B3482)
F (.\Tableau.s)(0x5E764D24)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list tableau.lst --xref -o .\obj\tableau.o --depend .\obj\tableau.d)
F (.\tab.asm)(0x5E74D1B2)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list tab.lst --xref -o .\obj\tab.o --depend .\obj\tab.d)

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.\obj\callback.o: callback.s

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.\obj\principal.o: Src\principal.c
.\obj\principal.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\limits.h

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.\obj\startup-rvds.o: Src\startup-rvds.s

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.\obj\tab.o: tab.asm

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.\obj\tableau.o: Tableau.s

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath></ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>1</uSim>
<uTrg>0</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>1</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>6</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=859,154,1280,581,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name>-T0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>(105=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>22</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134218294</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\Src\principal.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\CHTI\Src/principal.c\22</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>S</ItemText>
</Ww>
<Ww>
<count>1</count>
<WinNumber>1</WinNumber>
<ItemText>Smax</ItemText>
</Ww>
<Ww>
<count>2</count>
<WinNumber>1</WinNumber>
<ItemText>Smin</ItemText>
</Ww>
</WatchWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>Sources</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\principal.c</PathWithFileName>
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Tableau.s</PathWithFileName>
<FilenameWithoutPath>Tableau.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\tab.asm</PathWithFileName>
<FilenameWithoutPath>tab.asm</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

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PROJ_TROIS/Project.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F103RB</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Obj\</OutputDirectory>
<OutputName>CHTI</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath></ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-REMAP</SimDllArguments>
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--C99</MiscControls>
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Sources</GroupName>
<Files>
<File>
<FileName>startup-rvds.s</FileName>
<FileType>2</FileType>
<FilePath>.\Src\startup-rvds.s</FilePath>
</File>
<File>
<FileName>principal.c</FileName>
<FileType>1</FileType>
<FilePath>.\Src\principal.c</FilePath>
</File>
<File>
<FileName>Tableau.s</FileName>
<FileType>2</FileType>
<FilePath>.\Tableau.s</FilePath>
</File>
<File>
<FileName>tab.asm</FileName>
<FileType>2</FileType>
<FilePath>.\tab.asm</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="Simu"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

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/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'Project'
* Target: 'Simu'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f10x.h"
#endif /* RTE_COMPONENTS_H */

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/**
* Bibliotheque GASSP 2013-02-15
*
* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
*
*/
// STM32F10X_CL : pour le STM32F107 "Communication Line"
// STM32F10X_MD : pour le STM32F103 "Medium Density"
//#define STM32F10X_MD // 2019 fix for Keil 5.23
#include "stm32f10x.h"
// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
void CLOCK_Configure(void);
// Timers 1, 2, 3, 4 -------------------------------------------------------
// la duree entre deux debordements successifs doit etre donnnee en periodes
// d'horloge CPU (typiquement 72 MHz)
void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
// bloque le timer
#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
// Lance timer
#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
// de valeurs acceptees pour moduler la largeur d'impulsion
vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
// Timer systeme "SysTick" -------------------------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
void Systick_Period_ff( unsigned int Periode_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
// ADC - DMA ---------------------------------------------------------------
// Analog-to-Digital Conversion, Direct Memory Access
// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la duree totale de conversion (meme unites)
u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
// choix d'un canal ADC unique
void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
// Les sources de déclenchement possibles :
#define TIM1_CC1 0
#define TIM1_CC2 1
#define TIM1_CC3 2
#define TIM2_CC2 3
#define TIM4_CC4 5
void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
// initialisation d'acquisition en mode DMA
// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
void Start_DMA1( u16 NbEchDMA );
// arret DMA
#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
// fonction d'attente (bloquante)
// la duree depend de la periode d'acquisition et du nombre d'echantillons
void Wait_On_End_Of_DMA1(void);
// GPIO --------------------------------------------------------------------
// Sens
#define INPUT 'i'
#define OUTPUT 'o'
// Techno pour pin en entrée (INPUT)
#define ANALOG 0
#define INPUT_FLOATING 1
#define INPUT_PULL_DOWN_UP 2
// Techno pour pin en sortie (OUTPUT)
#define OUTPUT_PPULL 0
#define OUTPUT_OPDRAIN 1
#define ALT_PPULL 2
#define ALT_OPDRAIN 3
// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
// Exemple :
// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
// Place le bit 8 du port B en sortie Push-pull
// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
// Spécifier le numéro de broche (0 à 15)
// exemple : Port_IO_Set(GPIOB,8);
#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)

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#include <limits.h>
int carre(int);
int Smax=INT_MIN;
int Smin=INT_MAX;
int S;
int main(void)
{
for(int i=0;i<64;i++)
{
S=carre(i);
if(S>Smax)
{
Smax=S;
}
if(S<Smin)
{
Smin=S;
}
}
}

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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
LDR R0, =SystemInit
BLX R0
;
; Enable UsageFault, MemFault and Busfault interrupts
;
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
LDR.W R0, =_SHCSR
LDR R1, [R0] ; Read CPACR
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
STR R1, [R0] ; Write back the modified value to the CPACR
DSB ; Wait for store to complete
;
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
;
_AIRCR EQU 0xE000ED0C
_AIRCR_VAL EQU 0x05FA0300
LDR.W R0, =_AIRCR
LDR.W R1, =_AIRCR_VAL
STR R1,[R0]
;
; Finaly, jump to main function (void main (void))
;
LDR R0, =__main
BX R0
ENDP
SystemInit PROC
EXPORT SystemInit [WEAK]
BX LR
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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thumb
AREA Trigo, DATA, READWRITE
TabCos
DCW 32767 ; 0 0x7fff 0.99997
DCW 32610 ; 1 0x7f62 0.99518
DCW 32138 ; 2 0x7d8a 0.98077
DCW 31357 ; 3 0x7a7d 0.95694
DCW 30274 ; 4 0x7642 0.92389
DCW 28899 ; 5 0x70e3 0.88193
DCW 27246 ; 6 0x6a6e 0.83148
DCW 25330 ; 7 0x62f2 0.77301
DCW 23170 ; 8 0x5a82 0.70709
DCW 20788 ; 9 0x5134 0.63440
DCW 18205 ; 10 0x471d 0.55557
DCW 15447 ; 11 0x3c57 0.47141
DCW 12540 ; 12 0x30fc 0.38269
DCW 9512 ; 13 0x2528 0.29028
DCW 6393 ; 14 0x18f9 0.19510
DCW 3212 ; 15 0x0c8c 0.09802
DCW 0 ; 16 0x0000 0.00000
DCW -3212 ; 17 0xf374 -0.09802
DCW -6393 ; 18 0xe707 -0.19510
DCW -9512 ; 19 0xdad8 -0.29028
DCW -12540 ; 20 0xcf04 -0.38269
DCW -15447 ; 21 0xc3a9 -0.47141
DCW -18205 ; 22 0xb8e3 -0.55557
DCW -20788 ; 23 0xaecc -0.63440
DCW -23170 ; 24 0xa57e -0.70709
DCW -25330 ; 25 0x9d0e -0.77301
DCW -27246 ; 26 0x9592 -0.83148
DCW -28899 ; 27 0x8f1d -0.88193
DCW -30274 ; 28 0x89be -0.92389
DCW -31357 ; 29 0x8583 -0.95694
DCW -32138 ; 30 0x8276 -0.98077
DCW -32610 ; 31 0x809e -0.99518
DCW -32768 ; 32 0x8000 -1.00000
DCW -32610 ; 33 0x809e -0.99518
DCW -32138 ; 34 0x8276 -0.98077
DCW -31357 ; 35 0x8583 -0.95694
DCW -30274 ; 36 0x89be -0.92389
DCW -28899 ; 37 0x8f1d -0.88193
DCW -27246 ; 38 0x9592 -0.83148
DCW -25330 ; 39 0x9d0e -0.77301
DCW -23170 ; 40 0xa57e -0.70709
DCW -20788 ; 41 0xaecc -0.63440
DCW -18205 ; 42 0xb8e3 -0.55557
DCW -15447 ; 43 0xc3a9 -0.47141
DCW -12540 ; 44 0xcf04 -0.38269
DCW -9512 ; 45 0xdad8 -0.29028
DCW -6393 ; 46 0xe707 -0.19510
DCW -3212 ; 47 0xf374 -0.09802
DCW 0 ; 48 0x0000 0.00000
DCW 3212 ; 49 0x0c8c 0.09802
DCW 6393 ; 50 0x18f9 0.19510
DCW 9512 ; 51 0x2528 0.29028
DCW 12540 ; 52 0x30fc 0.38269
DCW 15447 ; 53 0x3c57 0.47141
DCW 18205 ; 54 0x471d 0.55557
DCW 20788 ; 55 0x5134 0.63440
DCW 23170 ; 56 0x5a82 0.70709
DCW 25330 ; 57 0x62f2 0.77301
DCW 27246 ; 58 0x6a6e 0.83148
DCW 28899 ; 59 0x70e3 0.88193
DCW 30274 ; 60 0x7642 0.92389
DCW 31357 ; 61 0x7a7d 0.95694
DCW 32138 ; 62 0x7d8a 0.98077
DCW 32610 ; 63 0x7f62 0.99518
TabSin
DCW 0 ; 0 0x0000 0.00000
DCW 3212 ; 1 0x0c8c 0.09802
DCW 6393 ; 2 0x18f9 0.19510
DCW 9512 ; 3 0x2528 0.29028
DCW 12540 ; 4 0x30fc 0.38269
DCW 15447 ; 5 0x3c57 0.47141
DCW 18205 ; 6 0x471d 0.55557
DCW 20788 ; 7 0x5134 0.63440
DCW 23170 ; 8 0x5a82 0.70709
DCW 25330 ; 9 0x62f2 0.77301
DCW 27246 ; 10 0x6a6e 0.83148
DCW 28899 ; 11 0x70e3 0.88193
DCW 30274 ; 12 0x7642 0.92389
DCW 31357 ; 13 0x7a7d 0.95694
DCW 32138 ; 14 0x7d8a 0.98077
DCW 32610 ; 15 0x7f62 0.99518
DCW 32767 ; 16 0x7fff 0.99997
DCW 32610 ; 17 0x7f62 0.99518
DCW 32138 ; 18 0x7d8a 0.98077
DCW 31357 ; 19 0x7a7d 0.95694
DCW 30274 ; 20 0x7642 0.92389
DCW 28899 ; 21 0x70e3 0.88193
DCW 27246 ; 22 0x6a6e 0.83148
DCW 25330 ; 23 0x62f2 0.77301
DCW 23170 ; 24 0x5a82 0.70709
DCW 20788 ; 25 0x5134 0.63440
DCW 18205 ; 26 0x471d 0.55557
DCW 15447 ; 27 0x3c57 0.47141
DCW 12540 ; 28 0x30fc 0.38269
DCW 9512 ; 29 0x2528 0.29028
DCW 6393 ; 30 0x18f9 0.19510
DCW 3212 ; 31 0x0c8c 0.09802
DCW 0 ; 32 0x0000 0.00000
DCW -3212 ; 33 0xf374 -0.09802
DCW -6393 ; 34 0xe707 -0.19510
DCW -9512 ; 35 0xdad8 -0.29028
DCW -12540 ; 36 0xcf04 -0.38269
DCW -15447 ; 37 0xc3a9 -0.47141
DCW -18205 ; 38 0xb8e3 -0.55557
DCW -20788 ; 39 0xaecc -0.63440
DCW -23170 ; 40 0xa57e -0.70709
DCW -25330 ; 41 0x9d0e -0.77301
DCW -27246 ; 42 0x9592 -0.83148
DCW -28899 ; 43 0x8f1d -0.88193
DCW -30274 ; 44 0x89be -0.92389
DCW -31357 ; 45 0x8583 -0.95694
DCW -32138 ; 46 0x8276 -0.98077
DCW -32610 ; 47 0x809e -0.99518
DCW -32768 ; 48 0x8000 -1.00000
DCW -32610 ; 49 0x809e -0.99518
DCW -32138 ; 50 0x8276 -0.98077
DCW -31357 ; 51 0x8583 -0.95694
DCW -30274 ; 52 0x89be -0.92389
DCW -28899 ; 53 0x8f1d -0.88193
DCW -27246 ; 54 0x9592 -0.83148
DCW -25330 ; 55 0x9d0e -0.77301
DCW -23170 ; 56 0xa57e -0.70709
DCW -20788 ; 57 0xaecc -0.63440
DCW -18205 ; 58 0xb8e3 -0.55557
DCW -15447 ; 59 0xc3a9 -0.47141
DCW -12540 ; 60 0xcf04 -0.38269
DCW -9512 ; 61 0xdad8 -0.29028
DCW -6393 ; 62 0xe707 -0.19510
DCW -3212 ; 63 0xf374 -0.09802
area moncode, code, readwrite
export carre
carre proc
ldr r3,=TabSin
ldrsh r1, [r3, r0, LSL #0x01]
ldr r3,=TabCos
ldrsh r2, [r3, r0, LSL #0x01]
mul r1, r1, r1
mla r0,r2,r2,r1
;str r0, [r1]
endp
bx lr
end

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ARM Macro Assembler Page 1
1 00000000 ; ce programme est pour l'assembleur RealView (Keil)
2 00000000 thumb
3 00000000 area madata, data, readwrite
4 00000000 export echelon
5 00000000 00000000
echelon dcd 0
6 00000004
7 00000004 area moncode, code, readonly
8 00000000 export timer_callback
9 00000000
10 00000000 timer_callback
proc
11 00000000
12 00000000 40010C10
GPIOB_BSRR
equ 0x40010C10 ; Bit Set/Reset reg
ister
13 00000000
14 00000000 4A09 ldr r2, =echelon
15 00000002 6810 ldr r0,[r2]
16 00000004 B138 CBZ r0, misea1
17 00000006
18 00000006
19 00000006 ; mise a zero de PB1
20 00000006 4B09 ldr r3, =GPIOB_BSRR
21 00000008 F44F 3100 mov r1, #0x00020000
22 0000000C 6019 str r1, [r3]
23 0000000E F100 30FF add r0, #-1
24 00000012 6010 str r0,[r2]
25 00000014 E006 B finn
26 00000016
27 00000016 ; mise a 1 de PB1
28 00000016 4B05 misea1 ldr r3, =GPIOB_BSRR
29 00000018 F04F 0102 mov r1, #0x00000002
30 0000001C 6019 str r1, [r3]
31 0000001E F100 0001 add r0, #1
32 00000022 6010 str r0,[r2]
33 00000024 ; N.B. le registre BSRR est write-only, on ne peut pas l
e relire
34 00000024
35 00000024 4770 finn bx lr ;
36 00000026 endp
37 00000026 ;
38 00000026 end
00 00 00000000
40010C10
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\callback.d -o.\obj\callback.o -I.\RTE\_Simu -IC:\Users\nmouk
\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\Ap
pData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EV
AL SETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA
529" --predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=callba
ck.lst callback.s
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
echelon 00000000
Symbol: echelon
Definitions
At line 5 in file callback.s
Uses
At line 4 in file callback.s
At line 14 in file callback.s
madata 00000000
Symbol: madata
Definitions
At line 3 in file callback.s
Uses
None
Comment: madata unused
2 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
finn 00000024
Symbol: finn
Definitions
At line 35 in file callback.s
Uses
At line 25 in file callback.s
Comment: finn used once
misea1 00000016
Symbol: misea1
Definitions
At line 28 in file callback.s
Uses
At line 16 in file callback.s
Comment: misea1 used once
moncode 00000000
Symbol: moncode
Definitions
At line 7 in file callback.s
Uses
None
Comment: moncode unused
timer_callback 00000000
Symbol: timer_callback
Definitions
At line 10 in file callback.s
Uses
At line 8 in file callback.s
Comment: timer_callback used once
4 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Absolute symbols
GPIOB_BSRR 40010C10
Symbol: GPIOB_BSRR
Definitions
At line 12 in file callback.s
Uses
At line 20 in file callback.s
At line 28 in file callback.s
1 symbol
344 symbols in table

1251
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AREA Trigo, DATA, READWRITE
export TabSin
export TabCos
TabCos
DCW 32767 ; 0 0x7fff 0.99997
DCW 32610 ; 1 0x7f62 0.99518
DCW 32138 ; 2 0x7d8a 0.98077
DCW 31357 ; 3 0x7a7d 0.95694
DCW 30274 ; 4 0x7642 0.92389
DCW 28899 ; 5 0x70e3 0.88193
DCW 27246 ; 6 0x6a6e 0.83148
DCW 25330 ; 7 0x62f2 0.77301
DCW 23170 ; 8 0x5a82 0.70709
DCW 20788 ; 9 0x5134 0.63440
DCW 18205 ; 10 0x471d 0.55557
DCW 15447 ; 11 0x3c57 0.47141
DCW 12540 ; 12 0x30fc 0.38269
DCW 9512 ; 13 0x2528 0.29028
DCW 6393 ; 14 0x18f9 0.19510
DCW 3212 ; 15 0x0c8c 0.09802
DCW 0 ; 16 0x0000 0.00000
DCW -3212 ; 17 0xf374 -0.09802
DCW -6393 ; 18 0xe707 -0.19510
DCW -9512 ; 19 0xdad8 -0.29028
DCW -12540 ; 20 0xcf04 -0.38269
DCW -15447 ; 21 0xc3a9 -0.47141
DCW -18205 ; 22 0xb8e3 -0.55557
DCW -20788 ; 23 0xaecc -0.63440
DCW -23170 ; 24 0xa57e -0.70709
DCW -25330 ; 25 0x9d0e -0.77301
DCW -27246 ; 26 0x9592 -0.83148
DCW -28899 ; 27 0x8f1d -0.88193
DCW -30274 ; 28 0x89be -0.92389
DCW -31357 ; 29 0x8583 -0.95694
DCW -32138 ; 30 0x8276 -0.98077
DCW -32610 ; 31 0x809e -0.99518
DCW -32768 ; 32 0x8000 -1.00000
DCW -32610 ; 33 0x809e -0.99518
DCW -32138 ; 34 0x8276 -0.98077
DCW -31357 ; 35 0x8583 -0.95694
DCW -30274 ; 36 0x89be -0.92389
DCW -28899 ; 37 0x8f1d -0.88193
DCW -27246 ; 38 0x9592 -0.83148
DCW -25330 ; 39 0x9d0e -0.77301
DCW -23170 ; 40 0xa57e -0.70709
DCW -20788 ; 41 0xaecc -0.63440
DCW -18205 ; 42 0xb8e3 -0.55557
DCW -15447 ; 43 0xc3a9 -0.47141
DCW -12540 ; 44 0xcf04 -0.38269
DCW -9512 ; 45 0xdad8 -0.29028
DCW -6393 ; 46 0xe707 -0.19510
DCW -3212 ; 47 0xf374 -0.09802
DCW 0 ; 48 0x0000 0.00000
DCW 3212 ; 49 0x0c8c 0.09802
DCW 6393 ; 50 0x18f9 0.19510
DCW 9512 ; 51 0x2528 0.29028
DCW 12540 ; 52 0x30fc 0.38269
DCW 15447 ; 53 0x3c57 0.47141
DCW 18205 ; 54 0x471d 0.55557
DCW 20788 ; 55 0x5134 0.63440
DCW 23170 ; 56 0x5a82 0.70709
DCW 25330 ; 57 0x62f2 0.77301
DCW 27246 ; 58 0x6a6e 0.83148
DCW 28899 ; 59 0x70e3 0.88193
DCW 30274 ; 60 0x7642 0.92389
DCW 31357 ; 61 0x7a7d 0.95694
DCW 32138 ; 62 0x7d8a 0.98077
DCW 32610 ; 63 0x7f62 0.99518
TabSin
DCW 0 ; 0 0x0000 0.00000
DCW 3212 ; 1 0x0c8c 0.09802
DCW 6393 ; 2 0x18f9 0.19510
DCW 9512 ; 3 0x2528 0.29028
DCW 12540 ; 4 0x30fc 0.38269
DCW 15447 ; 5 0x3c57 0.47141
DCW 18205 ; 6 0x471d 0.55557
DCW 20788 ; 7 0x5134 0.63440
DCW 23170 ; 8 0x5a82 0.70709
DCW 25330 ; 9 0x62f2 0.77301
DCW 27246 ; 10 0x6a6e 0.83148
DCW 28899 ; 11 0x70e3 0.88193
DCW 30274 ; 12 0x7642 0.92389
DCW 31357 ; 13 0x7a7d 0.95694
DCW 32138 ; 14 0x7d8a 0.98077
DCW 32610 ; 15 0x7f62 0.99518
DCW 32767 ; 16 0x7fff 0.99997
DCW 32610 ; 17 0x7f62 0.99518
DCW 32138 ; 18 0x7d8a 0.98077
DCW 31357 ; 19 0x7a7d 0.95694
DCW 30274 ; 20 0x7642 0.92389
DCW 28899 ; 21 0x70e3 0.88193
DCW 27246 ; 22 0x6a6e 0.83148
DCW 25330 ; 23 0x62f2 0.77301
DCW 23170 ; 24 0x5a82 0.70709
DCW 20788 ; 25 0x5134 0.63440
DCW 18205 ; 26 0x471d 0.55557
DCW 15447 ; 27 0x3c57 0.47141
DCW 12540 ; 28 0x30fc 0.38269
DCW 9512 ; 29 0x2528 0.29028
DCW 6393 ; 30 0x18f9 0.19510
DCW 3212 ; 31 0x0c8c 0.09802
DCW 0 ; 32 0x0000 0.00000
DCW -3212 ; 33 0xf374 -0.09802
DCW -6393 ; 34 0xe707 -0.19510
DCW -9512 ; 35 0xdad8 -0.29028
DCW -12540 ; 36 0xcf04 -0.38269
DCW -15447 ; 37 0xc3a9 -0.47141
DCW -18205 ; 38 0xb8e3 -0.55557
DCW -20788 ; 39 0xaecc -0.63440
DCW -23170 ; 40 0xa57e -0.70709
DCW -25330 ; 41 0x9d0e -0.77301
DCW -27246 ; 42 0x9592 -0.83148
DCW -28899 ; 43 0x8f1d -0.88193
DCW -30274 ; 44 0x89be -0.92389
DCW -31357 ; 45 0x8583 -0.95694
DCW -32138 ; 46 0x8276 -0.98077
DCW -32610 ; 47 0x809e -0.99518
DCW -32768 ; 48 0x8000 -1.00000
DCW -32610 ; 49 0x809e -0.99518
DCW -32138 ; 50 0x8276 -0.98077
DCW -31357 ; 51 0x8583 -0.95694
DCW -30274 ; 52 0x89be -0.92389
DCW -28899 ; 53 0x8f1d -0.88193
DCW -27246 ; 54 0x9592 -0.83148
DCW -25330 ; 55 0x9d0e -0.77301
DCW -23170 ; 56 0xa57e -0.70709
DCW -20788 ; 57 0xaecc -0.63440
DCW -18205 ; 58 0xb8e3 -0.55557
DCW -15447 ; 59 0xc3a9 -0.47141
DCW -12540 ; 60 0xcf04 -0.38269
DCW -9512 ; 61 0xdad8 -0.29028
DCW -6393 ; 62 0xe707 -0.19510
DCW -3212 ; 63 0xf374 -0.09802
END

332
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@ -0,0 +1,332 @@
ARM Macro Assembler Page 1
1 00000000 AREA Trigo, DATA, READWRITE
2 00000000 export TabSin
3 00000000 export TabCos
4 00000000
5 00000000 TabCos
6 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999
7
7 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951
8
8 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807
7
9 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569
4
10 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238
9
11 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819
3
12 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314
8
13 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730
1
14 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
15 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344
0
16 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555
7
17 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714
1
18 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826
9
19 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902
8
20 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951
0
21 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980
2
22 00000020 00 00 DCW 0 ; 16 0x0000 0.0000
0
23 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980
2
24 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951
0
25 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902
8
26 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826
9
27 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714
1
28 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555
7
29 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344
0
30 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070
9
31 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730
1
32 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314
8
ARM Macro Assembler Page 2
33 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819
3
34 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238
9
35 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569
4
36 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807
7
37 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951
8
38 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000
0
39 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951
8
40 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807
7
41 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569
4
42 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238
9
43 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819
3
44 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314
8
45 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730
1
46 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
47 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344
0
48 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555
7
49 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714
1
50 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826
9
51 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902
8
52 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951
0
53 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980
2
54 00000060 00 00 DCW 0 ; 48 0x0000 0.0000
0
55 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980
2
56 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951
0
57 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902
8
58 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826
9
59 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714
1
60 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555
7
61 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344
0
62 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070
ARM Macro Assembler Page 3
9
63 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730
1
64 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314
8
65 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819
3
66 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238
9
67 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569
4
68 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807
7
69 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951
8
70 00000080 TabSin
71 00000080 00 00 DCW 0 ; 0 0x0000 0.0000
0
72 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980
2
73 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951
0
74 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902
8
75 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826
9
76 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714
1
77 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555
7
78 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344
0
79 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
80 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730
1
81 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314
8
82 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819
3
83 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238
9
84 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569
4
85 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807
7
86 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951
8
87 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999
7
88 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951
8
89 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807
7
90 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569
4
91 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238
9
92 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819
ARM Macro Assembler Page 4
3
93 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314
8
94 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730
1
95 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070
9
96 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344
0
97 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555
7
98 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714
1
99 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826
9
100 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902
8
101 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951
0
102 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980
2
103 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000
0
104 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980
2
105 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951
0
106 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902
8
107 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826
9
108 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714
1
109 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555
7
110 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344
0
111 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
112 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730
1
113 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314
8
114 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819
3
115 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238
9
116 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569
4
117 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807
7
118 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951
8
119 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000
0
120 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951
8
121 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807
7
ARM Macro Assembler Page 5
122 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569
4
123 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238
9
124 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819
3
125 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314
8
126 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730
1
127 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070
9
128 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344
0
129 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555
7
130 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714
1
131 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826
9
132 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902
8
133 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951
0
134 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980
2
135 00000100
136 00000100 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\tab.d -o.\obj\tab.o -I.\RTE\_Simu -IC:\Users\nmouk\AppData\L
ocal\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Loca
l\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL SETA 1"
--predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 529" --pre
define="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=tab.lst tab.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
TabCos 00000000
Symbol: TabCos
Definitions
At line 5 in file tab.asm
Uses
At line 3 in file tab.asm
Comment: TabCos used once
TabSin 00000080
Symbol: TabSin
Definitions
At line 70 in file tab.asm
Uses
At line 2 in file tab.asm
Comment: TabSin used once
Trigo 00000000
Symbol: Trigo
Definitions
At line 1 in file tab.asm
Uses
None
Comment: Trigo unused
3 symbols
338 symbols in table

376
PROJ_TROIS/tableau.lst Normal file
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@ -0,0 +1,376 @@
ARM Macro Assembler Page 1
1 00000000 thumb
2 00000000
3 00000000 AREA Trigo, DATA, READWRITE
4 00000000
5 00000000
6 00000000 TabCos
7 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999
7
8 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951
8
9 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807
7
10 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569
4
11 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238
9
12 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819
3
13 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314
8
14 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730
1
15 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
16 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344
0
17 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555
7
18 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714
1
19 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826
9
20 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902
8
21 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951
0
22 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980
2
23 00000020 00 00 DCW 0 ; 16 0x0000 0.0000
0
24 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980
2
25 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951
0
26 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902
8
27 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826
9
28 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714
1
29 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555
7
30 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344
0
31 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070
9
32 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730
1
33 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314
ARM Macro Assembler Page 2
8
34 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819
3
35 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238
9
36 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569
4
37 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807
7
38 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951
8
39 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000
0
40 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951
8
41 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807
7
42 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569
4
43 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238
9
44 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819
3
45 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314
8
46 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730
1
47 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
48 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344
0
49 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555
7
50 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714
1
51 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826
9
52 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902
8
53 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951
0
54 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980
2
55 00000060 00 00 DCW 0 ; 48 0x0000 0.0000
0
56 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980
2
57 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951
0
58 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902
8
59 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826
9
60 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714
1
61 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555
7
62 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344
0
ARM Macro Assembler Page 3
63 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070
9
64 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730
1
65 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314
8
66 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819
3
67 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238
9
68 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569
4
69 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807
7
70 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951
8
71 00000080 TabSin
72 00000080 00 00 DCW 0 ; 0 0x0000 0.0000
0
73 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980
2
74 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951
0
75 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902
8
76 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826
9
77 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714
1
78 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555
7
79 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344
0
80 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
81 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730
1
82 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314
8
83 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819
3
84 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238
9
85 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569
4
86 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807
7
87 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951
8
88 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999
7
89 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951
8
90 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807
7
91 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569
4
92 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238
9
ARM Macro Assembler Page 4
93 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819
3
94 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314
8
95 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730
1
96 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070
9
97 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344
0
98 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555
7
99 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714
1
100 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826
9
101 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902
8
102 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951
0
103 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980
2
104 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000
0
105 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980
2
106 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951
0
107 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902
8
108 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826
9
109 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714
1
110 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555
7
111 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344
0
112 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
113 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730
1
114 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314
8
115 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819
3
116 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238
9
117 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569
4
118 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807
7
119 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951
8
120 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000
0
121 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951
8
122 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807
ARM Macro Assembler Page 5
7
123 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569
4
124 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238
9
125 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819
3
126 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314
8
127 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730
1
128 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070
9
129 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344
0
130 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555
7
131 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714
1
132 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826
9
133 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902
8
134 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951
0
135 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980
2
136 00000100
137 00000100 area moncode, code, readwrite
138 00000000 export carre
139 00000000
140 00000000 carre proc
141 00000000
142 00000000 4B05 ldr r3,=TabSin
143 00000002 F933 1010 ldrsh r1, [r3, r0, LSL #0x01]
144 00000006 4B05 ldr r3,=TabCos
145 00000008 F933 2010 ldrsh r2, [r3, r0, LSL #0x01]
146 0000000C
147 0000000C FB01 F101 mul r1, r1, r1
148 00000010 FB02 1002 mla r0,r2,r2,r1
149 00000014 ;str r0, [r1]
150 00000014
151 00000014 endp
152 00000014 4770 bx lr
153 00000016
154 00000016 end
00 00 00000000
00000000
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\tableau.d -o.\obj\tableau.o -I.\RTE\_Simu -IC:\Users\nmouk\A
ppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppD
ata\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL
SETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 52
9" --predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=tableau.
lst Tableau.s
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
TabCos 00000000
Symbol: TabCos
Definitions
At line 6 in file Tableau.s
Uses
At line 144 in file Tableau.s
Comment: TabCos used once
TabSin 00000080
Symbol: TabSin
Definitions
At line 71 in file Tableau.s
Uses
At line 142 in file Tableau.s
Comment: TabSin used once
Trigo 00000000
Symbol: Trigo
Definitions
At line 3 in file Tableau.s
Uses
None
Comment: Trigo unused
3 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
carre 00000000
Symbol: carre
Definitions
At line 140 in file Tableau.s
Uses
At line 138 in file Tableau.s
Comment: carre used once
moncode 00000000
Symbol: moncode
Definitions
At line 137 in file Tableau.s
Uses
None
Comment: moncode unused
2 symbols
342 symbols in table