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2 commits
obj2 ... master

Author SHA1 Message Date
Yohan Simard
ad0e3c6f2a Mise à jour de l'avancement 2020-05-29 16:31:43 +02:00
keplyx
2ba82733dc Amélioration du readme 2020-05-29 11:43:36 +02:00
32 changed files with 4098 additions and 228 deletions
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24
.gitignore vendored
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@ -1,4 +1,20 @@
/projet_keil/*
!/projet_keil/Src/
!/projet_keil/Project.uvoptx
!/projet_keil/Project.uvprojx
!/1.1/
/1.1/*
!/1.1/Src/
!/1.1/Project.uvoptx
!/1.1/Project.uvprojx
!/2.1/
/2.1/*
!/2.1/Src/
!/2.1/Project.uvoptx
!/2.1/Project.uvprojx
!/2.2/
/2.2/*
!/2.2/Src/
!/2.2/Project.uvoptx
!/2.2/Project.uvprojx
!/challenge/
/challenge/*
!/challenge/Src/
!/challenge/Project.uvoptx
!/challenge/Project.uvprojx

280
1.1/Project.uvoptx Normal file
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@ -0,0 +1,280 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath></ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>1</uSim>
<uTrg>0</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>1</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=1318,341,1876,866,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name>-T0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>(105=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>1</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<LogicAnalyzers>
<Wi>
<IntNumber>0</IntNumber>
<FirstString>((portb &amp; 0x00000002) &gt;&gt; 1 &amp; 0x2) &gt;&gt; 1</FirstString>
<SecondString>FF000000000000000000000000000000E0FFEF400100000000000000000000000000000028706F7274622026203078303030303030303229203E3E2031000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F0900000000000000000000000000000000000000401E0008</SecondString>
</Wi>
</LogicAnalyzers>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>Sources</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\principal.c</PathWithFileName>
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>4</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\gassp72.lib</PathWithFileName>
<FilenameWithoutPath>gassp72.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\gen_signal.s</PathWithFileName>
<FilenameWithoutPath>gen_signal.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

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1.1/Project.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F103RB</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Obj\</OutputDirectory>
<OutputName>CHTI</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath></ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-REMAP</SimDllArguments>
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--C99</MiscControls>
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Sources</GroupName>
<Files>
<File>
<FileName>startup-rvds.s</FileName>
<FileType>2</FileType>
<FilePath>.\Src\startup-rvds.s</FilePath>
</File>
<File>
<FileName>principal.c</FileName>
<FileType>1</FileType>
<FilePath>.\Src\principal.c</FilePath>
</File>
<File>
<FileName>gassp72.lib</FileName>
<FileType>4</FileType>
<FilePath>.\Src\gassp72.lib</FilePath>
</File>
<File>
<FileName>gen_signal.s</FileName>
<FileType>2</FileType>
<FilePath>.\Src\gen_signal.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="Simu"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

0
projet_keil/Src/gassp72.h → 1.1/Src/gassp72.h
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BIN
1.1/Src/gassp72.lib Normal file
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1.1/Src/gen_signal.s Normal file
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thumb
area moncode, code, readonly
GPIOB_BSRR equ 0x40010C10 ; Bit Set/Reset register
extern current_value
export timer_callback
timer_callback proc
ldr r2, =current_value
ldr r0, [r2]
ldr r3, =GPIOB_BSRR
cbnz r0, zero
; mise a 1 de PB1
mov r1, #0x00000002
str r1, [r3]
mov r1, #1
str r1, [r2]
bx lr
; mise a 0 de PB1
zero mov r1, #0x00020000
str r1, [r3]
mov r1, #0
str r1, [r2]
bx lr
endp
end
; N.B. le registre BSRR est write-only, on ne peut pas le relire

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#include "gassp72.h"
int periode_en_tck = 100;
int current_value = 0;
void timer_callback(void);
int main(void) {
// activation de la PLL qui multiplie la fréquence du quartz par 9
CLOCK_Configure();
// config port PB1 pour être utilisé en sortie
GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
// initialisation du timer 4
// Periode_en_Tck doit fournir la durée entre interruptions,
// exprimée en périodes Tck de l'horloge principale du STM32 (72 MHz)
Timer_1234_Init_ff( TIM4, periode_en_tck );
// enregistrement de la fonction de traitement de l'interruption timer
// ici le 2 est la priorité, timer_callback est l'adresse de cette fonction, a créér en asm,
// cette fonction doit être conforme à l'AAPCS
Active_IT_Debordement_Timer( TIM4, 2, timer_callback );
// lancement du timer
Run_Timer( TIM4 );
while (1) {
}
}

0
projet_keil/Src/startup-rvds.s → 1.1/Src/startup-rvds.s
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2.1/Project.uvoptx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath></ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>1</uSim>
<uTrg>0</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>1</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=1318,341,1876,866,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name>-T0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>(105=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<WatchWindow1>
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>max,0x0A</ItemText>
</Ww>
<Ww>
<count>1</count>
<WinNumber>1</WinNumber>
<ItemText>min,0x0A</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>0</SubType>
<ItemText>0x080001F4</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<LogicAnalyzers>
<Wi>
<IntNumber>0</IntNumber>
<FirstString>((portb &amp; 0x00000002) &gt;&gt; 1 &amp; 0x2) &gt;&gt; 1</FirstString>
<SecondString>FF000000000000000000000000000000E0FFEF400100000000000000000000000000000028706F7274622026203078303030303030303229203E3E2031000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F0700000000000000000000000000000000000000401E0008</SecondString>
</Wi>
</LogicAnalyzers>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>Sources</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\principal.c</PathWithFileName>
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\calcul_somme.s</PathWithFileName>
<FilenameWithoutPath>calcul_somme.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

422
2.1/Project.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F103RB</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Obj\</OutputDirectory>
<OutputName>CHTI</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath></ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-REMAP</SimDllArguments>
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--C99</MiscControls>
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Sources</GroupName>
<Files>
<File>
<FileName>startup-rvds.s</FileName>
<FileType>2</FileType>
<FilePath>.\Src\startup-rvds.s</FilePath>
</File>
<File>
<FileName>principal.c</FileName>
<FileType>1</FileType>
<FilePath>.\Src\principal.c</FilePath>
</File>
<File>
<FileName>calcul_somme.s</FileName>
<FileType>2</FileType>
<FilePath>.\Src\calcul_somme.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="Simu"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

152
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thumb
AREA moncode, code, readonly
export somme
somme proc
mov r0, r0, LSL #1 ; decalage de 1 vers la gauche -> multiplication par 2
ldr r2, =TabCos
ldrsh r1, [r2, r0] ; récupération du cos au format 1.15
ldr r2, =TabSin
ldrsh r3, [r2, r0] ; récupération du sin au format 1.15
mul r1, r1, r1 ; carré du cos au format 2.30
mla r0, r3, r3, r1 ; carré du sin puis somme des carrés au format 1.30
mov r0, r0, LSR #15 ; remise au format 1.15
bx lr
endp
AREA Trigo, DATA, READONLY
export TabSin
export TabCos
TabCos
DCW 32767 ; 0 0x7fff 0.99997
DCW 32610 ; 1 0x7f62 0.99518
DCW 32138 ; 2 0x7d8a 0.98077
DCW 31357 ; 3 0x7a7d 0.95694
DCW 30274 ; 4 0x7642 0.92389
DCW 28899 ; 5 0x70e3 0.88193
DCW 27246 ; 6 0x6a6e 0.83148
DCW 25330 ; 7 0x62f2 0.77301
DCW 23170 ; 8 0x5a82 0.70709
DCW 20788 ; 9 0x5134 0.63440
DCW 18205 ; 10 0x471d 0.55557
DCW 15447 ; 11 0x3c57 0.47141
DCW 12540 ; 12 0x30fc 0.38269
DCW 9512 ; 13 0x2528 0.29028
DCW 6393 ; 14 0x18f9 0.19510
DCW 3212 ; 15 0x0c8c 0.09802
DCW 0 ; 16 0x0000 0.00000
DCW -3212 ; 17 0xf374 -0.09802
DCW -6393 ; 18 0xe707 -0.19510
DCW -9512 ; 19 0xdad8 -0.29028
DCW -12540 ; 20 0xcf04 -0.38269
DCW -15447 ; 21 0xc3a9 -0.47141
DCW -18205 ; 22 0xb8e3 -0.55557
DCW -20788 ; 23 0xaecc -0.63440
DCW -23170 ; 24 0xa57e -0.70709
DCW -25330 ; 25 0x9d0e -0.77301
DCW -27246 ; 26 0x9592 -0.83148
DCW -28899 ; 27 0x8f1d -0.88193
DCW -30274 ; 28 0x89be -0.92389
DCW -31357 ; 29 0x8583 -0.95694
DCW -32138 ; 30 0x8276 -0.98077
DCW -32610 ; 31 0x809e -0.99518
DCW -32768 ; 32 0x8000 -1.00000
DCW -32610 ; 33 0x809e -0.99518
DCW -32138 ; 34 0x8276 -0.98077
DCW -31357 ; 35 0x8583 -0.95694
DCW -30274 ; 36 0x89be -0.92389
DCW -28899 ; 37 0x8f1d -0.88193
DCW -27246 ; 38 0x9592 -0.83148
DCW -25330 ; 39 0x9d0e -0.77301
DCW -23170 ; 40 0xa57e -0.70709
DCW -20788 ; 41 0xaecc -0.63440
DCW -18205 ; 42 0xb8e3 -0.55557
DCW -15447 ; 43 0xc3a9 -0.47141
DCW -12540 ; 44 0xcf04 -0.38269
DCW -9512 ; 45 0xdad8 -0.29028
DCW -6393 ; 46 0xe707 -0.19510
DCW -3212 ; 47 0xf374 -0.09802
DCW 0 ; 48 0x0000 0.00000
DCW 3212 ; 49 0x0c8c 0.09802
DCW 6393 ; 50 0x18f9 0.19510
DCW 9512 ; 51 0x2528 0.29028
DCW 12540 ; 52 0x30fc 0.38269
DCW 15447 ; 53 0x3c57 0.47141
DCW 18205 ; 54 0x471d 0.55557
DCW 20788 ; 55 0x5134 0.63440
DCW 23170 ; 56 0x5a82 0.70709
DCW 25330 ; 57 0x62f2 0.77301
DCW 27246 ; 58 0x6a6e 0.83148
DCW 28899 ; 59 0x70e3 0.88193
DCW 30274 ; 60 0x7642 0.92389
DCW 31357 ; 61 0x7a7d 0.95694
DCW 32138 ; 62 0x7d8a 0.98077
DCW 32610 ; 63 0x7f62 0.99518
TabSin
DCW 0 ; 0 0x0000 0.00000
DCW 3212 ; 1 0x0c8c 0.09802
DCW 6393 ; 2 0x18f9 0.19510
DCW 9512 ; 3 0x2528 0.29028
DCW 12540 ; 4 0x30fc 0.38269
DCW 15447 ; 5 0x3c57 0.47141
DCW 18205 ; 6 0x471d 0.55557
DCW 20788 ; 7 0x5134 0.63440
DCW 23170 ; 8 0x5a82 0.70709
DCW 25330 ; 9 0x62f2 0.77301
DCW 27246 ; 10 0x6a6e 0.83148
DCW 28899 ; 11 0x70e3 0.88193
DCW 30274 ; 12 0x7642 0.92389
DCW 31357 ; 13 0x7a7d 0.95694
DCW 32138 ; 14 0x7d8a 0.98077
DCW 32610 ; 15 0x7f62 0.99518
DCW 32767 ; 16 0x7fff 0.99997
DCW 32610 ; 17 0x7f62 0.99518
DCW 32138 ; 18 0x7d8a 0.98077
DCW 31357 ; 19 0x7a7d 0.95694
DCW 30274 ; 20 0x7642 0.92389
DCW 28899 ; 21 0x70e3 0.88193
DCW 27246 ; 22 0x6a6e 0.83148
DCW 25330 ; 23 0x62f2 0.77301
DCW 23170 ; 24 0x5a82 0.70709
DCW 20788 ; 25 0x5134 0.63440
DCW 18205 ; 26 0x471d 0.55557
DCW 15447 ; 27 0x3c57 0.47141
DCW 12540 ; 28 0x30fc 0.38269
DCW 9512 ; 29 0x2528 0.29028
DCW 6393 ; 30 0x18f9 0.19510
DCW 3212 ; 31 0x0c8c 0.09802
DCW 0 ; 32 0x0000 0.00000
DCW -3212 ; 33 0xf374 -0.09802
DCW -6393 ; 34 0xe707 -0.19510
DCW -9512 ; 35 0xdad8 -0.29028
DCW -12540 ; 36 0xcf04 -0.38269
DCW -15447 ; 37 0xc3a9 -0.47141
DCW -18205 ; 38 0xb8e3 -0.55557
DCW -20788 ; 39 0xaecc -0.63440
DCW -23170 ; 40 0xa57e -0.70709
DCW -25330 ; 41 0x9d0e -0.77301
DCW -27246 ; 42 0x9592 -0.83148
DCW -28899 ; 43 0x8f1d -0.88193
DCW -30274 ; 44 0x89be -0.92389
DCW -31357 ; 45 0x8583 -0.95694
DCW -32138 ; 46 0x8276 -0.98077
DCW -32610 ; 47 0x809e -0.99518
DCW -32768 ; 48 0x8000 -1.00000
DCW -32610 ; 49 0x809e -0.99518
DCW -32138 ; 50 0x8276 -0.98077
DCW -31357 ; 51 0x8583 -0.95694
DCW -30274 ; 52 0x89be -0.92389
DCW -28899 ; 53 0x8f1d -0.88193
DCW -27246 ; 54 0x9592 -0.83148
DCW -25330 ; 55 0x9d0e -0.77301
DCW -23170 ; 56 0xa57e -0.70709
DCW -20788 ; 57 0xaecc -0.63440
DCW -18205 ; 58 0xb8e3 -0.55557
DCW -15447 ; 59 0xc3a9 -0.47141
DCW -12540 ; 60 0xcf04 -0.38269
DCW -9512 ; 61 0xdad8 -0.29028
DCW -6393 ; 62 0xe707 -0.19510
DCW -3212 ; 63 0xf374 -0.09802
END

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/**
* Bibliotheque GASSP 2013-02-15
*
* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
*
*/
// STM32F10X_CL : pour le STM32F107 "Communication Line"
// STM32F10X_MD : pour le STM32F103 "Medium Density"
//#define STM32F10X_MD // 2019 fix for Keil 5.23
#include "stm32f10x.h"
// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
void CLOCK_Configure(void);
// Timers 1, 2, 3, 4 -------------------------------------------------------
// la duree entre deux debordements successifs doit etre donnnee en periodes
// d'horloge CPU (typiquement 72 MHz)
void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
// bloque le timer
#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
// Lance timer
#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
// de valeurs acceptees pour moduler la largeur d'impulsion
vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
// Timer systeme "SysTick" -------------------------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
void Systick_Period_ff( unsigned int Periode_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
// ADC - DMA ---------------------------------------------------------------
// Analog-to-Digital Conversion, Direct Memory Access
// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la duree totale de conversion (meme unites)
u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
// choix d'un canal ADC unique
void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
// Les sources de déclenchement possibles :
#define TIM1_CC1 0
#define TIM1_CC2 1
#define TIM1_CC3 2
#define TIM2_CC2 3
#define TIM4_CC4 5
void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
// initialisation d'acquisition en mode DMA
// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
void Start_DMA1( u16 NbEchDMA );
// arret DMA
#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
// fonction d'attente (bloquante)
// la duree depend de la periode d'acquisition et du nombre d'echantillons
void Wait_On_End_Of_DMA1(void);
// GPIO --------------------------------------------------------------------
// Sens
#define INPUT 'i'
#define OUTPUT 'o'
// Techno pour pin en entrée (INPUT)
#define ANALOG 0
#define INPUT_FLOATING 1
#define INPUT_PULL_DOWN_UP 2
// Techno pour pin en sortie (OUTPUT)
#define OUTPUT_PPULL 0
#define OUTPUT_OPDRAIN 1
#define ALT_PPULL 2
#define ALT_OPDRAIN 3
// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
// Exemple :
// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
// Place le bit 8 du port B en sortie Push-pull
// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
// Spécifier le numéro de broche (0 à 15)
// exemple : Port_IO_Set(GPIOB,8);
#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)

BIN
2.1/Src/gassp72.lib Normal file
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15
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int somme(int);
int max = 0;
int min = 999999;
int main(void) {
int resultat;
for (int i = 0; i < 64; ++i) {
resultat = somme(i);
if (resultat > max)
max = resultat;
else if (resultat < min)
min = resultat;
}
while(1){}
}

335
2.1/Src/startup-rvds.s Normal file
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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
LDR R0, =SystemInit
BLX R0
;
; Enable UsageFault, MemFault and Busfault interrupts
;
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
LDR.W R0, =_SHCSR
LDR R1, [R0] ; Read CPACR
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
STR R1, [R0] ; Write back the modified value to the CPACR
DSB ; Wait for store to complete
;
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
;
_AIRCR EQU 0xE000ED0C
_AIRCR_VAL EQU 0x05FA0300
LDR.W R0, =_AIRCR
LDR.W R1, =_AIRCR_VAL
STR R1,[R0]
;
; Finaly, jump to main function (void main (void))
;
LDR R0, =__main
BX R0
ENDP
SystemInit PROC
EXPORT SystemInit [WEAK]
BX LR
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

106
projet_keil/Project.uvoptx → 2.2/Project.uvoptx
View file

@ -175,22 +175,7 @@
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>debug_result,0x0A</ItemText>
</Ww>
<Ww>
<count>1</count>
<WinNumber>1</WinNumber>
<ItemText>time,0x0A</ItemText>
</Ww>
<Ww>
<count>2</count>
<WinNumber>1</WinNumber>
<ItemText>counters,0x0A</ItemText>
</Ww>
<Ww>
<count>3</count>
<WinNumber>1</WinNumber>
<ItemText>scores,0x0A</ItemText>
<ItemText>resultats</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
@ -207,7 +192,7 @@
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
@ -221,7 +206,7 @@
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>1</aLa>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
@ -246,63 +231,8 @@
<LogicAnalyzers>
<Wi>
<IntNumber>0</IntNumber>
<FirstString>`counters[0]</FirstString>
<SecondString>008000000000000000000000000000000000354000000000000000000000000000000000636F756E746572735B305D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000001000000555555555555B53F1C00000000000000000000000000000000000000180D0008</SecondString>
</Wi>
<Wi>
<IntNumber>1</IntNumber>
<FirstString>`counters[1]</FirstString>
<SecondString>000080000000000000000000000000000000354000000000000000000000000000000000636F756E746572735B315D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000002000000555555555555B53F1C00000000000000000000000000000000000000180D0008</SecondString>
</Wi>
<Wi>
<IntNumber>2</IntNumber>
<FirstString>`counters[2]</FirstString>
<SecondString>000000000000000000000000000000000000354000000000000000000000000000000000636F756E746572735B325D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000003000000555555555555B53F1C00000000000000000000000000000000000000180D0008</SecondString>
</Wi>
<Wi>
<IntNumber>3</IntNumber>
<FirstString>`counters[3]</FirstString>
<SecondString>FF0000000000000000000000000000000000354000000000000000000000000000000000636F756E746572735B335D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000004000000555555555555B53F1C00000000000000000000000000000000000000180D0008</SecondString>
</Wi>
<Wi>
<IntNumber>4</IntNumber>
<FirstString>`counters[4]</FirstString>
<SecondString>008000000000000000000000000000000000354000000000000000000000000000000000636F756E746572735B345D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000005000000555555555555B53F1C00000000000000000000000000000000000000180D0008</SecondString>
</Wi>
<Wi>
<IntNumber>5</IntNumber>
<FirstString>`counters[5]</FirstString>
<SecondString>000080000000000000000000000000000000354000000000000000000000000000000000636F756E746572735B355D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000006000000555555555555B53F1C00000000000000000000000000000000000000180D0008</SecondString>
</Wi>
<Wi>
<IntNumber>6</IntNumber>
<FirstString>`scores[0]</FirstString>
<SecondString>0000800000000000000000000000000000002E400000000000000000000000000000000073636F7265735B305D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000007000000555555555555B53F1C00000000000000000000000000000000000000C80D0008</SecondString>
</Wi>
<Wi>
<IntNumber>7</IntNumber>
<FirstString>`scores[1]</FirstString>
<SecondString>0000000000000000000000000000000000002E400000000000000000000000000000000073636F7265735B315D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000008000000555555555555B53F1C00000000000000000000000000000000000000C80D0008</SecondString>
</Wi>
<Wi>
<IntNumber>8</IntNumber>
<FirstString>`scores[2]</FirstString>
<SecondString>FF00000000000000000000000000000000002E400000000000000000000000000000000073636F7265735B325D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000009000000555555555555B53F1C00000000000000000000000000000000000000C80D0008</SecondString>
</Wi>
<Wi>
<IntNumber>9</IntNumber>
<FirstString>`scores[3]</FirstString>
<SecondString>0080000000000000000000000000000000002E400000000000000000000000000000000073636F7265735B335D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070000000A000000575555555555B53F1C00000000000000000000000000000000000000C80D0008</SecondString>
</Wi>
<Wi>
<IntNumber>10</IntNumber>
<FirstString>`scores[4]</FirstString>
<SecondString>0000800000000000000000000000000000002E400000000000000000000000000000000073636F7265735B345D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070000000B000000555555555555B53F1C00000000000000000000000000000000000000C80D0008</SecondString>
</Wi>
<Wi>
<IntNumber>11</IntNumber>
<FirstString>`scores[5]</FirstString>
<SecondString>0000000000000000000000000000000000002E400000000000000000000000000000000073636F7265735B355D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070000000C000000565555555555B53F1C00000000000000000000000000000000000000C80D0008</SecondString>
<FirstString>((portb &amp; 0x00000002) &gt;&gt; 1 &amp; 0x2) &gt;&gt; 1</FirstString>
<SecondString>FF000000000000000000000000000000E0FFEF400100000000000000000000000000000028706F7274622026203078303030303030303229203E3E2031000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F0700000000000000000000000000000000000000401E0008</SecondString>
</Wi>
</LogicAnalyzers>
<DebugDescription>
@ -337,7 +267,7 @@
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\principal.c</PathWithFileName>
@ -357,30 +287,6 @@
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>5</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\gassp72.h</PathWithFileName>
<FilenameWithoutPath>gassp72.h</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>4</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\gfssp72.lib</PathWithFileName>
<FilenameWithoutPath>gfssp72.lib</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>

10
projet_keil/Project.uvprojx → 2.2/Project.uvprojx
View file

@ -397,16 +397,6 @@
<FileType>2</FileType>
<FilePath>.\Src\calcul_dft.s</FilePath>
</File>
<File>
<FileName>gassp72.h</FileName>
<FileType>5</FileType>
<FilePath>.\Src\gassp72.h</FilePath>
</File>
<File>
<FileName>gfssp72.lib</FileName>
<FileType>4</FileType>
<FilePath>.\Src\gfssp72.lib</FilePath>
</File>
</Files>
</Group>
<Group>

272
2.2/Src/calcul_dft.s Normal file
View file

@ -0,0 +1,272 @@
thumb
AREA moncode, code, readonly
export dft
N equ 64
dft proc
push {lr, r4, r5, r0} ; empilage de l'adresse de retour
ldr r2, =TabCos ; on met l'addr de TabCos
bl cal_comp ; on calcule Re(k) | format : 5.28
smull r4, r5, r0, r0 ; (r4,r5) = Re(k)² | format : 10.54
pop {r0}
ldr r2, =TabSin ; on met l'addr de TabSin
bl cal_comp ; on calcule -Im(k) | format : 5.28
smlal r4, r5, r0, r0 ; (r4,r5) = Re(k)² + Im(k)² | format : 10.54
mov r0, r5 ; On prend les 32 bits de poids fort pour convertir au format 10.22/3.29 ?
pop {pc, r4, r5} ; dépilage de l'adresse de retour
endp
cal_comp proc ; r0 = x (signal), r1 = k, r2 = sin ou cos
push {r4, r5, r6, r7}
mov r3, #0 ; r3 = i
mov r5, #0 ; r5 = ik
mov r7, #0 ; r7 = 0
deb_somme ldrh r4, [r0, r3, LSL #1] ; r4 = x[i], LSL #1 pour faire ×2 car chaque valeur est sur 2 octets | format 4.12
ldrsh r6, [r2, r5, LSL #1] ; r6 = cos ou sin [ik%N] | format 1.15
mla r7, r4, r6, r7 ; r7 += x[i] * cos|sin[ik%n] | format 5.27
add r5, r1 ; r5 = (i-1)k + k
and r5, #N-1 ; r5 = r5 % 64
add r3, #1 ; on incrémente i
cmp r3, #N ;
bne deb_somme
mov r0, r7
pop {r4, r5, r6, r7}
bx lr
endp
AREA Signal, DATA, READONLY
export TabSig
; Fnor1 = 23.000
; Ph1 = -26.565
; A1 = 62.000 env. 50mV/3300mV
; Fnor2 = 24.000
; Ph2 = -116.565
; A2 = 1024.000
; valeurs attendues pour k = 23 :
; Re 0x0378FDBD
; Im 0x01BAD0C5 env 0.5 * Re, car tan(26.565) ~= 0.5
; M2 0x000F0D16 986390
;
; valeurs attendues pour k = 24 :
; Re 0xE36136DD env -0.447 * 2^30
; Im 0x393E61CA env -2 * Re, car tan(116.565) ~= 2.0
; M2 0x0FFFF53C env 2^28
;
; pour les autres valeurs de k sauf les alias de 23 et 24 :
; M2 < 0x0000000F
TabSig
DCW 1646 ; 0 0x066e 0.40186
DCW 3006 ; 1 0x0bbe 0.73389
DCW 1094 ; 2 0x0446 0.26709
DCW 2434 ; 3 0x0982 0.59424
DCW 2465 ; 4 0x09a1 0.60181
DCW 1066 ; 5 0x042a 0.26025
DCW 3018 ; 6 0x0bca 0.73682
DCW 1666 ; 7 0x0682 0.40674
DCW 1610 ; 8 0x064a 0.39307
DCW 3052 ; 9 0x0bec 0.74512
DCW 1071 ; 10 0x042f 0.26147
DCW 2417 ; 11 0x0971 0.59009
DCW 2510 ; 12 0x09ce 0.61279
DCW 1026 ; 13 0x0402 0.25049
DCW 3024 ; 14 0x0bd0 0.73828
DCW 1699 ; 15 0x06a3 0.41479
DCW 1562 ; 16 0x061a 0.38135
DCW 3080 ; 17 0x0c08 0.75195
DCW 1083 ; 18 0x043b 0.26440
DCW 2374 ; 19 0x0946 0.57959
DCW 2553 ; 20 0x09f9 0.62329
DCW 1015 ; 21 0x03f7 0.24780
DCW 2995 ; 22 0x0bb3 0.73120
DCW 1746 ; 23 0x06d2 0.42627
DCW 1531 ; 24 0x05fb 0.37378
DCW 3072 ; 25 0x0c00 0.75000
DCW 1124 ; 26 0x0464 0.27441
DCW 2329 ; 27 0x0919 0.56860
DCW 2568 ; 28 0x0a08 0.62695
DCW 1041 ; 29 0x0411 0.25415
DCW 2948 ; 30 0x0b84 0.71973
DCW 1781 ; 31 0x06f5 0.43481
DCW 1535 ; 32 0x05ff 0.37476
DCW 3033 ; 33 0x0bd9 0.74048
DCW 1170 ; 34 0x0492 0.28564
DCW 2310 ; 35 0x0906 0.56396
DCW 2547 ; 36 0x09f3 0.62183
DCW 1087 ; 37 0x043f 0.26538
DCW 2910 ; 38 0x0b5e 0.71045
DCW 1782 ; 39 0x06f6 0.43506
DCW 1570 ; 40 0x0622 0.38330
DCW 2986 ; 41 0x0baa 0.72900
DCW 1194 ; 42 0x04aa 0.29150
DCW 2327 ; 43 0x0917 0.56812
DCW 2502 ; 44 0x09c6 0.61084
DCW 1127 ; 45 0x0467 0.27515
DCW 2904 ; 46 0x0b58 0.70898
DCW 1749 ; 47 0x06d5 0.42700
DCW 1618 ; 48 0x0652 0.39502
DCW 2959 ; 49 0x0b8f 0.72241
DCW 1181 ; 50 0x049d 0.28833
DCW 2370 ; 51 0x0942 0.57861
DCW 2459 ; 52 0x099b 0.60034
DCW 1138 ; 53 0x0472 0.27783
DCW 2933 ; 54 0x0b75 0.71606
DCW 1702 ; 55 0x06a6 0.41553
DCW 1649 ; 56 0x0671 0.40259
DCW 2967 ; 57 0x0b97 0.72437
DCW 1140 ; 58 0x0474 0.27832
DCW 2414 ; 59 0x096e 0.58936
DCW 2444 ; 60 0x098c 0.59668
DCW 1112 ; 61 0x0458 0.27148
DCW 2980 ; 62 0x0ba4 0.72754
DCW 1668 ; 63 0x0684 0.40723
AREA Trigo, DATA, READONLY
export TabSin
export TabCos
TabCos
DCW 32767 ; 0 0x7fff 0.99997
DCW 32610 ; 1 0x7f62 0.99518
DCW 32138 ; 2 0x7d8a 0.98077
DCW 31357 ; 3 0x7a7d 0.95694
DCW 30274 ; 4 0x7642 0.92389
DCW 28899 ; 5 0x70e3 0.88193
DCW 27246 ; 6 0x6a6e 0.83148
DCW 25330 ; 7 0x62f2 0.77301
DCW 23170 ; 8 0x5a82 0.70709
DCW 20788 ; 9 0x5134 0.63440
DCW 18205 ; 10 0x471d 0.55557
DCW 15447 ; 11 0x3c57 0.47141
DCW 12540 ; 12 0x30fc 0.38269
DCW 9512 ; 13 0x2528 0.29028
DCW 6393 ; 14 0x18f9 0.19510
DCW 3212 ; 15 0x0c8c 0.09802
DCW 0 ; 16 0x0000 0.00000
DCW -3212 ; 17 0xf374 -0.09802
DCW -6393 ; 18 0xe707 -0.19510
DCW -9512 ; 19 0xdad8 -0.29028
DCW -12540 ; 20 0xcf04 -0.38269
DCW -15447 ; 21 0xc3a9 -0.47141
DCW -18205 ; 22 0xb8e3 -0.55557
DCW -20788 ; 23 0xaecc -0.63440
DCW -23170 ; 24 0xa57e -0.70709
DCW -25330 ; 25 0x9d0e -0.77301
DCW -27246 ; 26 0x9592 -0.83148
DCW -28899 ; 27 0x8f1d -0.88193
DCW -30274 ; 28 0x89be -0.92389
DCW -31357 ; 29 0x8583 -0.95694
DCW -32138 ; 30 0x8276 -0.98077
DCW -32610 ; 31 0x809e -0.99518
DCW -32768 ; 32 0x8000 -1.00000
DCW -32610 ; 33 0x809e -0.99518
DCW -32138 ; 34 0x8276 -0.98077
DCW -31357 ; 35 0x8583 -0.95694
DCW -30274 ; 36 0x89be -0.92389
DCW -28899 ; 37 0x8f1d -0.88193
DCW -27246 ; 38 0x9592 -0.83148
DCW -25330 ; 39 0x9d0e -0.77301
DCW -23170 ; 40 0xa57e -0.70709
DCW -20788 ; 41 0xaecc -0.63440
DCW -18205 ; 42 0xb8e3 -0.55557
DCW -15447 ; 43 0xc3a9 -0.47141
DCW -12540 ; 44 0xcf04 -0.38269
DCW -9512 ; 45 0xdad8 -0.29028
DCW -6393 ; 46 0xe707 -0.19510
DCW -3212 ; 47 0xf374 -0.09802
DCW 0 ; 48 0x0000 0.00000
DCW 3212 ; 49 0x0c8c 0.09802
DCW 6393 ; 50 0x18f9 0.19510
DCW 9512 ; 51 0x2528 0.29028
DCW 12540 ; 52 0x30fc 0.38269
DCW 15447 ; 53 0x3c57 0.47141
DCW 18205 ; 54 0x471d 0.55557
DCW 20788 ; 55 0x5134 0.63440
DCW 23170 ; 56 0x5a82 0.70709
DCW 25330 ; 57 0x62f2 0.77301
DCW 27246 ; 58 0x6a6e 0.83148
DCW 28899 ; 59 0x70e3 0.88193
DCW 30274 ; 60 0x7642 0.92389
DCW 31357 ; 61 0x7a7d 0.95694
DCW 32138 ; 62 0x7d8a 0.98077
DCW 32610 ; 63 0x7f62 0.99518
TabSin
DCW 0 ; 0 0x0000 0.00000
DCW 3212 ; 1 0x0c8c 0.09802
DCW 6393 ; 2 0x18f9 0.19510
DCW 9512 ; 3 0x2528 0.29028
DCW 12540 ; 4 0x30fc 0.38269
DCW 15447 ; 5 0x3c57 0.47141
DCW 18205 ; 6 0x471d 0.55557
DCW 20788 ; 7 0x5134 0.63440
DCW 23170 ; 8 0x5a82 0.70709
DCW 25330 ; 9 0x62f2 0.77301
DCW 27246 ; 10 0x6a6e 0.83148
DCW 28899 ; 11 0x70e3 0.88193
DCW 30274 ; 12 0x7642 0.92389
DCW 31357 ; 13 0x7a7d 0.95694
DCW 32138 ; 14 0x7d8a 0.98077
DCW 32610 ; 15 0x7f62 0.99518
DCW 32767 ; 16 0x7fff 0.99997
DCW 32610 ; 17 0x7f62 0.99518
DCW 32138 ; 18 0x7d8a 0.98077
DCW 31357 ; 19 0x7a7d 0.95694
DCW 30274 ; 20 0x7642 0.92389
DCW 28899 ; 21 0x70e3 0.88193
DCW 27246 ; 22 0x6a6e 0.83148
DCW 25330 ; 23 0x62f2 0.77301
DCW 23170 ; 24 0x5a82 0.70709
DCW 20788 ; 25 0x5134 0.63440
DCW 18205 ; 26 0x471d 0.55557
DCW 15447 ; 27 0x3c57 0.47141
DCW 12540 ; 28 0x30fc 0.38269
DCW 9512 ; 29 0x2528 0.29028
DCW 6393 ; 30 0x18f9 0.19510
DCW 3212 ; 31 0x0c8c 0.09802
DCW 0 ; 32 0x0000 0.00000
DCW -3212 ; 33 0xf374 -0.09802
DCW -6393 ; 34 0xe707 -0.19510
DCW -9512 ; 35 0xdad8 -0.29028
DCW -12540 ; 36 0xcf04 -0.38269
DCW -15447 ; 37 0xc3a9 -0.47141
DCW -18205 ; 38 0xb8e3 -0.55557
DCW -20788 ; 39 0xaecc -0.63440
DCW -23170 ; 40 0xa57e -0.70709
DCW -25330 ; 41 0x9d0e -0.77301
DCW -27246 ; 42 0x9592 -0.83148
DCW -28899 ; 43 0x8f1d -0.88193
DCW -30274 ; 44 0x89be -0.92389
DCW -31357 ; 45 0x8583 -0.95694
DCW -32138 ; 46 0x8276 -0.98077
DCW -32610 ; 47 0x809e -0.99518
DCW -32768 ; 48 0x8000 -1.00000
DCW -32610 ; 49 0x809e -0.99518
DCW -32138 ; 50 0x8276 -0.98077
DCW -31357 ; 51 0x8583 -0.95694
DCW -30274 ; 52 0x89be -0.92389
DCW -28899 ; 53 0x8f1d -0.88193
DCW -27246 ; 54 0x9592 -0.83148
DCW -25330 ; 55 0x9d0e -0.77301
DCW -23170 ; 56 0xa57e -0.70709
DCW -20788 ; 57 0xaecc -0.63440
DCW -18205 ; 58 0xb8e3 -0.55557
DCW -15447 ; 59 0xc3a9 -0.47141
DCW -12540 ; 60 0xcf04 -0.38269
DCW -9512 ; 61 0xdad8 -0.29028
DCW -6393 ; 62 0xe707 -0.19510
DCW -3212 ; 63 0xf374 -0.09802
END

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/**
* Bibliotheque GASSP 2013-02-15
*
* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
*
*/
// STM32F10X_CL : pour le STM32F107 "Communication Line"
// STM32F10X_MD : pour le STM32F103 "Medium Density"
//#define STM32F10X_MD // 2019 fix for Keil 5.23
#include "stm32f10x.h"
// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
void CLOCK_Configure(void);
// Timers 1, 2, 3, 4 -------------------------------------------------------
// la duree entre deux debordements successifs doit etre donnnee en periodes
// d'horloge CPU (typiquement 72 MHz)
void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
// bloque le timer
#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
// Lance timer
#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
// de valeurs acceptees pour moduler la largeur d'impulsion
vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
// Timer systeme "SysTick" -------------------------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
void Systick_Period_ff( unsigned int Periode_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
// ADC - DMA ---------------------------------------------------------------
// Analog-to-Digital Conversion, Direct Memory Access
// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la duree totale de conversion (meme unites)
u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
// choix d'un canal ADC unique
void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
// Les sources de déclenchement possibles :
#define TIM1_CC1 0
#define TIM1_CC2 1
#define TIM1_CC3 2
#define TIM2_CC2 3
#define TIM4_CC4 5
void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
// initialisation d'acquisition en mode DMA
// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
void Start_DMA1( u16 NbEchDMA );
// arret DMA
#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
// fonction d'attente (bloquante)
// la duree depend de la periode d'acquisition et du nombre d'echantillons
void Wait_On_End_Of_DMA1(void);
// GPIO --------------------------------------------------------------------
// Sens
#define INPUT 'i'
#define OUTPUT 'o'
// Techno pour pin en entrée (INPUT)
#define ANALOG 0
#define INPUT_FLOATING 1
#define INPUT_PULL_DOWN_UP 2
// Techno pour pin en sortie (OUTPUT)
#define OUTPUT_PPULL 0
#define OUTPUT_OPDRAIN 1
#define ALT_PPULL 2
#define ALT_OPDRAIN 3
// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
// Exemple :
// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
// Place le bit 8 du port B en sortie Push-pull
// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
// Spécifier le numéro de broche (0 à 15)
// exemple : Port_IO_Set(GPIOB,8);
#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)

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const int N = 64;
int dft(short* sig[N], int k);
extern short* TabSig[N];
int resultats[N];
int main(void) {
for(int i = 1; i < N; ++i){
resultats[i] = dft(TabSig, i);
}
while(1){}
}

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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
LDR R0, =SystemInit
BLX R0
;
; Enable UsageFault, MemFault and Busfault interrupts
;
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
LDR.W R0, =_SHCSR
LDR R1, [R0] ; Read CPACR
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
STR R1, [R0] ; Write back the modified value to the CPACR
DSB ; Wait for store to complete
;
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
;
_AIRCR EQU 0xE000ED0C
_AIRCR_VAL EQU 0x05FA0300
LDR.W R0, =_AIRCR
LDR.W R1, =_AIRCR_VAL
STR R1,[R0]
;
; Finaly, jump to main function (void main (void))
;
LDR R0, =__main
BX R0
ENDP
SystemInit PROC
EXPORT SystemInit [WEAK]
BX LR
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

31
README.md
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@ -2,29 +2,10 @@
Groupe: Yohan Simard, Arnaud Vergnet
# Obj 2
## Avancement
* **Objectif 1** - Terminé
* **Objectif 2** - Terminé
* **Objectif 3** - Terminé
* **Objectif 4** - Terminé
**Partie terminée**
Nous avons testé avec les exemples de signaux données dans le pdf d'explications de la librairie GFSSP72.
Tous marchaient comme attendu (0x33, 0x52, 0x3E, 0x3C, 0x31). Pour le cas limite 0x31, aucun signal n'était détecté.
## Comment tester
* Compiler le projet
* Lancer le mode Debug
* Ouvrir le logic analyser. Tout devrait être préconfiguré.
* Appuyer sur run et observer dans le logic analyser la détection des tirs et l'incrémentation des scores.
Pour changer le type de signal envoyé par GFSSP72, changer la ligne:
```c
#define TYPE_SIGNAL 0x33
```
*Si jamais le logic analyzer ou la watch window ne sont pas déjà configurés :*
Pour visualiser les valeurs du compteur de détection et du score, ouvrir le **logic analyzer** ou la **watch window** et ajouter les variables `counters` et `scores`.
* Si le **logic analyzer** est utilisé, vous pouvez appuyer sur `Run` et laisser le graphique se dérouler.
* Si vous utlisez la **watch window**, il est recommandé de mettre un point d'arrêt sur la ligne `Stop_DMA1;` de la fonction `callbackTimer`, et appuyer sur run pour lancer les détections unes à unes.
Ce dépot contient une branche pour chaque objectif (obj1, obj2, ...). Chacune de ces branches contient des dossiers ne comportant que les fichiers nécessaires au lancement des différents projets. Un readme est aussi disponible, expliquant les procédures de test.

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath></ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>1</uSim>
<uTrg>0</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>1</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
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<SetRegEntry>
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<SetRegEntry>
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</ProjectOpt>

422
challenge/Project.uvprojx Normal file
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@ -0,0 +1,422 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Simu</TargetName>
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<ToolsetName>ARM-ADS</ToolsetName>
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</Flash1>
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<Flash3>"" ()</Flash3>
<Flash4></Flash4>
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</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="Simu"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

11
projet_keil/Src/calcul_dft.s → challenge/Src/calcul_dft.s
View file

@ -13,10 +13,10 @@ dft proc
mov r4, #0 ; r4 = i
mov r5, #0 ; r5 = ik
mov r9, #0 ; r9 = resultat reel
mov r12, #0 ; r10 = resultat imaginaire
mov r9, #0 ; r9 = résultat réel
mov r12, #0 ; r10 = résultat imaginaire
deb_somme ldrh r6, [r0, r4, LSL #1] ; r6 = x[i], LSL #1 pour faire x2 car chaque valeur est sur 2 octets | format 4.12
deb_somme ldrh r6, [r0, r4, LSL #1] ; r6 = x[i], LSL #1 pour faire ×2 car chaque valeur est sur 2 octets | format 4.12
ldrsh r7, [r2, r5, LSL #1] ; r7 = cos [ik%N] | format 1.15
ldrsh r8, [r3, r5, LSL #1] ; r8 = sin [ik%N] | format 1.15
mla r9, r6, r7, r9 ; r9 += x[i] * cos[ik%n] | format 5.27
@ -24,14 +24,15 @@ deb_somme ldrh r6, [r0, r4, LSL #1] ; r6 = x[i], LSL #1 pour faire x2 car chaqu
add r5, r1 ; r5 = (i-1)k + k
and r5, #N-1 ; r5 = r5 % 64
add r4, #1 ; on incremente i
add r4, #1 ; on incrémente i
cmp r4, #N ;
bne deb_somme
; etat des registres : r0 = x, r1 = k, r9 = Re, r10 = Im, autres libres
smull r2, r0, r9, r9 ; (r2,r0) = Re(k)² | format : 10.54
smlal r2, r0, r12, r12 ; (r2,r0) = Re(k)² + Im(k)² | format : 10.54 -> r0 est en 10.22
smlal r2, r0, r12, r12 ; (r2,r0) = Re(k)² + Im(k)² | format : 10.54
pop {r4, r5, r6, r7, r8, r9}
bx lr

115
challenge/Src/gassp72.h Normal file
View file

@ -0,0 +1,115 @@
/**
* Bibliotheque GASSP 2013-02-15
*
* GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz
*
*/
// STM32F10X_CL : pour le STM32F107 "Communication Line"
// STM32F10X_MD : pour le STM32F103 "Medium Density"
//#define STM32F10X_MD // 2019 fix for Keil 5.23
#include "stm32f10x.h"
// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------
void CLOCK_Configure(void);
// Timers 1, 2, 3, 4 -------------------------------------------------------
// la duree entre deux debordements successifs doit etre donnnee en periodes
// d'horloge CPU (typiquement 72 MHz)
void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) );
// bloque le timer
#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0)
// Lance timer
#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0)
// PWM (basee sur un des Timers 1, 2, 3, 4 ---------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la pleine echelle ou resolution, c'est a dire la plage
// de valeurs acceptees pour moduler la largeur d'impulsion
vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks );
// Timer systeme "SysTick" -------------------------------------------------
// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
void Systick_Period_ff( unsigned int Periode_ticks );
// activation d'une fonction de traitement de l'interruption timer (callback)
void Systick_Prio_IT( char Prio, void (*Systick_function)(void) );
#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0)
#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0))
#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1)
#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1))
// ADC - DMA ---------------------------------------------------------------
// Analog-to-Digital Conversion, Direct Memory Access
// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz)
// la fonction rend la duree totale de conversion (meme unites)
u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks );
// choix d'un canal ADC unique
void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC );
// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU
// Les sources de déclenchement possibles :
#define TIM1_CC1 0
#define TIM1_CC2 1
#define TIM1_CC3 2
#define TIM2_CC2 3
#define TIM4_CC4 5
void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks );
// initialisation d'acquisition en mode DMA
// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande
void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA );
// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes
// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1
void Start_DMA1( u16 NbEchDMA );
// arret DMA
#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1;
// fonction d'attente (bloquante)
// la duree depend de la periode d'acquisition et du nombre d'echantillons
void Wait_On_End_Of_DMA1(void);
// GPIO --------------------------------------------------------------------
// Sens
#define INPUT 'i'
#define OUTPUT 'o'
// Techno pour pin en entrée (INPUT)
#define ANALOG 0
#define INPUT_FLOATING 1
#define INPUT_PULL_DOWN_UP 2
// Techno pour pin en sortie (OUTPUT)
#define OUTPUT_PPULL 0
#define OUTPUT_OPDRAIN 1
#define ALT_PPULL 2
#define ALT_OPDRAIN 3
// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....)
// Exemple :
// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL);
// Place le bit 8 du port B en sortie Push-pull
// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée)
char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno);
// Spécifier le numéro de broche (0 à 15)
// exemple : Port_IO_Set(GPIOB,8);
#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<<Broche)
#define GPIO_Clear(GPIO,Broche) GPIO->BRR=(0x01<<Broche)

BIN
challenge/Src/gassp72.lib Normal file
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Binary file not shown.

11
challenge/Src/principal.c Normal file
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@ -0,0 +1,11 @@
const int N = 64;
int dft(short* sig[N], int k);
extern short* TabSig[N];
int resultats[N];
int main(void) {
for(int i = 1; i < N; ++i){
resultats[i] = dft(TabSig, i);
}
while(1){}
}

335
challenge/Src/startup-rvds.s Normal file
View file

@ -0,0 +1,335 @@
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
LDR R0, =SystemInit
BLX R0
;
; Enable UsageFault, MemFault and Busfault interrupts
;
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
LDR.W R0, =_SHCSR
LDR R1, [R0] ; Read CPACR
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
STR R1, [R0] ; Write back the modified value to the CPACR
DSB ; Wait for store to complete
;
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
;
_AIRCR EQU 0xE000ED0C
_AIRCR_VAL EQU 0x05FA0300
LDR.W R0, =_AIRCR
LDR.W R1, =_AIRCR_VAL
STR R1,[R0]
;
; Finaly, jump to main function (void main (void))
;
LDR R0, =__main
BX R0
ENDP
SystemInit PROC
EXPORT SystemInit [WEAK]
BX LR
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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projet_keil/Src/gfssp72.lib
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84
projet_keil/Src/principal.c
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@ -1,84 +0,0 @@
#include "gassp72.h"
#include "stdlib.h"
#define NB_JOUEURS 6
#define TYPE_SIGNAL 0x33
const int SYSTICK_PER = 5*72000;
const int N = 64;
const int M2TIR = 985661;
// Fe = 320 kHz donc pasFreq = 5 kHz
// F1 = 85 kHz -> k = 17
// F2 = 90 kHz -> k = 18
// F3 = 95 kHz -> k = 19
// F4 = 100 kHz -> k = 20
// F5 = 115 kHz -> k = 23
// F6 = 120 kHz -> k = 24
const int kFreq[NB_JOUEURS] = {17, 18, 19, 20, 23, 24};
int dft(unsigned short *sig, int k);
unsigned short *bufferDMA;
int counters[NB_JOUEURS];
int debug_result[NB_JOUEURS];
int scores[NB_JOUEURS];
int time = 0;
void callbackTimer(void) {
// Démarrage DMA pour 64 points
Start_DMA1(64);
Wait_On_End_Of_DMA1();
Stop_DMA1;
for (int i = 0; i < NB_JOUEURS; ++i) {
int k = kFreq[i];
debug_result[i] = dft(bufferDMA, k);
if (debug_result[i] > M2TIR) {
++counters[i];
if (counters[i] == 3) {
++scores[i];
}
} else {
counters[i] = 0;
}
}
time += 5;
}
int main(void) {
bufferDMA = malloc(N * sizeof(short));
for (int i = 0; i < NB_JOUEURS; ++i) {
counters[i] = 0;
scores[i] = 0;
}
// activation de la PLL qui multiplie la fréquence du quartz par 9
CLOCK_Configure();
// PA2 (ADC voie 2) = entrée analog
GPIO_Configure(GPIOA, 2, INPUT, ANALOG);
// PB1 = sortie pour profilage à l'oscillo
GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL);
// PB14 = sortie pour LED
GPIO_Configure(GPIOB, 14, OUTPUT, OUTPUT_PPULL);
// activation ADC, sampling time 1us
Init_TimingADC_ActiveADC_ff( ADC1, TYPE_SIGNAL );
Single_Channel_ADC( ADC1, 2 );
// Déclenchement ADC par timer2, periode (72MHz/320kHz)ticks
Init_Conversion_On_Trig_Timer_ff( ADC1, TIM2_CC2, 225 );
// Config DMA pour utilisation du buffer dma_buf (a créér)
Init_ADC1_DMA1( 0, bufferDMA );
// Config Timer, période exprimée en périodes horloge CPU (72 MHz)
Systick_Period_ff( SYSTICK_PER );
// enregistrement de la fonction de traitement de l'interruption timer
// ici le 3 est la priorité, sys_callback est l'adresse de cette fonction, a créér en C
Systick_Prio_IT( 3, callbackTimer );
SysTick_On;
SysTick_Enable_IT;
while(1){}
}