diff --git a/.gitignore b/.gitignore index d6193c2..4f3695d 100644 --- a/.gitignore +++ b/.gitignore @@ -17,4 +17,9 @@ /challenge/* !/challenge/Src/ !/challenge/Project.uvoptx -!/challenge/Project.uvprojx \ No newline at end of file +!/challenge/Project.uvprojx +!/3/ +/3/* +!/3/Src/ +!/3/Project.uvoptx +!/3/Project.uvprojx \ No newline at end of file diff --git a/3/Project.uvoptx b/3/Project.uvoptx new file mode 100644 index 0000000..8069531 --- /dev/null +++ b/3/Project.uvoptx @@ -0,0 +1,350 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Simu + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 1 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 5 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + DLGDARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=1318,341,1876,866,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0) + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + -T0 + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)) + + + 0 + ST-LINKIII-KEIL_SWO + -U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM) + + + + + 0 + 0 + 31 + 1 +
134221080
+ 0 + 0 + 0 + 0 + 0 + 1 + .\Src\principal.c + + \\CHTI\Src/principal.c\31 + + + 1 + 0 + 0 + 0 +
134218136
+ 0 + 0 + 0 + 0 + 0 + 1 + + + 0x08000198 + + + + + 0 + 1 + debug_result,0x0A + + + 1 + 1 + time,0x0A + + + 2 + 1 + counters + + + + + 1 + 0 + 0x08000210 + 0 + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + 0 + ((portb & 0x00000002) >> 1 & 0x2) >> 1 + FF000000000000000000000000000000E0FFEF400100000000000000000000000000000028706F7274622026203078303030303030303229203E3E2031000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F0700000000000000000000000000000000000000401E0008 + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Sources + 1 + 0 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + .\Src\startup-rvds.s + startup-rvds.s + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\Src\principal.c + principal.c + 0 + 0 + + + 1 + 3 + 2 + 0 + 0 + 0 + .\Src\calcul_dft.s + calcul_dft.s + 0 + 0 + + + 1 + 4 + 5 + 0 + 0 + 0 + .\Src\gassp72.h + gassp72.h + 0 + 0 + + + 1 + 5 + 4 + 0 + 0 + 0 + .\Src\gfssp72.lib + gfssp72.lib + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/3/Project.uvprojx b/3/Project.uvprojx new file mode 100644 index 0000000..39f6032 --- /dev/null +++ b/3/Project.uvprojx @@ -0,0 +1,432 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + Simu + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F103RB + STMicroelectronics + Keil.STM32F1xx_DFP.2.3.0 + http://www.keil.com/pack/ + IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3") + + + + + + + + + + + + + + + $$Device:STM32F103RB$SVD\STM32F103xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Obj\ + CHTI + 1 + 0 + 1 + 1 + 1 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP + DARMSTM.DLL + -pSTM32F103RB + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x5000 + + + 1 + 0x8000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x5000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + --C99 + STM32F103xB,USE_FULL_LL_DRIVER + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Sources + + + startup-rvds.s + 2 + .\Src\startup-rvds.s + + + principal.c + 1 + .\Src\principal.c + + + calcul_dft.s + 2 + .\Src\calcul_dft.s + + + gassp72.h + 5 + .\Src\gassp72.h + + + gfssp72.lib + 4 + .\Src\gfssp72.lib + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/3/Src/calcul_dft.s b/3/Src/calcul_dft.s new file mode 100644 index 0000000..e18781d --- /dev/null +++ b/3/Src/calcul_dft.s @@ -0,0 +1,268 @@ + thumb + AREA moncode, code, readonly + export dft +N equ 64 + + ; vitesse initiale : 1726 + ; vitesse actuelle : 1119 +dft proc + ; r0 = x (signal), r1 = k + push {r4, r5, r6, r7, r8, r9} + ldr r2, =TabCos + ldr r3, =TabSin + + mov r4, #0 ; r4 = i + mov r5, #0 ; r5 = ik + mov r9, #0 ; r9 = resultat reel + mov r12, #0 ; r10 = resultat imaginaire + +deb_somme ldrh r6, [r0, r4, LSL #1] ; r6 = x[i], LSL #1 pour faire x2 car chaque valeur est sur 2 octets | format 16.0 + ldrsh r7, [r2, r5, LSL #1] ; r7 = cos [ik%N] | format 1.15 + ldrsh r8, [r3, r5, LSL #1] ; r8 = sin [ik%N] | format 1.15 + mla r9, r6, r7, r9 ; r9 += x[i] * cos[ik%n] | format 17.15 + mla r12, r6, r8, r12 ; r10 += x[i] * sin[ik%n] | format 17.15 + + add r5, r1 ; r5 = (i-1)k + k + and r5, #N-1 ; r5 = r5 % 64 + add r4, #1 ; on incremente i + cmp r4, #N ; + bne deb_somme + + ; etat des registres : r0 = x, r1 = k, r9 = Re, r10 = Im, autres libres + + smull r2, r0, r9, r9 ; (r2,r0) = Re(k)² | format : 34.30 + smlal r2, r0, r12, r12 ; (r2,r0) = Re(k)² + Im(k)² | format : 34.30 + + pop {r4, r5, r6, r7, r8, r9} + bx lr + endp + + + AREA Signal, DATA, READONLY + export TabSig + +; Fnor1 = 23.000 +; Ph1 = -26.565 +; A1 = 62.000 env. 50mV/3300mV +; Fnor2 = 24.000 +; Ph2 = -116.565 +; A2 = 1024.000 + +; valeurs attendues pour k = 23 : +; Re 0x0378FDBD +; Im 0x01BAD0C5 env 0.5 * Re, car tan(26.565) ~= 0.5 +; M2 0x000F0D16 986390 +; +; valeurs attendues pour k = 24 : +; Re 0xE36136DD env -0.447 * 2^30 +; Im 0x393E61CA env -2 * Re, car tan(116.565) ~= 2.0 +; M2 0x0FFFF53C env 2^28 +; +; pour les autres valeurs de k sauf les alias de 23 et 24 : +; M2 < 0x0000000F + + +TabSig + DCW 1646 ; 0 0x066e 0.40186 + DCW 3006 ; 1 0x0bbe 0.73389 + DCW 1094 ; 2 0x0446 0.26709 + DCW 2434 ; 3 0x0982 0.59424 + DCW 2465 ; 4 0x09a1 0.60181 + DCW 1066 ; 5 0x042a 0.26025 + DCW 3018 ; 6 0x0bca 0.73682 + DCW 1666 ; 7 0x0682 0.40674 + DCW 1610 ; 8 0x064a 0.39307 + DCW 3052 ; 9 0x0bec 0.74512 + DCW 1071 ; 10 0x042f 0.26147 + DCW 2417 ; 11 0x0971 0.59009 + DCW 2510 ; 12 0x09ce 0.61279 + DCW 1026 ; 13 0x0402 0.25049 + DCW 3024 ; 14 0x0bd0 0.73828 + DCW 1699 ; 15 0x06a3 0.41479 + DCW 1562 ; 16 0x061a 0.38135 + DCW 3080 ; 17 0x0c08 0.75195 + DCW 1083 ; 18 0x043b 0.26440 + DCW 2374 ; 19 0x0946 0.57959 + DCW 2553 ; 20 0x09f9 0.62329 + DCW 1015 ; 21 0x03f7 0.24780 + DCW 2995 ; 22 0x0bb3 0.73120 + DCW 1746 ; 23 0x06d2 0.42627 + DCW 1531 ; 24 0x05fb 0.37378 + DCW 3072 ; 25 0x0c00 0.75000 + DCW 1124 ; 26 0x0464 0.27441 + DCW 2329 ; 27 0x0919 0.56860 + DCW 2568 ; 28 0x0a08 0.62695 + DCW 1041 ; 29 0x0411 0.25415 + DCW 2948 ; 30 0x0b84 0.71973 + DCW 1781 ; 31 0x06f5 0.43481 + DCW 1535 ; 32 0x05ff 0.37476 + DCW 3033 ; 33 0x0bd9 0.74048 + DCW 1170 ; 34 0x0492 0.28564 + DCW 2310 ; 35 0x0906 0.56396 + DCW 2547 ; 36 0x09f3 0.62183 + DCW 1087 ; 37 0x043f 0.26538 + DCW 2910 ; 38 0x0b5e 0.71045 + DCW 1782 ; 39 0x06f6 0.43506 + DCW 1570 ; 40 0x0622 0.38330 + DCW 2986 ; 41 0x0baa 0.72900 + DCW 1194 ; 42 0x04aa 0.29150 + DCW 2327 ; 43 0x0917 0.56812 + DCW 2502 ; 44 0x09c6 0.61084 + DCW 1127 ; 45 0x0467 0.27515 + DCW 2904 ; 46 0x0b58 0.70898 + DCW 1749 ; 47 0x06d5 0.42700 + DCW 1618 ; 48 0x0652 0.39502 + DCW 2959 ; 49 0x0b8f 0.72241 + DCW 1181 ; 50 0x049d 0.28833 + DCW 2370 ; 51 0x0942 0.57861 + DCW 2459 ; 52 0x099b 0.60034 + DCW 1138 ; 53 0x0472 0.27783 + DCW 2933 ; 54 0x0b75 0.71606 + DCW 1702 ; 55 0x06a6 0.41553 + DCW 1649 ; 56 0x0671 0.40259 + DCW 2967 ; 57 0x0b97 0.72437 + DCW 1140 ; 58 0x0474 0.27832 + DCW 2414 ; 59 0x096e 0.58936 + DCW 2444 ; 60 0x098c 0.59668 + DCW 1112 ; 61 0x0458 0.27148 + DCW 2980 ; 62 0x0ba4 0.72754 + DCW 1668 ; 63 0x0684 0.40723 + + + + AREA Trigo, DATA, READONLY + export TabSin + export TabCos + +TabCos + DCW 32767 ; 0 0x7fff 0.99997 + DCW 32610 ; 1 0x7f62 0.99518 + DCW 32138 ; 2 0x7d8a 0.98077 + DCW 31357 ; 3 0x7a7d 0.95694 + DCW 30274 ; 4 0x7642 0.92389 + DCW 28899 ; 5 0x70e3 0.88193 + DCW 27246 ; 6 0x6a6e 0.83148 + DCW 25330 ; 7 0x62f2 0.77301 + DCW 23170 ; 8 0x5a82 0.70709 + DCW 20788 ; 9 0x5134 0.63440 + DCW 18205 ; 10 0x471d 0.55557 + DCW 15447 ; 11 0x3c57 0.47141 + DCW 12540 ; 12 0x30fc 0.38269 + DCW 9512 ; 13 0x2528 0.29028 + DCW 6393 ; 14 0x18f9 0.19510 + DCW 3212 ; 15 0x0c8c 0.09802 + DCW 0 ; 16 0x0000 0.00000 + DCW -3212 ; 17 0xf374 -0.09802 + DCW -6393 ; 18 0xe707 -0.19510 + DCW -9512 ; 19 0xdad8 -0.29028 + DCW -12540 ; 20 0xcf04 -0.38269 + DCW -15447 ; 21 0xc3a9 -0.47141 + DCW -18205 ; 22 0xb8e3 -0.55557 + DCW -20788 ; 23 0xaecc -0.63440 + DCW -23170 ; 24 0xa57e -0.70709 + DCW -25330 ; 25 0x9d0e -0.77301 + DCW -27246 ; 26 0x9592 -0.83148 + DCW -28899 ; 27 0x8f1d -0.88193 + DCW -30274 ; 28 0x89be -0.92389 + DCW -31357 ; 29 0x8583 -0.95694 + DCW -32138 ; 30 0x8276 -0.98077 + DCW -32610 ; 31 0x809e -0.99518 + DCW -32768 ; 32 0x8000 -1.00000 + DCW -32610 ; 33 0x809e -0.99518 + DCW -32138 ; 34 0x8276 -0.98077 + DCW -31357 ; 35 0x8583 -0.95694 + DCW -30274 ; 36 0x89be -0.92389 + DCW -28899 ; 37 0x8f1d -0.88193 + DCW -27246 ; 38 0x9592 -0.83148 + DCW -25330 ; 39 0x9d0e -0.77301 + DCW -23170 ; 40 0xa57e -0.70709 + DCW -20788 ; 41 0xaecc -0.63440 + DCW -18205 ; 42 0xb8e3 -0.55557 + DCW -15447 ; 43 0xc3a9 -0.47141 + DCW -12540 ; 44 0xcf04 -0.38269 + DCW -9512 ; 45 0xdad8 -0.29028 + DCW -6393 ; 46 0xe707 -0.19510 + DCW -3212 ; 47 0xf374 -0.09802 + DCW 0 ; 48 0x0000 0.00000 + DCW 3212 ; 49 0x0c8c 0.09802 + DCW 6393 ; 50 0x18f9 0.19510 + DCW 9512 ; 51 0x2528 0.29028 + DCW 12540 ; 52 0x30fc 0.38269 + DCW 15447 ; 53 0x3c57 0.47141 + DCW 18205 ; 54 0x471d 0.55557 + DCW 20788 ; 55 0x5134 0.63440 + DCW 23170 ; 56 0x5a82 0.70709 + DCW 25330 ; 57 0x62f2 0.77301 + DCW 27246 ; 58 0x6a6e 0.83148 + DCW 28899 ; 59 0x70e3 0.88193 + DCW 30274 ; 60 0x7642 0.92389 + DCW 31357 ; 61 0x7a7d 0.95694 + DCW 32138 ; 62 0x7d8a 0.98077 + DCW 32610 ; 63 0x7f62 0.99518 +TabSin + DCW 0 ; 0 0x0000 0.00000 + DCW 3212 ; 1 0x0c8c 0.09802 + DCW 6393 ; 2 0x18f9 0.19510 + DCW 9512 ; 3 0x2528 0.29028 + DCW 12540 ; 4 0x30fc 0.38269 + DCW 15447 ; 5 0x3c57 0.47141 + DCW 18205 ; 6 0x471d 0.55557 + DCW 20788 ; 7 0x5134 0.63440 + DCW 23170 ; 8 0x5a82 0.70709 + DCW 25330 ; 9 0x62f2 0.77301 + DCW 27246 ; 10 0x6a6e 0.83148 + DCW 28899 ; 11 0x70e3 0.88193 + DCW 30274 ; 12 0x7642 0.92389 + DCW 31357 ; 13 0x7a7d 0.95694 + DCW 32138 ; 14 0x7d8a 0.98077 + DCW 32610 ; 15 0x7f62 0.99518 + DCW 32767 ; 16 0x7fff 0.99997 + DCW 32610 ; 17 0x7f62 0.99518 + DCW 32138 ; 18 0x7d8a 0.98077 + DCW 31357 ; 19 0x7a7d 0.95694 + DCW 30274 ; 20 0x7642 0.92389 + DCW 28899 ; 21 0x70e3 0.88193 + DCW 27246 ; 22 0x6a6e 0.83148 + DCW 25330 ; 23 0x62f2 0.77301 + DCW 23170 ; 24 0x5a82 0.70709 + DCW 20788 ; 25 0x5134 0.63440 + DCW 18205 ; 26 0x471d 0.55557 + DCW 15447 ; 27 0x3c57 0.47141 + DCW 12540 ; 28 0x30fc 0.38269 + DCW 9512 ; 29 0x2528 0.29028 + DCW 6393 ; 30 0x18f9 0.19510 + DCW 3212 ; 31 0x0c8c 0.09802 + DCW 0 ; 32 0x0000 0.00000 + DCW -3212 ; 33 0xf374 -0.09802 + DCW -6393 ; 34 0xe707 -0.19510 + DCW -9512 ; 35 0xdad8 -0.29028 + DCW -12540 ; 36 0xcf04 -0.38269 + DCW -15447 ; 37 0xc3a9 -0.47141 + DCW -18205 ; 38 0xb8e3 -0.55557 + DCW -20788 ; 39 0xaecc -0.63440 + DCW -23170 ; 40 0xa57e -0.70709 + DCW -25330 ; 41 0x9d0e -0.77301 + DCW -27246 ; 42 0x9592 -0.83148 + DCW -28899 ; 43 0x8f1d -0.88193 + DCW -30274 ; 44 0x89be -0.92389 + DCW -31357 ; 45 0x8583 -0.95694 + DCW -32138 ; 46 0x8276 -0.98077 + DCW -32610 ; 47 0x809e -0.99518 + DCW -32768 ; 48 0x8000 -1.00000 + DCW -32610 ; 49 0x809e -0.99518 + DCW -32138 ; 50 0x8276 -0.98077 + DCW -31357 ; 51 0x8583 -0.95694 + DCW -30274 ; 52 0x89be -0.92389 + DCW -28899 ; 53 0x8f1d -0.88193 + DCW -27246 ; 54 0x9592 -0.83148 + DCW -25330 ; 55 0x9d0e -0.77301 + DCW -23170 ; 56 0xa57e -0.70709 + DCW -20788 ; 57 0xaecc -0.63440 + DCW -18205 ; 58 0xb8e3 -0.55557 + DCW -15447 ; 59 0xc3a9 -0.47141 + DCW -12540 ; 60 0xcf04 -0.38269 + DCW -9512 ; 61 0xdad8 -0.29028 + DCW -6393 ; 62 0xe707 -0.19510 + DCW -3212 ; 63 0xf374 -0.09802 + + END \ No newline at end of file diff --git a/3/Src/gassp72.h b/3/Src/gassp72.h new file mode 100644 index 0000000..6cfaee4 --- /dev/null +++ b/3/Src/gassp72.h @@ -0,0 +1,115 @@ +/** + * Bibliotheque GASSP 2013-02-15 + * + * GPIO - ADC - Sequenceur - System Timer - PWM - 72 MHz + * + */ + +// STM32F10X_CL : pour le STM32F107 "Communication Line" +// STM32F10X_MD : pour le STM32F103 "Medium Density" + +//#define STM32F10X_MD // 2019 fix for Keil 5.23 + +#include "stm32f10x.h" + +// horloge systeme (config statique a 72 MHz pour le STM32F103) ------------ +void CLOCK_Configure(void); + +// Timers 1, 2, 3, 4 ------------------------------------------------------- +// la duree entre deux debordements successifs doit etre donnnee en periodes +// d'horloge CPU (typiquement 72 MHz) +void Timer_1234_Init_ff( TIM_TypeDef *Timer, u32 Duree_ticks ); + +// activation d'une fonction de traitement de l'interruption timer (callback) +void Active_IT_Debordement_Timer( TIM_TypeDef *Timer, char Prio, void (*IT_function)(void) ); + +// bloque le timer +#define Bloque_Timer(Timer) Timer->CR1=(Timer->CR1)&~(1<<0) + +// Lance timer +#define Run_Timer(Timer) Timer->CR1=(Timer->CR1)|(1<<0) + +// PWM (basee sur un des Timers 1, 2, 3, 4 --------------------------------- +// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz) +// la fonction rend la pleine echelle ou resolution, c'est a dire la plage +// de valeurs acceptees pour moduler la largeur d'impulsion +vu16 PWM_Init_ff( TIM_TypeDef *Timer, char Voie, u32 Periode_ticks ); + +// Timer systeme "SysTick" ------------------------------------------------- + +// la periode doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz) +void Systick_Period_ff( unsigned int Periode_ticks ); + +// activation d'une fonction de traitement de l'interruption timer (callback) +void Systick_Prio_IT( char Prio, void (*Systick_function)(void) ); + +#define SysTick_On ((SysTick->CTRL)=(SysTick->CTRL)|1<<0) +#define SysTick_Off ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<0)) +#define SysTick_Enable_IT ((SysTick->CTRL)=(SysTick->CTRL)|1<<1) +#define SysTick_Disable_IT ((SysTick->CTRL)=(SysTick->CTRL)& ~(1<<1)) + +// ADC - DMA --------------------------------------------------------------- +// Analog-to-Digital Conversion, Direct Memory Access + +// la duree d'echantillonnage doit etre donnee en periodes d'horloge CPU (typiquement 72 MHz) +// la fonction rend la duree totale de conversion (meme unites) +u32 Init_TimingADC_ActiveADC_ff( ADC_TypeDef * ADC, u32 Duree_Ech_ticks ); + +// choix d'un canal ADC unique +void Single_Channel_ADC( ADC_TypeDef * ADC, char Voie_ADC ); + +// la periode de repetition des acquisitions doit etre donnee en periodes d'horloge CPU +// Les sources de déclenchement possibles : +#define TIM1_CC1 0 +#define TIM1_CC2 1 +#define TIM1_CC3 2 +#define TIM2_CC2 3 +#define TIM4_CC4 5 +void Init_Conversion_On_Trig_Timer_ff( ADC_TypeDef * ADC, char Source, u32 Periode_ticks ); + +// initialisation d'acquisition en mode DMA +// Ptr_Table_DMA doit pointer sur un espace memoire suffisant pour le nombre d'ech. demande +void Init_ADC1_DMA1( char Circ, vu16 *Ptr_Table_DMA ); + + +// Lance une DMA sur le nombre de points spécifie. Les resultats seront stockes +// dans la zone de RAM écrite est indiquée lors de l'appel de la fonction Init_ADC1_DMA1 +void Start_DMA1( u16 NbEchDMA ); + +// arret DMA +#define Stop_DMA1 DMA1_Channel1->CCR =(DMA1_Channel1->CCR) &~0x1; + +// fonction d'attente (bloquante) +// la duree depend de la periode d'acquisition et du nombre d'echantillons +void Wait_On_End_Of_DMA1(void); + + +// GPIO -------------------------------------------------------------------- + +// Sens +#define INPUT 'i' +#define OUTPUT 'o' + +// Techno pour pin en entrée (INPUT) +#define ANALOG 0 +#define INPUT_FLOATING 1 +#define INPUT_PULL_DOWN_UP 2 + +// Techno pour pin en sortie (OUTPUT) +#define OUTPUT_PPULL 0 +#define OUTPUT_OPDRAIN 1 +#define ALT_PPULL 2 +#define ALT_OPDRAIN 3 + +// La fonction initialise n'importe quelle broche de port (entrée, sortie, techno....) +// Exemple : +// Port_IO_Init(GPIOB, 8, OUTPUT, OUTPUT_PPULL); +// Place le bit 8 du port B en sortie Push-pull +// Renvoie 0 si tout est OK, et 1 s'il y a un problème (plage d'entrée non respectée) +char GPIO_Configure(GPIO_TypeDef * Port, int Broche, int Sens, int Techno); + +// Spécifier le numéro de broche (0 à 15) +// exemple : Port_IO_Set(GPIOB,8); +#define GPIO_Set(GPIO,Broche) GPIO->BSRR=(0x01<BRR=(0x01< k = 17 +// F2 = 90 kHz -> k = 18 +// F3 = 95 kHz -> k = 19 +// F4 = 100 kHz -> k = 20 +// F5 = 115 kHz -> k = 23 +// F6 = 120 kHz -> k = 24 +const int kFreq[6] = {17, 18, 19, 20, 23, 24}; + +int dft(unsigned short *sig, int k); + +unsigned short *bufferDMA; +int counters[6]; +int debug_result[6]; +const int M2TIR = 10000; + +int time = 0; + + +void callbackTimer(void) { + // Démarrage DMA pour 64 points + Start_DMA1(64); + Wait_On_End_Of_DMA1(); + Stop_DMA1; + for (int i = 0; i < 6; ++i) { + int k = kFreq[i]; + debug_result[i] = dft(bufferDMA, k); + if (debug_result[i] > M2TIR) { + ++counters[i]; + } else { + counters[i] = 0; + } + } + time += 5; +} + + +int main(void) { + bufferDMA = malloc(N * sizeof(short)); + + // activation de la PLL qui multiplie la fréquence du quartz par 9 + CLOCK_Configure(); + // PA2 (ADC voie 2) = entrée analog + GPIO_Configure(GPIOA, 2, INPUT, ANALOG); + // PB1 = sortie pour profilage à l'oscillo + GPIO_Configure(GPIOB, 1, OUTPUT, OUTPUT_PPULL); + // PB14 = sortie pour LED + GPIO_Configure(GPIOB, 14, OUTPUT, OUTPUT_PPULL); + + // activation ADC, sampling time 1us + Init_TimingADC_ActiveADC_ff( ADC1, 72 ); + Single_Channel_ADC( ADC1, 2 ); + // Déclenchement ADC par timer2, periode (72MHz/320kHz)ticks + Init_Conversion_On_Trig_Timer_ff( ADC1, TIM2_CC2, 225 ); + // Config DMA pour utilisation du buffer dma_buf (a créér) + Init_ADC1_DMA1( 0, bufferDMA ); + + // Config Timer, période exprimée en périodes horloge CPU (72 MHz) + Systick_Period_ff( SYSTICK_PER ); + // enregistrement de la fonction de traitement de l'interruption timer + // ici le 3 est la priorité, sys_callback est l'adresse de cette fonction, a créér en C + Systick_Prio_IT( 3, callbackTimer ); + SysTick_On; + SysTick_Enable_IT; + + while(1){} +} diff --git a/3/Src/startup-rvds.s b/3/Src/startup-rvds.s new file mode 100644 index 0000000..a7b631a --- /dev/null +++ b/3/Src/startup-rvds.s @@ -0,0 +1,335 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f10x_md.s +;* Author : MCD Application Team +;* Version : V3.5.0 +;* Date : 11-March-2011 +;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM +;* toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Configure the clock system +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD TAMPER_IRQHandler ; Tamper + DCD RTC_IRQHandler ; RTC + DCD FLASH_IRQHandler ; Flash + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line 0 + DCD EXTI1_IRQHandler ; EXTI Line 1 + DCD EXTI2_IRQHandler ; EXTI Line 2 + DCD EXTI3_IRQHandler ; EXTI Line 3 + DCD EXTI4_IRQHandler ; EXTI Line 4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1_2 + DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX + DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 + DCD TIM1_BRK_IRQHandler ; TIM1 Break + DCD TIM1_UP_IRQHandler ; TIM1 Update + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 + DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line + DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + +; +; Enable UsageFault, MemFault and Busfault interrupts +; +_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24 + LDR.W R0, =_SHCSR + LDR R1, [R0] ; Read CPACR + ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts + STR R1, [R0] ; Write back the modified value to the CPACR + DSB ; Wait for store to complete + +; +; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority) +; +_AIRCR EQU 0xE000ED0C +_AIRCR_VAL EQU 0x05FA0300 + LDR.W R0, =_AIRCR + LDR.W R1, =_AIRCR_VAL + STR R1,[R0] + +; +; Finaly, jump to main function (void main (void)) +; + LDR R0, =__main + BX R0 + ENDP + +SystemInit PROC + EXPORT SystemInit [WEAK] + BX LR + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] + EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT USBWakeUp_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +USB_HP_CAN1_TX_IRQHandler +USB_LP_CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTCAlarm_IRQHandler +USBWakeUp_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/challenge/Project.uvoptx b/challenge/Project.uvoptx index 3b9b422..c0a671b 100644 --- a/challenge/Project.uvoptx +++ b/challenge/Project.uvoptx @@ -157,9 +157,9 @@ 0 0 - 10 + 22 1 -
134218152
+
134221118
0 0 0 @@ -168,69 +168,26 @@ 1 .\Src\principal.c - \\CHTI\Src/principal.c\10 - - - 1 - 0 - 7 - 1 -
134218128
- 0 - 0 - 0 - 0 - 0 - 1 - .\Src\principal.c - - \\CHTI\Src/principal.c\7 - - - 2 - 0 - 52 - 1 -
134218270
- 0 - 0 - 0 - 0 - 0 - 1 - .\Src\calcul_dft.s - - \\CHTI\Src/calcul_dft.s\52 - - - 3 - 0 - 10 - 1 -
134218164
- 0 - 0 - 0 - 0 - 0 - 1 - .\Src\calcul_dft.s - - \\CHTI\Src/calcul_dft.s\10 + \\CHTI\Src/principal.c\22 0 1 - resultats + bufferDMA + + + 1 + 1 + debug_result 1 0 - 0x0801FF95 + 0x20000110 0 @@ -315,7 +272,7 @@ 1 2 1 - 1 + 0 0 0 .\Src\principal.c