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Version du moniteur proche de la version finale, petits bugs corrigés dans le testeur du superviseur

Sébastien DI MERCURIO 5 years ago
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480
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482
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484
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485
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486
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487
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488
-    </entry>
489
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490
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491
-    </entry>
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-    <entry file="file://$PROJECT_DIR$/img_aruco/aruco_10.jpg">
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-      <provider selected="true" editor-type-id="images" />
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-    </entry>
495
-    <entry file="file://$PROJECT_DIR$/img_aruco/aruco_11.jpg">
496
-      <provider selected="true" editor-type-id="images" />
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-    </entry>
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512
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incubateur/Aruco_opencv_python/__pycache__/calibrate.cpython-35.pyc View File


+ 0
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incubateur/Aruco_opencv_python/aruco_create.py View File

@@ -1,15 +0,0 @@
1
-import cv2 as cv
2
-import cv2.aruco as aruco
3
-
4
-'''
5
-    drawMarker(...)
6
-        drawMarker(dictionary, id, sidePixels[, img[, borderBits]]) -> img
7
-'''
8
-
9
-aruco_dict = aruco.Dictionary_get(aruco.DICT_4X4_50) # Un aruco est composé d'une bande noire et d'un code en blanc et noir
10
-                                                     #4x4 indique la partie ou sera généré le code (blanc et noir donc).
11
-print(aruco_dict)
12
-
13
-for aruco_id in range(1,12):
14
-    img = aruco.drawMarker(aruco_dict, aruco_id, 200)
15
-    cv.imwrite("./img_aruco/aruco_"+str(aruco_id)+".jpg", img)

+ 0
- 34
incubateur/Aruco_opencv_python/aruco_detection.py View File

@@ -1,34 +0,0 @@
1
-import cv2 as cv
2
-import cv2.aruco as aruco
3
-from calibrate import calculareCameraCalibration
4
-
5
-cap = cv.VideoCapture(0)
6
-ret, mtx, dist, rvecs, tvecs = calculareCameraCalibration()
7
-parameters = aruco.DetectorParameters_create()
8
-aruco_dict = aruco.Dictionary_get(aruco.DICT_4X4_50)
9
-drawAxis = True
10
-
11
-while (True):
12
-
13
-    ret, frame = cap.read()
14
-    gray = cv.cvtColor(frame, cv.COLOR_BGR2GRAY)
15
-
16
-    corners, ids, rejectedImgPoints = aruco.detectMarkers(gray, aruco_dict, parameters=parameters)
17
-
18
-    frame = aruco.drawDetectedMarkers(frame, corners, ids)
19
-    rvecs, tvecs, _ = aruco.estimatePoseSingleMarkers(corners, 0.05, mtx, dist)
20
-    if ids is not None:
21
-        for idx, marker in enumerate(ids):
22
-            print(corners[idx][0]) #Affiche les coordonée tout les coins Top Left
23
-            try:
24
-                if drawAxis is True:
25
-                    aruco.drawAxis(frame, mtx,dist,rvecs[idx], tvecs[idx], 0.1)
26
-            except:
27
-                print(" Erreur calcul des axes")
28
-
29
-    cv.imshow('frame', frame)
30
-    if cv.waitKey(1) & 0xFF == ord('q'):
31
-        break
32
-
33
-cap.release()
34
-cv.destroyAllWindows()

+ 0
- 35
incubateur/Aruco_opencv_python/calibrate.py View File

@@ -1,35 +0,0 @@
1
-import numpy as np
2
-import cv2
3
-import glob
4
-
5
-
6
-def calculareCameraCalibration():
7
-    # termination criteria
8
-    criteria = (cv2.TERM_CRITERIA_EPS + cv2.TERM_CRITERIA_MAX_ITER, 23, 0.001)
9
-
10
-    # prepare object points, like (0,0,0), (1,0,0), (2,0,0) ....,(6,5,0)
11
-    objp = np.zeros((6*7,3), np.float32)
12
-    objp[:,:2] = np.mgrid[0:7,0:6].T.reshape(-1,2)
13
-
14
-    # Arrays to store object points and image points from all the images.
15
-    objpoints = [] # 3d point in real world space
16
-    imgpoints = [] # 2d points in image plane.
17
-
18
-    images = glob.glob('./img_calibrate/*.jpg')
19
-
20
-    for fname in images:
21
-        img = cv2.imread(fname)
22
-        gray = cv2.cvtColor(img,cv2.COLOR_BGR2GRAY)
23
-
24
-        # Find the chess board corners
25
-        ret, corners = cv2.findChessboardCorners(gray, (7,6),None)
26
-
27
-        # If found, add object points, image points (after refining them)
28
-        if ret == True:
29
-            objpoints.append(objp)
30
-
31
-            corners2 = cv2.cornerSubPix(gray,corners,(11,11),(-1,-1),criteria)
32
-            imgpoints.append(corners2)
33
-
34
-            ret, mtx, dist, rvecs, tvecs = cv2.calibrateCamera(objpoints, imgpoints, gray.shape[::-1], None, None)
35
-            return ret, mtx, dist, rvecs, tvecs

+ 0
- 21
incubateur/Aruco_opencv_python/getCalibrationImage.py View File

@@ -1,21 +0,0 @@
1
-import cv2
2
-
3
-
4
-cap = cv2.VideoCapture(0)
5
-nbrImage = 0
6
-while nbrImage < 15:
7
-    ret, img = cap.read()
8
-    gray = cv2.cvtColor(img, cv2.COLOR_BGR2GRAY)
9
-
10
-    # Find the chess board corners
11
-    ret, corners = cv2.findChessboardCorners(gray, (7,6),None)
12
-
13
-    # If found, add object points, image points (after refining them)
14
-    if ret == True:
15
-        nbrImage = nbrImage+1
16
-        cv2.imwrite("./img_calibrate/calibration_" + str(nbrImage) + ".jpg", img)
17
-        cv2.putText(img, 'Image ' + str(nbrImage) + ' /15', (5, 30), cv2.FONT_HERSHEY_SIMPLEX, 0.5, (255, 255, 255), 2, cv2.LINE_AA)
18
-        cv2.imshow('img',img)
19
-        cv2.waitKey(1000)
20
-
21
-cv2.destroyAllWindows()

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incubateur/Aruco_opencv_python/img_aruco/aruco_10.jpg View File


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+ 0
- 138
incubateur/Aruco_opencv_python/opengl_opencv.py View File

@@ -1,138 +0,0 @@
1
-import cv2
2
-from OpenGL.GL import *
3
-from OpenGL.GLU import *
4
-from OpenGL.GLUT import *
5
-import numpy as np
6
-import sys
7
-
8
-# window dimensions
9
-width = 1280
10
-height = 720
11
-nRange = 1.0
12
-
13
-global capture
14
-capture = None
15
-
16
-
17
-def cv2array(im):
18
-    h, w, c = im.shape
19
-    a = np.fromstring(
20
-        im.tostring(),
21
-        dtype=im.dtype,
22
-        count=w * h * c)
23
-    a.shape = (h, w, c)
24
-    return a
25
-
26
-
27
-def init():
28
-    # glclearcolor (r, g, b, alpha)
29
-    glClearColor(0.0, 0.0, 0.0, 1.0)
30
-
31
-    glutDisplayFunc(display)
32
-    glutReshapeFunc(reshape)
33
-    glutKeyboardFunc(keyboard)
34
-    glutIdleFunc(idle)
35
-
36
-
37
-def idle():
38
-    # capture next frame
39
-
40
-    global capture
41
-    _, image = capture.read()
42
-
43
-    cv2.cvtColor(image, cv2.COLOR_BGR2RGB)
44
-    # you must convert the image to array for glTexImage2D to work
45
-    # maybe there is a faster way that I don't know about yet...
46
-
47
-    # print image_arr
48
-
49
-    # Create Texture
50
-    glTexImage2D(GL_TEXTURE_2D,
51
-                 0,
52
-                 GL_RGB,
53
-                 1280, 720,
54
-                 0,
55
-                 GL_RGB,
56
-                 GL_UNSIGNED_BYTE,
57
-                 image)
58
-    cv2.imshow('frame', image)
59
-    glutPostRedisplay()
60
-
61
-
62
-def display():
63
-    glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT)
64
-    glEnable(GL_TEXTURE_2D)
65
-    # glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_REPEAT)
66
-    # glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_REPEAT)
67
-    # glTexEnvf(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_DECAL)
68
-    # this one is necessary with texture2d for some reason
69
-    glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST)
70
-
71
-    # Set Projection Matrix
72
-    glMatrixMode(GL_PROJECTION)
73
-    glLoadIdentity()
74
-    gluOrtho2D(0, width, 0, height)
75
-
76
-    # Switch to Model View Matrix
77
-    glMatrixMode(GL_MODELVIEW)
78
-    glLoadIdentity()
79
-
80
-    # Draw textured Quads
81
-    glBegin(GL_QUADS)
82
-    glTexCoord2f(0.0, 0.0)
83
-    glVertex2f(0.0, 0.0)
84
-    glTexCoord2f(1.0, 0.0)
85
-    glVertex2f(width, 0.0)
86
-    glTexCoord2f(1.0, 1.0)
87
-    glVertex2f(width, height)
88
-    glTexCoord2f(0.0, 1.0)
89
-    glVertex2f(0.0, height)
90
-    glEnd()
91
-
92
-    glFlush()
93
-    glutSwapBuffers()
94
-
95
-
96
-def reshape(w, h):
97
-    if h == 0:
98
-        h = 1
99
-
100
-    glViewport(0, 0, w, h)
101
-    glMatrixMode(GL_PROJECTION)
102
-
103
-    glLoadIdentity()
104
-    # allows for reshaping the window without distoring shape
105
-
106
-    if w <= h:
107
-        glOrtho(-nRange, nRange, -nRange * h / w, nRange * h / w, -nRange, nRange)
108
-    else:
109
-        glOrtho(-nRange * w / h, nRange * w / h, -nRange, nRange, -nRange, nRange)
110
-
111
-    glMatrixMode(GL_MODELVIEW)
112
-    glLoadIdentity()
113
-
114
-
115
-def keyboard(key, x, y):
116
-    global anim
117
-    if key == chr(27):
118
-        sys.exit()
119
-
120
-
121
-def main():
122
-    global capture
123
-    # start openCV capturefromCAM
124
-    capture = cv2.VideoCapture(0)
125
-    print(capture)
126
-    capture.set(3, 1280)
127
-    capture.set(4, 720)
128
-    glutInit(sys.argv)
129
-    glutInitDisplayMode(GLUT_DOUBLE | GLUT_RGB | GLUT_DEPTH)
130
-    glutInitWindowSize(width, height)
131
-    glutInitWindowPosition(100, 100)
132
-    glutCreateWindow("OpenGL + OpenCV")
133
-
134
-    init()
135
-    glutMainLoop()
136
-
137
-
138
-main()

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incubateur/aruco_generer.pdf View File


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- 6
incubateur/dumby_rtos2/Lisez-moi View File

@@ -1,6 +0,0 @@
1
-D'aprés mes souvenir :
2
-- Asservissement complétement pourrave
3
-- Architecture globalement correcte
4
-- Reprendre la façon de recevoir des messages pour que ça colle avec la norme 802.15.4
5
-	J'essayais de lire avec une DMA (taille fixe) mais la norme fait bouger la taille en ajoutant 
6
-	parfois des caractéres d'échapement

+ 0
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incubateur/dumby_rtos2/dumby2/.mxproject View File

@@ -1,13 +0,0 @@
1
-[PreviousGenFiles]
2
-HeaderPath=D:/Users/senaneuc/Documents/dumby_rtos2/dumby2/Inc
3
-HeaderFiles=FreeRTOSConfig.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h;gpio.h;adc.h;dma.h;tim.h;usart.h;
4
-SourcePath=D:/Users/senaneuc/Documents/dumby_rtos2/dumby2/Src
5
-SourceFiles=freertos.c;stm32f1xx_it.c;stm32f1xx_hal_msp.c;stm32f1xx_hal_timebase_TIM.c;main.c;gpio.c;adc.c;dma.c;tim.c;usart.c;
6
-
7
-[PreviousLibFiles]
8
-LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOSConfig_template.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
9
-
10
-[PreviousUsedKeilFiles]
11
-SourceFiles=..\Src\main.c;..\Src\gpio.c;..\Src\adc.c;..\Src\dma.c;..\Src\freertos.c;..\Src\tim.c;..\Src\usart.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;..\Src\stm32f1xx_hal_timebase_TIM.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c;../Middlewares/Third_Party/FreeRTOS/Source/croutine.c;../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;../Middlewares/Third_Party/FreeRTOS/Source/list.c;../Middlewares/Third_Party/FreeRTOS/Source/queue.c;../Middlewares/Third_Party/FreeRTOS/Source/tasks.c;../Middlewares/Third_Party/FreeRTOS/Source/timers.c;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;../Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xb.s;../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;../Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c;../Middlewares/Third_Party/FreeRTOS/Source/croutine.c;../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;../Middlewares/Third_Party/FreeRTOS/Source/list.c;../Middlewares/Third_Party/FreeRTOS/Source/queue.c;../Middlewares/Third_Party/FreeRTOS/Source/tasks.c;../Middlewares/Third_Party/FreeRTOS/Source/timers.c;../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;
12
-HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Middlewares\Third_Party\FreeRTOS\Source\portable\RVDS\ARM_CM3;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Middlewares\Third_Party\FreeRTOS\Source\include;..\Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;..\Drivers\CMSIS\Include;..\Inc;
13
-

+ 0
- 10511
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h
File diff suppressed because it is too large
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+ 0
- 238
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h View File

@@ -1,238 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    stm32f1xx.h
4
-  * @author  MCD Application Team
5
-  * @version V4.2.0
6
-  * @date    31-March-2017
7
-  * @brief   CMSIS STM32F1xx Device Peripheral Access Layer Header File. 
8
-  *
9
-  *          The file is the unique include file that the application programmer
10
-  *          is using in the C source code, usually in main.c. This file contains:
11
-  *            - Configuration section that allows to select:
12
-  *              - The STM32F1xx device used in the target application
13
-  *              - To use or not the peripheral’s drivers in application code(i.e. 
14
-  *                code will be based on direct access to peripheral’s registers 
15
-  *                rather than drivers API), this option is controlled by 
16
-  *                "#define USE_HAL_DRIVER"
17
-  *  
18
-  ******************************************************************************
19
-  * @attention
20
-  *
21
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
22
-  *
23
-  * Redistribution and use in source and binary forms, with or without modification,
24
-  * are permitted provided that the following conditions are met:
25
-  *   1. Redistributions of source code must retain the above copyright notice,
26
-  *      this list of conditions and the following disclaimer.
27
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
28
-  *      this list of conditions and the following disclaimer in the documentation
29
-  *      and/or other materials provided with the distribution.
30
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
31
-  *      may be used to endorse or promote products derived from this software
32
-  *      without specific prior written permission.
33
-  *
34
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
38
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
41
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
42
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44
-  *
45
-  ******************************************************************************
46
-  */
47
-
48
-/** @addtogroup CMSIS
49
-  * @{
50
-  */
51
-
52
-/** @addtogroup stm32f1xx
53
-  * @{
54
-  */
55
-    
56
-#ifndef __STM32F1XX_H
57
-#define __STM32F1XX_H
58
-
59
-#ifdef __cplusplus
60
- extern "C" {
61
-#endif /* __cplusplus */
62
-  
63
-/** @addtogroup Library_configuration_section
64
-  * @{
65
-  */
66
-
67
-/**
68
-  * @brief STM32 Family
69
-  */
70
-#if !defined (STM32F1)
71
-#define STM32F1
72
-#endif /* STM32F1 */
73
-
74
-/* Uncomment the line below according to the target STM32L device used in your 
75
-   application 
76
-  */
77
-
78
-#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
79
-    !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
80
-    !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
81
-  /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
82
-  /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
83
-  /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
84
-  /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
85
-  /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */ 
86
-  /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
87
-  /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
88
-  /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
89
-  /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
90
-  /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
91
-  /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
92
-  /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
93
-  /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
94
-  /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */  
95
-#endif
96
-
97
-/*  Tip: To avoid modifying this file each time you need to switch between these
98
-        devices, you can define the device in your toolchain compiler preprocessor.
99
-  */
100
-  
101
-#if !defined  (USE_HAL_DRIVER)
102
-/**
103
- * @brief Comment the line below if you will not use the peripherals drivers.
104
-   In this case, these drivers will not be included and the application code will 
105
-   be based on direct access to peripherals registers 
106
-   */
107
-  /*#define USE_HAL_DRIVER */
108
-#endif /* USE_HAL_DRIVER */
109
-
110
-/**
111
-  * @brief CMSIS Device version number V4.2.0
112
-  */
113
-#define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
114
-#define __STM32F1_CMSIS_VERSION_SUB1   (0x02) /*!< [23:16] sub1 version */
115
-#define __STM32F1_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
116
-#define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
117
-#define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
118
-                                       |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
119
-                                       |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
120
-                                       |(__STM32F1_CMSIS_VERSION_RC))
121
-
122
-/**
123
-  * @}
124
-  */
125
-
126
-/** @addtogroup Device_Included
127
-  * @{
128
-  */
129
-
130
-#if defined(STM32F100xB)
131
-  #include "stm32f100xb.h"
132
-#elif defined(STM32F100xE)
133
-  #include "stm32f100xe.h"
134
-#elif defined(STM32F101x6)
135
-  #include "stm32f101x6.h"
136
-#elif defined(STM32F101xB)
137
-  #include "stm32f101xb.h"
138
-#elif defined(STM32F101xE)
139
-  #include "stm32f101xe.h"
140
-#elif defined(STM32F101xG)
141
-  #include "stm32f101xg.h"
142
-#elif defined(STM32F102x6)
143
-  #include "stm32f102x6.h"
144
-#elif defined(STM32F102xB)
145
-  #include "stm32f102xb.h"
146
-#elif defined(STM32F103x6)
147
-  #include "stm32f103x6.h"
148
-#elif defined(STM32F103xB)
149
-  #include "stm32f103xb.h"
150
-#elif defined(STM32F103xE)
151
-  #include "stm32f103xe.h"
152
-#elif defined(STM32F103xG)
153
-  #include "stm32f103xg.h"
154
-#elif defined(STM32F105xC)
155
-  #include "stm32f105xc.h"
156
-#elif defined(STM32F107xC)
157
-  #include "stm32f107xc.h"
158
-#else
159
- #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
160
-#endif
161
-
162
-/**
163
-  * @}
164
-  */
165
-
166
-/** @addtogroup Exported_types
167
-  * @{
168
-  */  
169
-typedef enum 
170
-{
171
-  RESET = 0, 
172
-  SET = !RESET
173
-} FlagStatus, ITStatus;
174
-
175
-typedef enum 
176
-{
177
-  DISABLE = 0, 
178
-  ENABLE = !DISABLE
179
-} FunctionalState;
180
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
181
-
182
-typedef enum 
183
-{
184
-  ERROR = 0, 
185
-  SUCCESS = !ERROR
186
-} ErrorStatus;
187
-
188
-/**
189
-  * @}
190
-  */
191
-
192
-
193
-/** @addtogroup Exported_macros
194
-  * @{
195
-  */
196
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
197
-
198
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
199
-
200
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
201
-
202
-#define CLEAR_REG(REG)        ((REG) = (0x0))
203
-
204
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
205
-
206
-#define READ_REG(REG)         ((REG))
207
-
208
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
209
-
210
-#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL))) 
211
-
212
-
213
-/**
214
-  * @}
215
-  */
216
-
217
-#if defined (USE_HAL_DRIVER)
218
- #include "stm32f1xx_hal.h"
219
-#endif /* USE_HAL_DRIVER */
220
-
221
-
222
-#ifdef __cplusplus
223
-}
224
-#endif /* __cplusplus */
225
-
226
-#endif /* __STM32F1xx_H */
227
-/**
228
-  * @}
229
-  */
230
-
231
-/**
232
-  * @}
233
-  */
234
-  
235
-
236
-
237
-
238
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 116
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h View File

@@ -1,116 +0,0 @@
1
-/**
2
-  ******************************************************************************
3
-  * @file    system_stm32f10x.h
4
-  * @author  MCD Application Team
5
-  * @version V4.2.0
6
-  * @date    31-March-2017
7
-  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8
-  ******************************************************************************
9
-  * @attention
10
-  *
11
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
12
-  *
13
-  * Redistribution and use in source and binary forms, with or without modification,
14
-  * are permitted provided that the following conditions are met:
15
-  *   1. Redistributions of source code must retain the above copyright notice,
16
-  *      this list of conditions and the following disclaimer.
17
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
18
-  *      this list of conditions and the following disclaimer in the documentation
19
-  *      and/or other materials provided with the distribution.
20
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
21
-  *      may be used to endorse or promote products derived from this software
22
-  *      without specific prior written permission.
23
-  *
24
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34
-  *
35
-  ******************************************************************************
36
-  */
37
-
38
-/** @addtogroup CMSIS
39
-  * @{
40
-  */
41
-
42
-/** @addtogroup stm32f10x_system
43
-  * @{
44
-  */  
45
-  
46
-/**
47
-  * @brief Define to prevent recursive inclusion
48
-  */
49
-#ifndef __SYSTEM_STM32F10X_H
50
-#define __SYSTEM_STM32F10X_H
51
-
52
-#ifdef __cplusplus
53
- extern "C" {
54
-#endif 
55
-
56
-/** @addtogroup STM32F10x_System_Includes
57
-  * @{
58
-  */
59
-
60
-/**
61
-  * @}
62
-  */
63
-
64
-
65
-/** @addtogroup STM32F10x_System_Exported_types
66
-  * @{
67
-  */
68
-
69
-extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
70
-extern const uint8_t  AHBPrescTable[16U];  /*!< AHB prescalers table values */
71
-extern const uint8_t  APBPrescTable[8U];   /*!< APB prescalers table values */
72
-
73
-/**
74
-  * @}
75
-  */
76
-
77
-/** @addtogroup STM32F10x_System_Exported_Constants
78
-  * @{
79
-  */
80
-
81
-/**
82
-  * @}
83
-  */
84
-
85
-/** @addtogroup STM32F10x_System_Exported_Macros
86
-  * @{
87
-  */
88
-
89
-/**
90
-  * @}
91
-  */
92
-
93
-/** @addtogroup STM32F10x_System_Exported_Functions
94
-  * @{
95
-  */
96
-  
97
-extern void SystemInit(void);
98
-extern void SystemCoreClockUpdate(void);
99
-/**
100
-  * @}
101
-  */
102
-
103
-#ifdef __cplusplus
104
-}
105
-#endif
106
-
107
-#endif /*__SYSTEM_STM32F10X_H */
108
-
109
-/**
110
-  * @}
111
-  */
112
-  
113
-/**
114
-  * @}
115
-  */  
116
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 332
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f100xb.s View File

@@ -1,332 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f100xb.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F100xB Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp                    ; Top of Stack
79
-                DCD     Reset_Handler                   ; Reset Handler
80
-                DCD     NMI_Handler                     ; NMI Handler
81
-                DCD     HardFault_Handler               ; Hard Fault Handler
82
-                DCD     MemManage_Handler               ; MPU Fault Handler
83
-                DCD     BusFault_Handler                ; Bus Fault Handler
84
-                DCD     UsageFault_Handler              ; Usage Fault Handler
85
-                DCD     0                               ; Reserved
86
-                DCD     0                               ; Reserved
87
-                DCD     0                               ; Reserved
88
-                DCD     0                               ; Reserved
89
-                DCD     SVC_Handler                     ; SVCall Handler
90
-                DCD     DebugMon_Handler                ; Debug Monitor Handler
91
-                DCD     0                               ; Reserved
92
-                DCD     PendSV_Handler                  ; PendSV Handler
93
-                DCD     SysTick_Handler                 ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler                 ; Window Watchdog
97
-                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler               ; Tamper
99
-                DCD     RTC_IRQHandler                  ; RTC
100
-                DCD     FLASH_IRQHandler                ; Flash
101
-                DCD     RCC_IRQHandler                  ; RCC
102
-                DCD     EXTI0_IRQHandler                ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler                ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler                ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler                ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler                ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
114
-                DCD     ADC1_IRQHandler                 ; ADC1
115
-                DCD     0                               ; Reserved
116
-                DCD     0                               ; Reserved
117
-                DCD     0                               ; Reserved
118
-                DCD     0                               ; Reserved
119
-                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
120
-                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
121
-                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
122
-                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
123
-                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
124
-                DCD     TIM2_IRQHandler                 ; TIM2
125
-                DCD     TIM3_IRQHandler                 ; TIM3
126
-                DCD     TIM4_IRQHandler                 ; TIM4
127
-                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
129
-                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
130
-                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
131
-                DCD     SPI1_IRQHandler                 ; SPI1
132
-                DCD     SPI2_IRQHandler                 ; SPI2
133
-                DCD     USART1_IRQHandler               ; USART1
134
-                DCD     USART2_IRQHandler               ; USART2
135
-                DCD     USART3_IRQHandler               ; USART3
136
-                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler             ; RTC Alarm through EXTI Line
138
-                DCD     CEC_IRQHandler                  ; HDMI-CEC
139
-                DCD     0                               ; Reserved
140
-                DCD     0                               ; Reserved
141
-                DCD     0                               ; Reserved
142
-                DCD     0                               ; Reserved 
143
-                DCD     0                               ; Reserved
144
-                DCD     0                               ; Reserved
145
-                DCD     0                               ; Reserved
146
-                DCD     0                               ; Reserved 
147
-                DCD     0                               ; Reserved
148
-                DCD     0                               ; Reserved
149
-                DCD     0                               ; Reserved
150
-                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
151
-                DCD     TIM7_IRQHandler                 ; TIM7
152
-__Vectors_End
153
-
154
-__Vectors_Size  EQU  __Vectors_End - __Vectors
155
-
156
-                AREA    |.text|, CODE, READONLY
157
-
158
-; Reset handler
159
-Reset_Handler    PROC
160
-                 EXPORT  Reset_Handler             [WEAK]
161
-     IMPORT  __main
162
-     IMPORT  SystemInit
163
-                 LDR     R0, =SystemInit
164
-                 BLX     R0
165
-                 LDR     R0, =__main
166
-                 BX      R0
167
-                 ENDP
168
-
169
-; Dummy Exception Handlers (infinite loops which can be modified)
170
-
171
-NMI_Handler     PROC
172
-                EXPORT  NMI_Handler                      [WEAK]
173
-                B       .
174
-                ENDP
175
-HardFault_Handler\
176
-                PROC
177
-                EXPORT  HardFault_Handler                [WEAK]
178
-                B       .
179
-                ENDP
180
-MemManage_Handler\
181
-                PROC
182
-                EXPORT  MemManage_Handler                [WEAK]
183
-                B       .
184
-                ENDP
185
-BusFault_Handler\
186
-                PROC
187
-                EXPORT  BusFault_Handler                 [WEAK]
188
-                B       .
189
-                ENDP
190
-UsageFault_Handler\
191
-                PROC
192
-                EXPORT  UsageFault_Handler               [WEAK]
193
-                B       .
194
-                ENDP
195
-SVC_Handler     PROC
196
-                EXPORT  SVC_Handler                      [WEAK]
197
-                B       .
198
-                ENDP
199
-DebugMon_Handler\
200
-                PROC
201
-                EXPORT  DebugMon_Handler                 [WEAK]
202
-                B       .
203
-                ENDP
204
-PendSV_Handler  PROC
205
-                EXPORT  PendSV_Handler                   [WEAK]
206
-                B       .
207
-                ENDP
208
-SysTick_Handler PROC
209
-                EXPORT  SysTick_Handler                  [WEAK]
210
-                B       .
211
-                ENDP
212
-
213
-Default_Handler PROC
214
-
215
-                EXPORT  WWDG_IRQHandler                  [WEAK]
216
-                EXPORT  PVD_IRQHandler                   [WEAK]
217
-                EXPORT  TAMPER_IRQHandler                [WEAK]
218
-                EXPORT  RTC_IRQHandler                   [WEAK]
219
-                EXPORT  FLASH_IRQHandler                 [WEAK]
220
-                EXPORT  RCC_IRQHandler                   [WEAK]
221
-                EXPORT  EXTI0_IRQHandler                 [WEAK]
222
-                EXPORT  EXTI1_IRQHandler                 [WEAK]
223
-                EXPORT  EXTI2_IRQHandler                 [WEAK]
224
-                EXPORT  EXTI3_IRQHandler                 [WEAK]
225
-                EXPORT  EXTI4_IRQHandler                 [WEAK]
226
-                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
227
-                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
228
-                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
229
-                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
230
-                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
231
-                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
232
-                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
233
-                EXPORT  ADC1_IRQHandler                  [WEAK]
234
-                EXPORT  EXTI9_5_IRQHandler               [WEAK]
235
-                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
236
-                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
237
-                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
238
-                EXPORT  TIM1_CC_IRQHandler               [WEAK]
239
-                EXPORT  TIM2_IRQHandler                  [WEAK]
240
-                EXPORT  TIM3_IRQHandler                  [WEAK]
241
-                EXPORT  TIM4_IRQHandler                  [WEAK]
242
-                EXPORT  I2C1_EV_IRQHandler               [WEAK]
243
-                EXPORT  I2C1_ER_IRQHandler               [WEAK]
244
-                EXPORT  I2C2_EV_IRQHandler               [WEAK]
245
-                EXPORT  I2C2_ER_IRQHandler               [WEAK]
246
-                EXPORT  SPI1_IRQHandler                  [WEAK]
247
-                EXPORT  SPI2_IRQHandler                  [WEAK]
248
-                EXPORT  USART1_IRQHandler                [WEAK]
249
-                EXPORT  USART2_IRQHandler                [WEAK]
250
-                EXPORT  USART3_IRQHandler                [WEAK]
251
-                EXPORT  EXTI15_10_IRQHandler             [WEAK]
252
-                EXPORT  RTC_Alarm_IRQHandler              [WEAK]
253
-                EXPORT  CEC_IRQHandler                   [WEAK]
254
-                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
255
-                EXPORT  TIM7_IRQHandler                  [WEAK]
256
-
257
-WWDG_IRQHandler
258
-PVD_IRQHandler
259
-TAMPER_IRQHandler
260
-RTC_IRQHandler
261
-FLASH_IRQHandler
262
-RCC_IRQHandler
263
-EXTI0_IRQHandler
264
-EXTI1_IRQHandler
265
-EXTI2_IRQHandler
266
-EXTI3_IRQHandler
267
-EXTI4_IRQHandler
268
-DMA1_Channel1_IRQHandler
269
-DMA1_Channel2_IRQHandler
270
-DMA1_Channel3_IRQHandler
271
-DMA1_Channel4_IRQHandler
272
-DMA1_Channel5_IRQHandler
273
-DMA1_Channel6_IRQHandler
274
-DMA1_Channel7_IRQHandler
275
-ADC1_IRQHandler
276
-EXTI9_5_IRQHandler
277
-TIM1_BRK_TIM15_IRQHandler
278
-TIM1_UP_TIM16_IRQHandler
279
-TIM1_TRG_COM_TIM17_IRQHandler
280
-TIM1_CC_IRQHandler
281
-TIM2_IRQHandler
282
-TIM3_IRQHandler
283
-TIM4_IRQHandler
284
-I2C1_EV_IRQHandler
285
-I2C1_ER_IRQHandler
286
-I2C2_EV_IRQHandler
287
-I2C2_ER_IRQHandler
288
-SPI1_IRQHandler
289
-SPI2_IRQHandler
290
-USART1_IRQHandler
291
-USART2_IRQHandler
292
-USART3_IRQHandler
293
-EXTI15_10_IRQHandler
294
-RTC_Alarm_IRQHandler
295
-CEC_IRQHandler
296
-TIM6_DAC_IRQHandler
297
-TIM7_IRQHandler
298
-                B       .
299
-
300
-                ENDP
301
-
302
-                ALIGN
303
-
304
-;*******************************************************************************
305
-; User Stack and Heap initialization
306
-;*******************************************************************************
307
-                 IF      :DEF:__MICROLIB           
308
-                
309
-                 EXPORT  __initial_sp
310
-                 EXPORT  __heap_base
311
-                 EXPORT  __heap_limit
312
-                
313
-                 ELSE
314
-                
315
-                 IMPORT  __use_two_region_memory
316
-                 EXPORT  __user_initial_stackheap
317
-                 
318
-__user_initial_stackheap
319
-
320
-                 LDR     R0, =  Heap_Mem
321
-                 LDR     R1, =(Stack_Mem + Stack_Size)
322
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
323
-                 LDR     R3, = Stack_Mem
324
-                 BX      LR
325
-
326
-                 ALIGN
327
-
328
-                 ENDIF
329
-
330
-                 END
331
-
332
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 363
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f100xe.s View File

@@ -1,363 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f100xe.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F100xE Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system and also configure the external 
12
-;*                        SRAM mounted on STM32100E-EVAL board to be used as data 
13
-;*                        memory (optional, to be enabled by user)
14
-;*                      - Branches to __main in the C library (which eventually
15
-;*                        calls main()).
16
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
17
-;*                      priority is Privileged, and the Stack is set to Main.
18
-;********************************************************************************
19
-;*
20
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
21
-;*
22
-;* Redistribution and use in source and binary forms, with or without modification,
23
-;* are permitted provided that the following conditions are met:
24
-;*   1. Redistributions of source code must retain the above copyright notice,
25
-;*      this list of conditions and the following disclaimer.
26
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
27
-;*      this list of conditions and the following disclaimer in the documentation
28
-;*      and/or other materials provided with the distribution.
29
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
30
-;*      may be used to endorse or promote products derived from this software
31
-;*      without specific prior written permission.
32
-;*
33
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
36
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
37
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
40
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
41
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
42
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43
-; 
44
-;*******************************************************************************
45
-
46
-; Amount of memory (in bytes) allocated for Stack
47
-; Tailor this value to your application needs
48
-; <h> Stack Configuration
49
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
50
-; </h>
51
-
52
-Stack_Size      EQU     0x00000400
53
-
54
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
55
-Stack_Mem       SPACE   Stack_Size
56
-__initial_sp
57
-
58
-
59
-; <h> Heap Configuration
60
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
61
-; </h>
62
-
63
-Heap_Size       EQU     0x00000200
64
-
65
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
66
-__heap_base
67
-Heap_Mem        SPACE   Heap_Size
68
-__heap_limit
69
-
70
-                PRESERVE8
71
-                THUMB
72
-
73
-
74
-; Vector Table Mapped to Address 0 at Reset
75
-                AREA    RESET, DATA, READONLY
76
-                EXPORT  __Vectors
77
-                EXPORT  __Vectors_End
78
-                EXPORT  __Vectors_Size
79
-
80
-__Vectors       DCD     __initial_sp                    ; Top of Stack
81
-                DCD     Reset_Handler                   ; Reset Handler
82
-                DCD     NMI_Handler                     ; NMI Handler
83
-                DCD     HardFault_Handler               ; Hard Fault Handler
84
-                DCD     MemManage_Handler               ; MPU Fault Handler
85
-                DCD     BusFault_Handler                ; Bus Fault Handler
86
-                DCD     UsageFault_Handler              ; Usage Fault Handler
87
-                DCD     0                               ; Reserved
88
-                DCD     0                               ; Reserved
89
-                DCD     0                               ; Reserved
90
-                DCD     0                               ; Reserved
91
-                DCD     SVC_Handler                     ; SVCall Handler
92
-                DCD     DebugMon_Handler                ; Debug Monitor Handler
93
-                DCD     0                               ; Reserved
94
-                DCD     PendSV_Handler                  ; PendSV Handler
95
-                DCD     SysTick_Handler                 ; SysTick Handler
96
-
97
-                ; External Interrupts
98
-                DCD     WWDG_IRQHandler                 ; Window Watchdog
99
-                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
100
-                DCD     TAMPER_IRQHandler               ; Tamper
101
-                DCD     RTC_IRQHandler                  ; RTC
102
-                DCD     FLASH_IRQHandler                ; Flash
103
-                DCD     RCC_IRQHandler                  ; RCC
104
-                DCD     EXTI0_IRQHandler                ; EXTI Line 0
105
-                DCD     EXTI1_IRQHandler                ; EXTI Line 1
106
-                DCD     EXTI2_IRQHandler                ; EXTI Line 2
107
-                DCD     EXTI3_IRQHandler                ; EXTI Line 3
108
-                DCD     EXTI4_IRQHandler                ; EXTI Line 4
109
-                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
110
-                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
111
-                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
112
-                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
113
-                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
114
-                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
115
-                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
116
-                DCD     ADC1_IRQHandler                 ; ADC1
117
-                DCD     0                               ; Reserved
118
-                DCD     0                               ; Reserved
119
-                DCD     0                               ; Reserved
120
-                DCD     0                               ; Reserved
121
-                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
122
-                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
123
-                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
124
-                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
125
-                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
126
-                DCD     TIM2_IRQHandler                 ; TIM2
127
-                DCD     TIM3_IRQHandler                 ; TIM3
128
-                DCD     TIM4_IRQHandler                 ; TIM4
129
-                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
130
-                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
131
-                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
132
-                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
133
-                DCD     SPI1_IRQHandler                 ; SPI1
134
-                DCD     SPI2_IRQHandler                 ; SPI2
135
-                DCD     USART1_IRQHandler               ; USART1
136
-                DCD     USART2_IRQHandler               ; USART2
137
-                DCD     USART3_IRQHandler               ; USART3
138
-                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
139
-                DCD     RTC_Alarm_IRQHandler             ; RTC Alarm through EXTI Line
140
-                DCD     CEC_IRQHandler                  ; HDMI CEC
141
-                DCD     TIM12_IRQHandler                ; TIM12
142
-                DCD     TIM13_IRQHandler                ; TIM13 
143
-                DCD     TIM14_IRQHandler                ; TIM14
144
-                DCD     0                               ; Reserved
145
-                DCD     0                               ; Reserved
146
-                DCD     0                               ; Reserved
147
-                DCD     0                               ; Reserved
148
-                DCD     TIM5_IRQHandler                 ; TIM5
149
-                DCD     SPI3_IRQHandler                 ; SPI3
150
-                DCD     UART4_IRQHandler                ; UART4
151
-                DCD     UART5_IRQHandler                ; UART5
152
-                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
153
-                DCD     TIM7_IRQHandler                 ; TIM7
154
-                DCD     DMA2_Channel1_IRQHandler        ; DMA2 Channel1
155
-                DCD     DMA2_Channel2_IRQHandler        ; DMA2 Channel2
156
-                DCD     DMA2_Channel3_IRQHandler        ; DMA2 Channel3
157
-                DCD     DMA2_Channel4_5_IRQHandler      ; DMA2 Channel4 & Channel5
158
-                DCD     DMA2_Channel5_IRQHandler        ; DMA2 Channel5                
159
-__Vectors_End
160
-
161
-__Vectors_Size  EQU  __Vectors_End - __Vectors
162
-
163
-                AREA    |.text|, CODE, READONLY
164
-
165
-; Reset handler
166
-Reset_Handler    PROC
167
-                 EXPORT  Reset_Handler             [WEAK]
168
-     IMPORT  __main
169
-     IMPORT  SystemInit
170
-                 LDR     R0, =SystemInit
171
-                 BLX     R0
172
-                 LDR     R0, =__main
173
-                 BX      R0
174
-                 ENDP
175
-
176
-; Dummy Exception Handlers (infinite loops which can be modified)
177
-
178
-NMI_Handler     PROC
179
-                EXPORT  NMI_Handler                      [WEAK]
180
-                B       .
181
-                ENDP
182
-HardFault_Handler\
183
-                PROC
184
-                EXPORT  HardFault_Handler                [WEAK]
185
-                B       .
186
-                ENDP
187
-MemManage_Handler\
188
-                PROC
189
-                EXPORT  MemManage_Handler                [WEAK]
190
-                B       .
191
-                ENDP
192
-BusFault_Handler\
193
-                PROC
194
-                EXPORT  BusFault_Handler                 [WEAK]
195
-                B       .
196
-                ENDP
197
-UsageFault_Handler\
198
-                PROC
199
-                EXPORT  UsageFault_Handler               [WEAK]
200
-                B       .
201
-                ENDP
202
-SVC_Handler     PROC
203
-                EXPORT  SVC_Handler                      [WEAK]
204
-                B       .
205
-                ENDP
206
-DebugMon_Handler\
207
-                PROC
208
-                EXPORT  DebugMon_Handler                 [WEAK]
209
-                B       .
210
-                ENDP
211
-PendSV_Handler  PROC
212
-                EXPORT  PendSV_Handler                   [WEAK]
213
-                B       .
214
-                ENDP
215
-SysTick_Handler PROC
216
-                EXPORT  SysTick_Handler                  [WEAK]
217
-                B       .
218
-                ENDP
219
-
220
-Default_Handler PROC
221
-
222
-                EXPORT  WWDG_IRQHandler                  [WEAK]
223
-                EXPORT  PVD_IRQHandler                   [WEAK]
224
-                EXPORT  TAMPER_IRQHandler                [WEAK]
225
-                EXPORT  RTC_IRQHandler                   [WEAK]
226
-                EXPORT  FLASH_IRQHandler                 [WEAK]
227
-                EXPORT  RCC_IRQHandler                   [WEAK]
228
-                EXPORT  EXTI0_IRQHandler                 [WEAK]
229
-                EXPORT  EXTI1_IRQHandler                 [WEAK]
230
-                EXPORT  EXTI2_IRQHandler                 [WEAK]
231
-                EXPORT  EXTI3_IRQHandler                 [WEAK]
232
-                EXPORT  EXTI4_IRQHandler                 [WEAK]
233
-                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
234
-                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
235
-                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
236
-                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
237
-                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
238
-                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
239
-                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
240
-                EXPORT  ADC1_IRQHandler                  [WEAK]
241
-                EXPORT  EXTI9_5_IRQHandler               [WEAK]
242
-                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
243
-                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
244
-                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
245
-                EXPORT  TIM1_CC_IRQHandler               [WEAK]
246
-                EXPORT  TIM2_IRQHandler                  [WEAK]
247
-                EXPORT  TIM3_IRQHandler                  [WEAK]
248
-                EXPORT  TIM4_IRQHandler                  [WEAK]
249
-                EXPORT  I2C1_EV_IRQHandler               [WEAK]
250
-                EXPORT  I2C1_ER_IRQHandler               [WEAK]
251
-                EXPORT  I2C2_EV_IRQHandler               [WEAK]
252
-                EXPORT  I2C2_ER_IRQHandler               [WEAK]
253
-                EXPORT  SPI1_IRQHandler                  [WEAK]
254
-                EXPORT  SPI2_IRQHandler                  [WEAK]
255
-                EXPORT  USART1_IRQHandler                [WEAK]
256
-                EXPORT  USART2_IRQHandler                [WEAK]
257
-                EXPORT  USART3_IRQHandler                [WEAK]
258
-                EXPORT  EXTI15_10_IRQHandler             [WEAK]
259
-                EXPORT  RTC_Alarm_IRQHandler             [WEAK]
260
-                EXPORT  CEC_IRQHandler                   [WEAK]
261
-                EXPORT  TIM12_IRQHandler                 [WEAK]
262
-                EXPORT  TIM13_IRQHandler                 [WEAK]
263
-                EXPORT  TIM14_IRQHandler                 [WEAK]
264
-                EXPORT  TIM5_IRQHandler                  [WEAK]
265
-                EXPORT  SPI3_IRQHandler                  [WEAK]
266
-                EXPORT  UART4_IRQHandler                 [WEAK]
267
-                EXPORT  UART5_IRQHandler                 [WEAK]
268
-                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
269
-                EXPORT  TIM7_IRQHandler                  [WEAK]
270
-                EXPORT  DMA2_Channel1_IRQHandler         [WEAK]
271
-                EXPORT  DMA2_Channel2_IRQHandler         [WEAK]
272
-                EXPORT  DMA2_Channel3_IRQHandler         [WEAK]
273
-                EXPORT  DMA2_Channel4_5_IRQHandler       [WEAK]
274
-                EXPORT  DMA2_Channel5_IRQHandler         [WEAK]
275
-
276
-WWDG_IRQHandler
277
-PVD_IRQHandler
278
-TAMPER_IRQHandler
279
-RTC_IRQHandler
280
-FLASH_IRQHandler
281
-RCC_IRQHandler
282
-EXTI0_IRQHandler
283
-EXTI1_IRQHandler
284
-EXTI2_IRQHandler
285
-EXTI3_IRQHandler
286
-EXTI4_IRQHandler
287
-DMA1_Channel1_IRQHandler
288
-DMA1_Channel2_IRQHandler
289
-DMA1_Channel3_IRQHandler
290
-DMA1_Channel4_IRQHandler
291
-DMA1_Channel5_IRQHandler
292
-DMA1_Channel6_IRQHandler
293
-DMA1_Channel7_IRQHandler
294
-ADC1_IRQHandler
295
-EXTI9_5_IRQHandler
296
-TIM1_BRK_TIM15_IRQHandler
297
-TIM1_UP_TIM16_IRQHandler
298
-TIM1_TRG_COM_TIM17_IRQHandler
299
-TIM1_CC_IRQHandler
300
-TIM2_IRQHandler
301
-TIM3_IRQHandler
302
-TIM4_IRQHandler
303
-I2C1_EV_IRQHandler
304
-I2C1_ER_IRQHandler
305
-I2C2_EV_IRQHandler
306
-I2C2_ER_IRQHandler
307
-SPI1_IRQHandler
308
-SPI2_IRQHandler
309
-USART1_IRQHandler
310
-USART2_IRQHandler
311
-USART3_IRQHandler
312
-EXTI15_10_IRQHandler
313
-RTC_Alarm_IRQHandler
314
-CEC_IRQHandler
315
-TIM12_IRQHandler
316
-TIM13_IRQHandler
317
-TIM14_IRQHandler
318
-TIM5_IRQHandler
319
-SPI3_IRQHandler
320
-UART4_IRQHandler
321
-UART5_IRQHandler
322
-TIM6_DAC_IRQHandler
323
-TIM7_IRQHandler
324
-DMA2_Channel1_IRQHandler
325
-DMA2_Channel2_IRQHandler
326
-DMA2_Channel3_IRQHandler
327
-DMA2_Channel4_5_IRQHandler
328
-DMA2_Channel5_IRQHandler
329
-                B       .
330
-
331
-                ENDP
332
-
333
-                ALIGN
334
-
335
-;*******************************************************************************
336
-; User Stack and Heap initialization
337
-;*******************************************************************************
338
-                 IF      :DEF:__MICROLIB           
339
-                
340
-                 EXPORT  __initial_sp
341
-                 EXPORT  __heap_base
342
-                 EXPORT  __heap_limit
343
-                
344
-                 ELSE
345
-                
346
-                 IMPORT  __use_two_region_memory
347
-                 EXPORT  __user_initial_stackheap
348
-                 
349
-__user_initial_stackheap
350
-
351
-                 LDR     R0, =  Heap_Mem
352
-                 LDR     R1, =(Stack_Mem + Stack_Size)
353
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
354
-                 LDR     R3, = Stack_Mem
355
-                 BX      LR
356
-
357
-                 ALIGN
358
-
359
-                 ENDIF
360
-
361
-                 END
362
-
363
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 295
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101x6.s View File

@@ -1,295 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f101x6.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F101x6 Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_IRQHandler            ; ADC1
115
-                DCD     0                          ; Reserved
116
-                DCD     0                          ; Reserved
117
-                DCD     0                          ; Reserved
118
-                DCD     0                          ; Reserved
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     0                          ; Reserved
121
-                DCD     0                          ; Reserved
122
-                DCD     0                          ; Reserved
123
-                DCD     0                          ; Reserved
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     0                          ; Reserved
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     0                          ; Reserved
130
-                DCD     0                          ; Reserved
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     0                          ; Reserved
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     0                          ; Reserved
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
138
-__Vectors_End
139
-
140
-__Vectors_Size  EQU  __Vectors_End - __Vectors
141
-
142
-                AREA    |.text|, CODE, READONLY
143
-
144
-; Reset handler routine
145
-Reset_Handler    PROC
146
-                 EXPORT  Reset_Handler             [WEAK]
147
-     IMPORT  __main
148
-     IMPORT  SystemInit
149
-                 LDR     R0, =SystemInit
150
-                 BLX     R0
151
-                 LDR     R0, =__main
152
-                 BX      R0
153
-                 ENDP
154
-
155
-; Dummy Exception Handlers (infinite loops which can be modified)
156
-
157
-NMI_Handler     PROC
158
-                EXPORT  NMI_Handler                [WEAK]
159
-                B       .
160
-                ENDP
161
-HardFault_Handler\
162
-                PROC
163
-                EXPORT  HardFault_Handler          [WEAK]
164
-                B       .
165
-                ENDP
166
-MemManage_Handler\
167
-                PROC
168
-                EXPORT  MemManage_Handler          [WEAK]
169
-                B       .
170
-                ENDP
171
-BusFault_Handler\
172
-                PROC
173
-                EXPORT  BusFault_Handler           [WEAK]
174
-                B       .
175
-                ENDP
176
-UsageFault_Handler\
177
-                PROC
178
-                EXPORT  UsageFault_Handler         [WEAK]
179
-                B       .
180
-                ENDP
181
-SVC_Handler     PROC
182
-                EXPORT  SVC_Handler                [WEAK]
183
-                B       .
184
-                ENDP
185
-DebugMon_Handler\
186
-                PROC
187
-                EXPORT  DebugMon_Handler           [WEAK]
188
-                B       .
189
-                ENDP
190
-PendSV_Handler  PROC
191
-                EXPORT  PendSV_Handler             [WEAK]
192
-                B       .
193
-                ENDP
194
-SysTick_Handler PROC
195
-                EXPORT  SysTick_Handler            [WEAK]
196
-                B       .
197
-                ENDP
198
-
199
-Default_Handler PROC
200
-
201
-                EXPORT  WWDG_IRQHandler            [WEAK]
202
-                EXPORT  PVD_IRQHandler             [WEAK]
203
-                EXPORT  TAMPER_IRQHandler          [WEAK]
204
-                EXPORT  RTC_IRQHandler             [WEAK]
205
-                EXPORT  FLASH_IRQHandler           [WEAK]
206
-                EXPORT  RCC_IRQHandler             [WEAK]
207
-                EXPORT  EXTI0_IRQHandler           [WEAK]
208
-                EXPORT  EXTI1_IRQHandler           [WEAK]
209
-                EXPORT  EXTI2_IRQHandler           [WEAK]
210
-                EXPORT  EXTI3_IRQHandler           [WEAK]
211
-                EXPORT  EXTI4_IRQHandler           [WEAK]
212
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
213
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
214
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
215
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
216
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
217
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
218
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
219
-                EXPORT  ADC1_IRQHandler            [WEAK]            
220
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
221
-                EXPORT  TIM2_IRQHandler            [WEAK]
222
-                EXPORT  TIM3_IRQHandler            [WEAK]
223
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
224
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
225
-                EXPORT  SPI1_IRQHandler            [WEAK]
226
-                EXPORT  USART1_IRQHandler          [WEAK]
227
-                EXPORT  USART2_IRQHandler          [WEAK]
228
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
229
-                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
230
-
231
-WWDG_IRQHandler
232
-PVD_IRQHandler
233
-TAMPER_IRQHandler
234
-RTC_IRQHandler
235
-FLASH_IRQHandler
236
-RCC_IRQHandler
237
-EXTI0_IRQHandler
238
-EXTI1_IRQHandler
239
-EXTI2_IRQHandler
240
-EXTI3_IRQHandler
241
-EXTI4_IRQHandler
242
-DMA1_Channel1_IRQHandler
243
-DMA1_Channel2_IRQHandler
244
-DMA1_Channel3_IRQHandler
245
-DMA1_Channel4_IRQHandler
246
-DMA1_Channel5_IRQHandler
247
-DMA1_Channel6_IRQHandler
248
-DMA1_Channel7_IRQHandler
249
-ADC1_IRQHandler
250
-EXTI9_5_IRQHandler
251
-TIM2_IRQHandler
252
-TIM3_IRQHandler
253
-I2C1_EV_IRQHandler
254
-I2C1_ER_IRQHandler
255
-SPI1_IRQHandler
256
-USART1_IRQHandler
257
-USART2_IRQHandler
258
-EXTI15_10_IRQHandler
259
-RTC_Alarm_IRQHandler
260
-
261
-                B       .
262
-
263
-                ENDP
264
-
265
-                ALIGN
266
-
267
-;*******************************************************************************
268
-; User Stack and Heap initialization
269
-;*******************************************************************************
270
-                 IF      :DEF:__MICROLIB
271
-                
272
-                 EXPORT  __initial_sp
273
-                 EXPORT  __heap_base
274
-                 EXPORT  __heap_limit
275
-                
276
-                 ELSE
277
-                
278
-                 IMPORT  __use_two_region_memory
279
-                 EXPORT  __user_initial_stackheap
280
-                 
281
-__user_initial_stackheap
282
-
283
-                 LDR     R0, =  Heap_Mem
284
-                 LDR     R1, =(Stack_Mem + Stack_Size)
285
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
286
-                 LDR     R3, = Stack_Mem
287
-                 BX      LR
288
-
289
-                 ALIGN
290
-
291
-                 ENDIF
292
-
293
-                 END
294
-
295
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 305
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xb.s View File

@@ -1,305 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f101xb.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F101xB Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_IRQHandler            ; ADC1
115
-                DCD     0                          ; Reserved
116
-                DCD     0                          ; Reserved
117
-                DCD     0                          ; Reserved
118
-                DCD     0                          ; Reserved
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     0                          ; Reserved
121
-                DCD     0                          ; Reserved
122
-                DCD     0                          ; Reserved
123
-                DCD     0                          ; Reserved
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     TIM4_IRQHandler            ; TIM4
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
130
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     SPI2_IRQHandler            ; SPI2
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     USART3_IRQHandler          ; USART3
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
138
-__Vectors_End
139
-
140
-__Vectors_Size  EQU  __Vectors_End - __Vectors
141
-
142
-                AREA    |.text|, CODE, READONLY
143
-
144
-; Reset handler
145
-Reset_Handler    PROC
146
-                 EXPORT  Reset_Handler             [WEAK]
147
-     IMPORT  __main
148
-     IMPORT  SystemInit
149
-                 LDR     R0, =SystemInit
150
-                 BLX     R0
151
-                 LDR     R0, =__main
152
-                 BX      R0
153
-                 ENDP
154
-
155
-; Dummy Exception Handlers (infinite loops which can be modified)
156
-
157
-NMI_Handler     PROC
158
-                EXPORT  NMI_Handler                [WEAK]
159
-                B       .
160
-                ENDP
161
-HardFault_Handler\
162
-                PROC
163
-                EXPORT  HardFault_Handler          [WEAK]
164
-                B       .
165
-                ENDP
166
-MemManage_Handler\
167
-                PROC
168
-                EXPORT  MemManage_Handler          [WEAK]
169
-                B       .
170
-                ENDP
171
-BusFault_Handler\
172
-                PROC
173
-                EXPORT  BusFault_Handler           [WEAK]
174
-                B       .
175
-                ENDP
176
-UsageFault_Handler\
177
-                PROC
178
-                EXPORT  UsageFault_Handler         [WEAK]
179
-                B       .
180
-                ENDP
181
-SVC_Handler     PROC
182
-                EXPORT  SVC_Handler                [WEAK]
183
-                B       .
184
-                ENDP
185
-DebugMon_Handler\
186
-                PROC
187
-                EXPORT  DebugMon_Handler           [WEAK]
188
-                B       .
189
-                ENDP
190
-PendSV_Handler  PROC
191
-                EXPORT  PendSV_Handler             [WEAK]
192
-                B       .
193
-                ENDP
194
-SysTick_Handler PROC
195
-                EXPORT  SysTick_Handler            [WEAK]
196
-                B       .
197
-                ENDP
198
-
199
-Default_Handler PROC
200
-
201
-                EXPORT  WWDG_IRQHandler            [WEAK]
202
-                EXPORT  PVD_IRQHandler             [WEAK]
203
-                EXPORT  TAMPER_IRQHandler          [WEAK]
204
-                EXPORT  RTC_IRQHandler             [WEAK]
205
-                EXPORT  FLASH_IRQHandler           [WEAK]
206
-                EXPORT  RCC_IRQHandler             [WEAK]
207
-                EXPORT  EXTI0_IRQHandler           [WEAK]
208
-                EXPORT  EXTI1_IRQHandler           [WEAK]
209
-                EXPORT  EXTI2_IRQHandler           [WEAK]
210
-                EXPORT  EXTI3_IRQHandler           [WEAK]
211
-                EXPORT  EXTI4_IRQHandler           [WEAK]
212
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
213
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
214
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
215
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
216
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
217
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
218
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
219
-                EXPORT  ADC1_IRQHandler            [WEAK]
220
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
221
-                EXPORT  TIM2_IRQHandler            [WEAK]
222
-                EXPORT  TIM3_IRQHandler            [WEAK]
223
-                EXPORT  TIM4_IRQHandler            [WEAK]
224
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
225
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
226
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
227
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
228
-                EXPORT  SPI1_IRQHandler            [WEAK]
229
-                EXPORT  SPI2_IRQHandler            [WEAK]
230
-                EXPORT  USART1_IRQHandler          [WEAK]
231
-                EXPORT  USART2_IRQHandler          [WEAK]
232
-                EXPORT  USART3_IRQHandler          [WEAK]
233
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
234
-                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
235
-
236
-WWDG_IRQHandler
237
-PVD_IRQHandler
238
-TAMPER_IRQHandler
239
-RTC_IRQHandler
240
-FLASH_IRQHandler
241
-RCC_IRQHandler
242
-EXTI0_IRQHandler
243
-EXTI1_IRQHandler
244
-EXTI2_IRQHandler
245
-EXTI3_IRQHandler
246
-EXTI4_IRQHandler
247
-DMA1_Channel1_IRQHandler
248
-DMA1_Channel2_IRQHandler
249
-DMA1_Channel3_IRQHandler
250
-DMA1_Channel4_IRQHandler
251
-DMA1_Channel5_IRQHandler
252
-DMA1_Channel6_IRQHandler
253
-DMA1_Channel7_IRQHandler
254
-ADC1_IRQHandler
255
-EXTI9_5_IRQHandler
256
-TIM2_IRQHandler
257
-TIM3_IRQHandler
258
-TIM4_IRQHandler
259
-I2C1_EV_IRQHandler
260
-I2C1_ER_IRQHandler
261
-I2C2_EV_IRQHandler
262
-I2C2_ER_IRQHandler
263
-SPI1_IRQHandler
264
-SPI2_IRQHandler
265
-USART1_IRQHandler
266
-USART2_IRQHandler
267
-USART3_IRQHandler
268
-EXTI15_10_IRQHandler
269
-RTC_Alarm_IRQHandler
270
-
271
-                B       .
272
-
273
-                ENDP
274
-
275
-                ALIGN
276
-
277
-;*******************************************************************************
278
-; User Stack and Heap initialization
279
-;*******************************************************************************
280
-                 IF      :DEF:__MICROLIB           
281
-                
282
-                 EXPORT  __initial_sp
283
-                 EXPORT  __heap_base
284
-                 EXPORT  __heap_limit
285
-                
286
-                 ELSE
287
-                
288
-                 IMPORT  __use_two_region_memory
289
-                 EXPORT  __user_initial_stackheap
290
-                 
291
-__user_initial_stackheap
292
-
293
-                 LDR     R0, =  Heap_Mem
294
-                 LDR     R1, =(Stack_Mem + Stack_Size)
295
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
296
-                 LDR     R3, = Stack_Mem
297
-                 BX      LR
298
-
299
-                 ALIGN
300
-
301
-                 ENDIF
302
-
303
-                 END
304
-
305
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 343
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xe.s View File

@@ -1,343 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f101xe.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F101xE Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-                                                  
56
-; <h> Heap Configuration
57
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
58
-; </h>
59
-
60
-Heap_Size       EQU     0x00000200
61
-
62
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
63
-__heap_base
64
-Heap_Mem        SPACE   Heap_Size
65
-__heap_limit
66
-
67
-                PRESERVE8
68
-                THUMB
69
-
70
-
71
-; Vector Table Mapped to Address 0 at Reset
72
-                AREA    RESET, DATA, READONLY
73
-                EXPORT  __Vectors
74
-                EXPORT  __Vectors_End
75
-                EXPORT  __Vectors_Size
76
-
77
-__Vectors       DCD     __initial_sp               ; Top of Stack
78
-                DCD     Reset_Handler              ; Reset Handler
79
-                DCD     NMI_Handler                ; NMI Handler
80
-                DCD     HardFault_Handler          ; Hard Fault Handler
81
-                DCD     MemManage_Handler          ; MPU Fault Handler
82
-                DCD     BusFault_Handler           ; Bus Fault Handler
83
-                DCD     UsageFault_Handler         ; Usage Fault Handler
84
-                DCD     0                          ; Reserved
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     SVC_Handler                ; SVCall Handler
89
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
90
-                DCD     0                          ; Reserved
91
-                DCD     PendSV_Handler             ; PendSV Handler
92
-                DCD     SysTick_Handler            ; SysTick Handler
93
-
94
-                ; External Interrupts
95
-                DCD     WWDG_IRQHandler            ; Window Watchdog
96
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
97
-                DCD     TAMPER_IRQHandler          ; Tamper
98
-                DCD     RTC_IRQHandler             ; RTC
99
-                DCD     FLASH_IRQHandler           ; Flash
100
-                DCD     RCC_IRQHandler             ; RCC
101
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
102
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
103
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
104
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
105
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
106
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
107
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
108
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
109
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
110
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
111
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
112
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
113
-                DCD     ADC1_IRQHandler            ; ADC1
114
-                DCD     0                          ; Reserved
115
-                DCD     0                          ; Reserved
116
-                DCD     0                          ; Reserved
117
-                DCD     0                          ; Reserved
118
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
119
-                DCD     0                          ; Reserved
120
-                DCD     0                          ; Reserved
121
-                DCD     0                          ; Reserved
122
-                DCD     0                          ; Reserved
123
-                DCD     TIM2_IRQHandler            ; TIM2
124
-                DCD     TIM3_IRQHandler            ; TIM3
125
-                DCD     TIM4_IRQHandler            ; TIM4
126
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
127
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
128
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
129
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
130
-                DCD     SPI1_IRQHandler            ; SPI1
131
-                DCD     SPI2_IRQHandler            ; SPI2
132
-                DCD     USART1_IRQHandler          ; USART1
133
-                DCD     USART2_IRQHandler          ; USART2
134
-                DCD     USART3_IRQHandler          ; USART3
135
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
136
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
137
-                DCD     0                          ; Reserved
138
-                DCD     0                          ; Reserved
139
-                DCD     0                          ; Reserved
140
-                DCD     0                          ; Reserved
141
-                DCD     0                          ; Reserved
142
-                DCD     0                          ; Reserved
143
-                DCD     FSMC_IRQHandler            ; FSMC
144
-                DCD     0                          ; Reserved
145
-                DCD     TIM5_IRQHandler            ; TIM5
146
-                DCD     SPI3_IRQHandler            ; SPI3
147
-                DCD     UART4_IRQHandler           ; UART4
148
-                DCD     UART5_IRQHandler           ; UART5
149
-                DCD     TIM6_IRQHandler            ; TIM6
150
-                DCD     TIM7_IRQHandler            ; TIM7
151
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
152
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
153
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
154
-                DCD     DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
155
-__Vectors_End
156
-
157
-__Vectors_Size  EQU  __Vectors_End - __Vectors
158
-
159
-                AREA    |.text|, CODE, READONLY
160
-                
161
-; Reset handler
162
-Reset_Handler   PROC
163
-                EXPORT  Reset_Handler             [WEAK]
164
-                IMPORT  __main
165
-                IMPORT  SystemInit
166
-                LDR     R0, =SystemInit
167
-                BLX     R0               
168
-                LDR     R0, =__main
169
-                BX      R0
170
-                ENDP
171
-                
172
-; Dummy Exception Handlers (infinite loops which can be modified)
173
-
174
-NMI_Handler     PROC
175
-                EXPORT  NMI_Handler                [WEAK]
176
-                B       .
177
-                ENDP
178
-HardFault_Handler\
179
-                PROC
180
-                EXPORT  HardFault_Handler          [WEAK]
181
-                B       .
182
-                ENDP
183
-MemManage_Handler\
184
-                PROC
185
-                EXPORT  MemManage_Handler          [WEAK]
186
-                B       .
187
-                ENDP
188
-BusFault_Handler\
189
-                PROC
190
-                EXPORT  BusFault_Handler           [WEAK]
191
-                B       .
192
-                ENDP
193
-UsageFault_Handler\
194
-                PROC
195
-                EXPORT  UsageFault_Handler         [WEAK]
196
-                B       .
197
-                ENDP
198
-SVC_Handler     PROC
199
-                EXPORT  SVC_Handler                [WEAK]
200
-                B       .
201
-                ENDP
202
-DebugMon_Handler\
203
-                PROC
204
-                EXPORT  DebugMon_Handler           [WEAK]
205
-                B       .
206
-                ENDP
207
-PendSV_Handler  PROC
208
-                EXPORT  PendSV_Handler             [WEAK]
209
-                B       .
210
-                ENDP
211
-SysTick_Handler PROC
212
-                EXPORT  SysTick_Handler            [WEAK]
213
-                B       .
214
-                ENDP
215
-
216
-Default_Handler PROC
217
-
218
-                EXPORT  WWDG_IRQHandler            [WEAK]
219
-                EXPORT  PVD_IRQHandler             [WEAK]
220
-                EXPORT  TAMPER_IRQHandler          [WEAK]
221
-                EXPORT  RTC_IRQHandler             [WEAK]
222
-                EXPORT  FLASH_IRQHandler           [WEAK]
223
-                EXPORT  RCC_IRQHandler             [WEAK]
224
-                EXPORT  EXTI0_IRQHandler           [WEAK]
225
-                EXPORT  EXTI1_IRQHandler           [WEAK]
226
-                EXPORT  EXTI2_IRQHandler           [WEAK]
227
-                EXPORT  EXTI3_IRQHandler           [WEAK]
228
-                EXPORT  EXTI4_IRQHandler           [WEAK]
229
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
230
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
231
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
232
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
233
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
234
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
235
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
236
-                EXPORT  ADC1_IRQHandler            [WEAK]
237
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
238
-                EXPORT  TIM2_IRQHandler            [WEAK]
239
-                EXPORT  TIM3_IRQHandler            [WEAK]
240
-                EXPORT  TIM4_IRQHandler            [WEAK]
241
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
242
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
243
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
244
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
245
-                EXPORT  SPI1_IRQHandler            [WEAK]
246
-                EXPORT  SPI2_IRQHandler            [WEAK]
247
-                EXPORT  USART1_IRQHandler          [WEAK]
248
-                EXPORT  USART2_IRQHandler          [WEAK]
249
-                EXPORT  USART3_IRQHandler          [WEAK]
250
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
251
-                EXPORT  RTC_Alarm_IRQHandler       [WEAK]
252
-                EXPORT  FSMC_IRQHandler            [WEAK]
253
-                EXPORT  TIM5_IRQHandler            [WEAK]
254
-                EXPORT  SPI3_IRQHandler            [WEAK]
255
-                EXPORT  UART4_IRQHandler           [WEAK]
256
-                EXPORT  UART5_IRQHandler           [WEAK]
257
-                EXPORT  TIM6_IRQHandler            [WEAK]
258
-                EXPORT  TIM7_IRQHandler            [WEAK]
259
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
260
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
261
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
262
-                EXPORT  DMA2_Channel4_5_IRQHandler [WEAK]
263
-
264
-WWDG_IRQHandler
265
-PVD_IRQHandler
266
-TAMPER_IRQHandler
267
-RTC_IRQHandler
268
-FLASH_IRQHandler
269
-RCC_IRQHandler
270
-EXTI0_IRQHandler
271
-EXTI1_IRQHandler
272
-EXTI2_IRQHandler
273
-EXTI3_IRQHandler
274
-EXTI4_IRQHandler
275
-DMA1_Channel1_IRQHandler
276
-DMA1_Channel2_IRQHandler
277
-DMA1_Channel3_IRQHandler
278
-DMA1_Channel4_IRQHandler
279
-DMA1_Channel5_IRQHandler
280
-DMA1_Channel6_IRQHandler
281
-DMA1_Channel7_IRQHandler
282
-ADC1_IRQHandler
283
-EXTI9_5_IRQHandler
284
-TIM2_IRQHandler
285
-TIM3_IRQHandler
286
-TIM4_IRQHandler
287
-I2C1_EV_IRQHandler
288
-I2C1_ER_IRQHandler
289
-I2C2_EV_IRQHandler
290
-I2C2_ER_IRQHandler
291
-SPI1_IRQHandler
292
-SPI2_IRQHandler
293
-USART1_IRQHandler
294
-USART2_IRQHandler
295
-USART3_IRQHandler
296
-EXTI15_10_IRQHandler
297
-RTC_Alarm_IRQHandler
298
-FSMC_IRQHandler
299
-TIM5_IRQHandler
300
-SPI3_IRQHandler
301
-UART4_IRQHandler
302
-UART5_IRQHandler
303
-TIM6_IRQHandler
304
-TIM7_IRQHandler
305
-DMA2_Channel1_IRQHandler
306
-DMA2_Channel2_IRQHandler
307
-DMA2_Channel3_IRQHandler
308
-DMA2_Channel4_5_IRQHandler
309
-                B       .
310
-
311
-                ENDP
312
-
313
-                ALIGN
314
-
315
-;*******************************************************************************
316
-; User Stack and Heap initialization
317
-;*******************************************************************************
318
-                 IF      :DEF:__MICROLIB
319
-                
320
-                 EXPORT  __initial_sp
321
-                 EXPORT  __heap_base
322
-                 EXPORT  __heap_limit
323
-                
324
-                 ELSE
325
-                
326
-                 IMPORT  __use_two_region_memory
327
-                 EXPORT  __user_initial_stackheap
328
-                 
329
-__user_initial_stackheap
330
-
331
-                 LDR     R0, =  Heap_Mem
332
-                 LDR     R1, =(Stack_Mem + Stack_Size)
333
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
334
-                 LDR     R3, = Stack_Mem
335
-                 BX      LR
336
-
337
-                 ALIGN
338
-
339
-                 ENDIF
340
-
341
-                 END
342
-
343
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 355
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f101xg.s View File

@@ -1,355 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f101xg.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F101xG Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-                                                  
56
-; <h> Heap Configuration
57
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
58
-; </h>
59
-
60
-Heap_Size       EQU     0x00000200
61
-
62
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
63
-__heap_base
64
-Heap_Mem        SPACE   Heap_Size
65
-__heap_limit
66
-
67
-                PRESERVE8
68
-                THUMB
69
-
70
-
71
-; Vector Table Mapped to Address 0 at Reset
72
-                AREA    RESET, DATA, READONLY
73
-                EXPORT  __Vectors
74
-                EXPORT  __Vectors_End
75
-                EXPORT  __Vectors_Size
76
-
77
-__Vectors       DCD     __initial_sp               ; Top of Stack
78
-                DCD     Reset_Handler              ; Reset Handler
79
-                DCD     NMI_Handler                ; NMI Handler
80
-                DCD     HardFault_Handler          ; Hard Fault Handler
81
-                DCD     MemManage_Handler          ; MPU Fault Handler
82
-                DCD     BusFault_Handler           ; Bus Fault Handler
83
-                DCD     UsageFault_Handler         ; Usage Fault Handler
84
-                DCD     0                          ; Reserved
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     SVC_Handler                ; SVCall Handler
89
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
90
-                DCD     0                          ; Reserved
91
-                DCD     PendSV_Handler             ; PendSV Handler
92
-                DCD     SysTick_Handler            ; SysTick Handler
93
-
94
-                ; External Interrupts
95
-                DCD     WWDG_IRQHandler               ; Window Watchdog
96
-                DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
97
-                DCD     TAMPER_IRQHandler             ; Tamper
98
-                DCD     RTC_IRQHandler                ; RTC
99
-                DCD     FLASH_IRQHandler              ; Flash
100
-                DCD     RCC_IRQHandler                ; RCC
101
-                DCD     EXTI0_IRQHandler              ; EXTI Line 0
102
-                DCD     EXTI1_IRQHandler              ; EXTI Line 1
103
-                DCD     EXTI2_IRQHandler              ; EXTI Line 2
104
-                DCD     EXTI3_IRQHandler              ; EXTI Line 3
105
-                DCD     EXTI4_IRQHandler              ; EXTI Line 4
106
-                DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
107
-                DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
108
-                DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
109
-                DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
110
-                DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
111
-                DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
112
-                DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
113
-                DCD     ADC1_2_IRQHandler             ; ADC1_2
114
-                DCD     0                          ; Reserved
115
-                DCD     0                          ; Reserved
116
-                DCD     0                          ; Reserved
117
-                DCD     0                          ; Reserved
118
-                DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
119
-                DCD     TIM9_IRQHandler               ; TIM9
120
-                DCD     TIM10_IRQHandler              ; TIM10
121
-                DCD     TIM11_IRQHandler              ; TIM11
122
-                DCD     0                          ; Reserved
123
-                DCD     TIM2_IRQHandler               ; TIM2
124
-                DCD     TIM3_IRQHandler               ; TIM3
125
-                DCD     TIM4_IRQHandler               ; TIM4
126
-                DCD     I2C1_EV_IRQHandler            ; I2C1 Event
127
-                DCD     I2C1_ER_IRQHandler            ; I2C1 Error
128
-                DCD     I2C2_EV_IRQHandler            ; I2C2 Event
129
-                DCD     I2C2_ER_IRQHandler            ; I2C2 Error
130
-                DCD     SPI1_IRQHandler               ; SPI1
131
-                DCD     SPI2_IRQHandler               ; SPI2
132
-                DCD     USART1_IRQHandler             ; USART1
133
-                DCD     USART2_IRQHandler             ; USART2
134
-                DCD     USART3_IRQHandler             ; USART3
135
-                DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
136
-                DCD     RTC_Alarm_IRQHandler           ; RTC Alarm through EXTI Line
137
-                DCD     0                          ; Reserved
138
-                DCD     TIM12_IRQHandler                ; TIM12
139
-                DCD     TIM13_IRQHandler                ; TIM13 
140
-                DCD     TIM14_IRQHandler                ; TIM14
141
-                DCD     0                          ; Reserved
142
-                DCD     0                          ; Reserved
143
-                DCD     FSMC_IRQHandler               ; FSMC
144
-                DCD     0                          ; Reserved
145
-                DCD     TIM5_IRQHandler               ; TIM5
146
-                DCD     SPI3_IRQHandler               ; SPI3
147
-                DCD     UART4_IRQHandler              ; UART4
148
-                DCD     UART5_IRQHandler              ; UART5
149
-                DCD     TIM6_IRQHandler               ; TIM6
150
-                DCD     TIM7_IRQHandler               ; TIM7
151
-                DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1
152
-                DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2
153
-                DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3
154
-                DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5
155
-__Vectors_End
156
-
157
-__Vectors_Size  EQU  __Vectors_End - __Vectors
158
-
159
-                AREA    |.text|, CODE, READONLY
160
-                
161
-; Reset handler
162
-Reset_Handler   PROC
163
-                EXPORT  Reset_Handler             [WEAK]
164
-                IMPORT  __main
165
-                IMPORT  SystemInit
166
-                LDR     R0, =SystemInit
167
-                BLX     R0               
168
-                LDR     R0, =__main
169
-                BX      R0
170
-                ENDP
171
-                
172
-; Dummy Exception Handlers (infinite loops which can be modified)
173
-
174
-NMI_Handler     PROC
175
-                EXPORT  NMI_Handler                [WEAK]
176
-                B       .
177
-                ENDP
178
-HardFault_Handler\
179
-                PROC
180
-                EXPORT  HardFault_Handler          [WEAK]
181
-                B       .
182
-                ENDP
183
-MemManage_Handler\
184
-                PROC
185
-                EXPORT  MemManage_Handler          [WEAK]
186
-                B       .
187
-                ENDP
188
-BusFault_Handler\
189
-                PROC
190
-                EXPORT  BusFault_Handler           [WEAK]
191
-                B       .
192
-                ENDP
193
-UsageFault_Handler\
194
-                PROC
195
-                EXPORT  UsageFault_Handler         [WEAK]
196
-                B       .
197
-                ENDP
198
-SVC_Handler     PROC
199
-                EXPORT  SVC_Handler                [WEAK]
200
-                B       .
201
-                ENDP
202
-DebugMon_Handler\
203
-                PROC
204
-                EXPORT  DebugMon_Handler           [WEAK]
205
-                B       .
206
-                ENDP
207
-PendSV_Handler  PROC
208
-                EXPORT  PendSV_Handler             [WEAK]
209
-                B       .
210
-                ENDP
211
-SysTick_Handler PROC
212
-                EXPORT  SysTick_Handler            [WEAK]
213
-                B       .
214
-                ENDP
215
-
216
-Default_Handler PROC
217
-
218
-                EXPORT  WWDG_IRQHandler               [WEAK]
219
-                EXPORT  PVD_IRQHandler                [WEAK]
220
-                EXPORT  TAMPER_IRQHandler             [WEAK]
221
-                EXPORT  RTC_IRQHandler                [WEAK]
222
-                EXPORT  FLASH_IRQHandler              [WEAK]
223
-                EXPORT  RCC_IRQHandler                [WEAK]
224
-                EXPORT  EXTI0_IRQHandler              [WEAK]
225
-                EXPORT  EXTI1_IRQHandler              [WEAK]
226
-                EXPORT  EXTI2_IRQHandler              [WEAK]
227
-                EXPORT  EXTI3_IRQHandler              [WEAK]
228
-                EXPORT  EXTI4_IRQHandler              [WEAK]
229
-                EXPORT  DMA1_Channel1_IRQHandler      [WEAK]
230
-                EXPORT  DMA1_Channel2_IRQHandler      [WEAK]
231
-                EXPORT  DMA1_Channel3_IRQHandler      [WEAK]
232
-                EXPORT  DMA1_Channel4_IRQHandler      [WEAK]
233
-                EXPORT  DMA1_Channel5_IRQHandler      [WEAK]
234
-                EXPORT  DMA1_Channel6_IRQHandler      [WEAK]
235
-                EXPORT  DMA1_Channel7_IRQHandler      [WEAK]
236
-                EXPORT  ADC1_2_IRQHandler             [WEAK]
237
-                EXPORT  EXTI9_5_IRQHandler            [WEAK]
238
-                EXPORT  TIM9_IRQHandler               [WEAK]
239
-                EXPORT  TIM10_IRQHandler              [WEAK]
240
-                EXPORT  TIM11_IRQHandler              [WEAK]
241
-                EXPORT  TIM2_IRQHandler               [WEAK]
242
-                EXPORT  TIM3_IRQHandler               [WEAK]
243
-                EXPORT  TIM4_IRQHandler               [WEAK]
244
-                EXPORT  I2C1_EV_IRQHandler            [WEAK]
245
-                EXPORT  I2C1_ER_IRQHandler            [WEAK]
246
-                EXPORT  I2C2_EV_IRQHandler            [WEAK]
247
-                EXPORT  I2C2_ER_IRQHandler            [WEAK]
248
-                EXPORT  SPI1_IRQHandler               [WEAK]
249
-                EXPORT  SPI2_IRQHandler               [WEAK]
250
-                EXPORT  USART1_IRQHandler             [WEAK]
251
-                EXPORT  USART2_IRQHandler             [WEAK]
252
-                EXPORT  USART3_IRQHandler             [WEAK]
253
-                EXPORT  EXTI15_10_IRQHandler          [WEAK]
254
-                EXPORT  RTC_Alarm_IRQHandler          [WEAK]
255
-                EXPORT  TIM12_IRQHandler              [WEAK]
256
-                EXPORT  TIM13_IRQHandler              [WEAK]
257
-                EXPORT  TIM14_IRQHandler              [WEAK]
258
-                EXPORT  FSMC_IRQHandler               [WEAK]
259
-                EXPORT  TIM5_IRQHandler               [WEAK]
260
-                EXPORT  SPI3_IRQHandler               [WEAK]
261
-                EXPORT  UART4_IRQHandler              [WEAK]
262
-                EXPORT  UART5_IRQHandler              [WEAK]
263
-                EXPORT  TIM6_IRQHandler               [WEAK]
264
-                EXPORT  TIM7_IRQHandler               [WEAK]
265
-                EXPORT  DMA2_Channel1_IRQHandler      [WEAK]
266
-                EXPORT  DMA2_Channel2_IRQHandler      [WEAK]
267
-                EXPORT  DMA2_Channel3_IRQHandler      [WEAK]
268
-                EXPORT  DMA2_Channel4_5_IRQHandler    [WEAK]
269
-
270
-WWDG_IRQHandler
271
-PVD_IRQHandler
272
-TAMPER_IRQHandler
273
-RTC_IRQHandler
274
-FLASH_IRQHandler
275
-RCC_IRQHandler
276
-EXTI0_IRQHandler
277
-EXTI1_IRQHandler
278
-EXTI2_IRQHandler
279
-EXTI3_IRQHandler
280
-EXTI4_IRQHandler
281
-DMA1_Channel1_IRQHandler
282
-DMA1_Channel2_IRQHandler
283
-DMA1_Channel3_IRQHandler
284
-DMA1_Channel4_IRQHandler
285
-DMA1_Channel5_IRQHandler
286
-DMA1_Channel6_IRQHandler
287
-DMA1_Channel7_IRQHandler
288
-ADC1_2_IRQHandler
289
-EXTI9_5_IRQHandler
290
-TIM9_IRQHandler
291
-TIM10_IRQHandler
292
-TIM11_IRQHandler
293
-TIM2_IRQHandler
294
-TIM3_IRQHandler
295
-TIM4_IRQHandler
296
-I2C1_EV_IRQHandler
297
-I2C1_ER_IRQHandler
298
-I2C2_EV_IRQHandler
299
-I2C2_ER_IRQHandler
300
-SPI1_IRQHandler
301
-SPI2_IRQHandler
302
-USART1_IRQHandler
303
-USART2_IRQHandler
304
-USART3_IRQHandler
305
-EXTI15_10_IRQHandler
306
-RTC_Alarm_IRQHandler
307
-TIM12_IRQHandler
308
-TIM13_IRQHandler
309
-TIM14_IRQHandler
310
-FSMC_IRQHandler
311
-TIM5_IRQHandler
312
-SPI3_IRQHandler
313
-UART4_IRQHandler
314
-UART5_IRQHandler
315
-TIM6_IRQHandler
316
-TIM7_IRQHandler
317
-DMA2_Channel1_IRQHandler
318
-DMA2_Channel2_IRQHandler
319
-DMA2_Channel3_IRQHandler
320
-DMA2_Channel4_5_IRQHandler
321
-                B       .
322
-
323
-                ENDP
324
-
325
-                ALIGN
326
-
327
-;*******************************************************************************
328
-; User Stack and Heap initialization
329
-;*******************************************************************************
330
-                 IF      :DEF:__MICROLIB
331
-                
332
-                 EXPORT  __initial_sp
333
-                 EXPORT  __heap_base
334
-                 EXPORT  __heap_limit
335
-                
336
-                 ELSE
337
-                
338
-                 IMPORT  __use_two_region_memory
339
-                 EXPORT  __user_initial_stackheap
340
-                 
341
-__user_initial_stackheap
342
-
343
-                 LDR     R0, =  Heap_Mem
344
-                 LDR     R1, =(Stack_Mem + Stack_Size)
345
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
346
-                 LDR     R3, = Stack_Mem
347
-                 BX      LR
348
-
349
-                 ALIGN
350
-
351
-                 ENDIF
352
-
353
-                 END
354
-
355
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 302
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f102x6.s View File

@@ -1,302 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f102x6.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F102x6 Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_IRQHandler            ; ADC1
115
-                DCD     USB_HP_IRQHandler          ; USB High Priority
116
-                DCD     USB_LP_IRQHandler          ; USB Low  Priority
117
-                DCD     0                          ; Reserved
118
-                DCD     0                          ; Reserved
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     0                          ; Reserved
121
-                DCD     0                          ; Reserved
122
-                DCD     0                          ; Reserved
123
-                DCD     0                          ; Reserved
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     0                          ; Reserved
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     0                          ; Reserved
130
-                DCD     0                          ; Reserved
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     0                          ; Reserved
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     0                          ; Reserved
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
138
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
139
-__Vectors_End
140
-
141
-__Vectors_Size  EQU  __Vectors_End - __Vectors
142
-
143
-                AREA    |.text|, CODE, READONLY
144
-
145
-; Reset handler routine
146
-Reset_Handler    PROC
147
-                 EXPORT  Reset_Handler             [WEAK]
148
-     IMPORT  __main
149
-     IMPORT  SystemInit
150
-                 LDR     R0, =SystemInit
151
-                 BLX     R0
152
-                 LDR     R0, =__main
153
-                 BX      R0
154
-                 ENDP
155
-
156
-; Dummy Exception Handlers (infinite loops which can be modified)
157
-
158
-NMI_Handler     PROC
159
-                EXPORT  NMI_Handler                [WEAK]
160
-                B       .
161
-                ENDP
162
-HardFault_Handler\
163
-                PROC
164
-                EXPORT  HardFault_Handler          [WEAK]
165
-                B       .
166
-                ENDP
167
-MemManage_Handler\
168
-                PROC
169
-                EXPORT  MemManage_Handler          [WEAK]
170
-                B       .
171
-                ENDP
172
-BusFault_Handler\
173
-                PROC
174
-                EXPORT  BusFault_Handler           [WEAK]
175
-                B       .
176
-                ENDP
177
-UsageFault_Handler\
178
-                PROC
179
-                EXPORT  UsageFault_Handler         [WEAK]
180
-                B       .
181
-                ENDP
182
-SVC_Handler     PROC
183
-                EXPORT  SVC_Handler                [WEAK]
184
-                B       .
185
-                ENDP
186
-DebugMon_Handler\
187
-                PROC
188
-                EXPORT  DebugMon_Handler           [WEAK]
189
-                B       .
190
-                ENDP
191
-PendSV_Handler  PROC
192
-                EXPORT  PendSV_Handler             [WEAK]
193
-                B       .
194
-                ENDP
195
-SysTick_Handler PROC
196
-                EXPORT  SysTick_Handler            [WEAK]
197
-                B       .
198
-                ENDP
199
-
200
-Default_Handler PROC
201
-
202
-                EXPORT  WWDG_IRQHandler            [WEAK]
203
-                EXPORT  PVD_IRQHandler             [WEAK]
204
-                EXPORT  TAMPER_IRQHandler          [WEAK]
205
-                EXPORT  RTC_IRQHandler             [WEAK]
206
-                EXPORT  FLASH_IRQHandler           [WEAK]
207
-                EXPORT  RCC_IRQHandler             [WEAK]
208
-                EXPORT  EXTI0_IRQHandler           [WEAK]
209
-                EXPORT  EXTI1_IRQHandler           [WEAK]
210
-                EXPORT  EXTI2_IRQHandler           [WEAK]
211
-                EXPORT  EXTI3_IRQHandler           [WEAK]
212
-                EXPORT  EXTI4_IRQHandler           [WEAK]
213
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
214
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
215
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
216
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
217
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
218
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
219
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
220
-                EXPORT  ADC1_IRQHandler            [WEAK]
221
-                EXPORT  USB_HP_IRQHandler          [WEAK]
222
-                EXPORT  USB_LP_IRQHandler          [WEAK]
223
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
224
-                EXPORT  TIM2_IRQHandler            [WEAK]
225
-                EXPORT  TIM3_IRQHandler            [WEAK]
226
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
227
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
228
-                EXPORT  SPI1_IRQHandler            [WEAK]
229
-                EXPORT  USART1_IRQHandler          [WEAK]
230
-                EXPORT  USART2_IRQHandler          [WEAK]
231
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
232
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
233
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
234
-
235
-WWDG_IRQHandler
236
-PVD_IRQHandler
237
-TAMPER_IRQHandler
238
-RTC_IRQHandler
239
-FLASH_IRQHandler
240
-RCC_IRQHandler
241
-EXTI0_IRQHandler
242
-EXTI1_IRQHandler
243
-EXTI2_IRQHandler
244
-EXTI3_IRQHandler
245
-EXTI4_IRQHandler
246
-DMA1_Channel1_IRQHandler
247
-DMA1_Channel2_IRQHandler
248
-DMA1_Channel3_IRQHandler
249
-DMA1_Channel4_IRQHandler
250
-DMA1_Channel5_IRQHandler
251
-DMA1_Channel6_IRQHandler
252
-DMA1_Channel7_IRQHandler
253
-ADC1_IRQHandler
254
-USB_HP_IRQHandler
255
-USB_LP_IRQHandler
256
-EXTI9_5_IRQHandler
257
-TIM2_IRQHandler
258
-TIM3_IRQHandler
259
-I2C1_EV_IRQHandler
260
-I2C1_ER_IRQHandler
261
-SPI1_IRQHandler
262
-USART1_IRQHandler
263
-USART2_IRQHandler
264
-EXTI15_10_IRQHandler
265
-RTC_Alarm_IRQHandler
266
-USBWakeUp_IRQHandler
267
-
268
-                B       .
269
-
270
-                ENDP
271
-
272
-                ALIGN
273
-
274
-;*******************************************************************************
275
-; User Stack and Heap initialization
276
-;*******************************************************************************
277
-                 IF      :DEF:__MICROLIB
278
-                
279
-                 EXPORT  __initial_sp
280
-                 EXPORT  __heap_base
281
-                 EXPORT  __heap_limit
282
-                
283
-                 ELSE
284
-                
285
-                 IMPORT  __use_two_region_memory
286
-                 EXPORT  __user_initial_stackheap
287
-                 
288
-__user_initial_stackheap
289
-
290
-                 LDR     R0, =  Heap_Mem
291
-                 LDR     R1, =(Stack_Mem + Stack_Size)
292
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
293
-                 LDR     R3, = Stack_Mem
294
-                 BX      LR
295
-
296
-                 ALIGN
297
-
298
-                 ENDIF
299
-
300
-                 END
301
-
302
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 312
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f102xb.s View File

@@ -1,312 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f102xb.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F102xB Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_IRQHandler            ; ADC1
115
-                DCD     USB_HP_IRQHandler          ; USB High Priority
116
-                DCD     USB_LP_IRQHandler          ; USB Low  Priority
117
-                DCD     0                          ; Reserved
118
-                DCD     0                          ; Reserved
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     0                          ; Reserved
121
-                DCD     0                          ; Reserved
122
-                DCD     0                          ; Reserved
123
-                DCD     0                          ; Reserved
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     TIM4_IRQHandler            ; TIM4
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
130
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     SPI2_IRQHandler            ; SPI2
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     USART3_IRQHandler          ; USART3
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
138
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
139
-__Vectors_End
140
-
141
-__Vectors_Size  EQU  __Vectors_End - __Vectors
142
-
143
-                AREA    |.text|, CODE, READONLY
144
-
145
-; Reset handler
146
-Reset_Handler    PROC
147
-                 EXPORT  Reset_Handler             [WEAK]
148
-     IMPORT  __main
149
-     IMPORT  SystemInit
150
-                 LDR     R0, =SystemInit
151
-                 BLX     R0
152
-                 LDR     R0, =__main
153
-                 BX      R0
154
-                 ENDP
155
-
156
-; Dummy Exception Handlers (infinite loops which can be modified)
157
-
158
-NMI_Handler     PROC
159
-                EXPORT  NMI_Handler                [WEAK]
160
-                B       .
161
-                ENDP
162
-HardFault_Handler\
163
-                PROC
164
-                EXPORT  HardFault_Handler          [WEAK]
165
-                B       .
166
-                ENDP
167
-MemManage_Handler\
168
-                PROC
169
-                EXPORT  MemManage_Handler          [WEAK]
170
-                B       .
171
-                ENDP
172
-BusFault_Handler\
173
-                PROC
174
-                EXPORT  BusFault_Handler           [WEAK]
175
-                B       .
176
-                ENDP
177
-UsageFault_Handler\
178
-                PROC
179
-                EXPORT  UsageFault_Handler         [WEAK]
180
-                B       .
181
-                ENDP
182
-SVC_Handler     PROC
183
-                EXPORT  SVC_Handler                [WEAK]
184
-                B       .
185
-                ENDP
186
-DebugMon_Handler\
187
-                PROC
188
-                EXPORT  DebugMon_Handler           [WEAK]
189
-                B       .
190
-                ENDP
191
-PendSV_Handler  PROC
192
-                EXPORT  PendSV_Handler             [WEAK]
193
-                B       .
194
-                ENDP
195
-SysTick_Handler PROC
196
-                EXPORT  SysTick_Handler            [WEAK]
197
-                B       .
198
-                ENDP
199
-
200
-Default_Handler PROC
201
-
202
-                EXPORT  WWDG_IRQHandler            [WEAK]
203
-                EXPORT  PVD_IRQHandler             [WEAK]
204
-                EXPORT  TAMPER_IRQHandler          [WEAK]
205
-                EXPORT  RTC_IRQHandler             [WEAK]
206
-                EXPORT  FLASH_IRQHandler           [WEAK]
207
-                EXPORT  RCC_IRQHandler             [WEAK]
208
-                EXPORT  EXTI0_IRQHandler           [WEAK]
209
-                EXPORT  EXTI1_IRQHandler           [WEAK]
210
-                EXPORT  EXTI2_IRQHandler           [WEAK]
211
-                EXPORT  EXTI3_IRQHandler           [WEAK]
212
-                EXPORT  EXTI4_IRQHandler           [WEAK]
213
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
214
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
215
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
216
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
217
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
218
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
219
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
220
-                EXPORT  ADC1_IRQHandler            [WEAK]
221
-                EXPORT  USB_HP_IRQHandler          [WEAK]
222
-                EXPORT  USB_LP_IRQHandler          [WEAK]
223
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
224
-                EXPORT  TIM2_IRQHandler            [WEAK]
225
-                EXPORT  TIM3_IRQHandler            [WEAK]
226
-                EXPORT  TIM4_IRQHandler            [WEAK]
227
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
228
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
229
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
230
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
231
-                EXPORT  SPI1_IRQHandler            [WEAK]
232
-                EXPORT  SPI2_IRQHandler            [WEAK]
233
-                EXPORT  USART1_IRQHandler          [WEAK]
234
-                EXPORT  USART2_IRQHandler          [WEAK]
235
-                EXPORT  USART3_IRQHandler          [WEAK]
236
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
237
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
238
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
239
-
240
-WWDG_IRQHandler
241
-PVD_IRQHandler
242
-TAMPER_IRQHandler
243
-RTC_IRQHandler
244
-FLASH_IRQHandler
245
-RCC_IRQHandler
246
-EXTI0_IRQHandler
247
-EXTI1_IRQHandler
248
-EXTI2_IRQHandler
249
-EXTI3_IRQHandler
250
-EXTI4_IRQHandler
251
-DMA1_Channel1_IRQHandler
252
-DMA1_Channel2_IRQHandler
253
-DMA1_Channel3_IRQHandler
254
-DMA1_Channel4_IRQHandler
255
-DMA1_Channel5_IRQHandler
256
-DMA1_Channel6_IRQHandler
257
-DMA1_Channel7_IRQHandler
258
-ADC1_IRQHandler
259
-USB_HP_IRQHandler
260
-USB_LP_IRQHandler
261
-EXTI9_5_IRQHandler
262
-TIM2_IRQHandler
263
-TIM3_IRQHandler
264
-TIM4_IRQHandler
265
-I2C1_EV_IRQHandler
266
-I2C1_ER_IRQHandler
267
-I2C2_EV_IRQHandler
268
-I2C2_ER_IRQHandler
269
-SPI1_IRQHandler
270
-SPI2_IRQHandler
271
-USART1_IRQHandler
272
-USART2_IRQHandler
273
-USART3_IRQHandler
274
-EXTI15_10_IRQHandler
275
-RTC_Alarm_IRQHandler
276
-USBWakeUp_IRQHandler
277
-
278
-                B       .
279
-
280
-                ENDP
281
-
282
-                ALIGN
283
-
284
-;*******************************************************************************
285
-; User Stack and Heap initialization
286
-;*******************************************************************************
287
-                 IF      :DEF:__MICROLIB           
288
-                
289
-                 EXPORT  __initial_sp
290
-                 EXPORT  __heap_base
291
-                 EXPORT  __heap_limit
292
-                
293
-                 ELSE
294
-                
295
-                 IMPORT  __use_two_region_memory
296
-                 EXPORT  __user_initial_stackheap
297
-                 
298
-__user_initial_stackheap
299
-
300
-                 LDR     R0, =  Heap_Mem
301
-                 LDR     R1, =(Stack_Mem + Stack_Size)
302
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
303
-                 LDR     R3, = Stack_Mem
304
-                 BX      LR
305
-
306
-                 ALIGN
307
-
308
-                 ENDIF
309
-
310
-                 END
311
-
312
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 314
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103x6.s View File

@@ -1,314 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f103x6.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F103x6 Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_2_IRQHandler          ; ADC1_2
115
-                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
116
-                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
117
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
118
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
121
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
122
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
123
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     0                          ; Reserved
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     0                          ; Reserved
130
-                DCD     0                          ; Reserved
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     0                          ; Reserved
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     0                          ; Reserved
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
138
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
139
-__Vectors_End
140
-
141
-__Vectors_Size  EQU  __Vectors_End - __Vectors
142
-
143
-                AREA    |.text|, CODE, READONLY
144
-
145
-; Reset handler routine
146
-Reset_Handler    PROC
147
-                 EXPORT  Reset_Handler             [WEAK]
148
-     IMPORT  __main
149
-     IMPORT  SystemInit
150
-                 LDR     R0, =SystemInit
151
-                 BLX     R0
152
-                 LDR     R0, =__main
153
-                 BX      R0
154
-                 ENDP
155
-
156
-; Dummy Exception Handlers (infinite loops which can be modified)
157
-
158
-NMI_Handler     PROC
159
-                EXPORT  NMI_Handler                [WEAK]
160
-                B       .
161
-                ENDP
162
-HardFault_Handler\
163
-                PROC
164
-                EXPORT  HardFault_Handler          [WEAK]
165
-                B       .
166
-                ENDP
167
-MemManage_Handler\
168
-                PROC
169
-                EXPORT  MemManage_Handler          [WEAK]
170
-                B       .
171
-                ENDP
172
-BusFault_Handler\
173
-                PROC
174
-                EXPORT  BusFault_Handler           [WEAK]
175
-                B       .
176
-                ENDP
177
-UsageFault_Handler\
178
-                PROC
179
-                EXPORT  UsageFault_Handler         [WEAK]
180
-                B       .
181
-                ENDP
182
-SVC_Handler     PROC
183
-                EXPORT  SVC_Handler                [WEAK]
184
-                B       .
185
-                ENDP
186
-DebugMon_Handler\
187
-                PROC
188
-                EXPORT  DebugMon_Handler           [WEAK]
189
-                B       .
190
-                ENDP
191
-PendSV_Handler  PROC
192
-                EXPORT  PendSV_Handler             [WEAK]
193
-                B       .
194
-                ENDP
195
-SysTick_Handler PROC
196
-                EXPORT  SysTick_Handler            [WEAK]
197
-                B       .
198
-                ENDP
199
-
200
-Default_Handler PROC
201
-
202
-                EXPORT  WWDG_IRQHandler            [WEAK]
203
-                EXPORT  PVD_IRQHandler             [WEAK]
204
-                EXPORT  TAMPER_IRQHandler          [WEAK]
205
-                EXPORT  RTC_IRQHandler             [WEAK]
206
-                EXPORT  FLASH_IRQHandler           [WEAK]
207
-                EXPORT  RCC_IRQHandler             [WEAK]
208
-                EXPORT  EXTI0_IRQHandler           [WEAK]
209
-                EXPORT  EXTI1_IRQHandler           [WEAK]
210
-                EXPORT  EXTI2_IRQHandler           [WEAK]
211
-                EXPORT  EXTI3_IRQHandler           [WEAK]
212
-                EXPORT  EXTI4_IRQHandler           [WEAK]
213
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
214
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
215
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
216
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
217
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
218
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
219
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
220
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
221
-                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
222
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
223
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
224
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
225
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
226
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
227
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
228
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
229
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
230
-                EXPORT  TIM2_IRQHandler            [WEAK]
231
-                EXPORT  TIM3_IRQHandler            [WEAK]
232
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
233
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
234
-                EXPORT  SPI1_IRQHandler            [WEAK]
235
-                EXPORT  USART1_IRQHandler          [WEAK]
236
-                EXPORT  USART2_IRQHandler          [WEAK]
237
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
238
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
239
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
240
-
241
-WWDG_IRQHandler
242
-PVD_IRQHandler
243
-TAMPER_IRQHandler
244
-RTC_IRQHandler
245
-FLASH_IRQHandler
246
-RCC_IRQHandler
247
-EXTI0_IRQHandler
248
-EXTI1_IRQHandler
249
-EXTI2_IRQHandler
250
-EXTI3_IRQHandler
251
-EXTI4_IRQHandler
252
-DMA1_Channel1_IRQHandler
253
-DMA1_Channel2_IRQHandler
254
-DMA1_Channel3_IRQHandler
255
-DMA1_Channel4_IRQHandler
256
-DMA1_Channel5_IRQHandler
257
-DMA1_Channel6_IRQHandler
258
-DMA1_Channel7_IRQHandler
259
-ADC1_2_IRQHandler
260
-USB_HP_CAN1_TX_IRQHandler
261
-USB_LP_CAN1_RX0_IRQHandler
262
-CAN1_RX1_IRQHandler
263
-CAN1_SCE_IRQHandler
264
-EXTI9_5_IRQHandler
265
-TIM1_BRK_IRQHandler
266
-TIM1_UP_IRQHandler
267
-TIM1_TRG_COM_IRQHandler
268
-TIM1_CC_IRQHandler
269
-TIM2_IRQHandler
270
-TIM3_IRQHandler
271
-I2C1_EV_IRQHandler
272
-I2C1_ER_IRQHandler
273
-SPI1_IRQHandler
274
-USART1_IRQHandler
275
-USART2_IRQHandler
276
-EXTI15_10_IRQHandler
277
-RTC_Alarm_IRQHandler
278
-USBWakeUp_IRQHandler
279
-
280
-                B       .
281
-
282
-                ENDP
283
-
284
-                ALIGN
285
-
286
-;*******************************************************************************
287
-; User Stack and Heap initialization
288
-;*******************************************************************************
289
-                 IF      :DEF:__MICROLIB
290
-                
291
-                 EXPORT  __initial_sp
292
-                 EXPORT  __heap_base
293
-                 EXPORT  __heap_limit
294
-                
295
-                 ELSE
296
-                
297
-                 IMPORT  __use_two_region_memory
298
-                 EXPORT  __user_initial_stackheap
299
-                 
300
-__user_initial_stackheap
301
-
302
-                 LDR     R0, =  Heap_Mem
303
-                 LDR     R1, =(Stack_Mem + Stack_Size)
304
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
305
-                 LDR     R3, = Stack_Mem
306
-                 BX      LR
307
-
308
-                 ALIGN
309
-
310
-                 ENDIF
311
-
312
-                 END
313
-
314
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 324
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xb.s View File

@@ -1,324 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f103xb.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F103xB Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_2_IRQHandler          ; ADC1_2
115
-                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
116
-                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
117
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
118
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
121
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
122
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
123
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     TIM4_IRQHandler            ; TIM4
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
130
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     SPI2_IRQHandler            ; SPI2
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     USART3_IRQHandler          ; USART3
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
138
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
139
-__Vectors_End
140
-
141
-__Vectors_Size  EQU  __Vectors_End - __Vectors
142
-
143
-                AREA    |.text|, CODE, READONLY
144
-
145
-; Reset handler
146
-Reset_Handler    PROC
147
-                 EXPORT  Reset_Handler             [WEAK]
148
-     IMPORT  __main
149
-     IMPORT  SystemInit
150
-                 LDR     R0, =SystemInit
151
-                 BLX     R0
152
-                 LDR     R0, =__main
153
-                 BX      R0
154
-                 ENDP
155
-
156
-; Dummy Exception Handlers (infinite loops which can be modified)
157
-
158
-NMI_Handler     PROC
159
-                EXPORT  NMI_Handler                [WEAK]
160
-                B       .
161
-                ENDP
162
-HardFault_Handler\
163
-                PROC
164
-                EXPORT  HardFault_Handler          [WEAK]
165
-                B       .
166
-                ENDP
167
-MemManage_Handler\
168
-                PROC
169
-                EXPORT  MemManage_Handler          [WEAK]
170
-                B       .
171
-                ENDP
172
-BusFault_Handler\
173
-                PROC
174
-                EXPORT  BusFault_Handler           [WEAK]
175
-                B       .
176
-                ENDP
177
-UsageFault_Handler\
178
-                PROC
179
-                EXPORT  UsageFault_Handler         [WEAK]
180
-                B       .
181
-                ENDP
182
-SVC_Handler     PROC
183
-                EXPORT  SVC_Handler                [WEAK]
184
-                B       .
185
-                ENDP
186
-DebugMon_Handler\
187
-                PROC
188
-                EXPORT  DebugMon_Handler           [WEAK]
189
-                B       .
190
-                ENDP
191
-PendSV_Handler  PROC
192
-                EXPORT  PendSV_Handler             [WEAK]
193
-                B       .
194
-                ENDP
195
-SysTick_Handler PROC
196
-                EXPORT  SysTick_Handler            [WEAK]
197
-                B       .
198
-                ENDP
199
-
200
-Default_Handler PROC
201
-
202
-                EXPORT  WWDG_IRQHandler            [WEAK]
203
-                EXPORT  PVD_IRQHandler             [WEAK]
204
-                EXPORT  TAMPER_IRQHandler          [WEAK]
205
-                EXPORT  RTC_IRQHandler             [WEAK]
206
-                EXPORT  FLASH_IRQHandler           [WEAK]
207
-                EXPORT  RCC_IRQHandler             [WEAK]
208
-                EXPORT  EXTI0_IRQHandler           [WEAK]
209
-                EXPORT  EXTI1_IRQHandler           [WEAK]
210
-                EXPORT  EXTI2_IRQHandler           [WEAK]
211
-                EXPORT  EXTI3_IRQHandler           [WEAK]
212
-                EXPORT  EXTI4_IRQHandler           [WEAK]
213
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
214
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
215
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
216
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
217
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
218
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
219
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
220
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
221
-                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
222
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
223
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
224
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
225
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
226
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
227
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
228
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
229
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
230
-                EXPORT  TIM2_IRQHandler            [WEAK]
231
-                EXPORT  TIM3_IRQHandler            [WEAK]
232
-                EXPORT  TIM4_IRQHandler            [WEAK]
233
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
234
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
235
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
236
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
237
-                EXPORT  SPI1_IRQHandler            [WEAK]
238
-                EXPORT  SPI2_IRQHandler            [WEAK]
239
-                EXPORT  USART1_IRQHandler          [WEAK]
240
-                EXPORT  USART2_IRQHandler          [WEAK]
241
-                EXPORT  USART3_IRQHandler          [WEAK]
242
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
243
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
244
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
245
-
246
-WWDG_IRQHandler
247
-PVD_IRQHandler
248
-TAMPER_IRQHandler
249
-RTC_IRQHandler
250
-FLASH_IRQHandler
251
-RCC_IRQHandler
252
-EXTI0_IRQHandler
253
-EXTI1_IRQHandler
254
-EXTI2_IRQHandler
255
-EXTI3_IRQHandler
256
-EXTI4_IRQHandler
257
-DMA1_Channel1_IRQHandler
258
-DMA1_Channel2_IRQHandler
259
-DMA1_Channel3_IRQHandler
260
-DMA1_Channel4_IRQHandler
261
-DMA1_Channel5_IRQHandler
262
-DMA1_Channel6_IRQHandler
263
-DMA1_Channel7_IRQHandler
264
-ADC1_2_IRQHandler
265
-USB_HP_CAN1_TX_IRQHandler
266
-USB_LP_CAN1_RX0_IRQHandler
267
-CAN1_RX1_IRQHandler
268
-CAN1_SCE_IRQHandler
269
-EXTI9_5_IRQHandler
270
-TIM1_BRK_IRQHandler
271
-TIM1_UP_IRQHandler
272
-TIM1_TRG_COM_IRQHandler
273
-TIM1_CC_IRQHandler
274
-TIM2_IRQHandler
275
-TIM3_IRQHandler
276
-TIM4_IRQHandler
277
-I2C1_EV_IRQHandler
278
-I2C1_ER_IRQHandler
279
-I2C2_EV_IRQHandler
280
-I2C2_ER_IRQHandler
281
-SPI1_IRQHandler
282
-SPI2_IRQHandler
283
-USART1_IRQHandler
284
-USART2_IRQHandler
285
-USART3_IRQHandler
286
-EXTI15_10_IRQHandler
287
-RTC_Alarm_IRQHandler
288
-USBWakeUp_IRQHandler
289
-
290
-                B       .
291
-
292
-                ENDP
293
-
294
-                ALIGN
295
-
296
-;*******************************************************************************
297
-; User Stack and Heap initialization
298
-;*******************************************************************************
299
-                 IF      :DEF:__MICROLIB           
300
-                
301
-                 EXPORT  __initial_sp
302
-                 EXPORT  __heap_base
303
-                 EXPORT  __heap_limit
304
-                
305
-                 ELSE
306
-                
307
-                 IMPORT  __use_two_region_memory
308
-                 EXPORT  __user_initial_stackheap
309
-                 
310
-__user_initial_stackheap
311
-
312
-                 LDR     R0, =  Heap_Mem
313
-                 LDR     R1, =(Stack_Mem + Stack_Size)
314
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
315
-                 LDR     R3, = Stack_Mem
316
-                 BX      LR
317
-
318
-                 ALIGN
319
-
320
-                 ENDIF
321
-
322
-                 END
323
-
324
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 373
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xe.s View File

@@ -1,373 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f103xe.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F103xE Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-                                                  
56
-; <h> Heap Configuration
57
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
58
-; </h>
59
-
60
-Heap_Size       EQU     0x00000200
61
-
62
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
63
-__heap_base
64
-Heap_Mem        SPACE   Heap_Size
65
-__heap_limit
66
-
67
-                PRESERVE8
68
-                THUMB
69
-
70
-
71
-; Vector Table Mapped to Address 0 at Reset
72
-                AREA    RESET, DATA, READONLY
73
-                EXPORT  __Vectors
74
-                EXPORT  __Vectors_End
75
-                EXPORT  __Vectors_Size
76
-
77
-__Vectors       DCD     __initial_sp               ; Top of Stack
78
-                DCD     Reset_Handler              ; Reset Handler
79
-                DCD     NMI_Handler                ; NMI Handler
80
-                DCD     HardFault_Handler          ; Hard Fault Handler
81
-                DCD     MemManage_Handler          ; MPU Fault Handler
82
-                DCD     BusFault_Handler           ; Bus Fault Handler
83
-                DCD     UsageFault_Handler         ; Usage Fault Handler
84
-                DCD     0                          ; Reserved
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     SVC_Handler                ; SVCall Handler
89
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
90
-                DCD     0                          ; Reserved
91
-                DCD     PendSV_Handler             ; PendSV Handler
92
-                DCD     SysTick_Handler            ; SysTick Handler
93
-
94
-                ; External Interrupts
95
-                DCD     WWDG_IRQHandler            ; Window Watchdog
96
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
97
-                DCD     TAMPER_IRQHandler          ; Tamper
98
-                DCD     RTC_IRQHandler             ; RTC
99
-                DCD     FLASH_IRQHandler           ; Flash
100
-                DCD     RCC_IRQHandler             ; RCC
101
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
102
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
103
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
104
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
105
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
106
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
107
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
108
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
109
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
110
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
111
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
112
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
113
-                DCD     ADC1_2_IRQHandler          ; ADC1 & ADC2
114
-                DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX
115
-                DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0
116
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
117
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
118
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
119
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
120
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
121
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
122
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
123
-                DCD     TIM2_IRQHandler            ; TIM2
124
-                DCD     TIM3_IRQHandler            ; TIM3
125
-                DCD     TIM4_IRQHandler            ; TIM4
126
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
127
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
128
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
129
-                DCD     I2C2_ER_IRQHandler         ; I2C2 Error
130
-                DCD     SPI1_IRQHandler            ; SPI1
131
-                DCD     SPI2_IRQHandler            ; SPI2
132
-                DCD     USART1_IRQHandler          ; USART1
133
-                DCD     USART2_IRQHandler          ; USART2
134
-                DCD     USART3_IRQHandler          ; USART3
135
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
136
-                DCD     RTC_Alarm_IRQHandler        ; RTC Alarm through EXTI Line
137
-                DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend
138
-                DCD     TIM8_BRK_IRQHandler        ; TIM8 Break
139
-                DCD     TIM8_UP_IRQHandler         ; TIM8 Update
140
-                DCD     TIM8_TRG_COM_IRQHandler    ; TIM8 Trigger and Commutation
141
-                DCD     TIM8_CC_IRQHandler         ; TIM8 Capture Compare
142
-                DCD     ADC3_IRQHandler            ; ADC3
143
-                DCD     FSMC_IRQHandler            ; FSMC
144
-                DCD     SDIO_IRQHandler            ; SDIO
145
-                DCD     TIM5_IRQHandler            ; TIM5
146
-                DCD     SPI3_IRQHandler            ; SPI3
147
-                DCD     UART4_IRQHandler           ; UART4
148
-                DCD     UART5_IRQHandler           ; UART5
149
-                DCD     TIM6_IRQHandler            ; TIM6
150
-                DCD     TIM7_IRQHandler            ; TIM7
151
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
152
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
153
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
154
-                DCD     DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
155
-__Vectors_End
156
-
157
-__Vectors_Size  EQU  __Vectors_End - __Vectors
158
-
159
-                AREA    |.text|, CODE, READONLY
160
-                
161
-; Reset handler
162
-Reset_Handler   PROC
163
-                EXPORT  Reset_Handler             [WEAK]
164
-                IMPORT  __main
165
-                IMPORT  SystemInit
166
-                LDR     R0, =SystemInit
167
-                BLX     R0               
168
-                LDR     R0, =__main
169
-                BX      R0
170
-                ENDP
171
-                
172
-; Dummy Exception Handlers (infinite loops which can be modified)
173
-
174
-NMI_Handler     PROC
175
-                EXPORT  NMI_Handler                [WEAK]
176
-                B       .
177
-                ENDP
178
-HardFault_Handler\
179
-                PROC
180
-                EXPORT  HardFault_Handler          [WEAK]
181
-                B       .
182
-                ENDP
183
-MemManage_Handler\
184
-                PROC
185
-                EXPORT  MemManage_Handler          [WEAK]
186
-                B       .
187
-                ENDP
188
-BusFault_Handler\
189
-                PROC
190
-                EXPORT  BusFault_Handler           [WEAK]
191
-                B       .
192
-                ENDP
193
-UsageFault_Handler\
194
-                PROC
195
-                EXPORT  UsageFault_Handler         [WEAK]
196
-                B       .
197
-                ENDP
198
-SVC_Handler     PROC
199
-                EXPORT  SVC_Handler                [WEAK]
200
-                B       .
201
-                ENDP
202
-DebugMon_Handler\
203
-                PROC
204
-                EXPORT  DebugMon_Handler           [WEAK]
205
-                B       .
206
-                ENDP
207
-PendSV_Handler  PROC
208
-                EXPORT  PendSV_Handler             [WEAK]
209
-                B       .
210
-                ENDP
211
-SysTick_Handler PROC
212
-                EXPORT  SysTick_Handler            [WEAK]
213
-                B       .
214
-                ENDP
215
-
216
-Default_Handler PROC
217
-
218
-                EXPORT  WWDG_IRQHandler            [WEAK]
219
-                EXPORT  PVD_IRQHandler             [WEAK]
220
-                EXPORT  TAMPER_IRQHandler          [WEAK]
221
-                EXPORT  RTC_IRQHandler             [WEAK]
222
-                EXPORT  FLASH_IRQHandler           [WEAK]
223
-                EXPORT  RCC_IRQHandler             [WEAK]
224
-                EXPORT  EXTI0_IRQHandler           [WEAK]
225
-                EXPORT  EXTI1_IRQHandler           [WEAK]
226
-                EXPORT  EXTI2_IRQHandler           [WEAK]
227
-                EXPORT  EXTI3_IRQHandler           [WEAK]
228
-                EXPORT  EXTI4_IRQHandler           [WEAK]
229
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
230
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
231
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
232
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
233
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
234
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
235
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
236
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
237
-                EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]
238
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]
239
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
240
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
241
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
242
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
243
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
244
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
245
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
246
-                EXPORT  TIM2_IRQHandler            [WEAK]
247
-                EXPORT  TIM3_IRQHandler            [WEAK]
248
-                EXPORT  TIM4_IRQHandler            [WEAK]
249
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
250
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
251
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
252
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
253
-                EXPORT  SPI1_IRQHandler            [WEAK]
254
-                EXPORT  SPI2_IRQHandler            [WEAK]
255
-                EXPORT  USART1_IRQHandler          [WEAK]
256
-                EXPORT  USART2_IRQHandler          [WEAK]
257
-                EXPORT  USART3_IRQHandler          [WEAK]
258
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
259
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
260
-                EXPORT  USBWakeUp_IRQHandler       [WEAK]
261
-                EXPORT  TIM8_BRK_IRQHandler        [WEAK]
262
-                EXPORT  TIM8_UP_IRQHandler         [WEAK]
263
-                EXPORT  TIM8_TRG_COM_IRQHandler    [WEAK]
264
-                EXPORT  TIM8_CC_IRQHandler         [WEAK]
265
-                EXPORT  ADC3_IRQHandler            [WEAK]
266
-                EXPORT  FSMC_IRQHandler            [WEAK]
267
-                EXPORT  SDIO_IRQHandler            [WEAK]
268
-                EXPORT  TIM5_IRQHandler            [WEAK]
269
-                EXPORT  SPI3_IRQHandler            [WEAK]
270
-                EXPORT  UART4_IRQHandler           [WEAK]
271
-                EXPORT  UART5_IRQHandler           [WEAK]
272
-                EXPORT  TIM6_IRQHandler            [WEAK]
273
-                EXPORT  TIM7_IRQHandler            [WEAK]
274
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
275
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
276
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
277
-                EXPORT  DMA2_Channel4_5_IRQHandler [WEAK]
278
-
279
-WWDG_IRQHandler
280
-PVD_IRQHandler
281
-TAMPER_IRQHandler
282
-RTC_IRQHandler
283
-FLASH_IRQHandler
284
-RCC_IRQHandler
285
-EXTI0_IRQHandler
286
-EXTI1_IRQHandler
287
-EXTI2_IRQHandler
288
-EXTI3_IRQHandler
289
-EXTI4_IRQHandler
290
-DMA1_Channel1_IRQHandler
291
-DMA1_Channel2_IRQHandler
292
-DMA1_Channel3_IRQHandler
293
-DMA1_Channel4_IRQHandler
294
-DMA1_Channel5_IRQHandler
295
-DMA1_Channel6_IRQHandler
296
-DMA1_Channel7_IRQHandler
297
-ADC1_2_IRQHandler
298
-USB_HP_CAN1_TX_IRQHandler
299
-USB_LP_CAN1_RX0_IRQHandler
300
-CAN1_RX1_IRQHandler
301
-CAN1_SCE_IRQHandler
302
-EXTI9_5_IRQHandler
303
-TIM1_BRK_IRQHandler
304
-TIM1_UP_IRQHandler
305
-TIM1_TRG_COM_IRQHandler
306
-TIM1_CC_IRQHandler
307
-TIM2_IRQHandler
308
-TIM3_IRQHandler
309
-TIM4_IRQHandler
310
-I2C1_EV_IRQHandler
311
-I2C1_ER_IRQHandler
312
-I2C2_EV_IRQHandler
313
-I2C2_ER_IRQHandler
314
-SPI1_IRQHandler
315
-SPI2_IRQHandler
316
-USART1_IRQHandler
317
-USART2_IRQHandler
318
-USART3_IRQHandler
319
-EXTI15_10_IRQHandler
320
-RTC_Alarm_IRQHandler
321
-USBWakeUp_IRQHandler
322
-TIM8_BRK_IRQHandler
323
-TIM8_UP_IRQHandler
324
-TIM8_TRG_COM_IRQHandler
325
-TIM8_CC_IRQHandler
326
-ADC3_IRQHandler
327
-FSMC_IRQHandler
328
-SDIO_IRQHandler
329
-TIM5_IRQHandler
330
-SPI3_IRQHandler
331
-UART4_IRQHandler
332
-UART5_IRQHandler
333
-TIM6_IRQHandler
334
-TIM7_IRQHandler
335
-DMA2_Channel1_IRQHandler
336
-DMA2_Channel2_IRQHandler
337
-DMA2_Channel3_IRQHandler
338
-DMA2_Channel4_5_IRQHandler
339
-                B       .
340
-
341
-                ENDP
342
-
343
-                ALIGN
344
-
345
-;*******************************************************************************
346
-; User Stack and Heap initialization
347
-;*******************************************************************************
348
-                 IF      :DEF:__MICROLIB
349
-                
350
-                 EXPORT  __initial_sp
351
-                 EXPORT  __heap_base
352
-                 EXPORT  __heap_limit
353
-                
354
-                 ELSE
355
-                
356
-                 IMPORT  __use_two_region_memory
357
-                 EXPORT  __user_initial_stackheap
358
-                 
359
-__user_initial_stackheap
360
-
361
-                 LDR     R0, =  Heap_Mem
362
-                 LDR     R1, =(Stack_Mem + Stack_Size)
363
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
364
-                 LDR     R3, = Stack_Mem
365
-                 BX      LR
366
-
367
-                 ALIGN
368
-
369
-                 ENDIF
370
-
371
-                 END
372
-
373
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 373
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xg.s View File

@@ -1,373 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f103xg.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F103xG Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-                                                  
56
-; <h> Heap Configuration
57
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
58
-; </h>
59
-
60
-Heap_Size       EQU     0x00000200
61
-
62
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
63
-__heap_base
64
-Heap_Mem        SPACE   Heap_Size
65
-__heap_limit
66
-
67
-                PRESERVE8
68
-                THUMB
69
-
70
-
71
-; Vector Table Mapped to Address 0 at Reset
72
-                AREA    RESET, DATA, READONLY
73
-                EXPORT  __Vectors
74
-                EXPORT  __Vectors_End
75
-                EXPORT  __Vectors_Size
76
-
77
-__Vectors       DCD     __initial_sp               ; Top of Stack
78
-                DCD     Reset_Handler              ; Reset Handler
79
-                DCD     NMI_Handler                ; NMI Handler
80
-                DCD     HardFault_Handler          ; Hard Fault Handler
81
-                DCD     MemManage_Handler          ; MPU Fault Handler
82
-                DCD     BusFault_Handler           ; Bus Fault Handler
83
-                DCD     UsageFault_Handler         ; Usage Fault Handler
84
-                DCD     0                          ; Reserved
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     SVC_Handler                ; SVCall Handler
89
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
90
-                DCD     0                          ; Reserved
91
-                DCD     PendSV_Handler             ; PendSV Handler
92
-                DCD     SysTick_Handler            ; SysTick Handler
93
-
94
-                ; External Interrupts
95
-                DCD     WWDG_IRQHandler               ; Window Watchdog
96
-                DCD     PVD_IRQHandler                ; PVD through EXTI Line detect
97
-                DCD     TAMPER_IRQHandler             ; Tamper
98
-                DCD     RTC_IRQHandler                ; RTC
99
-                DCD     FLASH_IRQHandler              ; Flash
100
-                DCD     RCC_IRQHandler                ; RCC
101
-                DCD     EXTI0_IRQHandler              ; EXTI Line 0
102
-                DCD     EXTI1_IRQHandler              ; EXTI Line 1
103
-                DCD     EXTI2_IRQHandler              ; EXTI Line 2
104
-                DCD     EXTI3_IRQHandler              ; EXTI Line 3
105
-                DCD     EXTI4_IRQHandler              ; EXTI Line 4
106
-                DCD     DMA1_Channel1_IRQHandler      ; DMA1 Channel 1
107
-                DCD     DMA1_Channel2_IRQHandler      ; DMA1 Channel 2
108
-                DCD     DMA1_Channel3_IRQHandler      ; DMA1 Channel 3
109
-                DCD     DMA1_Channel4_IRQHandler      ; DMA1 Channel 4
110
-                DCD     DMA1_Channel5_IRQHandler      ; DMA1 Channel 5
111
-                DCD     DMA1_Channel6_IRQHandler      ; DMA1 Channel 6
112
-                DCD     DMA1_Channel7_IRQHandler      ; DMA1 Channel 7
113
-                DCD     ADC1_2_IRQHandler             ; ADC1 & ADC2
114
-                DCD     USB_HP_CAN1_TX_IRQHandler     ; USB High Priority or CAN1 TX
115
-                DCD     USB_LP_CAN1_RX0_IRQHandler    ; USB Low  Priority or CAN1 RX0
116
-                DCD     CAN1_RX1_IRQHandler           ; CAN1 RX1
117
-                DCD     CAN1_SCE_IRQHandler           ; CAN1 SCE
118
-                DCD     EXTI9_5_IRQHandler            ; EXTI Line 9..5
119
-                DCD     TIM1_BRK_TIM9_IRQHandler      ; TIM1 Break and TIM9
120
-                DCD     TIM1_UP_TIM10_IRQHandler      ; TIM1 Update and TIM10
121
-                DCD     TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
122
-                DCD     TIM1_CC_IRQHandler            ; TIM1 Capture Compare
123
-                DCD     TIM2_IRQHandler               ; TIM2
124
-                DCD     TIM3_IRQHandler               ; TIM3
125
-                DCD     TIM4_IRQHandler               ; TIM4
126
-                DCD     I2C1_EV_IRQHandler            ; I2C1 Event
127
-                DCD     I2C1_ER_IRQHandler            ; I2C1 Error
128
-                DCD     I2C2_EV_IRQHandler            ; I2C2 Event
129
-                DCD     I2C2_ER_IRQHandler            ; I2C2 Error
130
-                DCD     SPI1_IRQHandler               ; SPI1
131
-                DCD     SPI2_IRQHandler               ; SPI2
132
-                DCD     USART1_IRQHandler             ; USART1
133
-                DCD     USART2_IRQHandler             ; USART2
134
-                DCD     USART3_IRQHandler             ; USART3
135
-                DCD     EXTI15_10_IRQHandler          ; EXTI Line 15..10
136
-                DCD     RTC_Alarm_IRQHandler           ; RTC Alarm through EXTI Line
137
-                DCD     USBWakeUp_IRQHandler          ; USB Wakeup from suspend
138
-                DCD     TIM8_BRK_TIM12_IRQHandler     ; TIM8 Break and TIM12
139
-                DCD     TIM8_UP_TIM13_IRQHandler      ; TIM8 Update and TIM13
140
-                DCD     TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
141
-                DCD     TIM8_CC_IRQHandler            ; TIM8 Capture Compare
142
-                DCD     ADC3_IRQHandler               ; ADC3
143
-                DCD     FSMC_IRQHandler               ; FSMC
144
-                DCD     SDIO_IRQHandler               ; SDIO
145
-                DCD     TIM5_IRQHandler               ; TIM5
146
-                DCD     SPI3_IRQHandler               ; SPI3
147
-                DCD     UART4_IRQHandler              ; UART4
148
-                DCD     UART5_IRQHandler              ; UART5
149
-                DCD     TIM6_IRQHandler               ; TIM6
150
-                DCD     TIM7_IRQHandler               ; TIM7
151
-                DCD     DMA2_Channel1_IRQHandler      ; DMA2 Channel1
152
-                DCD     DMA2_Channel2_IRQHandler      ; DMA2 Channel2
153
-                DCD     DMA2_Channel3_IRQHandler      ; DMA2 Channel3
154
-                DCD     DMA2_Channel4_5_IRQHandler    ; DMA2 Channel4 & Channel5
155
-__Vectors_End
156
-
157
-__Vectors_Size  EQU  __Vectors_End - __Vectors
158
-
159
-                AREA    |.text|, CODE, READONLY
160
-                
161
-; Reset handler
162
-Reset_Handler   PROC
163
-                EXPORT  Reset_Handler             [WEAK]
164
-                IMPORT  __main
165
-                IMPORT  SystemInit
166
-                LDR     R0, =SystemInit
167
-                BLX     R0               
168
-                LDR     R0, =__main
169
-                BX      R0
170
-                ENDP
171
-                
172
-; Dummy Exception Handlers (infinite loops which can be modified)
173
-
174
-NMI_Handler     PROC
175
-                EXPORT  NMI_Handler                [WEAK]
176
-                B       .
177
-                ENDP
178
-HardFault_Handler\
179
-                PROC
180
-                EXPORT  HardFault_Handler          [WEAK]
181
-                B       .
182
-                ENDP
183
-MemManage_Handler\
184
-                PROC
185
-                EXPORT  MemManage_Handler          [WEAK]
186
-                B       .
187
-                ENDP
188
-BusFault_Handler\
189
-                PROC
190
-                EXPORT  BusFault_Handler           [WEAK]
191
-                B       .
192
-                ENDP
193
-UsageFault_Handler\
194
-                PROC
195
-                EXPORT  UsageFault_Handler         [WEAK]
196
-                B       .
197
-                ENDP
198
-SVC_Handler     PROC
199
-                EXPORT  SVC_Handler                [WEAK]
200
-                B       .
201
-                ENDP
202
-DebugMon_Handler\
203
-                PROC
204
-                EXPORT  DebugMon_Handler           [WEAK]
205
-                B       .
206
-                ENDP
207
-PendSV_Handler  PROC
208
-                EXPORT  PendSV_Handler             [WEAK]
209
-                B       .
210
-                ENDP
211
-SysTick_Handler PROC
212
-                EXPORT  SysTick_Handler            [WEAK]
213
-                B       .
214
-                ENDP
215
-
216
-Default_Handler PROC
217
-
218
-                EXPORT  WWDG_IRQHandler               [WEAK]
219
-                EXPORT  PVD_IRQHandler                [WEAK]
220
-                EXPORT  TAMPER_IRQHandler             [WEAK]
221
-                EXPORT  RTC_IRQHandler                [WEAK]
222
-                EXPORT  FLASH_IRQHandler              [WEAK]
223
-                EXPORT  RCC_IRQHandler                [WEAK]
224
-                EXPORT  EXTI0_IRQHandler              [WEAK]
225
-                EXPORT  EXTI1_IRQHandler              [WEAK]
226
-                EXPORT  EXTI2_IRQHandler              [WEAK]
227
-                EXPORT  EXTI3_IRQHandler              [WEAK]
228
-                EXPORT  EXTI4_IRQHandler              [WEAK]
229
-                EXPORT  DMA1_Channel1_IRQHandler      [WEAK]
230
-                EXPORT  DMA1_Channel2_IRQHandler      [WEAK]
231
-                EXPORT  DMA1_Channel3_IRQHandler      [WEAK]
232
-                EXPORT  DMA1_Channel4_IRQHandler      [WEAK]
233
-                EXPORT  DMA1_Channel5_IRQHandler      [WEAK]
234
-                EXPORT  DMA1_Channel6_IRQHandler      [WEAK]
235
-                EXPORT  DMA1_Channel7_IRQHandler      [WEAK]
236
-                EXPORT  ADC1_2_IRQHandler             [WEAK]
237
-                EXPORT  USB_HP_CAN1_TX_IRQHandler     [WEAK]
238
-                EXPORT  USB_LP_CAN1_RX0_IRQHandler    [WEAK]
239
-                EXPORT  CAN1_RX1_IRQHandler           [WEAK]
240
-                EXPORT  CAN1_SCE_IRQHandler           [WEAK]
241
-                EXPORT  EXTI9_5_IRQHandler            [WEAK]
242
-                EXPORT  TIM1_BRK_TIM9_IRQHandler      [WEAK]
243
-                EXPORT  TIM1_UP_TIM10_IRQHandler      [WEAK]
244
-                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
245
-                EXPORT  TIM1_CC_IRQHandler            [WEAK]
246
-                EXPORT  TIM2_IRQHandler               [WEAK]
247
-                EXPORT  TIM3_IRQHandler               [WEAK]
248
-                EXPORT  TIM4_IRQHandler               [WEAK]
249
-                EXPORT  I2C1_EV_IRQHandler            [WEAK]
250
-                EXPORT  I2C1_ER_IRQHandler            [WEAK]
251
-                EXPORT  I2C2_EV_IRQHandler            [WEAK]
252
-                EXPORT  I2C2_ER_IRQHandler            [WEAK]
253
-                EXPORT  SPI1_IRQHandler               [WEAK]
254
-                EXPORT  SPI2_IRQHandler               [WEAK]
255
-                EXPORT  USART1_IRQHandler             [WEAK]
256
-                EXPORT  USART2_IRQHandler             [WEAK]
257
-                EXPORT  USART3_IRQHandler             [WEAK]
258
-                EXPORT  EXTI15_10_IRQHandler          [WEAK]
259
-                EXPORT  RTC_Alarm_IRQHandler           [WEAK]
260
-                EXPORT  USBWakeUp_IRQHandler          [WEAK]
261
-                EXPORT  TIM8_BRK_TIM12_IRQHandler     [WEAK]
262
-                EXPORT  TIM8_UP_TIM13_IRQHandler      [WEAK]
263
-                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
264
-                EXPORT  TIM8_CC_IRQHandler            [WEAK]
265
-                EXPORT  ADC3_IRQHandler               [WEAK]
266
-                EXPORT  FSMC_IRQHandler               [WEAK]
267
-                EXPORT  SDIO_IRQHandler               [WEAK]
268
-                EXPORT  TIM5_IRQHandler               [WEAK]
269
-                EXPORT  SPI3_IRQHandler               [WEAK]
270
-                EXPORT  UART4_IRQHandler              [WEAK]
271
-                EXPORT  UART5_IRQHandler              [WEAK]
272
-                EXPORT  TIM6_IRQHandler               [WEAK]
273
-                EXPORT  TIM7_IRQHandler               [WEAK]
274
-                EXPORT  DMA2_Channel1_IRQHandler      [WEAK]
275
-                EXPORT  DMA2_Channel2_IRQHandler      [WEAK]
276
-                EXPORT  DMA2_Channel3_IRQHandler      [WEAK]
277
-                EXPORT  DMA2_Channel4_5_IRQHandler    [WEAK]
278
-
279
-WWDG_IRQHandler
280
-PVD_IRQHandler
281
-TAMPER_IRQHandler
282
-RTC_IRQHandler
283
-FLASH_IRQHandler
284
-RCC_IRQHandler
285
-EXTI0_IRQHandler
286
-EXTI1_IRQHandler
287
-EXTI2_IRQHandler
288
-EXTI3_IRQHandler
289
-EXTI4_IRQHandler
290
-DMA1_Channel1_IRQHandler
291
-DMA1_Channel2_IRQHandler
292
-DMA1_Channel3_IRQHandler
293
-DMA1_Channel4_IRQHandler
294
-DMA1_Channel5_IRQHandler
295
-DMA1_Channel6_IRQHandler
296
-DMA1_Channel7_IRQHandler
297
-ADC1_2_IRQHandler
298
-USB_HP_CAN1_TX_IRQHandler
299
-USB_LP_CAN1_RX0_IRQHandler
300
-CAN1_RX1_IRQHandler
301
-CAN1_SCE_IRQHandler
302
-EXTI9_5_IRQHandler
303
-TIM1_BRK_TIM9_IRQHandler
304
-TIM1_UP_TIM10_IRQHandler
305
-TIM1_TRG_COM_TIM11_IRQHandler
306
-TIM1_CC_IRQHandler
307
-TIM2_IRQHandler
308
-TIM3_IRQHandler
309
-TIM4_IRQHandler
310
-I2C1_EV_IRQHandler
311
-I2C1_ER_IRQHandler
312
-I2C2_EV_IRQHandler
313
-I2C2_ER_IRQHandler
314
-SPI1_IRQHandler
315
-SPI2_IRQHandler
316
-USART1_IRQHandler
317
-USART2_IRQHandler
318
-USART3_IRQHandler
319
-EXTI15_10_IRQHandler
320
-RTC_Alarm_IRQHandler
321
-USBWakeUp_IRQHandler
322
-TIM8_BRK_TIM12_IRQHandler
323
-TIM8_UP_TIM13_IRQHandler
324
-TIM8_TRG_COM_TIM14_IRQHandler
325
-TIM8_CC_IRQHandler
326
-ADC3_IRQHandler
327
-FSMC_IRQHandler
328
-SDIO_IRQHandler
329
-TIM5_IRQHandler
330
-SPI3_IRQHandler
331
-UART4_IRQHandler
332
-UART5_IRQHandler
333
-TIM6_IRQHandler
334
-TIM7_IRQHandler
335
-DMA2_Channel1_IRQHandler
336
-DMA2_Channel2_IRQHandler
337
-DMA2_Channel3_IRQHandler
338
-DMA2_Channel4_5_IRQHandler
339
-                B       .
340
-
341
-                ENDP
342
-
343
-                ALIGN
344
-
345
-;*******************************************************************************
346
-; User Stack and Heap initialization
347
-;*******************************************************************************
348
-                 IF      :DEF:__MICROLIB
349
-                
350
-                 EXPORT  __initial_sp
351
-                 EXPORT  __heap_base
352
-                 EXPORT  __heap_limit
353
-                
354
-                 ELSE
355
-                
356
-                 IMPORT  __use_two_region_memory
357
-                 EXPORT  __user_initial_stackheap
358
-                 
359
-__user_initial_stackheap
360
-
361
-                 LDR     R0, =  Heap_Mem
362
-                 LDR     R1, =(Stack_Mem + Stack_Size)
363
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
364
-                 LDR     R3, = Stack_Mem
365
-                 BX      LR
366
-
367
-                 ALIGN
368
-
369
-                 ENDIF
370
-
371
-                 END
372
-
373
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 381
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f105xc.s View File

@@ -1,381 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f105xc.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F105xC Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_2_IRQHandler          ; ADC1 and ADC2
115
-                DCD     CAN1_TX_IRQHandler         ; CAN1 TX
116
-                DCD     CAN1_RX0_IRQHandler        ; CAN1 RX0
117
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
118
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
121
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
122
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
123
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     TIM4_IRQHandler            ; TIM4
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
130
-                DCD     I2C2_ER_IRQHandler         ; I2C1 Error
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     SPI2_IRQHandler            ; SPI2
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     USART3_IRQHandler          ; USART3
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC alarm through EXTI line
138
-                DCD     OTG_FS_WKUP_IRQHandler     ; USB OTG FS Wakeup through EXTI line
139
-                DCD     0                          ; Reserved
140
-                DCD     0                          ; Reserved
141
-                DCD     0                          ; Reserved
142
-                DCD     0                          ; Reserved
143
-                DCD     0                          ; Reserved
144
-                DCD     0                          ; Reserved
145
-                DCD     0                          ; Reserved
146
-                DCD     TIM5_IRQHandler            ; TIM5
147
-                DCD     SPI3_IRQHandler            ; SPI3
148
-                DCD     UART4_IRQHandler           ; UART4
149
-                DCD     UART5_IRQHandler           ; UART5
150
-                DCD     TIM6_IRQHandler            ; TIM6
151
-                DCD     TIM7_IRQHandler            ; TIM7
152
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
153
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
154
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
155
-                DCD     DMA2_Channel4_IRQHandler   ; DMA2 Channel4
156
-                DCD     DMA2_Channel5_IRQHandler   ; DMA2 Channel5
157
-                DCD     0                          ; Reserved
158
-                DCD     0                          ; Reserved
159
-                DCD     CAN2_TX_IRQHandler         ; CAN2 TX
160
-                DCD     CAN2_RX0_IRQHandler        ; CAN2 RX0
161
-                DCD     CAN2_RX1_IRQHandler        ; CAN2 RX1
162
-                DCD     CAN2_SCE_IRQHandler        ; CAN2 SCE
163
-                DCD     OTG_FS_IRQHandler          ; USB OTG FS
164
-__Vectors_End
165
-
166
-__Vectors_Size  EQU  __Vectors_End - __Vectors
167
-
168
-                AREA    |.text|, CODE, READONLY
169
-
170
-; Reset handler
171
-Reset_Handler    PROC
172
-                 EXPORT  Reset_Handler             [WEAK]
173
-        IMPORT  SystemInit
174
-        IMPORT  __main
175
-                 LDR     R0, =SystemInit
176
-                 BLX     R0
177
-                 LDR     R0, =__main
178
-                 BX      R0
179
-                 ENDP
180
-
181
-; Dummy Exception Handlers (infinite loops which can be modified)
182
-
183
-NMI_Handler     PROC
184
-                EXPORT  NMI_Handler                [WEAK]
185
-                B       .
186
-                ENDP
187
-HardFault_Handler\
188
-                PROC
189
-                EXPORT  HardFault_Handler          [WEAK]
190
-                B       .
191
-                ENDP
192
-MemManage_Handler\
193
-                PROC
194
-                EXPORT  MemManage_Handler          [WEAK]
195
-                B       .
196
-                ENDP
197
-BusFault_Handler\
198
-                PROC
199
-                EXPORT  BusFault_Handler           [WEAK]
200
-                B       .
201
-                ENDP
202
-UsageFault_Handler\
203
-                PROC
204
-                EXPORT  UsageFault_Handler         [WEAK]
205
-                B       .
206
-                ENDP
207
-SVC_Handler     PROC
208
-                EXPORT  SVC_Handler                [WEAK]
209
-                B       .
210
-                ENDP
211
-DebugMon_Handler\
212
-                PROC
213
-                EXPORT  DebugMon_Handler           [WEAK]
214
-                B       .
215
-                ENDP
216
-PendSV_Handler  PROC
217
-                EXPORT  PendSV_Handler             [WEAK]
218
-                B       .
219
-                ENDP
220
-SysTick_Handler PROC
221
-                EXPORT  SysTick_Handler            [WEAK]
222
-                B       .
223
-                ENDP
224
-
225
-Default_Handler PROC
226
-
227
-                EXPORT  WWDG_IRQHandler            [WEAK]
228
-                EXPORT  PVD_IRQHandler             [WEAK]
229
-                EXPORT  TAMPER_IRQHandler          [WEAK]
230
-                EXPORT  RTC_IRQHandler             [WEAK]
231
-                EXPORT  FLASH_IRQHandler           [WEAK]
232
-                EXPORT  RCC_IRQHandler             [WEAK]
233
-                EXPORT  EXTI0_IRQHandler           [WEAK]
234
-                EXPORT  EXTI1_IRQHandler           [WEAK]
235
-                EXPORT  EXTI2_IRQHandler           [WEAK]
236
-                EXPORT  EXTI3_IRQHandler           [WEAK]
237
-                EXPORT  EXTI4_IRQHandler           [WEAK]
238
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
239
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
240
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
241
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
242
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
243
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
244
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
245
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
246
-                EXPORT  CAN1_TX_IRQHandler         [WEAK]
247
-                EXPORT  CAN1_RX0_IRQHandler        [WEAK]
248
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
249
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
250
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
251
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
252
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
253
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
254
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
255
-                EXPORT  TIM2_IRQHandler            [WEAK]
256
-                EXPORT  TIM3_IRQHandler            [WEAK]
257
-                EXPORT  TIM4_IRQHandler            [WEAK]
258
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
259
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
260
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
261
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
262
-                EXPORT  SPI1_IRQHandler            [WEAK]
263
-                EXPORT  SPI2_IRQHandler            [WEAK]
264
-                EXPORT  USART1_IRQHandler          [WEAK]
265
-                EXPORT  USART2_IRQHandler          [WEAK]
266
-                EXPORT  USART3_IRQHandler          [WEAK]
267
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
268
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
269
-                EXPORT  OTG_FS_WKUP_IRQHandler     [WEAK]
270
-                EXPORT  TIM5_IRQHandler            [WEAK]
271
-                EXPORT  SPI3_IRQHandler            [WEAK]
272
-                EXPORT  UART4_IRQHandler           [WEAK]
273
-                EXPORT  UART5_IRQHandler           [WEAK]
274
-                EXPORT  TIM6_IRQHandler            [WEAK]
275
-                EXPORT  TIM7_IRQHandler            [WEAK]
276
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
277
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
278
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
279
-                EXPORT  DMA2_Channel4_IRQHandler   [WEAK]
280
-                EXPORT  DMA2_Channel5_IRQHandler   [WEAK]
281
-                EXPORT  CAN2_TX_IRQHandler         [WEAK]
282
-                EXPORT  CAN2_RX0_IRQHandler        [WEAK]
283
-                EXPORT  CAN2_RX1_IRQHandler        [WEAK]
284
-                EXPORT  CAN2_SCE_IRQHandler        [WEAK]
285
-                EXPORT  OTG_FS_IRQHandler          [WEAK]
286
-
287
-WWDG_IRQHandler
288
-PVD_IRQHandler
289
-TAMPER_IRQHandler
290
-RTC_IRQHandler
291
-FLASH_IRQHandler
292
-RCC_IRQHandler
293
-EXTI0_IRQHandler
294
-EXTI1_IRQHandler
295
-EXTI2_IRQHandler
296
-EXTI3_IRQHandler
297
-EXTI4_IRQHandler
298
-DMA1_Channel1_IRQHandler
299
-DMA1_Channel2_IRQHandler
300
-DMA1_Channel3_IRQHandler
301
-DMA1_Channel4_IRQHandler
302
-DMA1_Channel5_IRQHandler
303
-DMA1_Channel6_IRQHandler
304
-DMA1_Channel7_IRQHandler
305
-ADC1_2_IRQHandler
306
-CAN1_TX_IRQHandler
307
-CAN1_RX0_IRQHandler
308
-CAN1_RX1_IRQHandler
309
-CAN1_SCE_IRQHandler
310
-EXTI9_5_IRQHandler
311
-TIM1_BRK_IRQHandler
312
-TIM1_UP_IRQHandler
313
-TIM1_TRG_COM_IRQHandler
314
-TIM1_CC_IRQHandler
315
-TIM2_IRQHandler
316
-TIM3_IRQHandler
317
-TIM4_IRQHandler
318
-I2C1_EV_IRQHandler
319
-I2C1_ER_IRQHandler
320
-I2C2_EV_IRQHandler
321
-I2C2_ER_IRQHandler
322
-SPI1_IRQHandler
323
-SPI2_IRQHandler
324
-USART1_IRQHandler
325
-USART2_IRQHandler
326
-USART3_IRQHandler
327
-EXTI15_10_IRQHandler
328
-RTC_Alarm_IRQHandler
329
-OTG_FS_WKUP_IRQHandler
330
-TIM5_IRQHandler
331
-SPI3_IRQHandler
332
-UART4_IRQHandler
333
-UART5_IRQHandler
334
-TIM6_IRQHandler
335
-TIM7_IRQHandler
336
-DMA2_Channel1_IRQHandler
337
-DMA2_Channel2_IRQHandler
338
-DMA2_Channel3_IRQHandler
339
-DMA2_Channel4_IRQHandler
340
-DMA2_Channel5_IRQHandler
341
-CAN2_TX_IRQHandler
342
-CAN2_RX0_IRQHandler
343
-CAN2_RX1_IRQHandler
344
-CAN2_SCE_IRQHandler
345
-OTG_FS_IRQHandler
346
-
347
-                B       .
348
-
349
-                ENDP
350
-
351
-                ALIGN
352
-
353
-;*******************************************************************************
354
-; User Stack and Heap initialization
355
-;*******************************************************************************
356
-                 IF      :DEF:__MICROLIB
357
-                
358
-                 EXPORT  __initial_sp
359
-                 EXPORT  __heap_base
360
-                 EXPORT  __heap_limit
361
-                
362
-                 ELSE
363
-                
364
-                 IMPORT  __use_two_region_memory
365
-                 EXPORT  __user_initial_stackheap
366
-                 
367
-__user_initial_stackheap
368
-
369
-                 LDR     R0, =  Heap_Mem
370
-                 LDR     R1, =(Stack_Mem + Stack_Size)
371
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
372
-                 LDR     R3, = Stack_Mem
373
-                 BX      LR
374
-
375
-                 ALIGN
376
-
377
-                 ENDIF
378
-
379
-                 END
380
-
381
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 385
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f107xc.s View File

@@ -1,385 +0,0 @@
1
-;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2
-;* File Name          : startup_stm32f107xc.s
3
-;* Author             : MCD Application Team
4
-;* Version            : V4.2.0
5
-;* Date               : 31-March-2017
6
-;* Description        : STM32F107xC Devices vector table for MDK-ARM toolchain. 
7
-;*                      This module performs:
8
-;*                      - Set the initial SP
9
-;*                      - Set the initial PC == Reset_Handler
10
-;*                      - Set the vector table entries with the exceptions ISR address
11
-;*                      - Configure the clock system
12
-;*                      - Branches to __main in the C library (which eventually
13
-;*                        calls main()).
14
-;*                      After Reset the Cortex-M3 processor is in Thread mode,
15
-;*                      priority is Privileged, and the Stack is set to Main.
16
-;********************************************************************************
17
-;*
18
-;* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19
-;*
20
-;* Redistribution and use in source and binary forms, with or without modification,
21
-;* are permitted provided that the following conditions are met:
22
-;*   1. Redistributions of source code must retain the above copyright notice,
23
-;*      this list of conditions and the following disclaimer.
24
-;*   2. Redistributions in binary form must reproduce the above copyright notice,
25
-;*      this list of conditions and the following disclaimer in the documentation
26
-;*      and/or other materials provided with the distribution.
27
-;*   3. Neither the name of STMicroelectronics nor the names of its contributors
28
-;*      may be used to endorse or promote products derived from this software
29
-;*      without specific prior written permission.
30
-;*
31
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32
-;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33
-;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34
-;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35
-;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36
-;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37
-;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39
-;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40
-;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41
-; 
42
-;*******************************************************************************
43
-
44
-; Amount of memory (in bytes) allocated for Stack
45
-; Tailor this value to your application needs
46
-; <h> Stack Configuration
47
-;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
48
-; </h>
49
-
50
-Stack_Size      EQU     0x00000400
51
-
52
-                AREA    STACK, NOINIT, READWRITE, ALIGN=3
53
-Stack_Mem       SPACE   Stack_Size
54
-__initial_sp
55
-
56
-
57
-; <h> Heap Configuration
58
-;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
59
-; </h>
60
-
61
-Heap_Size       EQU     0x00000200
62
-
63
-                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
64
-__heap_base
65
-Heap_Mem        SPACE   Heap_Size
66
-__heap_limit
67
-
68
-                PRESERVE8
69
-                THUMB
70
-
71
-
72
-; Vector Table Mapped to Address 0 at Reset
73
-                AREA    RESET, DATA, READONLY
74
-                EXPORT  __Vectors
75
-                EXPORT  __Vectors_End
76
-                EXPORT  __Vectors_Size
77
-
78
-__Vectors       DCD     __initial_sp               ; Top of Stack
79
-                DCD     Reset_Handler              ; Reset Handler
80
-                DCD     NMI_Handler                ; NMI Handler
81
-                DCD     HardFault_Handler          ; Hard Fault Handler
82
-                DCD     MemManage_Handler          ; MPU Fault Handler
83
-                DCD     BusFault_Handler           ; Bus Fault Handler
84
-                DCD     UsageFault_Handler         ; Usage Fault Handler
85
-                DCD     0                          ; Reserved
86
-                DCD     0                          ; Reserved
87
-                DCD     0                          ; Reserved
88
-                DCD     0                          ; Reserved
89
-                DCD     SVC_Handler                ; SVCall Handler
90
-                DCD     DebugMon_Handler           ; Debug Monitor Handler
91
-                DCD     0                          ; Reserved
92
-                DCD     PendSV_Handler             ; PendSV Handler
93
-                DCD     SysTick_Handler            ; SysTick Handler
94
-
95
-                ; External Interrupts
96
-                DCD     WWDG_IRQHandler            ; Window Watchdog
97
-                DCD     PVD_IRQHandler             ; PVD through EXTI Line detect
98
-                DCD     TAMPER_IRQHandler          ; Tamper
99
-                DCD     RTC_IRQHandler             ; RTC
100
-                DCD     FLASH_IRQHandler           ; Flash
101
-                DCD     RCC_IRQHandler             ; RCC
102
-                DCD     EXTI0_IRQHandler           ; EXTI Line 0
103
-                DCD     EXTI1_IRQHandler           ; EXTI Line 1
104
-                DCD     EXTI2_IRQHandler           ; EXTI Line 2
105
-                DCD     EXTI3_IRQHandler           ; EXTI Line 3
106
-                DCD     EXTI4_IRQHandler           ; EXTI Line 4
107
-                DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1
108
-                DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2
109
-                DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3
110
-                DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4
111
-                DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5
112
-                DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6
113
-                DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7
114
-                DCD     ADC1_2_IRQHandler          ; ADC1 and ADC2
115
-                DCD     CAN1_TX_IRQHandler         ; CAN1 TX
116
-                DCD     CAN1_RX0_IRQHandler        ; CAN1 RX0
117
-                DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1
118
-                DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE
119
-                DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5
120
-                DCD     TIM1_BRK_IRQHandler        ; TIM1 Break
121
-                DCD     TIM1_UP_IRQHandler         ; TIM1 Update
122
-                DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation
123
-                DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare
124
-                DCD     TIM2_IRQHandler            ; TIM2
125
-                DCD     TIM3_IRQHandler            ; TIM3
126
-                DCD     TIM4_IRQHandler            ; TIM4
127
-                DCD     I2C1_EV_IRQHandler         ; I2C1 Event
128
-                DCD     I2C1_ER_IRQHandler         ; I2C1 Error
129
-                DCD     I2C2_EV_IRQHandler         ; I2C2 Event
130
-                DCD     I2C2_ER_IRQHandler         ; I2C1 Error
131
-                DCD     SPI1_IRQHandler            ; SPI1
132
-                DCD     SPI2_IRQHandler            ; SPI2
133
-                DCD     USART1_IRQHandler          ; USART1
134
-                DCD     USART2_IRQHandler          ; USART2
135
-                DCD     USART3_IRQHandler          ; USART3
136
-                DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10
137
-                DCD     RTC_Alarm_IRQHandler        ; RTC alarm through EXTI line
138
-                DCD     OTG_FS_WKUP_IRQHandler     ; USB OTG FS Wakeup through EXTI line
139
-                DCD     0                          ; Reserved
140
-                DCD     0                          ; Reserved
141
-                DCD     0                          ; Reserved
142
-                DCD     0                          ; Reserved
143
-                DCD     0                          ; Reserved
144
-                DCD     0                          ; Reserved
145
-                DCD     0                          ; Reserved
146
-                DCD     TIM5_IRQHandler            ; TIM5
147
-                DCD     SPI3_IRQHandler            ; SPI3
148
-                DCD     UART4_IRQHandler           ; UART4
149
-                DCD     UART5_IRQHandler           ; UART5
150
-                DCD     TIM6_IRQHandler            ; TIM6
151
-                DCD     TIM7_IRQHandler            ; TIM7
152
-                DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1
153
-                DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2
154
-                DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3
155
-                DCD     DMA2_Channel4_IRQHandler   ; DMA2 Channel4
156
-                DCD     DMA2_Channel5_IRQHandler   ; DMA2 Channel5
157
-                DCD     ETH_IRQHandler             ; Ethernet
158
-                DCD     ETH_WKUP_IRQHandler        ; Ethernet Wakeup through EXTI line
159
-                DCD     CAN2_TX_IRQHandler         ; CAN2 TX
160
-                DCD     CAN2_RX0_IRQHandler        ; CAN2 RX0
161
-                DCD     CAN2_RX1_IRQHandler        ; CAN2 RX1
162
-                DCD     CAN2_SCE_IRQHandler        ; CAN2 SCE
163
-                DCD     OTG_FS_IRQHandler          ; USB OTG FS
164
-__Vectors_End
165
-
166
-__Vectors_Size  EQU  __Vectors_End - __Vectors
167
-
168
-                AREA    |.text|, CODE, READONLY
169
-
170
-; Reset handler
171
-Reset_Handler    PROC
172
-                 EXPORT  Reset_Handler             [WEAK]
173
-        IMPORT  SystemInit
174
-        IMPORT  __main
175
-                 LDR     R0, =SystemInit
176
-                 BLX     R0
177
-                 LDR     R0, =__main
178
-                 BX      R0
179
-                 ENDP
180
-
181
-; Dummy Exception Handlers (infinite loops which can be modified)
182
-
183
-NMI_Handler     PROC
184
-                EXPORT  NMI_Handler                [WEAK]
185
-                B       .
186
-                ENDP
187
-HardFault_Handler\
188
-                PROC
189
-                EXPORT  HardFault_Handler          [WEAK]
190
-                B       .
191
-                ENDP
192
-MemManage_Handler\
193
-                PROC
194
-                EXPORT  MemManage_Handler          [WEAK]
195
-                B       .
196
-                ENDP
197
-BusFault_Handler\
198
-                PROC
199
-                EXPORT  BusFault_Handler           [WEAK]
200
-                B       .
201
-                ENDP
202
-UsageFault_Handler\
203
-                PROC
204
-                EXPORT  UsageFault_Handler         [WEAK]
205
-                B       .
206
-                ENDP
207
-SVC_Handler     PROC
208
-                EXPORT  SVC_Handler                [WEAK]
209
-                B       .
210
-                ENDP
211
-DebugMon_Handler\
212
-                PROC
213
-                EXPORT  DebugMon_Handler           [WEAK]
214
-                B       .
215
-                ENDP
216
-PendSV_Handler  PROC
217
-                EXPORT  PendSV_Handler             [WEAK]
218
-                B       .
219
-                ENDP
220
-SysTick_Handler PROC
221
-                EXPORT  SysTick_Handler            [WEAK]
222
-                B       .
223
-                ENDP
224
-
225
-Default_Handler PROC
226
-
227
-                EXPORT  WWDG_IRQHandler            [WEAK]
228
-                EXPORT  PVD_IRQHandler             [WEAK]
229
-                EXPORT  TAMPER_IRQHandler          [WEAK]
230
-                EXPORT  RTC_IRQHandler             [WEAK]
231
-                EXPORT  FLASH_IRQHandler           [WEAK]
232
-                EXPORT  RCC_IRQHandler             [WEAK]
233
-                EXPORT  EXTI0_IRQHandler           [WEAK]
234
-                EXPORT  EXTI1_IRQHandler           [WEAK]
235
-                EXPORT  EXTI2_IRQHandler           [WEAK]
236
-                EXPORT  EXTI3_IRQHandler           [WEAK]
237
-                EXPORT  EXTI4_IRQHandler           [WEAK]
238
-                EXPORT  DMA1_Channel1_IRQHandler   [WEAK]
239
-                EXPORT  DMA1_Channel2_IRQHandler   [WEAK]
240
-                EXPORT  DMA1_Channel3_IRQHandler   [WEAK]
241
-                EXPORT  DMA1_Channel4_IRQHandler   [WEAK]
242
-                EXPORT  DMA1_Channel5_IRQHandler   [WEAK]
243
-                EXPORT  DMA1_Channel6_IRQHandler   [WEAK]
244
-                EXPORT  DMA1_Channel7_IRQHandler   [WEAK]
245
-                EXPORT  ADC1_2_IRQHandler          [WEAK]
246
-                EXPORT  CAN1_TX_IRQHandler         [WEAK]
247
-                EXPORT  CAN1_RX0_IRQHandler        [WEAK]
248
-                EXPORT  CAN1_RX1_IRQHandler        [WEAK]
249
-                EXPORT  CAN1_SCE_IRQHandler        [WEAK]
250
-                EXPORT  EXTI9_5_IRQHandler         [WEAK]
251
-                EXPORT  TIM1_BRK_IRQHandler        [WEAK]
252
-                EXPORT  TIM1_UP_IRQHandler         [WEAK]
253
-                EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]
254
-                EXPORT  TIM1_CC_IRQHandler         [WEAK]
255
-                EXPORT  TIM2_IRQHandler            [WEAK]
256
-                EXPORT  TIM3_IRQHandler            [WEAK]
257
-                EXPORT  TIM4_IRQHandler            [WEAK]
258
-                EXPORT  I2C1_EV_IRQHandler         [WEAK]
259
-                EXPORT  I2C1_ER_IRQHandler         [WEAK]
260
-                EXPORT  I2C2_EV_IRQHandler         [WEAK]
261
-                EXPORT  I2C2_ER_IRQHandler         [WEAK]
262
-                EXPORT  SPI1_IRQHandler            [WEAK]
263
-                EXPORT  SPI2_IRQHandler            [WEAK]
264
-                EXPORT  USART1_IRQHandler          [WEAK]
265
-                EXPORT  USART2_IRQHandler          [WEAK]
266
-                EXPORT  USART3_IRQHandler          [WEAK]
267
-                EXPORT  EXTI15_10_IRQHandler       [WEAK]
268
-                EXPORT  RTC_Alarm_IRQHandler        [WEAK]
269
-                EXPORT  OTG_FS_WKUP_IRQHandler     [WEAK]
270
-                EXPORT  TIM5_IRQHandler            [WEAK]
271
-                EXPORT  SPI3_IRQHandler            [WEAK]
272
-                EXPORT  UART4_IRQHandler           [WEAK]
273
-                EXPORT  UART5_IRQHandler           [WEAK]
274
-                EXPORT  TIM6_IRQHandler            [WEAK]
275
-                EXPORT  TIM7_IRQHandler            [WEAK]
276
-                EXPORT  DMA2_Channel1_IRQHandler   [WEAK]
277
-                EXPORT  DMA2_Channel2_IRQHandler   [WEAK]
278
-                EXPORT  DMA2_Channel3_IRQHandler   [WEAK]
279
-                EXPORT  DMA2_Channel4_IRQHandler   [WEAK]
280
-                EXPORT  DMA2_Channel5_IRQHandler   [WEAK]
281
-                EXPORT  ETH_IRQHandler             [WEAK]
282
-                EXPORT  ETH_WKUP_IRQHandler        [WEAK]
283
-                EXPORT  CAN2_TX_IRQHandler         [WEAK]
284
-                EXPORT  CAN2_RX0_IRQHandler        [WEAK]
285
-                EXPORT  CAN2_RX1_IRQHandler        [WEAK]
286
-                EXPORT  CAN2_SCE_IRQHandler        [WEAK]
287
-                EXPORT  OTG_FS_IRQHandler          [WEAK]
288
-
289
-WWDG_IRQHandler
290
-PVD_IRQHandler
291
-TAMPER_IRQHandler
292
-RTC_IRQHandler
293
-FLASH_IRQHandler
294
-RCC_IRQHandler
295
-EXTI0_IRQHandler
296
-EXTI1_IRQHandler
297
-EXTI2_IRQHandler
298
-EXTI3_IRQHandler
299
-EXTI4_IRQHandler
300
-DMA1_Channel1_IRQHandler
301
-DMA1_Channel2_IRQHandler
302
-DMA1_Channel3_IRQHandler
303
-DMA1_Channel4_IRQHandler
304
-DMA1_Channel5_IRQHandler
305
-DMA1_Channel6_IRQHandler
306
-DMA1_Channel7_IRQHandler
307
-ADC1_2_IRQHandler
308
-CAN1_TX_IRQHandler
309
-CAN1_RX0_IRQHandler
310
-CAN1_RX1_IRQHandler
311
-CAN1_SCE_IRQHandler
312
-EXTI9_5_IRQHandler
313
-TIM1_BRK_IRQHandler
314
-TIM1_UP_IRQHandler
315
-TIM1_TRG_COM_IRQHandler
316
-TIM1_CC_IRQHandler
317
-TIM2_IRQHandler
318
-TIM3_IRQHandler
319
-TIM4_IRQHandler
320
-I2C1_EV_IRQHandler
321
-I2C1_ER_IRQHandler
322
-I2C2_EV_IRQHandler
323
-I2C2_ER_IRQHandler
324
-SPI1_IRQHandler
325
-SPI2_IRQHandler
326
-USART1_IRQHandler
327
-USART2_IRQHandler
328
-USART3_IRQHandler
329
-EXTI15_10_IRQHandler
330
-RTC_Alarm_IRQHandler
331
-OTG_FS_WKUP_IRQHandler
332
-TIM5_IRQHandler
333
-SPI3_IRQHandler
334
-UART4_IRQHandler
335
-UART5_IRQHandler
336
-TIM6_IRQHandler
337
-TIM7_IRQHandler
338
-DMA2_Channel1_IRQHandler
339
-DMA2_Channel2_IRQHandler
340
-DMA2_Channel3_IRQHandler
341
-DMA2_Channel4_IRQHandler
342
-DMA2_Channel5_IRQHandler
343
-ETH_IRQHandler
344
-ETH_WKUP_IRQHandler
345
-CAN2_TX_IRQHandler
346
-CAN2_RX0_IRQHandler
347
-CAN2_RX1_IRQHandler
348
-CAN2_SCE_IRQHandler
349
-OTG_FS_IRQHandler
350
-
351
-                B       .
352
-
353
-                ENDP
354
-
355
-                ALIGN
356
-
357
-;*******************************************************************************
358
-; User Stack and Heap initialization
359
-;*******************************************************************************
360
-                 IF      :DEF:__MICROLIB
361
-                
362
-                 EXPORT  __initial_sp
363
-                 EXPORT  __heap_base
364
-                 EXPORT  __heap_limit
365
-                
366
-                 ELSE
367
-                
368
-                 IMPORT  __use_two_region_memory
369
-                 EXPORT  __user_initial_stackheap
370
-                 
371
-__user_initial_stackheap
372
-
373
-                 LDR     R0, =  Heap_Mem
374
-                 LDR     R1, =(Stack_Mem + Stack_Size)
375
-                 LDR     R2, = (Heap_Mem +  Heap_Size)
376
-                 LDR     R3, = Stack_Mem
377
-                 BX      LR
378
-
379
-                 ALIGN
380
-
381
-                 ENDIF
382
-
383
-                 END
384
-
385
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

+ 0
- 422
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xb.s View File

@@ -1,422 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f100xb.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F100xB Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-  .word _estack
145
-  .word Reset_Handler
146
-  .word NMI_Handler
147
-  .word HardFault_Handler
148
-  .word MemManage_Handler
149
-  .word BusFault_Handler
150
-  .word UsageFault_Handler
151
-  .word 0
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word SVC_Handler
156
-  .word DebugMon_Handler
157
-  .word 0
158
-  .word PendSV_Handler
159
-  .word SysTick_Handler
160
-  .word WWDG_IRQHandler
161
-  .word PVD_IRQHandler
162
-  .word TAMPER_IRQHandler
163
-  .word RTC_IRQHandler
164
-  .word FLASH_IRQHandler
165
-  .word RCC_IRQHandler
166
-  .word EXTI0_IRQHandler
167
-  .word EXTI1_IRQHandler
168
-  .word EXTI2_IRQHandler
169
-  .word EXTI3_IRQHandler
170
-  .word EXTI4_IRQHandler
171
-  .word DMA1_Channel1_IRQHandler
172
-  .word DMA1_Channel2_IRQHandler
173
-  .word DMA1_Channel3_IRQHandler
174
-  .word DMA1_Channel4_IRQHandler
175
-  .word DMA1_Channel5_IRQHandler
176
-  .word DMA1_Channel6_IRQHandler
177
-  .word DMA1_Channel7_IRQHandler
178
-  .word ADC1_IRQHandler
179
-  .word 0
180
-  .word 0
181
-  .word 0
182
-  .word 0
183
-  .word EXTI9_5_IRQHandler
184
-  .word TIM1_BRK_TIM15_IRQHandler
185
-  .word TIM1_UP_TIM16_IRQHandler
186
-  .word TIM1_TRG_COM_TIM17_IRQHandler
187
-  .word TIM1_CC_IRQHandler
188
-  .word TIM2_IRQHandler
189
-  .word TIM3_IRQHandler
190
-  .word TIM4_IRQHandler
191
-  .word I2C1_EV_IRQHandler
192
-  .word I2C1_ER_IRQHandler
193
-  .word I2C2_EV_IRQHandler
194
-  .word I2C2_ER_IRQHandler
195
-  .word SPI1_IRQHandler
196
-  .word SPI2_IRQHandler
197
-  .word USART1_IRQHandler
198
-  .word USART2_IRQHandler
199
-  .word USART3_IRQHandler
200
-  .word EXTI15_10_IRQHandler
201
-  .word RTC_Alarm_IRQHandler
202
-  .word CEC_IRQHandler
203
-  .word 0
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word 0
212
-  .word 0
213
-  .word 0
214
-  .word TIM6_DAC_IRQHandler
215
-  .word TIM7_IRQHandler  
216
-  .word 0
217
-  .word 0
218
-  .word 0
219
-  .word 0
220
-  .word 0
221
-  .word 0
222
-  .word 0
223
-  .word 0
224
-  .word 0
225
-  .word 0
226
-  .word 0
227
-  .word 0
228
-  .word 0
229
-  .word 0
230
-  .word 0
231
-  .word 0
232
-  .word 0
233
-  .word 0
234
-  .word 0
235
-  .word 0
236
-  .word 0
237
-  .word 0
238
-  .word 0
239
-  .word 0
240
-  .word 0
241
-  .word 0
242
-  .word 0
243
-  .word 0
244
-  .word 0
245
-  .word 0
246
-  .word 0
247
-  .word 0
248
-  .word 0
249
-  .word 0
250
-  .word 0
251
-  .word 0
252
-  .word 0
253
-  .word 0
254
-  .word 0
255
-  .word 0
256
-  .word 0
257
-  .word 0
258
-  .word 0
259
-  .word BootRAM          /* @0x01CC. This is for boot in RAM mode for 
260
-                            STM32F10xB Value Line devices. */
261
-
262
-/*******************************************************************************
263
-*
264
-* Provide weak aliases for each Exception handler to the Default_Handler.
265
-* As they are weak aliases, any function with the same name will override
266
-* this definition.
267
-*
268
-*******************************************************************************/
269
-
270
-    
271
-  .weak  NMI_Handler
272
-  .thumb_set NMI_Handler,Default_Handler
273
-  
274
-  .weak  HardFault_Handler
275
-  .thumb_set HardFault_Handler,Default_Handler
276
-  
277
-  .weak  MemManage_Handler
278
-  .thumb_set MemManage_Handler,Default_Handler
279
-  
280
-  .weak  BusFault_Handler
281
-  .thumb_set BusFault_Handler,Default_Handler
282
-
283
-  .weak  UsageFault_Handler
284
-  .thumb_set UsageFault_Handler,Default_Handler
285
-
286
-  .weak  SVC_Handler
287
-  .thumb_set SVC_Handler,Default_Handler
288
-
289
-  .weak  DebugMon_Handler
290
-  .thumb_set DebugMon_Handler,Default_Handler
291
-
292
-  .weak  PendSV_Handler
293
-  .thumb_set PendSV_Handler,Default_Handler
294
-
295
-  .weak  SysTick_Handler
296
-  .thumb_set SysTick_Handler,Default_Handler
297
-
298
-  .weak  WWDG_IRQHandler
299
-  .thumb_set WWDG_IRQHandler,Default_Handler
300
-
301
-  .weak  PVD_IRQHandler
302
-  .thumb_set PVD_IRQHandler,Default_Handler
303
-
304
-  .weak  TAMPER_IRQHandler
305
-  .thumb_set TAMPER_IRQHandler,Default_Handler
306
-
307
-  .weak  RTC_IRQHandler
308
-  .thumb_set RTC_IRQHandler,Default_Handler
309
-
310
-  .weak  FLASH_IRQHandler
311
-  .thumb_set FLASH_IRQHandler,Default_Handler
312
-
313
-  .weak  RCC_IRQHandler
314
-  .thumb_set RCC_IRQHandler,Default_Handler
315
-
316
-  .weak  EXTI0_IRQHandler
317
-  .thumb_set EXTI0_IRQHandler,Default_Handler
318
-
319
-  .weak  EXTI1_IRQHandler
320
-  .thumb_set EXTI1_IRQHandler,Default_Handler
321
-
322
-  .weak  EXTI2_IRQHandler
323
-  .thumb_set EXTI2_IRQHandler,Default_Handler
324
-
325
-  .weak  EXTI3_IRQHandler
326
-  .thumb_set EXTI3_IRQHandler,Default_Handler
327
-
328
-  .weak  EXTI4_IRQHandler
329
-  .thumb_set EXTI4_IRQHandler,Default_Handler
330
-
331
-  .weak  DMA1_Channel1_IRQHandler
332
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
333
-
334
-  .weak  DMA1_Channel2_IRQHandler
335
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
336
-
337
-  .weak  DMA1_Channel3_IRQHandler
338
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
339
-
340
-  .weak  DMA1_Channel4_IRQHandler
341
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
342
-
343
-  .weak  DMA1_Channel5_IRQHandler
344
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
345
-
346
-  .weak  DMA1_Channel6_IRQHandler
347
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
348
-
349
-  .weak  DMA1_Channel7_IRQHandler
350
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
351
-
352
-  .weak  ADC1_IRQHandler
353
-  .thumb_set ADC1_IRQHandler,Default_Handler
354
-
355
-  .weak  EXTI9_5_IRQHandler
356
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
357
-
358
-  .weak  TIM1_BRK_TIM15_IRQHandler
359
-  .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
360
-
361
-  .weak  TIM1_UP_TIM16_IRQHandler
362
-  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
363
-
364
-  .weak  TIM1_TRG_COM_TIM17_IRQHandler
365
-  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
366
-
367
-  .weak  TIM1_CC_IRQHandler
368
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
369
-
370
-  .weak  TIM2_IRQHandler
371
-  .thumb_set TIM2_IRQHandler,Default_Handler
372
-  
373
-  .weak  TIM3_IRQHandler
374
-  .thumb_set TIM3_IRQHandler,Default_Handler
375
-
376
-  .weak  TIM4_IRQHandler
377
-  .thumb_set TIM4_IRQHandler,Default_Handler
378
-
379
-  .weak  I2C1_EV_IRQHandler
380
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
381
-
382
-  .weak  I2C1_ER_IRQHandler
383
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
384
-  
385
-  .weak  I2C2_EV_IRQHandler
386
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
387
-
388
-  .weak  I2C2_ER_IRQHandler
389
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
390
-
391
-  .weak  SPI1_IRQHandler
392
-  .thumb_set SPI1_IRQHandler,Default_Handler
393
-  
394
-  .weak  SPI1_IRQHandler
395
-  .thumb_set SPI2_IRQHandler,Default_Handler
396
-
397
-  .weak  USART1_IRQHandler
398
-  .thumb_set USART1_IRQHandler,Default_Handler
399
-
400
-  .weak  USART2_IRQHandler
401
-  .thumb_set USART2_IRQHandler,Default_Handler
402
-  
403
-  .weak  USART3_IRQHandler
404
-  .thumb_set USART3_IRQHandler,Default_Handler
405
-
406
-  .weak  EXTI15_10_IRQHandler
407
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
408
-
409
-  .weak  RTC_Alarm_IRQHandler
410
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
411
-
412
-  .weak  CEC_IRQHandler
413
-  .thumb_set CEC_IRQHandler,Default_Handler
414
-
415
-  .weak  TIM6_DAC_IRQHandler
416
-  .thumb_set TIM6_DAC_IRQHandler,Default_Handler
417
-
418
-  .weak  TIM7_IRQHandler
419
-  .thumb_set TIM7_IRQHandler,Default_Handler  
420
-
421
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
422
-

+ 0
- 464
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f100xe.s View File

@@ -1,464 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f100xe.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F100xE Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_IRQHandler
180
-  .word 0
181
-  .word 0
182
-  .word 0
183
-  .word 0
184
-  .word EXTI9_5_IRQHandler
185
-  .word TIM1_BRK_TIM15_IRQHandler
186
-  .word TIM1_UP_TIM16_IRQHandler
187
-  .word TIM1_TRG_COM_TIM17_IRQHandler
188
-  .word TIM1_CC_IRQHandler
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word TIM4_IRQHandler
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word I2C2_EV_IRQHandler
195
-  .word I2C2_ER_IRQHandler
196
-  .word SPI1_IRQHandler
197
-  .word SPI2_IRQHandler
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word USART3_IRQHandler
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word CEC_IRQHandler
204
-  .word TIM12_IRQHandler
205
-  .word TIM13_IRQHandler
206
-  .word TIM14_IRQHandler
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word TIM5_IRQHandler
212
-  .word SPI3_IRQHandler
213
-  .word UART4_IRQHandler
214
-  .word UART5_IRQHandler
215
-  .word TIM6_DAC_IRQHandler
216
-  .word TIM7_IRQHandler  
217
-  .word DMA2_Channel1_IRQHandler
218
-  .word DMA2_Channel2_IRQHandler
219
-  .word DMA2_Channel3_IRQHandler
220
-  .word DMA2_Channel4_5_IRQHandler
221
-  .word DMA2_Channel5_IRQHandler
222
-  .word 0
223
-  .word 0
224
-  .word 0
225
-  .word 0
226
-  .word 0
227
-  .word 0
228
-  .word 0
229
-  .word 0
230
-  .word 0
231
-  .word 0
232
-  .word 0
233
-  .word 0
234
-  .word 0
235
-  .word 0
236
-  .word 0
237
-  .word 0
238
-  .word 0
239
-  .word 0
240
-  .word 0
241
-  .word 0
242
-  .word 0
243
-  .word 0
244
-  .word 0
245
-  .word 0
246
-  .word 0
247
-  .word 0
248
-  .word 0
249
-  .word 0
250
-  .word 0
251
-  .word 0
252
-  .word 0
253
-  .word 0
254
-  .word 0
255
-  .word 0
256
-  .word 0
257
-  .word 0
258
-  .word 0
259
-  .word 0
260
-  .word 0
261
-  .word 0
262
-  .word 0
263
-  .word 0
264
-  .word 0
265
-  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
266
-                         STM32F10x High Density Value line devices. */
267
-
268
-/*******************************************************************************
269
-*
270
-* Provide weak aliases for each Exception handler to the Default_Handler.
271
-* As they are weak aliases, any function with the same name will override
272
-* this definition.
273
-*
274
-*******************************************************************************/
275
-
276
-    
277
-  .weak  NMI_Handler
278
-  .thumb_set NMI_Handler,Default_Handler
279
-  
280
-  .weak  HardFault_Handler
281
-  .thumb_set HardFault_Handler,Default_Handler
282
-  
283
-  .weak  MemManage_Handler
284
-  .thumb_set MemManage_Handler,Default_Handler
285
-  
286
-  .weak  BusFault_Handler
287
-  .thumb_set BusFault_Handler,Default_Handler
288
-
289
-  .weak  UsageFault_Handler
290
-  .thumb_set UsageFault_Handler,Default_Handler
291
-
292
-  .weak  SVC_Handler
293
-  .thumb_set SVC_Handler,Default_Handler
294
-
295
-  .weak  DebugMon_Handler
296
-  .thumb_set DebugMon_Handler,Default_Handler
297
-
298
-  .weak  PendSV_Handler
299
-  .thumb_set PendSV_Handler,Default_Handler
300
-
301
-  .weak  SysTick_Handler
302
-  .thumb_set SysTick_Handler,Default_Handler
303
-
304
-  .weak  WWDG_IRQHandler
305
-  .thumb_set WWDG_IRQHandler,Default_Handler
306
-
307
-  .weak  PVD_IRQHandler
308
-  .thumb_set PVD_IRQHandler,Default_Handler
309
-
310
-  .weak  TAMPER_IRQHandler
311
-  .thumb_set TAMPER_IRQHandler,Default_Handler
312
-
313
-  .weak  RTC_IRQHandler
314
-  .thumb_set RTC_IRQHandler,Default_Handler
315
-
316
-  .weak  FLASH_IRQHandler
317
-  .thumb_set FLASH_IRQHandler,Default_Handler
318
-
319
-  .weak  RCC_IRQHandler
320
-  .thumb_set RCC_IRQHandler,Default_Handler
321
-
322
-  .weak  EXTI0_IRQHandler
323
-  .thumb_set EXTI0_IRQHandler,Default_Handler
324
-
325
-  .weak  EXTI1_IRQHandler
326
-  .thumb_set EXTI1_IRQHandler,Default_Handler
327
-
328
-  .weak  EXTI2_IRQHandler
329
-  .thumb_set EXTI2_IRQHandler,Default_Handler
330
-
331
-  .weak  EXTI3_IRQHandler
332
-  .thumb_set EXTI3_IRQHandler,Default_Handler
333
-
334
-  .weak  EXTI4_IRQHandler
335
-  .thumb_set EXTI4_IRQHandler,Default_Handler
336
-
337
-  .weak  DMA1_Channel1_IRQHandler
338
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
339
-
340
-  .weak  DMA1_Channel2_IRQHandler
341
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
342
-
343
-  .weak  DMA1_Channel3_IRQHandler
344
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
345
-
346
-  .weak  DMA1_Channel4_IRQHandler
347
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
348
-
349
-  .weak  DMA1_Channel5_IRQHandler
350
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
351
-
352
-  .weak  DMA1_Channel6_IRQHandler
353
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
354
-
355
-  .weak  DMA1_Channel7_IRQHandler
356
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
357
-
358
-  .weak  ADC1_IRQHandler
359
-  .thumb_set ADC1_IRQHandler,Default_Handler
360
-
361
-  .weak  EXTI9_5_IRQHandler
362
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
363
-
364
-  .weak  TIM1_BRK_TIM15_IRQHandler
365
-  .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
366
-
367
-  .weak  TIM1_UP_TIM16_IRQHandler
368
-  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
369
-
370
-  .weak  TIM1_TRG_COM_TIM17_IRQHandler
371
-  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
372
-
373
-  .weak  TIM1_CC_IRQHandler
374
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
375
-
376
-  .weak  TIM2_IRQHandler
377
-  .thumb_set TIM2_IRQHandler,Default_Handler
378
-
379
-  .weak  TIM3_IRQHandler
380
-  .thumb_set TIM3_IRQHandler,Default_Handler
381
-
382
-  .weak  TIM4_IRQHandler
383
-  .thumb_set TIM4_IRQHandler,Default_Handler
384
-
385
-  .weak  I2C1_EV_IRQHandler
386
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
387
-
388
-  .weak  I2C1_ER_IRQHandler
389
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
390
-
391
-  .weak  I2C2_EV_IRQHandler
392
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
393
-
394
-  .weak  I2C2_ER_IRQHandler
395
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
396
-
397
-  .weak  SPI1_IRQHandler
398
-  .thumb_set SPI1_IRQHandler,Default_Handler
399
-
400
-  .weak  SPI2_IRQHandler
401
-  .thumb_set SPI2_IRQHandler,Default_Handler
402
-
403
-  .weak  USART1_IRQHandler
404
-  .thumb_set USART1_IRQHandler,Default_Handler
405
-
406
-  .weak  USART2_IRQHandler
407
-  .thumb_set USART2_IRQHandler,Default_Handler
408
-
409
-  .weak  USART3_IRQHandler
410
-  .thumb_set USART3_IRQHandler,Default_Handler
411
-
412
-  .weak  EXTI15_10_IRQHandler
413
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
414
-
415
-  .weak  RTC_Alarm_IRQHandler
416
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
417
-
418
-  .weak  CEC_IRQHandler
419
-  .thumb_set CEC_IRQHandler,Default_Handler
420
-
421
-  .weak  TIM12_IRQHandler
422
-  .thumb_set TIM12_IRQHandler,Default_Handler
423
-
424
-  .weak  TIM13_IRQHandler
425
-  .thumb_set TIM13_IRQHandler,Default_Handler
426
-
427
-  .weak  TIM14_IRQHandler
428
-  .thumb_set TIM14_IRQHandler,Default_Handler
429
-
430
-  .weak  TIM5_IRQHandler
431
-  .thumb_set TIM5_IRQHandler,Default_Handler
432
-
433
-  .weak  SPI3_IRQHandler
434
-  .thumb_set SPI3_IRQHandler,Default_Handler
435
-
436
-  .weak  UART4_IRQHandler
437
-  .thumb_set UART4_IRQHandler,Default_Handler
438
-
439
-  .weak  UART5_IRQHandler
440
-  .thumb_set UART5_IRQHandler,Default_Handler
441
-  
442
-  .weak  TIM6_DAC_IRQHandler
443
-  .thumb_set TIM6_DAC_IRQHandler,Default_Handler
444
-
445
-  .weak  TIM7_IRQHandler
446
-  .thumb_set TIM7_IRQHandler,Default_Handler 
447
-
448
-  .weak  DMA2_Channel1_IRQHandler
449
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
450
-
451
-  .weak  DMA2_Channel2_IRQHandler
452
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
453
-
454
-  .weak  DMA2_Channel3_IRQHandler
455
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
456
-
457
-  .weak  DMA2_Channel4_5_IRQHandler
458
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler  
459
-
460
-  .weak  DMA2_Channel5_IRQHandler
461
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
462
-  
463
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
464
-

+ 0
- 337
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101x6.s View File

@@ -1,337 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f101x6.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F101x6 Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-
146
-  .word _estack
147
-  .word Reset_Handler
148
-  .word NMI_Handler
149
-  .word HardFault_Handler
150
-  .word MemManage_Handler
151
-  .word BusFault_Handler
152
-  .word UsageFault_Handler
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word 0
157
-  .word SVC_Handler
158
-  .word DebugMon_Handler
159
-  .word 0
160
-  .word PendSV_Handler
161
-  .word SysTick_Handler
162
-  .word WWDG_IRQHandler
163
-  .word PVD_IRQHandler
164
-  .word TAMPER_IRQHandler
165
-  .word RTC_IRQHandler
166
-  .word FLASH_IRQHandler
167
-  .word RCC_IRQHandler
168
-  .word EXTI0_IRQHandler
169
-  .word EXTI1_IRQHandler
170
-  .word EXTI2_IRQHandler
171
-  .word EXTI3_IRQHandler
172
-  .word EXTI4_IRQHandler
173
-  .word DMA1_Channel1_IRQHandler
174
-  .word DMA1_Channel2_IRQHandler
175
-  .word DMA1_Channel3_IRQHandler
176
-  .word DMA1_Channel4_IRQHandler
177
-  .word DMA1_Channel5_IRQHandler
178
-  .word DMA1_Channel6_IRQHandler
179
-  .word DMA1_Channel7_IRQHandler
180
-  .word ADC1_IRQHandler
181
-  .word 0
182
-  .word 0
183
-  .word 0
184
-  .word 0
185
-  .word EXTI9_5_IRQHandler
186
-  .word 0
187
-  .word 0
188
-  .word 0
189
-  .word 0
190
-  .word TIM2_IRQHandler
191
-  .word TIM3_IRQHandler
192
-  .word 0
193
-  .word I2C1_EV_IRQHandler
194
-  .word I2C1_ER_IRQHandler
195
-  .word 0
196
-  .word 0
197
-  .word SPI1_IRQHandler
198
-  .word 0
199
-  .word USART1_IRQHandler
200
-  .word USART2_IRQHandler
201
-  .word 0
202
-  .word EXTI15_10_IRQHandler
203
-  .word RTC_Alarm_IRQHandler
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word 0
212
-  .word BootRAM        /* @0x108. This is for boot in RAM mode for
213
-                          STM32F10x Low Density devices.*/
214
-
215
-/*******************************************************************************
216
-*
217
-* Provide weak aliases for each Exception handler to the Default_Handler.
218
-* As they are weak aliases, any function with the same name will override
219
-* this definition.
220
-*
221
-*******************************************************************************/
222
-
223
-  .weak  NMI_Handler
224
-  .thumb_set NMI_Handler,Default_Handler
225
-
226
-  .weak  HardFault_Handler
227
-  .thumb_set HardFault_Handler,Default_Handler
228
-
229
-  .weak  MemManage_Handler
230
-  .thumb_set MemManage_Handler,Default_Handler
231
-
232
-  .weak  BusFault_Handler
233
-  .thumb_set BusFault_Handler,Default_Handler
234
-
235
-  .weak  UsageFault_Handler
236
-  .thumb_set UsageFault_Handler,Default_Handler
237
-
238
-  .weak  SVC_Handler
239
-  .thumb_set SVC_Handler,Default_Handler
240
-
241
-  .weak  DebugMon_Handler
242
-  .thumb_set DebugMon_Handler,Default_Handler
243
-
244
-  .weak  PendSV_Handler
245
-  .thumb_set PendSV_Handler,Default_Handler
246
-
247
-  .weak  SysTick_Handler
248
-  .thumb_set SysTick_Handler,Default_Handler
249
-
250
-  .weak  WWDG_IRQHandler
251
-  .thumb_set WWDG_IRQHandler,Default_Handler
252
-
253
-  .weak  PVD_IRQHandler
254
-  .thumb_set PVD_IRQHandler,Default_Handler
255
-
256
-  .weak  TAMPER_IRQHandler
257
-  .thumb_set TAMPER_IRQHandler,Default_Handler
258
-
259
-  .weak  RTC_IRQHandler
260
-  .thumb_set RTC_IRQHandler,Default_Handler
261
-
262
-  .weak  FLASH_IRQHandler
263
-  .thumb_set FLASH_IRQHandler,Default_Handler
264
-
265
-  .weak  RCC_IRQHandler
266
-  .thumb_set RCC_IRQHandler,Default_Handler
267
-
268
-  .weak  EXTI0_IRQHandler
269
-  .thumb_set EXTI0_IRQHandler,Default_Handler
270
-
271
-  .weak  EXTI1_IRQHandler
272
-  .thumb_set EXTI1_IRQHandler,Default_Handler
273
-
274
-  .weak  EXTI2_IRQHandler
275
-  .thumb_set EXTI2_IRQHandler,Default_Handler
276
-
277
-  .weak  EXTI3_IRQHandler
278
-  .thumb_set EXTI3_IRQHandler,Default_Handler
279
-
280
-  .weak  EXTI4_IRQHandler
281
-  .thumb_set EXTI4_IRQHandler,Default_Handler
282
-
283
-  .weak  DMA1_Channel1_IRQHandler
284
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
285
-
286
-  .weak  DMA1_Channel2_IRQHandler
287
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
288
-
289
-  .weak  DMA1_Channel3_IRQHandler
290
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
291
-
292
-  .weak  DMA1_Channel4_IRQHandler
293
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
294
-
295
-  .weak  DMA1_Channel5_IRQHandler
296
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
297
-
298
-  .weak  DMA1_Channel6_IRQHandler
299
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
300
-
301
-  .weak  DMA1_Channel7_IRQHandler
302
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
303
-
304
-  .weak  ADC1_IRQHandler
305
-  .thumb_set ADC1_IRQHandler,Default_Handler
306
-
307
-  .weak  EXTI9_5_IRQHandler
308
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
309
-
310
-  .weak  TIM2_IRQHandler
311
-  .thumb_set TIM2_IRQHandler,Default_Handler
312
-
313
-  .weak  TIM3_IRQHandler
314
-  .thumb_set TIM3_IRQHandler,Default_Handler
315
-
316
-  .weak  I2C1_EV_IRQHandler
317
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
318
-
319
-  .weak  I2C1_ER_IRQHandler
320
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
321
-
322
-  .weak  SPI1_IRQHandler
323
-  .thumb_set SPI1_IRQHandler,Default_Handler
324
-
325
-  .weak  USART1_IRQHandler
326
-  .thumb_set USART1_IRQHandler,Default_Handler
327
-
328
-  .weak  USART2_IRQHandler
329
-  .thumb_set USART2_IRQHandler,Default_Handler
330
-
331
-  .weak  EXTI15_10_IRQHandler
332
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
333
-
334
-  .weak  RTC_Alarm_IRQHandler
335
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
336
-
337
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 353
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xb.s View File

@@ -1,353 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f101xb.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F101xB Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_IRQHandler
180
-  .word 0
181
-  .word 0
182
-  .word 0
183
-  .word 0
184
-  .word EXTI9_5_IRQHandler
185
-  .word 0
186
-  .word 0
187
-  .word 0
188
-  .word 0
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word TIM4_IRQHandler
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word I2C2_EV_IRQHandler
195
-  .word I2C2_ER_IRQHandler
196
-  .word SPI1_IRQHandler
197
-  .word SPI2_IRQHandler
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word USART3_IRQHandler
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word 0
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word BootRAM          /* @0x108. This is for boot in RAM mode for
212
-                            STM32F10x Medium Density devices. */
213
-
214
-/*******************************************************************************
215
-*
216
-* Provide weak aliases for each Exception handler to the Default_Handler.
217
-* As they are weak aliases, any function with the same name will override
218
-* this definition.
219
-*
220
-*******************************************************************************/
221
-
222
-  .weak NMI_Handler
223
-  .thumb_set NMI_Handler,Default_Handler
224
-
225
-  .weak HardFault_Handler
226
-  .thumb_set HardFault_Handler,Default_Handler
227
-
228
-  .weak MemManage_Handler
229
-  .thumb_set MemManage_Handler,Default_Handler
230
-
231
-  .weak BusFault_Handler
232
-  .thumb_set BusFault_Handler,Default_Handler
233
-
234
-  .weak UsageFault_Handler
235
-  .thumb_set UsageFault_Handler,Default_Handler
236
-
237
-  .weak SVC_Handler
238
-  .thumb_set SVC_Handler,Default_Handler
239
-
240
-  .weak DebugMon_Handler
241
-  .thumb_set DebugMon_Handler,Default_Handler
242
-
243
-  .weak PendSV_Handler
244
-  .thumb_set PendSV_Handler,Default_Handler
245
-
246
-  .weak SysTick_Handler
247
-  .thumb_set SysTick_Handler,Default_Handler
248
-
249
-  .weak WWDG_IRQHandler
250
-  .thumb_set WWDG_IRQHandler,Default_Handler
251
-
252
-  .weak PVD_IRQHandler
253
-  .thumb_set PVD_IRQHandler,Default_Handler
254
-
255
-  .weak TAMPER_IRQHandler
256
-  .thumb_set TAMPER_IRQHandler,Default_Handler
257
-
258
-  .weak RTC_IRQHandler
259
-  .thumb_set RTC_IRQHandler,Default_Handler
260
-
261
-  .weak FLASH_IRQHandler
262
-  .thumb_set FLASH_IRQHandler,Default_Handler
263
-
264
-  .weak RCC_IRQHandler
265
-  .thumb_set RCC_IRQHandler,Default_Handler
266
-
267
-  .weak EXTI0_IRQHandler
268
-  .thumb_set EXTI0_IRQHandler,Default_Handler
269
-
270
-  .weak EXTI1_IRQHandler
271
-  .thumb_set EXTI1_IRQHandler,Default_Handler
272
-
273
-  .weak EXTI2_IRQHandler
274
-  .thumb_set EXTI2_IRQHandler,Default_Handler
275
-
276
-  .weak EXTI3_IRQHandler
277
-  .thumb_set EXTI3_IRQHandler,Default_Handler
278
-
279
-  .weak EXTI4_IRQHandler
280
-  .thumb_set EXTI4_IRQHandler,Default_Handler
281
-
282
-  .weak DMA1_Channel1_IRQHandler
283
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
284
-
285
-  .weak DMA1_Channel2_IRQHandler
286
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
287
-
288
-  .weak DMA1_Channel3_IRQHandler
289
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
290
-
291
-  .weak DMA1_Channel4_IRQHandler
292
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
293
-
294
-  .weak DMA1_Channel5_IRQHandler
295
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
296
-
297
-  .weak DMA1_Channel6_IRQHandler
298
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
299
-
300
-  .weak DMA1_Channel7_IRQHandler
301
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
302
-
303
-  .weak  ADC1_IRQHandler
304
-  .thumb_set ADC1_IRQHandler,Default_Handler
305
-
306
-  .weak EXTI9_5_IRQHandler
307
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
308
-
309
-  .weak TIM2_IRQHandler
310
-  .thumb_set TIM2_IRQHandler,Default_Handler
311
-
312
-  .weak TIM3_IRQHandler
313
-  .thumb_set TIM3_IRQHandler,Default_Handler
314
-
315
-  .weak TIM4_IRQHandler
316
-  .thumb_set TIM4_IRQHandler,Default_Handler
317
-
318
-  .weak I2C1_EV_IRQHandler
319
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
320
-
321
-  .weak I2C1_ER_IRQHandler
322
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
323
-
324
-  .weak I2C2_EV_IRQHandler
325
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
326
-
327
-  .weak I2C2_ER_IRQHandler
328
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
329
-
330
-  .weak SPI1_IRQHandler
331
-  .thumb_set SPI1_IRQHandler,Default_Handler
332
-
333
-  .weak SPI2_IRQHandler
334
-  .thumb_set SPI2_IRQHandler,Default_Handler
335
-
336
-  .weak USART1_IRQHandler
337
-  .thumb_set USART1_IRQHandler,Default_Handler
338
-
339
-  .weak USART2_IRQHandler
340
-  .thumb_set USART2_IRQHandler,Default_Handler
341
-
342
-  .weak USART3_IRQHandler
343
-  .thumb_set USART3_IRQHandler,Default_Handler
344
-
345
-  .weak EXTI15_10_IRQHandler
346
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
347
-
348
-  .weak RTC_Alarm_IRQHandler
349
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
350
-
351
-
352
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
353
-

+ 0
- 438
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xe.s View File

@@ -1,438 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f101xe.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F101xE Value Line Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM,        0xF1E0F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_IRQHandler
180
-  .word 0
181
-  .word 0
182
-  .word 0
183
-  .word 0
184
-  .word EXTI9_5_IRQHandler
185
-  .word 0
186
-  .word 0
187
-  .word 0
188
-  .word 0
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word TIM4_IRQHandler
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word I2C2_EV_IRQHandler
195
-  .word I2C2_ER_IRQHandler
196
-  .word SPI1_IRQHandler
197
-  .word SPI2_IRQHandler
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word USART3_IRQHandler
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word 0
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word FSMC_IRQHandler
210
-  .word 0
211
-  .word TIM5_IRQHandler
212
-  .word SPI3_IRQHandler
213
-  .word UART4_IRQHandler
214
-  .word UART5_IRQHandler
215
-  .word TIM6_IRQHandler
216
-  .word TIM7_IRQHandler
217
-  .word DMA2_Channel1_IRQHandler
218
-  .word DMA2_Channel2_IRQHandler
219
-  .word DMA2_Channel3_IRQHandler
220
-  .word DMA2_Channel4_5_IRQHandler
221
-  .word 0
222
-  .word 0
223
-  .word 0
224
-  .word 0
225
-  .word 0
226
-  .word 0
227
-  .word 0
228
-  .word 0
229
-  .word 0
230
-  .word 0
231
-  .word 0
232
-  .word 0
233
-  .word 0
234
-  .word 0
235
-  .word 0
236
-  .word 0
237
-  .word 0
238
-  .word 0
239
-  .word 0
240
-  .word 0
241
-  .word 0
242
-  .word 0
243
-  .word 0
244
-  .word 0
245
-  .word 0
246
-  .word 0
247
-  .word 0
248
-  .word 0
249
-  .word 0
250
-  .word 0
251
-  .word 0
252
-  .word 0
253
-  .word 0
254
-  .word 0
255
-  .word 0
256
-  .word 0
257
-  .word 0
258
-  .word 0
259
-  .word 0
260
-  .word 0
261
-  .word 0
262
-  .word 0
263
-  .word 0
264
-  .word 0
265
-  .word BootRAM       /* @0x1E0. This is for boot in RAM mode for
266
-                         STM32F10x High Density devices. */
267
-
268
-/*******************************************************************************
269
-*
270
-* Provide weak aliases for each Exception handler to the Default_Handler.
271
-* As they are weak aliases, any function with the same name will override
272
-* this definition.
273
-*
274
-*******************************************************************************/
275
-
276
-  .weak NMI_Handler
277
-  .thumb_set NMI_Handler,Default_Handler
278
-
279
-  .weak HardFault_Handler
280
-  .thumb_set HardFault_Handler,Default_Handler
281
-
282
-  .weak MemManage_Handler
283
-  .thumb_set MemManage_Handler,Default_Handler
284
-
285
-  .weak BusFault_Handler
286
-  .thumb_set BusFault_Handler,Default_Handler
287
-
288
-  .weak UsageFault_Handler
289
-  .thumb_set UsageFault_Handler,Default_Handler
290
-
291
-  .weak SVC_Handler
292
-  .thumb_set SVC_Handler,Default_Handler
293
-
294
-  .weak DebugMon_Handler
295
-  .thumb_set DebugMon_Handler,Default_Handler
296
-
297
-  .weak PendSV_Handler
298
-  .thumb_set PendSV_Handler,Default_Handler
299
-
300
-  .weak SysTick_Handler
301
-  .thumb_set SysTick_Handler,Default_Handler
302
-
303
-  .weak WWDG_IRQHandler
304
-  .thumb_set WWDG_IRQHandler,Default_Handler
305
-
306
-  .weak PVD_IRQHandler
307
-  .thumb_set PVD_IRQHandler,Default_Handler
308
-
309
-  .weak TAMPER_IRQHandler
310
-  .thumb_set TAMPER_IRQHandler,Default_Handler
311
-
312
-  .weak RTC_IRQHandler
313
-  .thumb_set RTC_IRQHandler,Default_Handler
314
-
315
-  .weak FLASH_IRQHandler
316
-  .thumb_set FLASH_IRQHandler,Default_Handler
317
-
318
-  .weak RCC_IRQHandler
319
-  .thumb_set RCC_IRQHandler,Default_Handler
320
-
321
-  .weak EXTI0_IRQHandler
322
-  .thumb_set EXTI0_IRQHandler,Default_Handler
323
-
324
-  .weak EXTI1_IRQHandler
325
-  .thumb_set EXTI1_IRQHandler,Default_Handler
326
-
327
-  .weak EXTI2_IRQHandler
328
-  .thumb_set EXTI2_IRQHandler,Default_Handler
329
-
330
-  .weak EXTI3_IRQHandler
331
-  .thumb_set EXTI3_IRQHandler,Default_Handler
332
-
333
-  .weak EXTI4_IRQHandler
334
-  .thumb_set EXTI4_IRQHandler,Default_Handler
335
-
336
-  .weak DMA1_Channel1_IRQHandler
337
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
338
-
339
-  .weak DMA1_Channel2_IRQHandler
340
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
341
-
342
-  .weak DMA1_Channel3_IRQHandler
343
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
344
-
345
-  .weak DMA1_Channel4_IRQHandler
346
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
347
-
348
-  .weak DMA1_Channel5_IRQHandler
349
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
350
-
351
-  .weak DMA1_Channel6_IRQHandler
352
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
353
-
354
-  .weak DMA1_Channel7_IRQHandler
355
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
356
-
357
-  .weak  ADC1_IRQHandler
358
-  .thumb_set ADC1_IRQHandler,Default_Handler
359
-
360
-  .weak EXTI9_5_IRQHandler
361
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
362
-
363
-  .weak TIM2_IRQHandler
364
-  .thumb_set TIM2_IRQHandler,Default_Handler
365
-
366
-  .weak TIM3_IRQHandler
367
-  .thumb_set TIM3_IRQHandler,Default_Handler
368
-
369
-  .weak TIM4_IRQHandler
370
-  .thumb_set TIM4_IRQHandler,Default_Handler
371
-
372
-  .weak I2C1_EV_IRQHandler
373
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
374
-
375
-  .weak I2C1_ER_IRQHandler
376
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
377
-
378
-  .weak I2C2_EV_IRQHandler
379
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
380
-
381
-  .weak I2C2_ER_IRQHandler
382
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
383
-
384
-  .weak SPI1_IRQHandler
385
-  .thumb_set SPI1_IRQHandler,Default_Handler
386
-
387
-  .weak SPI2_IRQHandler
388
-  .thumb_set SPI2_IRQHandler,Default_Handler
389
-
390
-  .weak USART1_IRQHandler
391
-  .thumb_set USART1_IRQHandler,Default_Handler
392
-
393
-  .weak USART2_IRQHandler
394
-  .thumb_set USART2_IRQHandler,Default_Handler
395
-
396
-  .weak USART3_IRQHandler
397
-  .thumb_set USART3_IRQHandler,Default_Handler
398
-
399
-  .weak EXTI15_10_IRQHandler
400
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
401
-
402
-  .weak RTC_Alarm_IRQHandler
403
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
404
-
405
-  .weak FSMC_IRQHandler
406
-  .thumb_set FSMC_IRQHandler,Default_Handler
407
-
408
-  .weak TIM5_IRQHandler
409
-  .thumb_set TIM5_IRQHandler,Default_Handler
410
-
411
-  .weak SPI3_IRQHandler
412
-  .thumb_set SPI3_IRQHandler,Default_Handler
413
-
414
-  .weak UART4_IRQHandler
415
-  .thumb_set UART4_IRQHandler,Default_Handler
416
-
417
-  .weak UART5_IRQHandler
418
-  .thumb_set UART5_IRQHandler,Default_Handler
419
-
420
-  .weak TIM6_IRQHandler
421
-  .thumb_set TIM6_IRQHandler,Default_Handler
422
-
423
-  .weak TIM7_IRQHandler
424
-  .thumb_set TIM7_IRQHandler,Default_Handler
425
-
426
-  .weak DMA2_Channel1_IRQHandler
427
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
428
-
429
-  .weak DMA2_Channel2_IRQHandler
430
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
431
-
432
-  .weak DMA2_Channel3_IRQHandler
433
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
434
-
435
-  .weak DMA2_Channel4_5_IRQHandler
436
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
437
-
438
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 454
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f101xg.s View File

@@ -1,454 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f101xg.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F101xG Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM,        0xF1E0F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- * @param  None
123
- * @retval None       
124
-*/
125
-    .section .text.Default_Handler,"ax",%progbits
126
-Default_Handler:
127
-Infinite_Loop:
128
-  b Infinite_Loop
129
-  .size Default_Handler, .-Default_Handler
130
-/******************************************************************************
131
-*
132
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
133
-* must be placed on this to ensure that it ends up at physical address
134
-* 0x0000.0000.
135
-*
136
-******************************************************************************/
137
-  .section .isr_vector,"a",%progbits
138
-  .type g_pfnVectors, %object
139
-  .size g_pfnVectors, .-g_pfnVectors
140
-
141
-
142
-g_pfnVectors:
143
-
144
-  .word  _estack
145
-  .word  Reset_Handler
146
-  .word  NMI_Handler
147
-  .word  HardFault_Handler
148
-  .word  MemManage_Handler
149
-  .word  BusFault_Handler
150
-  .word  UsageFault_Handler
151
-  .word  0
152
-  .word  0
153
-  .word  0
154
-  .word  0
155
-  .word  SVC_Handler
156
-  .word  DebugMon_Handler
157
-  .word  0
158
-  .word  PendSV_Handler
159
-  .word  SysTick_Handler
160
-  .word  WWDG_IRQHandler
161
-  .word  PVD_IRQHandler
162
-  .word  TAMPER_IRQHandler
163
-  .word  RTC_IRQHandler
164
-  .word  FLASH_IRQHandler
165
-  .word  RCC_IRQHandler
166
-  .word  EXTI0_IRQHandler
167
-  .word  EXTI1_IRQHandler
168
-  .word  EXTI2_IRQHandler
169
-  .word  EXTI3_IRQHandler
170
-  .word  EXTI4_IRQHandler
171
-  .word  DMA1_Channel1_IRQHandler
172
-  .word  DMA1_Channel2_IRQHandler
173
-  .word  DMA1_Channel3_IRQHandler
174
-  .word  DMA1_Channel4_IRQHandler
175
-  .word  DMA1_Channel5_IRQHandler
176
-  .word  DMA1_Channel6_IRQHandler
177
-  .word  DMA1_Channel7_IRQHandler
178
-  .word  ADC1_2_IRQHandler
179
-  .word  0
180
-  .word  0
181
-  .word  0
182
-  .word  0
183
-  .word  EXTI9_5_IRQHandler
184
-  .word  TIM9_IRQHandler
185
-  .word  TIM10_IRQHandler
186
-  .word  TIM11_IRQHandler
187
-  .word  0
188
-  .word  TIM2_IRQHandler
189
-  .word  TIM3_IRQHandler
190
-  .word  TIM4_IRQHandler
191
-  .word  I2C1_EV_IRQHandler
192
-  .word  I2C1_ER_IRQHandler
193
-  .word  I2C2_EV_IRQHandler
194
-  .word  I2C2_ER_IRQHandler
195
-  .word  SPI1_IRQHandler
196
-  .word  SPI2_IRQHandler
197
-  .word  USART1_IRQHandler
198
-  .word  USART2_IRQHandler
199
-  .word  USART3_IRQHandler
200
-  .word  EXTI15_10_IRQHandler
201
-  .word  RTC_Alarm_IRQHandler
202
-  .word 0
203
-  .word TIM12_IRQHandler
204
-  .word TIM13_IRQHandler
205
-  .word TIM14_IRQHandler
206
-  .word 0
207
-  .word 0
208
-  .word  FSMC_IRQHandler
209
-  .word 0
210
-  .word  TIM5_IRQHandler
211
-  .word  SPI3_IRQHandler
212
-  .word  UART4_IRQHandler
213
-  .word  UART5_IRQHandler
214
-  .word  TIM6_IRQHandler
215
-  .word  TIM7_IRQHandler
216
-  .word  DMA2_Channel1_IRQHandler
217
-  .word  DMA2_Channel2_IRQHandler
218
-  .word  DMA2_Channel3_IRQHandler
219
-  .word  DMA2_Channel4_5_IRQHandler
220
-  .word  0
221
-  .word  0
222
-  .word  0
223
-  .word  0
224
-  .word  0
225
-  .word  0
226
-  .word  0
227
-  .word  0
228
-  .word  0
229
-  .word  0
230
-  .word  0
231
-  .word  0
232
-  .word  0
233
-  .word  0
234
-  .word  0
235
-  .word  0
236
-  .word  0
237
-  .word  0
238
-  .word  0
239
-  .word  0
240
-  .word  0
241
-  .word  0
242
-  .word  0
243
-  .word  0
244
-  .word  0
245
-  .word  0
246
-  .word  0
247
-  .word  0
248
-  .word  0
249
-  .word  0
250
-  .word  0
251
-  .word  0
252
-  .word  0
253
-  .word  0
254
-  .word  0
255
-  .word  0
256
-  .word  0
257
-  .word  0
258
-  .word  0
259
-  .word  0
260
-  .word  0
261
-  .word  0
262
-  .word  0
263
-  .word  0
264
-  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
265
-                         STM32F10x XL-Density devices. */
266
-/*******************************************************************************
267
-*
268
-* Provide weak aliases for each Exception handler to the Default_Handler. 
269
-* As they are weak aliases, any function with the same name will override 
270
-* this definition.
271
-* 
272
-*******************************************************************************/
273
-    
274
-  .weak  NMI_Handler
275
-  .thumb_set NMI_Handler,Default_Handler
276
-  
277
-  .weak  HardFault_Handler
278
-  .thumb_set HardFault_Handler,Default_Handler
279
-  
280
-  .weak  MemManage_Handler
281
-  .thumb_set MemManage_Handler,Default_Handler
282
-  
283
-  .weak  BusFault_Handler
284
-  .thumb_set BusFault_Handler,Default_Handler
285
-
286
-  .weak  UsageFault_Handler
287
-  .thumb_set UsageFault_Handler,Default_Handler
288
-
289
-  .weak  SVC_Handler
290
-  .thumb_set SVC_Handler,Default_Handler
291
-
292
-  .weak  DebugMon_Handler
293
-  .thumb_set DebugMon_Handler,Default_Handler
294
-
295
-  .weak  PendSV_Handler
296
-  .thumb_set PendSV_Handler,Default_Handler
297
-
298
-  .weak  SysTick_Handler
299
-  .thumb_set SysTick_Handler,Default_Handler
300
-
301
-  .weak  WWDG_IRQHandler
302
-  .thumb_set WWDG_IRQHandler,Default_Handler
303
-
304
-  .weak  PVD_IRQHandler
305
-  .thumb_set PVD_IRQHandler,Default_Handler
306
-
307
-  .weak  TAMPER_IRQHandler
308
-  .thumb_set TAMPER_IRQHandler,Default_Handler
309
-
310
-  .weak  RTC_IRQHandler
311
-  .thumb_set RTC_IRQHandler,Default_Handler
312
-
313
-  .weak  FLASH_IRQHandler
314
-  .thumb_set FLASH_IRQHandler,Default_Handler
315
-
316
-  .weak  RCC_IRQHandler
317
-  .thumb_set RCC_IRQHandler,Default_Handler
318
-
319
-  .weak  EXTI0_IRQHandler
320
-  .thumb_set EXTI0_IRQHandler,Default_Handler
321
-
322
-  .weak  EXTI1_IRQHandler
323
-  .thumb_set EXTI1_IRQHandler,Default_Handler
324
-
325
-  .weak  EXTI2_IRQHandler
326
-  .thumb_set EXTI2_IRQHandler,Default_Handler
327
-
328
-  .weak  EXTI3_IRQHandler
329
-  .thumb_set EXTI3_IRQHandler,Default_Handler
330
-
331
-  .weak  EXTI4_IRQHandler
332
-  .thumb_set EXTI4_IRQHandler,Default_Handler
333
-
334
-  .weak  DMA1_Channel1_IRQHandler
335
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
336
-
337
-  .weak  DMA1_Channel2_IRQHandler
338
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
339
-
340
-  .weak  DMA1_Channel3_IRQHandler
341
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
342
-
343
-  .weak  DMA1_Channel4_IRQHandler
344
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
345
-
346
-  .weak  DMA1_Channel5_IRQHandler
347
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
348
-
349
-  .weak  DMA1_Channel6_IRQHandler
350
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
351
-
352
-  .weak  DMA1_Channel7_IRQHandler
353
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
354
-
355
-  .weak  ADC1_2_IRQHandler
356
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
357
-
358
-  .weak  EXTI9_5_IRQHandler
359
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
360
-
361
-  .weak  TIM9_IRQHandler
362
-  .thumb_set TIM9_IRQHandler,Default_Handler
363
-
364
-  .weak  TIM10_IRQHandler
365
-  .thumb_set TIM10_IRQHandler,Default_Handler
366
-
367
-  .weak  TIM11_IRQHandler
368
-  .thumb_set TIM11_IRQHandler,Default_Handler
369
-
370
-  .weak  TIM2_IRQHandler
371
-  .thumb_set TIM2_IRQHandler,Default_Handler
372
-
373
-  .weak  TIM3_IRQHandler
374
-  .thumb_set TIM3_IRQHandler,Default_Handler
375
-
376
-  .weak  TIM4_IRQHandler
377
-  .thumb_set TIM4_IRQHandler,Default_Handler
378
-
379
-  .weak  I2C1_EV_IRQHandler
380
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
381
-
382
-  .weak  I2C1_ER_IRQHandler
383
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
384
-
385
-  .weak  I2C2_EV_IRQHandler
386
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
387
-
388
-  .weak  I2C2_ER_IRQHandler
389
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
390
-
391
-  .weak  SPI1_IRQHandler
392
-  .thumb_set SPI1_IRQHandler,Default_Handler
393
-
394
-  .weak  SPI2_IRQHandler
395
-  .thumb_set SPI2_IRQHandler,Default_Handler
396
-
397
-  .weak  USART1_IRQHandler
398
-  .thumb_set USART1_IRQHandler,Default_Handler
399
-
400
-  .weak  USART2_IRQHandler
401
-  .thumb_set USART2_IRQHandler,Default_Handler
402
-
403
-  .weak  USART3_IRQHandler
404
-  .thumb_set USART3_IRQHandler,Default_Handler
405
-
406
-  .weak  EXTI15_10_IRQHandler
407
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
408
-
409
-  .weak  RTC_Alarm_IRQHandler
410
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
411
-
412
-  .weak  TIM12_IRQHandler
413
-  .thumb_set TIM12_IRQHandler,Default_Handler
414
-
415
-  .weak  TIM13_IRQHandler
416
-  .thumb_set TIM13_IRQHandler,Default_Handler
417
-
418
-  .weak  TIM14_IRQHandler
419
-  .thumb_set TIM14_IRQHandler,Default_Handler
420
-
421
-  .weak  FSMC_IRQHandler
422
-  .thumb_set FSMC_IRQHandler,Default_Handler
423
-
424
-  .weak  TIM5_IRQHandler
425
-  .thumb_set TIM5_IRQHandler,Default_Handler
426
-
427
-  .weak  SPI3_IRQHandler
428
-  .thumb_set SPI3_IRQHandler,Default_Handler
429
-
430
-  .weak  UART4_IRQHandler
431
-  .thumb_set UART4_IRQHandler,Default_Handler
432
-
433
-  .weak  UART5_IRQHandler
434
-  .thumb_set UART5_IRQHandler,Default_Handler
435
-
436
-  .weak  TIM6_IRQHandler
437
-  .thumb_set TIM6_IRQHandler,Default_Handler
438
-
439
-  .weak  TIM7_IRQHandler
440
-  .thumb_set TIM7_IRQHandler,Default_Handler
441
-
442
-  .weak  DMA2_Channel1_IRQHandler
443
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
444
-
445
-  .weak  DMA2_Channel2_IRQHandler
446
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
447
-
448
-  .weak  DMA2_Channel3_IRQHandler
449
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
450
-
451
-  .weak  DMA2_Channel4_5_IRQHandler
452
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
453
-
454
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 345
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102x6.s View File

@@ -1,345 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f102x6.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F102x6 Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_IRQHandler
180
-  .word USB_HP_IRQHandler
181
-  .word USB_LP_IRQHandler
182
-  .word 0 
183
-  .word 0
184
-  .word EXTI9_5_IRQHandler
185
-  .word 0
186
-  .word 0
187
-  .word 0
188
-  .word 0
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word 0
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word 0
195
-  .word 0
196
-  .word SPI1_IRQHandler
197
-  .word 0
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word 0
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word USBWakeUp_IRQHandler
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word BootRAM        /* @0x108. This is for boot in RAM mode for
212
-                          STM32F10x Low Density devices.*/
213
-
214
-/*******************************************************************************
215
-*
216
-* Provide weak aliases for each Exception handler to the Default_Handler.
217
-* As they are weak aliases, any function with the same name will override
218
-* this definition.
219
-*
220
-*******************************************************************************/
221
-
222
-  .weak NMI_Handler
223
-  .thumb_set NMI_Handler,Default_Handler
224
-
225
-  .weak HardFault_Handler
226
-  .thumb_set HardFault_Handler,Default_Handler
227
-
228
-  .weak MemManage_Handler
229
-  .thumb_set MemManage_Handler,Default_Handler
230
-
231
-  .weak BusFault_Handler
232
-  .thumb_set BusFault_Handler,Default_Handler
233
-
234
-  .weak UsageFault_Handler
235
-  .thumb_set UsageFault_Handler,Default_Handler
236
-
237
-  .weak SVC_Handler
238
-  .thumb_set SVC_Handler,Default_Handler
239
-
240
-  .weak DebugMon_Handler
241
-  .thumb_set DebugMon_Handler,Default_Handler
242
-
243
-  .weak PendSV_Handler
244
-  .thumb_set PendSV_Handler,Default_Handler
245
-
246
-  .weak SysTick_Handler
247
-  .thumb_set SysTick_Handler,Default_Handler
248
-
249
-  .weak WWDG_IRQHandler
250
-  .thumb_set WWDG_IRQHandler,Default_Handler
251
-
252
-  .weak PVD_IRQHandler
253
-  .thumb_set PVD_IRQHandler,Default_Handler
254
-
255
-  .weak TAMPER_IRQHandler
256
-  .thumb_set TAMPER_IRQHandler,Default_Handler
257
-
258
-  .weak RTC_IRQHandler
259
-  .thumb_set RTC_IRQHandler,Default_Handler
260
-
261
-  .weak FLASH_IRQHandler
262
-  .thumb_set FLASH_IRQHandler,Default_Handler
263
-
264
-  .weak RCC_IRQHandler
265
-  .thumb_set RCC_IRQHandler,Default_Handler
266
-
267
-  .weak EXTI0_IRQHandler
268
-  .thumb_set EXTI0_IRQHandler,Default_Handler
269
-
270
-  .weak EXTI1_IRQHandler
271
-  .thumb_set EXTI1_IRQHandler,Default_Handler
272
-
273
-  .weak EXTI2_IRQHandler
274
-  .thumb_set EXTI2_IRQHandler,Default_Handler
275
-
276
-  .weak EXTI3_IRQHandler
277
-  .thumb_set EXTI3_IRQHandler,Default_Handler
278
-
279
-  .weak EXTI4_IRQHandler
280
-  .thumb_set EXTI4_IRQHandler,Default_Handler
281
-
282
-  .weak DMA1_Channel1_IRQHandler
283
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
284
-
285
-  .weak DMA1_Channel2_IRQHandler
286
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
287
-
288
-  .weak DMA1_Channel3_IRQHandler
289
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
290
-
291
-  .weak DMA1_Channel4_IRQHandler
292
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
293
-
294
-  .weak DMA1_Channel5_IRQHandler
295
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
296
-
297
-  .weak DMA1_Channel6_IRQHandler
298
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
299
-
300
-  .weak DMA1_Channel7_IRQHandler
301
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
302
-
303
-  .weak  ADC1_IRQHandler
304
-  .thumb_set ADC1_IRQHandler,Default_Handler
305
-
306
-  .weak USB_HP_IRQHandler
307
-  .thumb_set USB_HP_IRQHandler,Default_Handler
308
-
309
-  .weak USB_LP_IRQHandler
310
-  .thumb_set USB_LP_IRQHandler,Default_Handler
311
-
312
-  .weak EXTI9_5_IRQHandler
313
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
314
-
315
-  .weak TIM2_IRQHandler
316
-  .thumb_set TIM2_IRQHandler,Default_Handler
317
-
318
-  .weak TIM3_IRQHandler
319
-  .thumb_set TIM3_IRQHandler,Default_Handler
320
-
321
-  .weak I2C1_EV_IRQHandler
322
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
323
-
324
-  .weak I2C1_ER_IRQHandler
325
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
326
-
327
-  .weak SPI1_IRQHandler
328
-  .thumb_set SPI1_IRQHandler,Default_Handler
329
-
330
-  .weak USART1_IRQHandler
331
-  .thumb_set USART1_IRQHandler,Default_Handler
332
-
333
-  .weak USART2_IRQHandler
334
-  .thumb_set USART2_IRQHandler,Default_Handler
335
-
336
-  .weak EXTI15_10_IRQHandler
337
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
338
-
339
-  .weak RTC_Alarm_IRQHandler
340
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
341
-
342
-  .weak USBWakeUp_IRQHandler
343
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
344
-
345
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 361
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f102xb.s View File

@@ -1,361 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f102xb.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F102xB Value Line Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_IRQHandler
180
-  .word USB_HP_IRQHandler
181
-  .word USB_LP_IRQHandler
182
-  .word 0 
183
-  .word 0
184
-  .word EXTI9_5_IRQHandler
185
-  .word 0
186
-  .word 0
187
-  .word 0
188
-  .word 0
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word TIM4_IRQHandler
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word I2C2_EV_IRQHandler
195
-  .word I2C2_ER_IRQHandler
196
-  .word SPI1_IRQHandler
197
-  .word SPI2_IRQHandler
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word USART3_IRQHandler
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word USBWakeUp_IRQHandler
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word BootRAM          /* @0x108. This is for boot in RAM mode for
212
-                            STM32F10x Medium Density devices. */
213
-
214
-/*******************************************************************************
215
-*
216
-* Provide weak aliases for each Exception handler to the Default_Handler.
217
-* As they are weak aliases, any function with the same name will override
218
-* this definition.
219
-*
220
-*******************************************************************************/
221
-
222
-  .weak NMI_Handler
223
-  .thumb_set NMI_Handler,Default_Handler
224
-
225
-  .weak HardFault_Handler
226
-  .thumb_set HardFault_Handler,Default_Handler
227
-
228
-  .weak MemManage_Handler
229
-  .thumb_set MemManage_Handler,Default_Handler
230
-
231
-  .weak BusFault_Handler
232
-  .thumb_set BusFault_Handler,Default_Handler
233
-
234
-  .weak UsageFault_Handler
235
-  .thumb_set UsageFault_Handler,Default_Handler
236
-
237
-  .weak SVC_Handler
238
-  .thumb_set SVC_Handler,Default_Handler
239
-
240
-  .weak DebugMon_Handler
241
-  .thumb_set DebugMon_Handler,Default_Handler
242
-
243
-  .weak PendSV_Handler
244
-  .thumb_set PendSV_Handler,Default_Handler
245
-
246
-  .weak SysTick_Handler
247
-  .thumb_set SysTick_Handler,Default_Handler
248
-
249
-  .weak WWDG_IRQHandler
250
-  .thumb_set WWDG_IRQHandler,Default_Handler
251
-
252
-  .weak PVD_IRQHandler
253
-  .thumb_set PVD_IRQHandler,Default_Handler
254
-
255
-  .weak TAMPER_IRQHandler
256
-  .thumb_set TAMPER_IRQHandler,Default_Handler
257
-
258
-  .weak RTC_IRQHandler
259
-  .thumb_set RTC_IRQHandler,Default_Handler
260
-
261
-  .weak FLASH_IRQHandler
262
-  .thumb_set FLASH_IRQHandler,Default_Handler
263
-
264
-  .weak RCC_IRQHandler
265
-  .thumb_set RCC_IRQHandler,Default_Handler
266
-
267
-  .weak EXTI0_IRQHandler
268
-  .thumb_set EXTI0_IRQHandler,Default_Handler
269
-
270
-  .weak EXTI1_IRQHandler
271
-  .thumb_set EXTI1_IRQHandler,Default_Handler
272
-
273
-  .weak EXTI2_IRQHandler
274
-  .thumb_set EXTI2_IRQHandler,Default_Handler
275
-
276
-  .weak EXTI3_IRQHandler
277
-  .thumb_set EXTI3_IRQHandler,Default_Handler
278
-
279
-  .weak EXTI4_IRQHandler
280
-  .thumb_set EXTI4_IRQHandler,Default_Handler
281
-
282
-  .weak DMA1_Channel1_IRQHandler
283
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
284
-
285
-  .weak DMA1_Channel2_IRQHandler
286
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
287
-
288
-  .weak DMA1_Channel3_IRQHandler
289
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
290
-
291
-  .weak DMA1_Channel4_IRQHandler
292
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
293
-
294
-  .weak DMA1_Channel5_IRQHandler
295
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
296
-
297
-  .weak DMA1_Channel6_IRQHandler
298
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
299
-
300
-  .weak DMA1_Channel7_IRQHandler
301
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
302
-
303
-  .weak  ADC1_IRQHandler
304
-  .thumb_set ADC1_IRQHandler,Default_Handler
305
-
306
-  .weak USB_HP_IRQHandler
307
-  .thumb_set USB_HP_IRQHandler,Default_Handler
308
-
309
-  .weak USB_LP_IRQHandler
310
-  .thumb_set USB_LP_IRQHandler,Default_Handler
311
-
312
-  .weak EXTI9_5_IRQHandler
313
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
314
-
315
-  .weak TIM2_IRQHandler
316
-  .thumb_set TIM2_IRQHandler,Default_Handler
317
-
318
-  .weak TIM3_IRQHandler
319
-  .thumb_set TIM3_IRQHandler,Default_Handler
320
-
321
-  .weak TIM4_IRQHandler
322
-  .thumb_set TIM4_IRQHandler,Default_Handler
323
-
324
-  .weak I2C1_EV_IRQHandler
325
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
326
-
327
-  .weak I2C1_ER_IRQHandler
328
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
329
-
330
-  .weak I2C2_EV_IRQHandler
331
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
332
-
333
-  .weak I2C2_ER_IRQHandler
334
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
335
-
336
-  .weak SPI1_IRQHandler
337
-  .thumb_set SPI1_IRQHandler,Default_Handler
338
-
339
-  .weak SPI2_IRQHandler
340
-  .thumb_set SPI2_IRQHandler,Default_Handler
341
-
342
-  .weak USART1_IRQHandler
343
-  .thumb_set USART1_IRQHandler,Default_Handler
344
-
345
-  .weak USART2_IRQHandler
346
-  .thumb_set USART2_IRQHandler,Default_Handler
347
-
348
-  .weak USART3_IRQHandler
349
-  .thumb_set USART3_IRQHandler,Default_Handler
350
-
351
-  .weak EXTI15_10_IRQHandler
352
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
353
-
354
-  .weak RTC_Alarm_IRQHandler
355
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
356
-
357
-  .weak USBWakeUp_IRQHandler
358
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
359
-
360
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
361
-

+ 0
- 363
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103x6.s View File

@@ -1,363 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f103x6.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F103x6 Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_2_IRQHandler
180
-  .word USB_HP_CAN1_TX_IRQHandler
181
-  .word USB_LP_CAN1_RX0_IRQHandler
182
-  .word CAN1_RX1_IRQHandler
183
-  .word CAN1_SCE_IRQHandler
184
-  .word EXTI9_5_IRQHandler
185
-  .word TIM1_BRK_IRQHandler
186
-  .word TIM1_UP_IRQHandler
187
-  .word TIM1_TRG_COM_IRQHandler
188
-  .word TIM1_CC_IRQHandler
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word 0
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word 0
195
-  .word 0
196
-  .word SPI1_IRQHandler
197
-  .word 0
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word 0
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word USBWakeUp_IRQHandler
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word BootRAM        /* @0x108. This is for boot in RAM mode for
212
-                          STM32F10x Low Density devices.*/
213
-
214
-/*******************************************************************************
215
-*
216
-* Provide weak aliases for each Exception handler to the Default_Handler.
217
-* As they are weak aliases, any function with the same name will override
218
-* this definition.
219
-*
220
-*******************************************************************************/
221
-
222
-  .weak NMI_Handler
223
-  .thumb_set NMI_Handler,Default_Handler
224
-
225
-  .weak HardFault_Handler
226
-  .thumb_set HardFault_Handler,Default_Handler
227
-
228
-  .weak MemManage_Handler
229
-  .thumb_set MemManage_Handler,Default_Handler
230
-
231
-  .weak BusFault_Handler
232
-  .thumb_set BusFault_Handler,Default_Handler
233
-
234
-  .weak UsageFault_Handler
235
-  .thumb_set UsageFault_Handler,Default_Handler
236
-
237
-  .weak SVC_Handler
238
-  .thumb_set SVC_Handler,Default_Handler
239
-
240
-  .weak DebugMon_Handler
241
-  .thumb_set DebugMon_Handler,Default_Handler
242
-
243
-  .weak PendSV_Handler
244
-  .thumb_set PendSV_Handler,Default_Handler
245
-
246
-  .weak SysTick_Handler
247
-  .thumb_set SysTick_Handler,Default_Handler
248
-
249
-  .weak WWDG_IRQHandler
250
-  .thumb_set WWDG_IRQHandler,Default_Handler
251
-
252
-  .weak PVD_IRQHandler
253
-  .thumb_set PVD_IRQHandler,Default_Handler
254
-
255
-  .weak TAMPER_IRQHandler
256
-  .thumb_set TAMPER_IRQHandler,Default_Handler
257
-
258
-  .weak RTC_IRQHandler
259
-  .thumb_set RTC_IRQHandler,Default_Handler
260
-
261
-  .weak FLASH_IRQHandler
262
-  .thumb_set FLASH_IRQHandler,Default_Handler
263
-
264
-  .weak RCC_IRQHandler
265
-  .thumb_set RCC_IRQHandler,Default_Handler
266
-
267
-  .weak EXTI0_IRQHandler
268
-  .thumb_set EXTI0_IRQHandler,Default_Handler
269
-
270
-  .weak EXTI1_IRQHandler
271
-  .thumb_set EXTI1_IRQHandler,Default_Handler
272
-
273
-  .weak EXTI2_IRQHandler
274
-  .thumb_set EXTI2_IRQHandler,Default_Handler
275
-
276
-  .weak EXTI3_IRQHandler
277
-  .thumb_set EXTI3_IRQHandler,Default_Handler
278
-
279
-  .weak EXTI4_IRQHandler
280
-  .thumb_set EXTI4_IRQHandler,Default_Handler
281
-
282
-  .weak DMA1_Channel1_IRQHandler
283
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
284
-
285
-  .weak DMA1_Channel2_IRQHandler
286
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
287
-
288
-  .weak DMA1_Channel3_IRQHandler
289
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
290
-
291
-  .weak DMA1_Channel4_IRQHandler
292
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
293
-
294
-  .weak DMA1_Channel5_IRQHandler
295
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
296
-
297
-  .weak DMA1_Channel6_IRQHandler
298
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
299
-
300
-  .weak DMA1_Channel7_IRQHandler
301
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
302
-
303
-  .weak ADC1_2_IRQHandler
304
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
305
-
306
-  .weak USB_HP_CAN1_TX_IRQHandler
307
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
308
-
309
-  .weak USB_LP_CAN1_RX0_IRQHandler
310
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
311
-
312
-  .weak CAN1_RX1_IRQHandler
313
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
314
-
315
-  .weak CAN1_SCE_IRQHandler
316
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
317
-
318
-  .weak EXTI9_5_IRQHandler
319
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
320
-
321
-  .weak TIM1_BRK_IRQHandler
322
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
323
-
324
-  .weak TIM1_UP_IRQHandler
325
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
326
-
327
-  .weak TIM1_TRG_COM_IRQHandler
328
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
329
-
330
-  .weak TIM1_CC_IRQHandler
331
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
332
-
333
-  .weak TIM2_IRQHandler
334
-  .thumb_set TIM2_IRQHandler,Default_Handler
335
-
336
-  .weak TIM3_IRQHandler
337
-  .thumb_set TIM3_IRQHandler,Default_Handler
338
-
339
-  .weak I2C1_EV_IRQHandler
340
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
341
-
342
-  .weak I2C1_ER_IRQHandler
343
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
344
-
345
-  .weak SPI1_IRQHandler
346
-  .thumb_set SPI1_IRQHandler,Default_Handler
347
-
348
-  .weak USART1_IRQHandler
349
-  .thumb_set USART1_IRQHandler,Default_Handler
350
-
351
-  .weak USART2_IRQHandler
352
-  .thumb_set USART2_IRQHandler,Default_Handler
353
-
354
-  .weak EXTI15_10_IRQHandler
355
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
356
-
357
-  .weak RTC_Alarm_IRQHandler
358
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
359
-
360
-  .weak USBWakeUp_IRQHandler
361
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
362
-
363
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 379
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xb.s View File

@@ -1,379 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f103xb.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F103xB Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF108F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-/* Zero fill the bss segment. */
100
-FillZerobss:
101
-  movs r3, #0
102
-  str r3, [r2], #4
103
-
104
-LoopFillZerobss:
105
-  ldr r3, = _ebss
106
-  cmp r2, r3
107
-  bcc FillZerobss
108
-
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call static constructors */
112
-    bl __libc_init_array
113
-/* Call the application's entry point.*/
114
-  bl main
115
-  bx lr
116
-.size Reset_Handler, .-Reset_Handler
117
-
118
-/**
119
- * @brief  This is the code that gets called when the processor receives an
120
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
121
- *         the system state for examination by a debugger.
122
- *
123
- * @param  None
124
- * @retval : None
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word _estack
146
-  .word Reset_Handler
147
-  .word NMI_Handler
148
-  .word HardFault_Handler
149
-  .word MemManage_Handler
150
-  .word BusFault_Handler
151
-  .word UsageFault_Handler
152
-  .word 0
153
-  .word 0
154
-  .word 0
155
-  .word 0
156
-  .word SVC_Handler
157
-  .word DebugMon_Handler
158
-  .word 0
159
-  .word PendSV_Handler
160
-  .word SysTick_Handler
161
-  .word WWDG_IRQHandler
162
-  .word PVD_IRQHandler
163
-  .word TAMPER_IRQHandler
164
-  .word RTC_IRQHandler
165
-  .word FLASH_IRQHandler
166
-  .word RCC_IRQHandler
167
-  .word EXTI0_IRQHandler
168
-  .word EXTI1_IRQHandler
169
-  .word EXTI2_IRQHandler
170
-  .word EXTI3_IRQHandler
171
-  .word EXTI4_IRQHandler
172
-  .word DMA1_Channel1_IRQHandler
173
-  .word DMA1_Channel2_IRQHandler
174
-  .word DMA1_Channel3_IRQHandler
175
-  .word DMA1_Channel4_IRQHandler
176
-  .word DMA1_Channel5_IRQHandler
177
-  .word DMA1_Channel6_IRQHandler
178
-  .word DMA1_Channel7_IRQHandler
179
-  .word ADC1_2_IRQHandler
180
-  .word USB_HP_CAN1_TX_IRQHandler
181
-  .word USB_LP_CAN1_RX0_IRQHandler
182
-  .word CAN1_RX1_IRQHandler
183
-  .word CAN1_SCE_IRQHandler
184
-  .word EXTI9_5_IRQHandler
185
-  .word TIM1_BRK_IRQHandler
186
-  .word TIM1_UP_IRQHandler
187
-  .word TIM1_TRG_COM_IRQHandler
188
-  .word TIM1_CC_IRQHandler
189
-  .word TIM2_IRQHandler
190
-  .word TIM3_IRQHandler
191
-  .word TIM4_IRQHandler
192
-  .word I2C1_EV_IRQHandler
193
-  .word I2C1_ER_IRQHandler
194
-  .word I2C2_EV_IRQHandler
195
-  .word I2C2_ER_IRQHandler
196
-  .word SPI1_IRQHandler
197
-  .word SPI2_IRQHandler
198
-  .word USART1_IRQHandler
199
-  .word USART2_IRQHandler
200
-  .word USART3_IRQHandler
201
-  .word EXTI15_10_IRQHandler
202
-  .word RTC_Alarm_IRQHandler
203
-  .word USBWakeUp_IRQHandler
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word BootRAM          /* @0x108. This is for boot in RAM mode for
212
-                            STM32F10x Medium Density devices. */
213
-
214
-/*******************************************************************************
215
-*
216
-* Provide weak aliases for each Exception handler to the Default_Handler.
217
-* As they are weak aliases, any function with the same name will override
218
-* this definition.
219
-*
220
-*******************************************************************************/
221
-
222
-  .weak NMI_Handler
223
-  .thumb_set NMI_Handler,Default_Handler
224
-
225
-  .weak HardFault_Handler
226
-  .thumb_set HardFault_Handler,Default_Handler
227
-
228
-  .weak MemManage_Handler
229
-  .thumb_set MemManage_Handler,Default_Handler
230
-
231
-  .weak BusFault_Handler
232
-  .thumb_set BusFault_Handler,Default_Handler
233
-
234
-  .weak UsageFault_Handler
235
-  .thumb_set UsageFault_Handler,Default_Handler
236
-
237
-  .weak SVC_Handler
238
-  .thumb_set SVC_Handler,Default_Handler
239
-
240
-  .weak DebugMon_Handler
241
-  .thumb_set DebugMon_Handler,Default_Handler
242
-
243
-  .weak PendSV_Handler
244
-  .thumb_set PendSV_Handler,Default_Handler
245
-
246
-  .weak SysTick_Handler
247
-  .thumb_set SysTick_Handler,Default_Handler
248
-
249
-  .weak WWDG_IRQHandler
250
-  .thumb_set WWDG_IRQHandler,Default_Handler
251
-
252
-  .weak PVD_IRQHandler
253
-  .thumb_set PVD_IRQHandler,Default_Handler
254
-
255
-  .weak TAMPER_IRQHandler
256
-  .thumb_set TAMPER_IRQHandler,Default_Handler
257
-
258
-  .weak RTC_IRQHandler
259
-  .thumb_set RTC_IRQHandler,Default_Handler
260
-
261
-  .weak FLASH_IRQHandler
262
-  .thumb_set FLASH_IRQHandler,Default_Handler
263
-
264
-  .weak RCC_IRQHandler
265
-  .thumb_set RCC_IRQHandler,Default_Handler
266
-
267
-  .weak EXTI0_IRQHandler
268
-  .thumb_set EXTI0_IRQHandler,Default_Handler
269
-
270
-  .weak EXTI1_IRQHandler
271
-  .thumb_set EXTI1_IRQHandler,Default_Handler
272
-
273
-  .weak EXTI2_IRQHandler
274
-  .thumb_set EXTI2_IRQHandler,Default_Handler
275
-
276
-  .weak EXTI3_IRQHandler
277
-  .thumb_set EXTI3_IRQHandler,Default_Handler
278
-
279
-  .weak EXTI4_IRQHandler
280
-  .thumb_set EXTI4_IRQHandler,Default_Handler
281
-
282
-  .weak DMA1_Channel1_IRQHandler
283
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
284
-
285
-  .weak DMA1_Channel2_IRQHandler
286
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
287
-
288
-  .weak DMA1_Channel3_IRQHandler
289
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
290
-
291
-  .weak DMA1_Channel4_IRQHandler
292
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
293
-
294
-  .weak DMA1_Channel5_IRQHandler
295
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
296
-
297
-  .weak DMA1_Channel6_IRQHandler
298
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
299
-
300
-  .weak DMA1_Channel7_IRQHandler
301
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
302
-
303
-  .weak ADC1_2_IRQHandler
304
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
305
-
306
-  .weak USB_HP_CAN1_TX_IRQHandler
307
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
308
-
309
-  .weak USB_LP_CAN1_RX0_IRQHandler
310
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
311
-
312
-  .weak CAN1_RX1_IRQHandler
313
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
314
-
315
-  .weak CAN1_SCE_IRQHandler
316
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
317
-
318
-  .weak EXTI9_5_IRQHandler
319
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
320
-
321
-  .weak TIM1_BRK_IRQHandler
322
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
323
-
324
-  .weak TIM1_UP_IRQHandler
325
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
326
-
327
-  .weak TIM1_TRG_COM_IRQHandler
328
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
329
-
330
-  .weak TIM1_CC_IRQHandler
331
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
332
-
333
-  .weak TIM2_IRQHandler
334
-  .thumb_set TIM2_IRQHandler,Default_Handler
335
-
336
-  .weak TIM3_IRQHandler
337
-  .thumb_set TIM3_IRQHandler,Default_Handler
338
-
339
-  .weak TIM4_IRQHandler
340
-  .thumb_set TIM4_IRQHandler,Default_Handler
341
-
342
-  .weak I2C1_EV_IRQHandler
343
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
344
-
345
-  .weak I2C1_ER_IRQHandler
346
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
347
-
348
-  .weak I2C2_EV_IRQHandler
349
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
350
-
351
-  .weak I2C2_ER_IRQHandler
352
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
353
-
354
-  .weak SPI1_IRQHandler
355
-  .thumb_set SPI1_IRQHandler,Default_Handler
356
-
357
-  .weak SPI2_IRQHandler
358
-  .thumb_set SPI2_IRQHandler,Default_Handler
359
-
360
-  .weak USART1_IRQHandler
361
-  .thumb_set USART1_IRQHandler,Default_Handler
362
-
363
-  .weak USART2_IRQHandler
364
-  .thumb_set USART2_IRQHandler,Default_Handler
365
-
366
-  .weak USART3_IRQHandler
367
-  .thumb_set USART3_IRQHandler,Default_Handler
368
-
369
-  .weak EXTI15_10_IRQHandler
370
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
371
-
372
-  .weak RTC_Alarm_IRQHandler
373
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
374
-
375
-  .weak USBWakeUp_IRQHandler
376
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
377
-
378
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
379
-

+ 0
- 485
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xe.s View File

@@ -1,485 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f103xe.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F103xE Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Configure external SRAM mounted on STM3210E-EVAL board
14
-  *                  to be used as data memory (optional, to be enabled by user)
15
-  *                - Branches to main in the C library (which eventually
16
-  *                  calls main()).
17
-  *            After Reset the Cortex-M3 processor is in Thread mode,
18
-  *            priority is Privileged, and the Stack is set to Main.
19
-  ******************************************************************************
20
-  *
21
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
22
-  *
23
-  * Redistribution and use in source and binary forms, with or without modification,
24
-  * are permitted provided that the following conditions are met:
25
-  *   1. Redistributions of source code must retain the above copyright notice,
26
-  *      this list of conditions and the following disclaimer.
27
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
28
-  *      this list of conditions and the following disclaimer in the documentation
29
-  *      and/or other materials provided with the distribution.
30
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
31
-  *      may be used to endorse or promote products derived from this software
32
-  *      without specific prior written permission.
33
-  *
34
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
38
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
41
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
42
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44
-  *
45
-  ******************************************************************************
46
-  */
47
-
48
-  .syntax unified
49
-  .cpu cortex-m3
50
-  .fpu softvfp
51
-  .thumb
52
-
53
-.global g_pfnVectors
54
-.global Default_Handler
55
-
56
-/* start address for the initialization values of the .data section.
57
-defined in linker script */
58
-.word _sidata
59
-/* start address for the .data section. defined in linker script */
60
-.word _sdata
61
-/* end address for the .data section. defined in linker script */
62
-.word _edata
63
-/* start address for the .bss section. defined in linker script */
64
-.word _sbss
65
-/* end address for the .bss section. defined in linker script */
66
-.word _ebss
67
-
68
-.equ  BootRAM,        0xF1E0F85F
69
-/**
70
- * @brief  This is the code that gets called when the processor first
71
- *          starts execution following a reset event. Only the absolutely
72
- *          necessary set is performed, after which the application
73
- *          supplied main() routine is called.
74
- * @param  None
75
- * @retval : None
76
-*/
77
-
78
-  .section .text.Reset_Handler
79
-  .weak Reset_Handler
80
-  .type Reset_Handler, %function
81
-Reset_Handler:
82
-
83
-/* Copy the data segment initializers from flash to SRAM */
84
-  movs r1, #0
85
-  b LoopCopyDataInit
86
-
87
-CopyDataInit:
88
-  ldr r3, =_sidata
89
-  ldr r3, [r3, r1]
90
-  str r3, [r0, r1]
91
-  adds r1, r1, #4
92
-
93
-LoopCopyDataInit:
94
-  ldr r0, =_sdata
95
-  ldr r3, =_edata
96
-  adds r2, r0, r1
97
-  cmp r2, r3
98
-  bcc CopyDataInit
99
-  ldr r2, =_sbss
100
-  b LoopFillZerobss
101
-/* Zero fill the bss segment. */
102
-FillZerobss:
103
-  movs r3, #0
104
-  str r3, [r2], #4
105
-
106
-LoopFillZerobss:
107
-  ldr r3, = _ebss
108
-  cmp r2, r3
109
-  bcc FillZerobss
110
-
111
-/* Call the clock system intitialization function.*/
112
-    bl  SystemInit
113
-/* Call static constructors */
114
-    bl __libc_init_array
115
-/* Call the application's entry point.*/
116
-  bl main
117
-  bx lr
118
-.size Reset_Handler, .-Reset_Handler
119
-
120
-/**
121
- * @brief  This is the code that gets called when the processor receives an
122
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
123
- *         the system state for examination by a debugger.
124
- *
125
- * @param  None
126
- * @retval : None
127
-*/
128
-    .section .text.Default_Handler,"ax",%progbits
129
-Default_Handler:
130
-Infinite_Loop:
131
-  b Infinite_Loop
132
-  .size Default_Handler, .-Default_Handler
133
-/******************************************************************************
134
-*
135
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
136
-* must be placed on this to ensure that it ends up at physical address
137
-* 0x0000.0000.
138
-*
139
-******************************************************************************/
140
-  .section .isr_vector,"a",%progbits
141
-  .type g_pfnVectors, %object
142
-  .size g_pfnVectors, .-g_pfnVectors
143
-
144
-
145
-g_pfnVectors:
146
-
147
-  .word _estack
148
-  .word Reset_Handler
149
-  .word NMI_Handler
150
-  .word HardFault_Handler
151
-  .word MemManage_Handler
152
-  .word BusFault_Handler
153
-  .word UsageFault_Handler
154
-  .word 0
155
-  .word 0
156
-  .word 0
157
-  .word 0
158
-  .word SVC_Handler
159
-  .word DebugMon_Handler
160
-  .word 0
161
-  .word PendSV_Handler
162
-  .word SysTick_Handler
163
-  .word WWDG_IRQHandler
164
-  .word PVD_IRQHandler
165
-  .word TAMPER_IRQHandler
166
-  .word RTC_IRQHandler
167
-  .word FLASH_IRQHandler
168
-  .word RCC_IRQHandler
169
-  .word EXTI0_IRQHandler
170
-  .word EXTI1_IRQHandler
171
-  .word EXTI2_IRQHandler
172
-  .word EXTI3_IRQHandler
173
-  .word EXTI4_IRQHandler
174
-  .word DMA1_Channel1_IRQHandler
175
-  .word DMA1_Channel2_IRQHandler
176
-  .word DMA1_Channel3_IRQHandler
177
-  .word DMA1_Channel4_IRQHandler
178
-  .word DMA1_Channel5_IRQHandler
179
-  .word DMA1_Channel6_IRQHandler
180
-  .word DMA1_Channel7_IRQHandler
181
-  .word ADC1_2_IRQHandler
182
-  .word USB_HP_CAN1_TX_IRQHandler
183
-  .word USB_LP_CAN1_RX0_IRQHandler
184
-  .word CAN1_RX1_IRQHandler
185
-  .word CAN1_SCE_IRQHandler
186
-  .word EXTI9_5_IRQHandler
187
-  .word TIM1_BRK_IRQHandler
188
-  .word TIM1_UP_IRQHandler
189
-  .word TIM1_TRG_COM_IRQHandler
190
-  .word TIM1_CC_IRQHandler
191
-  .word TIM2_IRQHandler
192
-  .word TIM3_IRQHandler
193
-  .word TIM4_IRQHandler
194
-  .word I2C1_EV_IRQHandler
195
-  .word I2C1_ER_IRQHandler
196
-  .word I2C2_EV_IRQHandler
197
-  .word I2C2_ER_IRQHandler
198
-  .word SPI1_IRQHandler
199
-  .word SPI2_IRQHandler
200
-  .word USART1_IRQHandler
201
-  .word USART2_IRQHandler
202
-  .word USART3_IRQHandler
203
-  .word EXTI15_10_IRQHandler
204
-  .word RTC_Alarm_IRQHandler
205
-  .word USBWakeUp_IRQHandler
206
-  .word TIM8_BRK_IRQHandler
207
-  .word TIM8_UP_IRQHandler
208
-  .word TIM8_TRG_COM_IRQHandler
209
-  .word TIM8_CC_IRQHandler
210
-  .word ADC3_IRQHandler
211
-  .word FSMC_IRQHandler
212
-  .word SDIO_IRQHandler
213
-  .word TIM5_IRQHandler
214
-  .word SPI3_IRQHandler
215
-  .word UART4_IRQHandler
216
-  .word UART5_IRQHandler
217
-  .word TIM6_IRQHandler
218
-  .word TIM7_IRQHandler
219
-  .word DMA2_Channel1_IRQHandler
220
-  .word DMA2_Channel2_IRQHandler
221
-  .word DMA2_Channel3_IRQHandler
222
-  .word DMA2_Channel4_5_IRQHandler
223
-  .word 0
224
-  .word 0
225
-  .word 0
226
-  .word 0
227
-  .word 0
228
-  .word 0
229
-  .word 0
230
-  .word 0
231
-  .word 0
232
-  .word 0
233
-  .word 0
234
-  .word 0
235
-  .word 0
236
-  .word 0
237
-  .word 0
238
-  .word 0
239
-  .word 0
240
-  .word 0
241
-  .word 0
242
-  .word 0
243
-  .word 0
244
-  .word 0
245
-  .word 0
246
-  .word 0
247
-  .word 0
248
-  .word 0
249
-  .word 0
250
-  .word 0
251
-  .word 0
252
-  .word 0
253
-  .word 0
254
-  .word 0
255
-  .word 0
256
-  .word 0
257
-  .word 0
258
-  .word 0
259
-  .word 0
260
-  .word 0
261
-  .word 0
262
-  .word 0
263
-  .word 0
264
-  .word 0
265
-  .word 0
266
-  .word 0
267
-  .word BootRAM       /* @0x1E0. This is for boot in RAM mode for
268
-                         STM32F10x High Density devices. */
269
-
270
-/*******************************************************************************
271
-*
272
-* Provide weak aliases for each Exception handler to the Default_Handler.
273
-* As they are weak aliases, any function with the same name will override
274
-* this definition.
275
-*
276
-*******************************************************************************/
277
-
278
-  .weak NMI_Handler
279
-  .thumb_set NMI_Handler,Default_Handler
280
-
281
-  .weak HardFault_Handler
282
-  .thumb_set HardFault_Handler,Default_Handler
283
-
284
-  .weak MemManage_Handler
285
-  .thumb_set MemManage_Handler,Default_Handler
286
-
287
-  .weak BusFault_Handler
288
-  .thumb_set BusFault_Handler,Default_Handler
289
-
290
-  .weak UsageFault_Handler
291
-  .thumb_set UsageFault_Handler,Default_Handler
292
-
293
-  .weak SVC_Handler
294
-  .thumb_set SVC_Handler,Default_Handler
295
-
296
-  .weak DebugMon_Handler
297
-  .thumb_set DebugMon_Handler,Default_Handler
298
-
299
-  .weak PendSV_Handler
300
-  .thumb_set PendSV_Handler,Default_Handler
301
-
302
-  .weak SysTick_Handler
303
-  .thumb_set SysTick_Handler,Default_Handler
304
-
305
-  .weak WWDG_IRQHandler
306
-  .thumb_set WWDG_IRQHandler,Default_Handler
307
-
308
-  .weak PVD_IRQHandler
309
-  .thumb_set PVD_IRQHandler,Default_Handler
310
-
311
-  .weak TAMPER_IRQHandler
312
-  .thumb_set TAMPER_IRQHandler,Default_Handler
313
-
314
-  .weak RTC_IRQHandler
315
-  .thumb_set RTC_IRQHandler,Default_Handler
316
-
317
-  .weak FLASH_IRQHandler
318
-  .thumb_set FLASH_IRQHandler,Default_Handler
319
-
320
-  .weak RCC_IRQHandler
321
-  .thumb_set RCC_IRQHandler,Default_Handler
322
-
323
-  .weak EXTI0_IRQHandler
324
-  .thumb_set EXTI0_IRQHandler,Default_Handler
325
-
326
-  .weak EXTI1_IRQHandler
327
-  .thumb_set EXTI1_IRQHandler,Default_Handler
328
-
329
-  .weak EXTI2_IRQHandler
330
-  .thumb_set EXTI2_IRQHandler,Default_Handler
331
-
332
-  .weak EXTI3_IRQHandler
333
-  .thumb_set EXTI3_IRQHandler,Default_Handler
334
-
335
-  .weak EXTI4_IRQHandler
336
-  .thumb_set EXTI4_IRQHandler,Default_Handler
337
-
338
-  .weak DMA1_Channel1_IRQHandler
339
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
340
-
341
-  .weak DMA1_Channel2_IRQHandler
342
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
343
-
344
-  .weak DMA1_Channel3_IRQHandler
345
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
346
-
347
-  .weak DMA1_Channel4_IRQHandler
348
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
349
-
350
-  .weak DMA1_Channel5_IRQHandler
351
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
352
-
353
-  .weak DMA1_Channel6_IRQHandler
354
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
355
-
356
-  .weak DMA1_Channel7_IRQHandler
357
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
358
-
359
-  .weak ADC1_2_IRQHandler
360
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
361
-
362
-  .weak USB_HP_CAN1_TX_IRQHandler
363
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
364
-
365
-  .weak USB_LP_CAN1_RX0_IRQHandler
366
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
367
-
368
-  .weak CAN1_RX1_IRQHandler
369
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
370
-
371
-  .weak CAN1_SCE_IRQHandler
372
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
373
-
374
-  .weak EXTI9_5_IRQHandler
375
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
376
-
377
-  .weak TIM1_BRK_IRQHandler
378
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
379
-
380
-  .weak TIM1_UP_IRQHandler
381
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
382
-
383
-  .weak TIM1_TRG_COM_IRQHandler
384
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
385
-
386
-  .weak TIM1_CC_IRQHandler
387
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
388
-
389
-  .weak TIM2_IRQHandler
390
-  .thumb_set TIM2_IRQHandler,Default_Handler
391
-
392
-  .weak TIM3_IRQHandler
393
-  .thumb_set TIM3_IRQHandler,Default_Handler
394
-
395
-  .weak TIM4_IRQHandler
396
-  .thumb_set TIM4_IRQHandler,Default_Handler
397
-
398
-  .weak I2C1_EV_IRQHandler
399
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
400
-
401
-  .weak I2C1_ER_IRQHandler
402
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
403
-
404
-  .weak I2C2_EV_IRQHandler
405
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
406
-
407
-  .weak I2C2_ER_IRQHandler
408
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
409
-
410
-  .weak SPI1_IRQHandler
411
-  .thumb_set SPI1_IRQHandler,Default_Handler
412
-
413
-  .weak SPI2_IRQHandler
414
-  .thumb_set SPI2_IRQHandler,Default_Handler
415
-
416
-  .weak USART1_IRQHandler
417
-  .thumb_set USART1_IRQHandler,Default_Handler
418
-
419
-  .weak USART2_IRQHandler
420
-  .thumb_set USART2_IRQHandler,Default_Handler
421
-
422
-  .weak USART3_IRQHandler
423
-  .thumb_set USART3_IRQHandler,Default_Handler
424
-
425
-  .weak EXTI15_10_IRQHandler
426
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
427
-
428
-  .weak RTC_Alarm_IRQHandler
429
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
430
-
431
-  .weak USBWakeUp_IRQHandler
432
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
433
-
434
-  .weak TIM8_BRK_IRQHandler
435
-  .thumb_set TIM8_BRK_IRQHandler,Default_Handler
436
-
437
-  .weak TIM8_UP_IRQHandler
438
-  .thumb_set TIM8_UP_IRQHandler,Default_Handler
439
-
440
-  .weak TIM8_TRG_COM_IRQHandler
441
-  .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
442
-
443
-  .weak TIM8_CC_IRQHandler
444
-  .thumb_set TIM8_CC_IRQHandler,Default_Handler
445
-
446
-  .weak ADC3_IRQHandler
447
-  .thumb_set ADC3_IRQHandler,Default_Handler
448
-
449
-  .weak FSMC_IRQHandler
450
-  .thumb_set FSMC_IRQHandler,Default_Handler
451
-
452
-  .weak SDIO_IRQHandler
453
-  .thumb_set SDIO_IRQHandler,Default_Handler
454
-
455
-  .weak TIM5_IRQHandler
456
-  .thumb_set TIM5_IRQHandler,Default_Handler
457
-
458
-  .weak SPI3_IRQHandler
459
-  .thumb_set SPI3_IRQHandler,Default_Handler
460
-
461
-  .weak UART4_IRQHandler
462
-  .thumb_set UART4_IRQHandler,Default_Handler
463
-
464
-  .weak UART5_IRQHandler
465
-  .thumb_set UART5_IRQHandler,Default_Handler
466
-
467
-  .weak TIM6_IRQHandler
468
-  .thumb_set TIM6_IRQHandler,Default_Handler
469
-
470
-  .weak TIM7_IRQHandler
471
-  .thumb_set TIM7_IRQHandler,Default_Handler
472
-
473
-  .weak DMA2_Channel1_IRQHandler
474
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
475
-
476
-  .weak DMA2_Channel2_IRQHandler
477
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
478
-
479
-  .weak DMA2_Channel3_IRQHandler
480
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
481
-
482
-  .weak DMA2_Channel4_5_IRQHandler
483
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
484
-
485
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 482
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f103xg.s View File

@@ -1,482 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f103xb.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F103xB Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM,        0xF1E0F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-
100
-/* Zero fill the bss segment. */
101
-FillZerobss:
102
-  movs r3, #0
103
-  str r3, [r2], #4
104
-
105
-LoopFillZerobss:
106
-  ldr r3, = _ebss
107
-  cmp r2, r3
108
-  bcc FillZerobss
109
-
110
-/* Call the clock system intitialization function.*/
111
-    bl  SystemInit
112
-/* Call static constructors */
113
-    bl __libc_init_array
114
-/* Call the application's entry point.*/
115
-  bl main
116
-  bx lr
117
-.size Reset_Handler, .-Reset_Handler
118
-
119
-/**
120
- * @brief  This is the code that gets called when the processor receives an
121
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
122
- *         the system state for examination by a debugger.
123
- * @param  None
124
- * @retval None       
125
-*/
126
-    .section .text.Default_Handler,"ax",%progbits
127
-Default_Handler:
128
-Infinite_Loop:
129
-  b Infinite_Loop
130
-  .size Default_Handler, .-Default_Handler
131
-/******************************************************************************
132
-*
133
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
134
-* must be placed on this to ensure that it ends up at physical address
135
-* 0x0000.0000.
136
-*
137
-*******************************************************************************/
138
-  .section .isr_vector,"a",%progbits
139
-  .type g_pfnVectors, %object
140
-  .size g_pfnVectors, .-g_pfnVectors
141
-
142
-
143
-g_pfnVectors:
144
-
145
-  .word  _estack
146
-  .word  Reset_Handler
147
-  .word  NMI_Handler
148
-  .word  HardFault_Handler
149
-  .word  MemManage_Handler
150
-  .word  BusFault_Handler
151
-  .word  UsageFault_Handler
152
-  .word  0
153
-  .word  0
154
-  .word  0
155
-  .word  0
156
-  .word  SVC_Handler
157
-  .word  DebugMon_Handler
158
-  .word  0
159
-  .word  PendSV_Handler
160
-  .word  SysTick_Handler
161
-  .word  WWDG_IRQHandler
162
-  .word  PVD_IRQHandler
163
-  .word  TAMPER_IRQHandler
164
-  .word  RTC_IRQHandler
165
-  .word  FLASH_IRQHandler
166
-  .word  RCC_IRQHandler
167
-  .word  EXTI0_IRQHandler
168
-  .word  EXTI1_IRQHandler
169
-  .word  EXTI2_IRQHandler
170
-  .word  EXTI3_IRQHandler
171
-  .word  EXTI4_IRQHandler
172
-  .word  DMA1_Channel1_IRQHandler
173
-  .word  DMA1_Channel2_IRQHandler
174
-  .word  DMA1_Channel3_IRQHandler
175
-  .word  DMA1_Channel4_IRQHandler
176
-  .word  DMA1_Channel5_IRQHandler
177
-  .word  DMA1_Channel6_IRQHandler
178
-  .word  DMA1_Channel7_IRQHandler
179
-  .word  ADC1_2_IRQHandler
180
-  .word  USB_HP_CAN1_TX_IRQHandler
181
-  .word  USB_LP_CAN1_RX0_IRQHandler
182
-  .word  CAN1_RX1_IRQHandler
183
-  .word  CAN1_SCE_IRQHandler
184
-  .word  EXTI9_5_IRQHandler
185
-  .word  TIM1_BRK_TIM9_IRQHandler
186
-  .word  TIM1_UP_TIM10_IRQHandler
187
-  .word  TIM1_TRG_COM_TIM11_IRQHandler
188
-  .word  TIM1_CC_IRQHandler
189
-  .word  TIM2_IRQHandler
190
-  .word  TIM3_IRQHandler
191
-  .word  TIM4_IRQHandler
192
-  .word  I2C1_EV_IRQHandler
193
-  .word  I2C1_ER_IRQHandler
194
-  .word  I2C2_EV_IRQHandler
195
-  .word  I2C2_ER_IRQHandler
196
-  .word  SPI1_IRQHandler
197
-  .word  SPI2_IRQHandler
198
-  .word  USART1_IRQHandler
199
-  .word  USART2_IRQHandler
200
-  .word  USART3_IRQHandler
201
-  .word  EXTI15_10_IRQHandler
202
-  .word  RTC_Alarm_IRQHandler
203
-  .word  USBWakeUp_IRQHandler
204
-  .word  TIM8_BRK_TIM12_IRQHandler
205
-  .word  TIM8_UP_TIM13_IRQHandler
206
-  .word  TIM8_TRG_COM_TIM14_IRQHandler
207
-  .word  TIM8_CC_IRQHandler
208
-  .word  ADC3_IRQHandler
209
-  .word  FSMC_IRQHandler
210
-  .word  SDIO_IRQHandler
211
-  .word  TIM5_IRQHandler
212
-  .word  SPI3_IRQHandler
213
-  .word  UART4_IRQHandler
214
-  .word  UART5_IRQHandler
215
-  .word  TIM6_IRQHandler
216
-  .word  TIM7_IRQHandler
217
-  .word  DMA2_Channel1_IRQHandler
218
-  .word  DMA2_Channel2_IRQHandler
219
-  .word  DMA2_Channel3_IRQHandler
220
-  .word  DMA2_Channel4_5_IRQHandler
221
-  .word  0
222
-  .word  0
223
-  .word  0
224
-  .word  0
225
-  .word  0
226
-  .word  0
227
-  .word  0
228
-  .word  0
229
-  .word  0
230
-  .word  0
231
-  .word  0
232
-  .word  0
233
-  .word  0
234
-  .word  0
235
-  .word  0
236
-  .word  0
237
-  .word  0
238
-  .word  0
239
-  .word  0
240
-  .word  0
241
-  .word  0
242
-  .word  0
243
-  .word  0
244
-  .word  0
245
-  .word  0
246
-  .word  0
247
-  .word  0
248
-  .word  0
249
-  .word  0
250
-  .word  0
251
-  .word  0
252
-  .word  0
253
-  .word  0
254
-  .word  0
255
-  .word  0
256
-  .word  0
257
-  .word  0
258
-  .word  0
259
-  .word  0
260
-  .word  0
261
-  .word  0
262
-  .word  0
263
-  .word  0
264
-  .word  0
265
-  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
266
-                         STM32F10x XL-Density devices. */
267
-/*******************************************************************************
268
-*
269
-* Provide weak aliases for each Exception handler to the Default_Handler. 
270
-* As they are weak aliases, any function with the same name will override 
271
-* this definition.
272
-* 
273
-*******************************************************************************/
274
-    
275
-  .weak  NMI_Handler
276
-  .thumb_set NMI_Handler,Default_Handler
277
-  
278
-  .weak  HardFault_Handler
279
-  .thumb_set HardFault_Handler,Default_Handler
280
-  
281
-  .weak  MemManage_Handler
282
-  .thumb_set MemManage_Handler,Default_Handler
283
-  
284
-  .weak  BusFault_Handler
285
-  .thumb_set BusFault_Handler,Default_Handler
286
-
287
-  .weak  UsageFault_Handler
288
-  .thumb_set UsageFault_Handler,Default_Handler
289
-
290
-  .weak  SVC_Handler
291
-  .thumb_set SVC_Handler,Default_Handler
292
-
293
-  .weak  DebugMon_Handler
294
-  .thumb_set DebugMon_Handler,Default_Handler
295
-
296
-  .weak  PendSV_Handler
297
-  .thumb_set PendSV_Handler,Default_Handler
298
-
299
-  .weak  SysTick_Handler
300
-  .thumb_set SysTick_Handler,Default_Handler
301
-
302
-  .weak  WWDG_IRQHandler
303
-  .thumb_set WWDG_IRQHandler,Default_Handler
304
-
305
-  .weak  PVD_IRQHandler
306
-  .thumb_set PVD_IRQHandler,Default_Handler
307
-
308
-  .weak  TAMPER_IRQHandler
309
-  .thumb_set TAMPER_IRQHandler,Default_Handler
310
-
311
-  .weak  RTC_IRQHandler
312
-  .thumb_set RTC_IRQHandler,Default_Handler
313
-
314
-  .weak  FLASH_IRQHandler
315
-  .thumb_set FLASH_IRQHandler,Default_Handler
316
-
317
-  .weak  RCC_IRQHandler
318
-  .thumb_set RCC_IRQHandler,Default_Handler
319
-
320
-  .weak  EXTI0_IRQHandler
321
-  .thumb_set EXTI0_IRQHandler,Default_Handler
322
-
323
-  .weak  EXTI1_IRQHandler
324
-  .thumb_set EXTI1_IRQHandler,Default_Handler
325
-
326
-  .weak  EXTI2_IRQHandler
327
-  .thumb_set EXTI2_IRQHandler,Default_Handler
328
-
329
-  .weak  EXTI3_IRQHandler
330
-  .thumb_set EXTI3_IRQHandler,Default_Handler
331
-
332
-  .weak  EXTI4_IRQHandler
333
-  .thumb_set EXTI4_IRQHandler,Default_Handler
334
-
335
-  .weak  DMA1_Channel1_IRQHandler
336
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
337
-
338
-  .weak  DMA1_Channel2_IRQHandler
339
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
340
-
341
-  .weak  DMA1_Channel3_IRQHandler
342
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
343
-
344
-  .weak  DMA1_Channel4_IRQHandler
345
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
346
-
347
-  .weak  DMA1_Channel5_IRQHandler
348
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
349
-
350
-  .weak  DMA1_Channel6_IRQHandler
351
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
352
-
353
-  .weak  DMA1_Channel7_IRQHandler
354
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
355
-
356
-  .weak  ADC1_2_IRQHandler
357
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
358
-
359
-  .weak  USB_HP_CAN1_TX_IRQHandler
360
-  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
361
-
362
-  .weak  USB_LP_CAN1_RX0_IRQHandler
363
-  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
364
-
365
-  .weak  CAN1_RX1_IRQHandler
366
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
367
-
368
-  .weak  CAN1_SCE_IRQHandler
369
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
370
-
371
-  .weak  EXTI9_5_IRQHandler
372
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
373
-
374
-  .weak  TIM1_BRK_TIM9_IRQHandler
375
-  .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
376
-
377
-  .weak  TIM1_UP_TIM10_IRQHandler
378
-  .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
379
-
380
-  .weak  TIM1_TRG_COM_TIM11_IRQHandler
381
-  .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
382
-
383
-  .weak  TIM1_CC_IRQHandler
384
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
385
-
386
-  .weak  TIM2_IRQHandler
387
-  .thumb_set TIM2_IRQHandler,Default_Handler
388
-
389
-  .weak  TIM3_IRQHandler
390
-  .thumb_set TIM3_IRQHandler,Default_Handler
391
-
392
-  .weak  TIM4_IRQHandler
393
-  .thumb_set TIM4_IRQHandler,Default_Handler
394
-
395
-  .weak  I2C1_EV_IRQHandler
396
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
397
-
398
-  .weak  I2C1_ER_IRQHandler
399
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
400
-
401
-  .weak  I2C2_EV_IRQHandler
402
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
403
-
404
-  .weak  I2C2_ER_IRQHandler
405
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
406
-
407
-  .weak  SPI1_IRQHandler
408
-  .thumb_set SPI1_IRQHandler,Default_Handler
409
-
410
-  .weak  SPI2_IRQHandler
411
-  .thumb_set SPI2_IRQHandler,Default_Handler
412
-
413
-  .weak  USART1_IRQHandler
414
-  .thumb_set USART1_IRQHandler,Default_Handler
415
-
416
-  .weak  USART2_IRQHandler
417
-  .thumb_set USART2_IRQHandler,Default_Handler
418
-
419
-  .weak  USART3_IRQHandler
420
-  .thumb_set USART3_IRQHandler,Default_Handler
421
-
422
-  .weak  EXTI15_10_IRQHandler
423
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
424
-
425
-  .weak  RTC_Alarm_IRQHandler
426
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
427
-
428
-  .weak  USBWakeUp_IRQHandler
429
-  .thumb_set USBWakeUp_IRQHandler,Default_Handler
430
-
431
-  .weak  TIM8_BRK_TIM12_IRQHandler
432
-  .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
433
-
434
-  .weak  TIM8_UP_TIM13_IRQHandler
435
-  .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
436
-
437
-  .weak  TIM8_TRG_COM_TIM14_IRQHandler
438
-  .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
439
-
440
-  .weak  TIM8_CC_IRQHandler
441
-  .thumb_set TIM8_CC_IRQHandler,Default_Handler
442
-
443
-  .weak  ADC3_IRQHandler
444
-  .thumb_set ADC3_IRQHandler,Default_Handler
445
-
446
-  .weak  FSMC_IRQHandler
447
-  .thumb_set FSMC_IRQHandler,Default_Handler
448
-
449
-  .weak  SDIO_IRQHandler
450
-  .thumb_set SDIO_IRQHandler,Default_Handler
451
-
452
-  .weak  TIM5_IRQHandler
453
-  .thumb_set TIM5_IRQHandler,Default_Handler
454
-
455
-  .weak  SPI3_IRQHandler
456
-  .thumb_set SPI3_IRQHandler,Default_Handler
457
-
458
-  .weak  UART4_IRQHandler
459
-  .thumb_set UART4_IRQHandler,Default_Handler
460
-
461
-  .weak  UART5_IRQHandler
462
-  .thumb_set UART5_IRQHandler,Default_Handler
463
-
464
-  .weak  TIM6_IRQHandler
465
-  .thumb_set TIM6_IRQHandler,Default_Handler
466
-
467
-  .weak  TIM7_IRQHandler
468
-  .thumb_set TIM7_IRQHandler,Default_Handler
469
-
470
-  .weak  DMA2_Channel1_IRQHandler
471
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
472
-
473
-  .weak  DMA2_Channel2_IRQHandler
474
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
475
-
476
-  .weak  DMA2_Channel3_IRQHandler
477
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
478
-
479
-  .weak  DMA2_Channel4_5_IRQHandler
480
-  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
481
-
482
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 476
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f105xc.s View File

@@ -1,476 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f105xc.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F105xC Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF1E0F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-
100
-/* Zero fill the bss segment. */
101
-FillZerobss:
102
-  movs r3, #0
103
-  str r3, [r2], #4
104
-
105
-LoopFillZerobss:
106
-  ldr r3, = _ebss
107
-  cmp r2, r3
108
-  bcc FillZerobss
109
-/* Call the clock system intitialization function.*/
110
-    bl  SystemInit
111
-/* Call the application's entry point.*/
112
-  bl main
113
-  bx lr
114
-.size Reset_Handler, .-Reset_Handler
115
-
116
-/**
117
- * @brief  This is the code that gets called when the processor receives an
118
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
119
- *         the system state for examination by a debugger.
120
- * @param  None
121
- * @retval None
122
-*/
123
-    .section .text.Default_Handler,"ax",%progbits
124
-Default_Handler:
125
-Infinite_Loop:
126
-  b Infinite_Loop
127
-  .size Default_Handler, .-Default_Handler
128
-/******************************************************************************
129
-*
130
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
131
-* must be placed on this to ensure that it ends up at physical address
132
-* 0x0000.0000.
133
-*
134
-******************************************************************************/
135
-  .section .isr_vector,"a",%progbits
136
-  .type g_pfnVectors, %object
137
-  .size g_pfnVectors, .-g_pfnVectors
138
-
139
-
140
-g_pfnVectors:
141
-
142
-  .word _estack
143
-  .word Reset_Handler
144
-  .word NMI_Handler
145
-  .word HardFault_Handler
146
-  .word MemManage_Handler
147
-  .word BusFault_Handler
148
-  .word UsageFault_Handler
149
-  .word 0
150
-  .word 0
151
-  .word 0
152
-  .word 0
153
-  .word SVC_Handler
154
-  .word DebugMon_Handler
155
-  .word 0
156
-  .word PendSV_Handler
157
-  .word SysTick_Handler
158
-  .word WWDG_IRQHandler
159
-  .word PVD_IRQHandler
160
-  .word TAMPER_IRQHandler
161
-  .word RTC_IRQHandler
162
-  .word FLASH_IRQHandler
163
-  .word RCC_IRQHandler
164
-  .word EXTI0_IRQHandler
165
-  .word EXTI1_IRQHandler
166
-  .word EXTI2_IRQHandler
167
-  .word EXTI3_IRQHandler
168
-  .word EXTI4_IRQHandler
169
-  .word DMA1_Channel1_IRQHandler
170
-  .word DMA1_Channel2_IRQHandler
171
-  .word DMA1_Channel3_IRQHandler
172
-  .word DMA1_Channel4_IRQHandler
173
-  .word DMA1_Channel5_IRQHandler
174
-  .word DMA1_Channel6_IRQHandler
175
-  .word DMA1_Channel7_IRQHandler
176
-  .word ADC1_2_IRQHandler
177
-  .word CAN1_TX_IRQHandler
178
-  .word CAN1_RX0_IRQHandler
179
-   .word CAN1_RX1_IRQHandler
180
-  .word CAN1_SCE_IRQHandler
181
-  .word EXTI9_5_IRQHandler
182
-  .word TIM1_BRK_IRQHandler
183
-  .word TIM1_UP_IRQHandler
184
-  .word TIM1_TRG_COM_IRQHandler
185
-  .word TIM1_CC_IRQHandler
186
-  .word TIM2_IRQHandler
187
-  .word TIM3_IRQHandler
188
-  .word TIM4_IRQHandler
189
-  .word I2C1_EV_IRQHandler
190
-  .word I2C1_ER_IRQHandler
191
-  .word I2C2_EV_IRQHandler
192
-  .word I2C2_ER_IRQHandler
193
-  .word SPI1_IRQHandler
194
-  .word SPI2_IRQHandler
195
-  .word USART1_IRQHandler
196
-  .word USART2_IRQHandler
197
-  .word USART3_IRQHandler
198
-  .word EXTI15_10_IRQHandler
199
-  .word RTC_Alarm_IRQHandler
200
-  .word OTG_FS_WKUP_IRQHandler
201
-  .word 0
202
-  .word 0
203
-  .word 0
204
-  .word 0
205
-  .word 0
206
-  .word 0
207
-  .word 0
208
-  .word TIM5_IRQHandler
209
-  .word SPI3_IRQHandler
210
-  .word UART4_IRQHandler
211
-  .word UART5_IRQHandler
212
-  .word TIM6_IRQHandler
213
-  .word TIM7_IRQHandler
214
-  .word DMA2_Channel1_IRQHandler
215
-  .word DMA2_Channel2_IRQHandler
216
-  .word DMA2_Channel3_IRQHandler
217
-  .word DMA2_Channel4_IRQHandler
218
-  .word DMA2_Channel5_IRQHandler
219
-  .word 0
220
-  .word 0
221
-  .word CAN2_TX_IRQHandler
222
-  .word CAN2_RX0_IRQHandler
223
-  .word CAN2_RX1_IRQHandler
224
-  .word CAN2_SCE_IRQHandler
225
-  .word OTG_FS_IRQHandler
226
-  .word 0
227
-  .word 0
228
-  .word 0
229
-  .word 0
230
-  .word 0
231
-  .word 0
232
-  .word 0
233
-  .word 0
234
-  .word 0
235
-  .word 0
236
-  .word 0
237
-  .word 0
238
-  .word 0
239
-  .word 0
240
-  .word 0
241
-  .word 0
242
-  .word 0
243
-  .word 0
244
-  .word 0
245
-  .word 0
246
-  .word 0
247
-  .word 0
248
-  .word 0
249
-  .word 0
250
-  .word 0
251
-  .word 0
252
-  .word 0
253
-  .word 0
254
-  .word 0
255
-  .word 0
256
-  .word 0
257
-  .word 0
258
-  .word 0
259
-  .word 0
260
-  .word 0
261
-  .word 0
262
-  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
263
-                         STM32F10x Connectivity line Devices. */
264
-
265
-/*******************************************************************************
266
-*
267
-* Provide weak aliases for each Exception handler to the Default_Handler.
268
-* As they are weak aliases, any function with the same name will override
269
-* this definition.
270
-*
271
-*******************************************************************************/
272
-  .weak NMI_Handler
273
-  .thumb_set NMI_Handler,Default_Handler
274
-
275
-  .weak HardFault_Handler
276
-  .thumb_set HardFault_Handler,Default_Handler
277
-
278
-  .weak MemManage_Handler
279
-  .thumb_set MemManage_Handler,Default_Handler
280
-
281
-  .weak BusFault_Handler
282
-  .thumb_set BusFault_Handler,Default_Handler
283
-
284
-  .weak UsageFault_Handler
285
-  .thumb_set UsageFault_Handler,Default_Handler
286
-
287
-  .weak SVC_Handler
288
-  .thumb_set SVC_Handler,Default_Handler
289
-
290
-  .weak DebugMon_Handler
291
-  .thumb_set DebugMon_Handler,Default_Handler
292
-
293
-  .weak PendSV_Handler
294
-  .thumb_set PendSV_Handler,Default_Handler
295
-
296
-  .weak SysTick_Handler
297
-  .thumb_set SysTick_Handler,Default_Handler
298
-
299
-  .weak WWDG_IRQHandler
300
-  .thumb_set WWDG_IRQHandler,Default_Handler
301
-
302
-  .weak PVD_IRQHandler
303
-  .thumb_set PVD_IRQHandler,Default_Handler
304
-
305
-  .weak TAMPER_IRQHandler
306
-  .thumb_set TAMPER_IRQHandler,Default_Handler
307
-
308
-  .weak RTC_IRQHandler
309
-  .thumb_set RTC_IRQHandler,Default_Handler
310
-
311
-  .weak FLASH_IRQHandler
312
-  .thumb_set FLASH_IRQHandler,Default_Handler
313
-
314
-  .weak RCC_IRQHandler
315
-  .thumb_set RCC_IRQHandler,Default_Handler
316
-
317
-  .weak EXTI0_IRQHandler
318
-  .thumb_set EXTI0_IRQHandler,Default_Handler
319
-
320
-  .weak EXTI1_IRQHandler
321
-  .thumb_set EXTI1_IRQHandler,Default_Handler
322
-
323
-  .weak EXTI2_IRQHandler
324
-  .thumb_set EXTI2_IRQHandler,Default_Handler
325
-
326
-  .weak EXTI3_IRQHandler
327
-  .thumb_set EXTI3_IRQHandler,Default_Handler
328
-
329
-  .weak EXTI4_IRQHandler
330
-  .thumb_set EXTI4_IRQHandler,Default_Handler
331
-
332
-  .weak DMA1_Channel1_IRQHandler
333
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
334
-
335
-  .weak DMA1_Channel2_IRQHandler
336
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
337
-
338
-  .weak DMA1_Channel3_IRQHandler
339
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
340
-
341
-  .weak DMA1_Channel4_IRQHandler
342
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
343
-
344
-  .weak DMA1_Channel5_IRQHandler
345
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
346
-
347
-  .weak DMA1_Channel6_IRQHandler
348
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
349
-
350
-  .weak DMA1_Channel7_IRQHandler
351
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
352
-
353
-  .weak ADC1_2_IRQHandler
354
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
355
-
356
-  .weak CAN1_TX_IRQHandler
357
-  .thumb_set CAN1_TX_IRQHandler,Default_Handler
358
-
359
-  .weak CAN1_RX0_IRQHandler
360
-  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
361
-
362
-  .weak CAN1_RX1_IRQHandler
363
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
364
-
365
-  .weak CAN1_SCE_IRQHandler
366
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
367
-
368
-  .weak EXTI9_5_IRQHandler
369
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
370
-
371
-  .weak TIM1_BRK_IRQHandler
372
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
373
-
374
-  .weak TIM1_UP_IRQHandler
375
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
376
-
377
-  .weak TIM1_TRG_COM_IRQHandler
378
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
379
-
380
-  .weak TIM1_CC_IRQHandler
381
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
382
-
383
-  .weak TIM2_IRQHandler
384
-  .thumb_set TIM2_IRQHandler,Default_Handler
385
-
386
-  .weak TIM3_IRQHandler
387
-  .thumb_set TIM3_IRQHandler,Default_Handler
388
-
389
-  .weak TIM4_IRQHandler
390
-  .thumb_set TIM4_IRQHandler,Default_Handler
391
-
392
-  .weak I2C1_EV_IRQHandler
393
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
394
-
395
-  .weak I2C1_ER_IRQHandler
396
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
397
-
398
-  .weak I2C2_EV_IRQHandler
399
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
400
-
401
-  .weak I2C2_ER_IRQHandler
402
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
403
-
404
-  .weak SPI1_IRQHandler
405
-  .thumb_set SPI1_IRQHandler,Default_Handler
406
-
407
-  .weak SPI2_IRQHandler
408
-  .thumb_set SPI2_IRQHandler,Default_Handler
409
-
410
-  .weak USART1_IRQHandler
411
-  .thumb_set USART1_IRQHandler,Default_Handler
412
-
413
-  .weak USART2_IRQHandler
414
-  .thumb_set USART2_IRQHandler,Default_Handler
415
-
416
-  .weak USART3_IRQHandler
417
-  .thumb_set USART3_IRQHandler,Default_Handler
418
-
419
-  .weak EXTI15_10_IRQHandler
420
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
421
-
422
-  .weak RTC_Alarm_IRQHandler
423
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
424
-
425
-  .weak OTG_FS_WKUP_IRQHandler
426
-  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
427
-
428
-  .weak TIM5_IRQHandler
429
-  .thumb_set TIM5_IRQHandler,Default_Handler
430
-
431
-  .weak SPI3_IRQHandler
432
-  .thumb_set SPI3_IRQHandler,Default_Handler
433
-
434
-  .weak UART4_IRQHandler
435
-  .thumb_set UART4_IRQHandler,Default_Handler
436
-
437
-  .weak UART5_IRQHandler
438
-  .thumb_set UART5_IRQHandler,Default_Handler
439
-
440
-  .weak TIM6_IRQHandler
441
-  .thumb_set TIM6_IRQHandler,Default_Handler
442
-
443
-  .weak TIM7_IRQHandler
444
-  .thumb_set TIM7_IRQHandler,Default_Handler
445
-
446
-  .weak DMA2_Channel1_IRQHandler
447
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
448
-
449
-  .weak DMA2_Channel2_IRQHandler
450
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
451
-
452
-  .weak DMA2_Channel3_IRQHandler
453
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
454
-
455
-  .weak DMA2_Channel4_IRQHandler
456
-  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
457
-
458
-  .weak DMA2_Channel5_IRQHandler
459
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
460
-
461
-  .weak CAN2_TX_IRQHandler
462
-  .thumb_set CAN2_TX_IRQHandler,Default_Handler
463
-
464
-  .weak CAN2_RX0_IRQHandler
465
-  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
466
-
467
-  .weak CAN2_RX1_IRQHandler
468
-  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
469
-
470
-  .weak CAN2_SCE_IRQHandler
471
-  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
472
-
473
-  .weak OTG_FS_IRQHandler
474
-  .thumb_set OTG_FS_IRQHandler ,Default_Handler
475
-
476
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 487
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/gcc/startup_stm32f107xc.s View File

@@ -1,487 +0,0 @@
1
-/**
2
-  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
-  * @file      startup_stm32f107xc.s
4
-  * @author    MCD Application Team
5
-  * @version   V4.2.0
6
-  * @date      31-March-2017
7
-  * @brief     STM32F107xC Devices vector table for Atollic toolchain.
8
-  *            This module performs:
9
-  *                - Set the initial SP
10
-  *                - Set the initial PC == Reset_Handler,
11
-  *                - Set the vector table entries with the exceptions ISR address
12
-  *                - Configure the clock system   
13
-  *                - Branches to main in the C library (which eventually
14
-  *                  calls main()).
15
-  *            After Reset the Cortex-M3 processor is in Thread mode,
16
-  *            priority is Privileged, and the Stack is set to Main.
17
-  ******************************************************************************
18
-  *
19
-  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
20
-  *
21
-  * Redistribution and use in source and binary forms, with or without modification,
22
-  * are permitted provided that the following conditions are met:
23
-  *   1. Redistributions of source code must retain the above copyright notice,
24
-  *      this list of conditions and the following disclaimer.
25
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
26
-  *      this list of conditions and the following disclaimer in the documentation
27
-  *      and/or other materials provided with the distribution.
28
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
29
-  *      may be used to endorse or promote products derived from this software
30
-  *      without specific prior written permission.
31
-  *
32
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
-  *
43
-  ******************************************************************************
44
-  */
45
-
46
-  .syntax unified
47
-  .cpu cortex-m3
48
-  .fpu softvfp
49
-  .thumb
50
-
51
-.global g_pfnVectors
52
-.global Default_Handler
53
-
54
-/* start address for the initialization values of the .data section.
55
-defined in linker script */
56
-.word _sidata
57
-/* start address for the .data section. defined in linker script */
58
-.word _sdata
59
-/* end address for the .data section. defined in linker script */
60
-.word _edata
61
-/* start address for the .bss section. defined in linker script */
62
-.word _sbss
63
-/* end address for the .bss section. defined in linker script */
64
-.word _ebss
65
-
66
-.equ  BootRAM, 0xF1E0F85F
67
-/**
68
- * @brief  This is the code that gets called when the processor first
69
- *          starts execution following a reset event. Only the absolutely
70
- *          necessary set is performed, after which the application
71
- *          supplied main() routine is called.
72
- * @param  None
73
- * @retval : None
74
-*/
75
-
76
-  .section .text.Reset_Handler
77
-  .weak Reset_Handler
78
-  .type Reset_Handler, %function
79
-Reset_Handler:
80
-
81
-/* Copy the data segment initializers from flash to SRAM */
82
-  movs r1, #0
83
-  b LoopCopyDataInit
84
-
85
-CopyDataInit:
86
-  ldr r3, =_sidata
87
-  ldr r3, [r3, r1]
88
-  str r3, [r0, r1]
89
-  adds r1, r1, #4
90
-
91
-LoopCopyDataInit:
92
-  ldr r0, =_sdata
93
-  ldr r3, =_edata
94
-  adds r2, r0, r1
95
-  cmp r2, r3
96
-  bcc CopyDataInit
97
-  ldr r2, =_sbss
98
-  b LoopFillZerobss
99
-
100
-/* Zero fill the bss segment. */
101
-FillZerobss:
102
-  movs r3, #0
103
-  str r3, [r2], #4
104
-
105
-LoopFillZerobss:
106
-  ldr r3, = _ebss
107
-  cmp r2, r3
108
-  bcc FillZerobss
109
-
110
-/* Call the clock system intitialization function.*/
111
-    bl  SystemInit
112
-/* Call static constructors */
113
-    bl __libc_init_array
114
-/* Call the application's entry point.*/
115
-  bl main
116
-  bx lr
117
-.size Reset_Handler, .-Reset_Handler
118
-
119
-/**
120
- * @brief  This is the code that gets called when the processor receives an
121
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
122
- *         the system state for examination by a debugger.
123
- *
124
- * @param  None
125
- * @retval : None
126
-*/
127
-    .section .text.Default_Handler,"ax",%progbits
128
-Default_Handler:
129
-Infinite_Loop:
130
-  b Infinite_Loop
131
-  .size Default_Handler, .-Default_Handler
132
-
133
-/******************************************************************************
134
-*
135
-* The minimal vector table for a Cortex M3.  Note that the proper constructs
136
-* must be placed on this to ensure that it ends up at physical address
137
-* 0x0000.0000.
138
-*
139
-******************************************************************************/
140
-  .section .isr_vector,"a",%progbits
141
-  .type g_pfnVectors, %object
142
-  .size g_pfnVectors, .-g_pfnVectors
143
-
144
-
145
-g_pfnVectors:
146
-
147
-  .word _estack
148
-  .word Reset_Handler
149
-  .word NMI_Handler
150
-  .word HardFault_Handler
151
-  .word MemManage_Handler
152
-  .word BusFault_Handler
153
-  .word UsageFault_Handler
154
-  .word 0
155
-  .word 0
156
-  .word 0
157
-  .word 0
158
-  .word SVC_Handler
159
-  .word DebugMon_Handler
160
-  .word 0
161
-  .word PendSV_Handler
162
-  .word SysTick_Handler
163
-  .word WWDG_IRQHandler
164
-  .word PVD_IRQHandler
165
-  .word TAMPER_IRQHandler
166
-  .word RTC_IRQHandler
167
-  .word FLASH_IRQHandler
168
-  .word RCC_IRQHandler
169
-  .word EXTI0_IRQHandler
170
-  .word EXTI1_IRQHandler
171
-  .word EXTI2_IRQHandler
172
-  .word EXTI3_IRQHandler
173
-  .word EXTI4_IRQHandler
174
-  .word DMA1_Channel1_IRQHandler
175
-  .word DMA1_Channel2_IRQHandler
176
-  .word DMA1_Channel3_IRQHandler
177
-  .word DMA1_Channel4_IRQHandler
178
-  .word DMA1_Channel5_IRQHandler
179
-  .word DMA1_Channel6_IRQHandler
180
-  .word DMA1_Channel7_IRQHandler
181
-  .word ADC1_2_IRQHandler
182
-  .word CAN1_TX_IRQHandler
183
-  .word CAN1_RX0_IRQHandler
184
-  .word CAN1_RX1_IRQHandler
185
-  .word CAN1_SCE_IRQHandler
186
-  .word EXTI9_5_IRQHandler
187
-  .word TIM1_BRK_IRQHandler
188
-  .word TIM1_UP_IRQHandler
189
-  .word TIM1_TRG_COM_IRQHandler
190
-  .word TIM1_CC_IRQHandler
191
-  .word TIM2_IRQHandler
192
-  .word TIM3_IRQHandler
193
-  .word TIM4_IRQHandler
194
-  .word I2C1_EV_IRQHandler
195
-  .word I2C1_ER_IRQHandler
196
-  .word I2C2_EV_IRQHandler
197
-  .word I2C2_ER_IRQHandler
198
-  .word SPI1_IRQHandler
199
-  .word SPI2_IRQHandler
200
-  .word USART1_IRQHandler
201
-  .word USART2_IRQHandler
202
-  .word USART3_IRQHandler
203
-  .word EXTI15_10_IRQHandler
204
-  .word RTC_Alarm_IRQHandler
205
-  .word OTG_FS_WKUP_IRQHandler
206
-  .word 0
207
-  .word 0
208
-  .word 0
209
-  .word 0
210
-  .word 0
211
-  .word 0
212
-  .word 0
213
-  .word TIM5_IRQHandler
214
-  .word SPI3_IRQHandler
215
-  .word UART4_IRQHandler
216
-  .word UART5_IRQHandler
217
-  .word TIM6_IRQHandler
218
-  .word TIM7_IRQHandler
219
-  .word DMA2_Channel1_IRQHandler
220
-  .word DMA2_Channel2_IRQHandler
221
-  .word DMA2_Channel3_IRQHandler
222
-  .word DMA2_Channel4_IRQHandler
223
-  .word DMA2_Channel5_IRQHandler
224
-  .word ETH_IRQHandler
225
-  .word ETH_WKUP_IRQHandler
226
-  .word CAN2_TX_IRQHandler
227
-  .word CAN2_RX0_IRQHandler
228
-  .word CAN2_RX1_IRQHandler
229
-  .word CAN2_SCE_IRQHandler
230
-  .word OTG_FS_IRQHandler
231
-  .word 0
232
-  .word 0
233
-  .word 0
234
-  .word 0
235
-  .word 0
236
-  .word 0
237
-  .word 0
238
-  .word 0
239
-  .word 0
240
-  .word 0
241
-  .word 0
242
-  .word 0
243
-  .word 0
244
-  .word 0
245
-  .word 0
246
-  .word 0
247
-  .word 0
248
-  .word 0
249
-  .word 0
250
-  .word 0
251
-  .word 0
252
-  .word 0
253
-  .word 0
254
-  .word 0
255
-  .word 0
256
-  .word 0
257
-  .word 0
258
-  .word 0
259
-  .word 0
260
-  .word 0
261
-  .word 0
262
-  .word 0
263
-  .word 0
264
-  .word 0
265
-  .word 0
266
-  .word 0
267
-  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
268
-                         STM32F10x Connectivity line Devices. */
269
-
270
-/*******************************************************************************
271
-*
272
-* Provide weak aliases for each Exception handler to the Default_Handler.
273
-* As they are weak aliases, any function with the same name will override
274
-* this definition.
275
-*
276
-*******************************************************************************/
277
-  .weak  NMI_Handler
278
-  .thumb_set NMI_Handler,Default_Handler
279
-
280
-  .weak  HardFault_Handler
281
-  .thumb_set HardFault_Handler,Default_Handler
282
-
283
-  .weak  MemManage_Handler
284
-  .thumb_set MemManage_Handler,Default_Handler
285
-
286
-  .weak  BusFault_Handler
287
-  .thumb_set BusFault_Handler,Default_Handler
288
-
289
-  .weak  UsageFault_Handler
290
-  .thumb_set UsageFault_Handler,Default_Handler
291
-
292
-  .weak  SVC_Handler
293
-  .thumb_set SVC_Handler,Default_Handler
294
-
295
-  .weak  DebugMon_Handler
296
-  .thumb_set DebugMon_Handler,Default_Handler
297
-
298
-  .weak  PendSV_Handler
299
-  .thumb_set PendSV_Handler,Default_Handler
300
-
301
-  .weak  SysTick_Handler
302
-  .thumb_set SysTick_Handler,Default_Handler
303
-
304
-  .weak  WWDG_IRQHandler
305
-  .thumb_set WWDG_IRQHandler,Default_Handler
306
-
307
-  .weak  PVD_IRQHandler
308
-  .thumb_set PVD_IRQHandler,Default_Handler
309
-
310
-  .weak  TAMPER_IRQHandler
311
-  .thumb_set TAMPER_IRQHandler,Default_Handler
312
-
313
-  .weak  RTC_IRQHandler
314
-  .thumb_set RTC_IRQHandler,Default_Handler
315
-
316
-  .weak  FLASH_IRQHandler
317
-  .thumb_set FLASH_IRQHandler,Default_Handler
318
-
319
-  .weak  RCC_IRQHandler
320
-  .thumb_set RCC_IRQHandler,Default_Handler
321
-
322
-  .weak  EXTI0_IRQHandler
323
-  .thumb_set EXTI0_IRQHandler,Default_Handler
324
-
325
-  .weak  EXTI1_IRQHandler
326
-  .thumb_set EXTI1_IRQHandler,Default_Handler
327
-
328
-  .weak  EXTI2_IRQHandler
329
-  .thumb_set EXTI2_IRQHandler,Default_Handler
330
-
331
-  .weak  EXTI3_IRQHandler
332
-  .thumb_set EXTI3_IRQHandler,Default_Handler
333
-
334
-  .weak  EXTI4_IRQHandler
335
-  .thumb_set EXTI4_IRQHandler,Default_Handler
336
-
337
-  .weak  DMA1_Channel1_IRQHandler
338
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
339
-
340
-  .weak  DMA1_Channel2_IRQHandler
341
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
342
-
343
-  .weak  DMA1_Channel3_IRQHandler
344
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
345
-
346
-  .weak  DMA1_Channel4_IRQHandler
347
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
348
-
349
-  .weak  DMA1_Channel5_IRQHandler
350
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
351
-
352
-  .weak  DMA1_Channel6_IRQHandler
353
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
354
-
355
-  .weak  DMA1_Channel7_IRQHandler
356
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
357
-
358
-  .weak  ADC1_2_IRQHandler
359
-  .thumb_set ADC1_2_IRQHandler,Default_Handler
360
-
361
-  .weak  CAN1_TX_IRQHandler
362
-  .thumb_set CAN1_TX_IRQHandler,Default_Handler
363
-
364
-  .weak  CAN1_RX0_IRQHandler
365
-  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
366
-
367
-  .weak  CAN1_RX1_IRQHandler
368
-  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
369
-
370
-  .weak  CAN1_SCE_IRQHandler
371
-  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
372
-
373
-  .weak  EXTI9_5_IRQHandler
374
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
375
-
376
-  .weak  TIM1_BRK_IRQHandler
377
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
378
-
379
-  .weak  TIM1_UP_IRQHandler
380
-  .thumb_set TIM1_UP_IRQHandler,Default_Handler
381
-
382
-  .weak  TIM1_TRG_COM_IRQHandler
383
-  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
384
-
385
-  .weak  TIM1_CC_IRQHandler
386
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
387
-
388
-  .weak  TIM2_IRQHandler
389
-  .thumb_set TIM2_IRQHandler,Default_Handler
390
-
391
-  .weak  TIM3_IRQHandler
392
-  .thumb_set TIM3_IRQHandler,Default_Handler
393
-
394
-  .weak  TIM4_IRQHandler
395
-  .thumb_set TIM4_IRQHandler,Default_Handler
396
-
397
-  .weak  I2C1_EV_IRQHandler
398
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
399
-
400
-  .weak  I2C1_ER_IRQHandler
401
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
402
-
403
-  .weak  I2C2_EV_IRQHandler
404
-  .thumb_set I2C2_EV_IRQHandler,Default_Handler
405
-
406
-  .weak  I2C2_ER_IRQHandler
407
-  .thumb_set I2C2_ER_IRQHandler,Default_Handler
408
-
409
-  .weak  SPI1_IRQHandler
410
-  .thumb_set SPI1_IRQHandler,Default_Handler
411
-
412
-  .weak  SPI2_IRQHandler
413
-  .thumb_set SPI2_IRQHandler,Default_Handler
414
-
415
-  .weak  USART1_IRQHandler
416
-  .thumb_set USART1_IRQHandler,Default_Handler
417
-
418
-  .weak  USART2_IRQHandler
419
-  .thumb_set USART2_IRQHandler,Default_Handler
420
-
421
-  .weak  USART3_IRQHandler
422
-  .thumb_set USART3_IRQHandler,Default_Handler
423
-
424
-  .weak  EXTI15_10_IRQHandler
425
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
426
-
427
-  .weak  RTC_Alarm_IRQHandler
428
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
429
-
430
-  .weak  OTG_FS_WKUP_IRQHandler
431
-  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
432
-
433
-  .weak  TIM5_IRQHandler
434
-  .thumb_set TIM5_IRQHandler,Default_Handler
435
-
436
-  .weak  SPI3_IRQHandler
437
-  .thumb_set SPI3_IRQHandler,Default_Handler
438
-
439
-  .weak  UART4_IRQHandler
440
-  .thumb_set UART4_IRQHandler,Default_Handler
441
-
442
-  .weak  UART5_IRQHandler
443
-  .thumb_set UART5_IRQHandler,Default_Handler
444
-
445
-  .weak  TIM6_IRQHandler
446
-  .thumb_set TIM6_IRQHandler,Default_Handler
447
-
448
-  .weak  TIM7_IRQHandler
449
-  .thumb_set TIM7_IRQHandler,Default_Handler
450
-
451
-  .weak  DMA2_Channel1_IRQHandler
452
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
453
-
454
-  .weak  DMA2_Channel2_IRQHandler
455
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
456
-
457
-  .weak  DMA2_Channel3_IRQHandler
458
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
459
-
460
-  .weak  DMA2_Channel4_IRQHandler
461
-  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
462
-
463
-  .weak  DMA2_Channel5_IRQHandler
464
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
465
-
466
-  .weak  ETH_IRQHandler
467
-  .thumb_set ETH_IRQHandler,Default_Handler
468
-
469
-  .weak  ETH_WKUP_IRQHandler
470
-  .thumb_set ETH_WKUP_IRQHandler,Default_Handler
471
-
472
-  .weak  CAN2_TX_IRQHandler
473
-  .thumb_set CAN2_TX_IRQHandler,Default_Handler
474
-
475
-  .weak  CAN2_RX0_IRQHandler
476
-  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
477
-
478
-  .weak  CAN2_RX1_IRQHandler
479
-  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
480
-
481
-  .weak  CAN2_SCE_IRQHandler
482
-  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
483
-
484
-  .weak  OTG_FS_IRQHandler
485
-  .thumb_set OTG_FS_IRQHandler ,Default_Handler
486
-
487
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20001FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20001FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0807FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20007FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20007FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x08007FFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0807FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000BFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000BFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x080FFFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20013FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20013FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x08007FFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x200017FF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20003FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x08007FFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x200027FF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x200027FF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0801FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20004FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20004FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0807FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x080FFFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20017FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x20017FFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0803FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__   = 0x08000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__     = 0x0803FFFF;
9
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 31
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf View File

@@ -1,31 +0,0 @@
1
-/*###ICF### Section handled by ICF editor, don't touch! ****/
2
-/*-Editor annotation file-*/
3
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4
-/*-Specials-*/
5
-define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6
-/*-Memory Regions-*/
7
-define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8
-define symbol __ICFEDIT_region_ROM_end__   = 0x200013FF;
9
-define symbol __ICFEDIT_region_RAM_start__ = 0x20001400;
10
-define symbol __ICFEDIT_region_RAM_end__     = 0x2000FFFF;
11
-/*-Sizes-*/
12
-define symbol __ICFEDIT_size_cstack__   = 0x400;
13
-define symbol __ICFEDIT_size_heap__     = 0x200;
14
-/**** End of ICF editor section. ###ICF###*/
15
-
16
-
17
-define memory mem with size = 4G;
18
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
19
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
20
-
21
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
22
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
23
-
24
-initialize by copy { readwrite };
25
-do not initialize  { section .noinit };
26
-
27
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28
-
29
-place in ROM_region   { readonly };
30
-place in RAM_region   { readwrite,
31
-                        block CSTACK, block HEAP };

+ 0
- 0
incubateur/dumby_rtos2/dumby2/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f100xb.s View File


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