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@ -183,11 +183,28 @@ carries higher hardware costs (sensors, processing power).
FOC provides faster response times and better load disturbance rejection \cite{jomsa-nga_torque_2024}. FOC provides faster response times and better load disturbance rejection \cite{jomsa-nga_torque_2024}.
\section{Research gap}
Despite this progress, limited research has examined the adaptation of open-source motor controllers to LowTech and \section{Research Gap}
repairability constraints. To date, researchers have not addressed the challenge of designing a controller that can
be locally fabricated, repaired with standard components, and secured against unauthorised wireless access requirements The literature presented in the previous sections shows that significant work has been carried out on BLDC
that are critical for decentralised, community-operated fleets. motor control strategies, especially for torque ripple reduction, efficiency improvement, and dynamic performance
optimisation. Open-source projects such as VESC also provide high-performance and flexible solutions for electric
mobility systems.
However, most existing works mainly focus on control performance and do not consider low-tech constraints such as
local manufacturing, hardware repairability, or component accessibility. In many existing controllers, the hardware
design remains difficult to reproduce or repair without specialized equipment or advanced electronic knowledge.
In addition, the integration of wireless communication introduces new security concerns. While BLE connectivity
simplifies configuration and monitoring, unauthorized access to controller parameters could create safety risks,
especially for electric cargo bikes operating in public spaces.
To the best of our knowledge, there is currently no open-source motor controller that simultaneously addresses
high-performance control, local manufacturability, repairability, and BLE security for decentralized cargo bike
applications.
This project therefore aims to explore a modular and repair-oriented motor controller architecture compatible
with VESC while remaining adapted to the constraints of the Manufacture Autonome Décentralisée (MAD).
\section{Aim and Research Objectives} \section{Aim and Research Objectives}
@ -235,7 +252,7 @@ assistance based on system dynamics.
Table~\ref{tab:foc_vs_trap} summarizes the key differences between the Table~\ref{tab:foc_vs_trap} summarizes the key differences between the
two commutation strategies, based on the literature reviewed in two commutation strategies, based on the literature reviewed in
Section~\ref{sec:relatedwork}. Section~\ref{sec:related}.
\begin{table}[htbp] \begin{table}[htbp]
\caption{Comparison between FOC and trapezoidal (six-step) commutation} \caption{Comparison between FOC and trapezoidal (six-step) commutation}
@ -298,73 +315,91 @@ assistance based on system dynamics.
\subsection{Pin Compatibility Verification: L476 vs F405} \subsection{Pin Compatibility Verification: L476 vs F405}
Before modifying the PCB, a thorough pin compatibility check was Before starting the PCB modifications, a pin compatibility study was carried out between the STM32L476
performed between the STM32L476 and the STM32F405 used on the Rocacher tile and the STM32F405 originally used in the Cheap FOCer-2 design. The objective
(original Cheap FOCer-2 design). The following aspects were examined: was to verify that the main functions required by the VESC firmware could still be used after replacing
the original microcontroller.
The verification mainly focused on:
\begin{itemize} \begin{itemize}
\item Physical pinout in LQFP64 package. \item Physical pinout compatibility in the LQFP64 package,
\item Alternate functions for PWM timers. \item PWM timer for Alternate functions,
\item USB DP/DM pins (PA11/PA12). \item USB DP/DM pins (PA11/PA12),
\item Analog inputs for current sensing. \item Analog inputs for current sensing,
\item UART for BLE communication. \item UART communication for BLE integration.
\end{itemize} \end{itemize}
Three pin conflicts were identified and resolved as follows. During this analysis, three main pin conflicts were identified.
First, the SPI\_MISO function on PA6 for the STM32F405 conflicts with a \begin{figure}[!h]
DAC output on the same pin for the STM32L476 tile. Since this pin is
used for current sensing via SPI in the original Cheap FOCer-2 design,
the SPI communication was remapped to PA5 on the L476, which provides a
compatible alternate function.
Second, the gate driver enable signal (EN\_GATE) was originally assigned \centering
to PB5 on the F405. This pin is not accessible on the L476 \includegraphics[width=\linewidth]{../PCB/CompatibiliteL4F4.pdf}
tile. The signal was therefore moved to PC5, which is available and \caption{Comparison of F405 and L476 pin configurations}
can be configured as a standard GPIO output.
Third, Hall sensor C was originally connected to PC8 (TIM8) on the F405. \end{figure}
This pin is not available on the L476 tile. The Hall sensor input was
therefore reassigned to PB3, configured as TIM2\_CH2, which provides
the necessary input capture functionality for Hall signal decoding.
All other critical functions (PWM timers, complementary PWM, enable
signals, encoder inputs, UART, USB, and CAN) remain fully compatible The first conflict concerned the SPI\_MISO signal on pin PA6. In the original STM32F405 design, this pin is
between the two microcontrollers. The ADC channel differences between used for SPI communication related to current sensing. On the STM32L476 tile, the same pin is associated with
the F405 (ADC123/ADC12) and the L476 (ADC3) must still be handled in a DAC output, creating a functional conflict. To solve this issue, the SPI communication line was remapped
firmware, as noted previously. to PA5 on the L476, which offers a compatible alternate function.
The second issue concerned the EN\_GATE signal. In the original design, this signal was connected to PB5 on
the STM32F405. However, this pin is not accessible on the L476 tile. The signal was therefore moved to PC5,
configured as a standard GPIO output.
Finally, Hall sensor C was originally connected to PC8 (TIM8) on the STM32F405. Since this pin is not available
on the tile connector, the Hall sensor input was reassigned to PB3 using the TIM2\_CH2 alternate function,
which preserves the input capture capability required for Hall sensor decoding.
All other important functions remained compatible between the two microcontrollers, including PWM generation,
complementary PWM outputs, encoder inputs, UART, USB, and CAN communication. Some differences between the ADC
peripherals of the STM32F405 and STM32L476 still remain and will require firmware adaptations in future work.
\subsection{Schematic Design and KiCad Implementation} \subsection{Schematic Design and KiCad Implementation}
The original Cheap FOCer-2 schematic was modified in KiCad to replace the The original Cheap FOCer-2 schematic was modified in KiCad in order to replace the integrated STM32F405
integrated F405 with connectors for the L476 tile. The main modifications microcontroller with connectors for the Rocacher STM32L476 tile. The objective was to make the control part more
included: modular and easier to replace without modifying the power stage of the board.
The main modifications performed on the schematic were:
\begin{itemize} \begin{itemize}
\item Removal of the F405 and its associated passive components. \item Removal of the STM32F405 and its associated passive components.
\item Addition of two 20-pin headers to receive the Rocacher tile. \item Addition of two 20-pin headers for the L476 tile connection.
\item Re-routing of PWM, ADC, and USB signals to the headers. \item Re-routing of PWM, ADC, USB, and communication signals toward the headers.
\end{itemize} \end{itemize}
The schematic passed Electrical Rule Check (ERC) with no errors. Special attention was given to the routing of critical control signals, especially the PWM outputs used for
motor commutation and the analog signals used for current sensing.
After the modifications, the schematic was verified using the KiCad Electrical Rule Check (ERC). No electrical
errors were detected during this verification step, which validated the consistency of the schematic before
starting the PCB routing phase.
\subsection{Routing Challenges and Current Status} \subsection{Routing Challenges and Current Status}
The PCB layout was then started. The original Cheap FOCer-2 routing is After validating the schematic, the PCB routing phase was started in KiCad. The original Cheap FOCer-2 board
very dense. Inserting connectors for the removable tile while maintaining signal integrity proved uses a very compact layout with dense routing around the STM32F405 microcontroller and the power stage.
difficult. Integrating connectors for a removable STM32L476 tile introduced several additional routing constraints.
The main issues encountered were: One of the main difficulties was maintaining proper signal routing while keeping enough space for the tile
connectors and preserving the integrity of the control signals. Particular attention had to be given to the PWM
signals, current sensing traces, and power connections.
Several issues were encountered during the routing process:
\begin{itemize} \begin{itemize}
\item Some footprints for the tile connectors did not appear correctly \item Some connector footprints associated with the tile did not appear correctly after importing the schematic
in the layout after schematic import. into the PCB layout.
\item Routing of high-current paths (battery, motor phases) around the \item The routing of high-current paths, especially the battery and motor phase connections, become more complex
connectors required additional vias, increasing resistance. due to the additional connectors and required extra vias.
\item Decoupling capacitors had to be repositioned, raising concerns \item Some Decoupling capacitors had to be repositioned, which could potentially affect switching noise and power
about switching noise. supply stability.
\end{itemize} \end{itemize}
Currently, the schematic is validated, and the layout is under At the current stage of the project, the schematic has been validated and the PCB layout is still under development.
development. Once routing is completed, the board will be manufactured Once the routing is completed, the board will be manufactured and tested using the VESC firmware adapted for the
and tested with the VESC firmware adapted to the L476 tile. STM32L476 tile.
% ************************************** SOFTWARE AND CONNECTIVITY ***************************************************** % ************************************** SOFTWARE AND CONNECTIVITY *****************************************************
@ -375,7 +410,7 @@ assistance based on system dynamics.
\subsubsection{First Experiment} \subsubsection{First Experiment}
VESC-controllers are not necessarily equipped with Bluetooth-modules by default. Often, it is necessary to add a VESC-controllers are not necessarily equipped with Bluetooth-modules by default. Often, it is necessary to add a
BT-module. A standard HC-05 bluetooth-module compatible with arduino is a great way to send and recieve BLE-module. A standard HC-05 bluetooth-module compatible with arduino is a great way to send and recieve
bluetooth-packets from a host, e.g. a mobile phone, via a bridge translating the bluetooth packets to the UART protocol. bluetooth-packets from a host, e.g. a mobile phone, via a bridge translating the bluetooth packets to the UART protocol.
This could be demonstrated using a ESP8622's standard library with said module, by letting us send characters from one This could be demonstrated using a ESP8622's standard library with said module, by letting us send characters from one
device to another. device to another.
@ -626,6 +661,56 @@ where $e_{\text{ref}} = \SI{-0.5}{\meter}$ represents the desired equilibrium of
\subsection{Control Architecture Exploration} \subsection{Control Architecture Exploration}
Beyond the standard PI control structure simulated in the previous sections, this project explores a more sophisticated
control law: the Cascaded Loop Architecture. This approach is envisioned as a high-level software enhancement to meet
the robustness and safety requirements inherent to electric cargo mobility. This means that our control law includes two
feedback loops that use two different physical parameters.
The selected cascaded structure is a well-established industry standard, particularly in high-performance motion control
and robotics. Similar architectures are widely employed in Automated Guided Vehicles (AGVs) and platooning systems,
where a “follower” unit must synchronize its dynamics with a “leader” unit through precise feedback loops.
The proposed approach decomposes the complex task of “cart following” into manageable sub-tasks by nesting control
loops:
\begin{itemize}
\item Outer loop: Position control layer.
Using a linear encoder or distance sensor mounted on the trailer’s hitch, the system measures the relative
displacement (error) between the bicycle and the cargo cart. This error is processed by a Proportional (P)
Controller. The primary goal of this stage is to translate physical distance into a target velocity setpoint. By
saturating the output of this loop, we can prevent the cargo cart from ever exceeding the bicycle’s speed, thereby
ensuring it never “pushes” the cyclist.
\item Inner loop: Velocity control layer.
The velocity setpoint generated by the outer loop is fed into this internal layer, the inner loop is responsible for
commanding the motor torque directly to compensate for immediate mechanical disturbances. Because this loop operates
at a higher frequency, it can reject disturbances such as sudden changes in rolling resistance or friction, before
they significantly impact the overall position error.
\end{itemize}
\begin{figure}[!h]
\centering
\includegraphics[width=\linewidth]{./Figures/Schema_Autom_PIR.pdf}
\caption{Cascaded control architecture for the bicycle-cargo system.}
\label{fig:cascaded-loop}
\end{figure}
Fig.~\ref{fig:cascaded-loop} illustrates the cascade architecture for the dynamics of the cargo cart.
In this scheme, $x_{\text{ref}}$ denotes the desired position of the bicycle, whereas $x$ represents the measured
position of the cargo cart.
An outer Proportional Controller $K_{p,x}$ converts the position error $e_x = x_{\text{ref}} - x$ into a velocity
reference $v_{\text{ref}}$, which serves as the set-point for the inner loop.
The inner Proportional Controller $K_{p,v}$ then transforms the velocity error $e_v = v_{\text{ref}} - v$ into a
torque reference $\tau_{\text{ref}}$.
This command is processed by the motor/actuator block, which delivers the actual torque $\tau$.
The model of the plant maps this torque to velocity $v$, and the integrator $1/s$ reconstructs the position $x$.
The adoption of a cascaded loop architecture offers decisive advantages but comes with disadvantages. This precision
introduces increased complexity: the multiplication of tuning parameters and the requirement for high-resolution
feedback sensors, such as encoders, raise hardware costs and must come with high-performance software. These technical
constraints represent a significant challenge and may raise other issues.
% ******************************** RESULTS ************************************************************************** % ******************************** RESULTS **************************************************************************
@ -693,7 +778,7 @@ cargo cart. The motor current measured during these experiments is shown in Fig.
\begin{figure}[!h] \begin{figure}[!h]
\centering \centering
\includegraphics[width=\linewidth]{./Figures/Motor_currents.png} \includegraphics[width=\linewidth]{./Figures/Motor_currents.pdf}
\caption{Measured motor current under three loading conditions.} \caption{Measured motor current under three loading conditions.}
\label{fig:motor-currents} \label{fig:motor-currents}
\end{figure} \end{figure}
@ -785,6 +870,14 @@ The VESC-based FOC PCB requires routing completion and prototype
manufacturing. Once fabricated, the board must be tested under real manufacturing. Once fabricated, the board must be tested under real
operating conditions (varying loads, road profiles, and battery voltage). operating conditions (varying loads, road profiles, and battery voltage).
\subsection{Control Strategy Enhancement}
Future work includes the implementation and comparison of the PI controller and the cascaded control structure on the
cargo cart, in order to evaluate their performance under different conditions (load variations, road profiles, etc.).
In addition, the lack of direct velocity measurements limited the ability to fully characterise the system dynamics.
Adding a speed measurement or improving state estimation would allow a more complete analysis of the model.
% ******************************** CONCLUSION ************************************************************************** % ******************************** CONCLUSION **************************************************************************
\section{Conclusion/Summary} \section{Conclusion/Summary}