mise au propre du rapport

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Nolan Reynier Nomer 2026-05-18 14:56:43 +02:00
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\section{Discussion} \section{Discussion}
This project could be seen as an introduction to the VESC project for someone who don't know about it from beforehand, the challenges the new users face during setup, as well as a demand for clear expectations concerning documentation on the subject. The project the MAD is leading should probably not be a fork of the project, as the project is still in development. This project could be seen as an introduction to the VESC project for someone who don't know about it from beforehand, the challenges the new users face during setup, as well as a demand for clear expectations concerning documentation on the subject. The project the MAD is leading should probably not be a fork of the project, as the project is still in development.
As a final note, this proved to be a project which could easily be developed into several different projects in different fields. Some projects could be continued later on as a different PIR subject, other could be proposed to later years in different specialisations like TLS-SEC, ESPE. Our thoughts on the following projects that could be As a final note, this proved to be a project which could easily be developed into several different projects in different fields. Some projects could be continued later on as a different PIR subject, other could be proposed to later years in different specialisations like TLS-SEC, ESPE.
The fabrication line for electronics is globalised. This is okay in a stable world, but it could be a problem in a world full of instability, be it war, blockages, or tariffs. The idea of opening a specialisation in cooperation with AIME came up as an idea. The fabrication line for electronics is globalised. This is okay in a stable world, but it could be a problem in a world full of instability, be it war, blockages, or tariffs. The idea of opening a specialisation in cooperation with AIME came up as an idea.

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@ -45,7 +45,7 @@ The existing KiCad schematic and layout were used as the baseline for our adapta
Mr. Rocacher provided the Kicad schematic of a ready-to-use FOC tile based on an STM32L476 microcontroller. Mr. Rocacher provided the Kicad schematic of a ready-to-use FOC tile based on an STM32L476 microcontroller.
The initial idea was to make this tile \textit{pluggable} into our carrier board, similar to an Arduino shield. This would allow : The initial idea was to make this tile \textit{pluggable} into our carrier board, similar to an Arduino shield. This would allow:
\begin{itemize} \begin{itemize}
\item Easy replacement of the computing core without re-soldering. \item Easy replacement of the computing core without re-soldering.
\item Modular upgrades of the microcontroller. \item Modular upgrades of the microcontroller.
@ -66,16 +66,75 @@ The verification mainly focused on:
\item UART communication for BLE integration. \item UART communication for BLE integration.
\end{itemize} \end{itemize}
Table~\ref{tab:pin_mapping} summarizes the compatibility analysis and the signal mapping between both implementations.
\begin{table}[!t]
\caption{VESC-to-STM32L476 pin compatibility mapping}
\label{tab:pin_mapping}
\centering
\scriptsize
\begin{tabularx}{\columnwidth}{c c X X}
\toprule
Pin & Function & VESC Signal & Comments \\
\midrule
PA0 & ADC & SENS1 - ADC123\_IN0 & \\
PA1 & -- & SENS2 - ADC123\_IN1 & \\
PA2 & UART2 & SENS3 - ADC123\_IN2 & \\
PA3 & UART2 & ADC\_TEMP & \\
PA4 & DAC & SPI\_NSS & \\
PA5 & -- & SPI\_SCK & \\
PA6 & DAC & SPI\_MISO & DAC unavailable, use PA5 \\
PA7 & TIM1 PWM & SPI\_MOSI & \\
PA8 & TIM1 PWM & PWM\_H1 & \\
PA9 & TIM1 PWM & PWM\_H2 & \\
PA10 & TIM1 PWM & PWM\_H3 & \\
PA11 & -- & USB\_DM & \\
PA12 & -- & USB\_DP & \\
PA13 & -- & SWDIO & \\
PA14 & -- & SWCLK & \\
PA15 & TIM2 Hall/Encoder & BMI160\_SCL & \\
\midrule
PB0 & TIM1 PWM & LED GREEN & \\
PB1 & TIM1 PWM & LED RED & \\
PB2 & -- & BMI160\_SDA & \\
PB3 & TIM2 Hall/Encoder & Hall input & \\
PB5 & -- & EN\_GATE & Alternative pin required: PC5 \\
PB6 & -- & SERVO & \\
PB7 & -- & FAULT & \\
PB8 & -- & CAN\_RX & \\
PB9 & -- & CAN\_TX & \\
PB10 & TIM2 Hall/Encoder & UART\_TX / I2C\_SCL & \\
PB11 & -- & UART\_RX / I2C\_SDA & \\
PB13 & -- & PWM\_L1 & \\
PB14 & -- & PWM\_L2 & \\
PB15 & -- & PWM\_L3 & \\
\midrule
PC0 & ADC & BR\_S01 & \\
PC1 & ADC & BR\_S02 & \\
PC2 & -- & BR\_S03 & \\
PC3 & -- & AN\_IN & \\
PC4 & -- & TEMP\_MOTOR & \\
PC6 & -- & Hall\_A & \\
PC7 & -- & Hall\_B & \\
PC8 & -- & Hall\_C & Alternative pin required: PB3 (TIM2\_CH2) \\
PC9 & -- & DRV\_CS & \\
PC10 & -- & DRV\_SCK & \\
PC11 & -- & DRV\_MISO & \\
PC12 & -- & DRV\_MOSI & \\
\bottomrule
\end{tabularx}
\end{table}
The peripheral signals were grouped into three functional categories: driver control and status indicators (EN\_GATE, FAULT, LED\_GREEN, LED\_RED), Bluetooth communication (UART\_TX, UART\_RX), and programming/debug interface (SWCLK, SWDIO).
During this analysis, three main pin conflicts were identified. During this analysis, three main pin conflicts were identified.
\begin{figure}[!h]
\centering
\includegraphics[width=\linewidth]{Figures/CompatibiliteL4F4.pdf}
\caption{Comparison of F405 and L476 pin configurations}
\end{figure}
The first conflict concerned the SPI\_MISO signal on pin PA6. In the original STM32F405 design, this pin is used for SPI communication related to current sensing. On the STM32L476 tile, the same pin is associated with a DAC output, creating a functional conflict. To solve this issue, the SPI communication line was remapped to PA5 on the L476, which offers a compatible alternate function. The first conflict concerned the SPI\_MISO signal on pin PA6. In the original STM32F405 design, this pin is used for SPI communication related to current sensing. On the STM32L476 tile, the same pin is associated with a DAC output, creating a functional conflict. To solve this issue, the SPI communication line was remapped to PA5 on the L476, which offers a compatible alternate function.
The second issue concerned the EN\_GATE signal. In the original design, this signal was connected to PB5 on the STM32F405. However, this pin is not accessible on the L476 tile. The signal was therefore moved to PC5, configured as a standard GPIO output. The second issue concerned the EN\_GATE signal. In the original design, this signal was connected to PB5 on the STM32F405. However, this pin is not accessible on the L476 tile. The signal was therefore moved to PC5, configured as a standard GPIO output.

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@ -14,7 +14,7 @@ Bluetooth could be a vulnerability to a VESC if it is to be used as a controller
\subsection{Setup of BT-connection with VESC} \subsection{Setup of BT-connection with VESC}
The setup consisted of a main PC/controller, HC-05 Bluetooth module, ESP8266 µ-controller, STM32 Discovery µ-controller, PC with VESC-tool as well as a \textit{FlipperZero}. Our plan of action consisted of flashing the Discovery-card with code for then to read this code via UART to the ESP8266 which was connected to the BT-module. The BT-module would then send packets to the PC. This PC would then act as read/write to read the code having been flashed on the Discovery. Full-band jamming would then be achieved by the implementation of the \textit{FlipperZero} disrupting any transfer of code from PC1 to PC2.The \textit{FlipperZero} was equipped with the firmware \textit{DarkFlippers/unleashed-firmware}\cite{noauthor_darkflippersunleashed-firmware_2026} with the addition of an NRF-jammer from \textit{huuck/FlipperZeroNRFJammer} \cite{cirlig_huuckflipperzeronrfjammer_2026}. The setup consisted of a main PC/controller, HC-05 Bluetooth module, ESP8266 µ-controller, STM32 Discovery µ-controller, PC with VESC-tool as well as a \textit{FlipperZero}. Our plan of action consisted of flashing the Discovery-card with code for then to read this code via UART to the ESP8266 which was connected to the BT-module. The BT-module would then send packets to the PC. This PC would then act as read/write to read the code having been flashed on the Discovery. Full-band jamming would then be achieved by the implementation of the \textit{FlipperZero} disrupting any transfer of code from PC1 to PC2.The \textit{FlipperZero} was equipped with the firmware \textit{DarkFlippers/unleashed-firmware}\cite{noauthor_darkflippersunleashed-firmware_2026} with the addition of an NRF-jammer from \textit{huuck/FlipperZeroNRFJammer} \cite{cirlig_huuckflipperzeronrfjammer_2026}.
\newpage % \newpage
\begin{figure}[!h] \begin{figure}[!h]
\centering \centering
@ -106,6 +106,7 @@ The setup consisted of a main PC/controller, HC-05 Bluetooth module, ESP8266 µ-
\ \
\end{tikzpicture} \end{tikzpicture}
\caption{Setup of BT-connection wih VESC.} \caption{Setup of BT-connection wih VESC.}
\label{fig:BT} \label{fig:BT}

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The basis of this section is the replacement of components who are highly complex, technical and/or are dependant on global supply chains to manufacture. An additional goal is, as for the preceding section, to make a repairable, reliable and manufacturable circuit, this time using these more basic components, based on open-source principles. The controller needs to be performant enough to drive one of the two electric motors used on the LaMAD (La Manufacture Autonome Décentralisée) bicycle cargo trailer.\cite{noauthor_ddf-39_nodate} The basis of this section is the replacement of components who are highly complex, technical and/or are dependant on global supply chains to manufacture. An additional goal is, as for the preceding section, to make a repairable, reliable and manufacturable circuit, this time using these more basic components, based on open-source principles. The controller needs to be performant enough to drive one of the two electric motors used on the LaMAD (La Manufacture Autonome Décentralisée) bicycle cargo trailer.\cite{noauthor_ddf-39_nodate}
\subsection{Constraints} \subsection{Constraints}
The electric motors used are supplied using 36/48 Volts at 1000 W. This means that the six-step chopper transistors need to be able to supply up to 28 Amperes of current. This is a lot, considering our restrictions. Additionally, the heat will need to be managed, which may be an even bigger challenge than the current. The electric motors used are supplied using \SI{36}{\volt}/\SI{48}{\volt} at \SI{1000}{\watt}. This means that the six-step chopper transistors need to be able to supply up to \SI{28}{\ampere} of current. This is a lot, considering our restrictions. Additionally, the heat will need to be managed, which may be an even bigger challenge than the current.
\subsection{Semiconductor facilities in Occitanie} \subsection{Semiconductor facilities in Occitanie}
The most challenging part of this section is the replacement of semiconductor parts, as these are the most complicated parts to manufacture. Luckily, the city in which the team is located, Toulouse, offers possibilities in semiconductor manufacturing. This may not be a complete list, but the following were identified: The most challenging part of this section is the replacement of semiconductor parts, as these are the most complicated parts to manufacture. Luckily, the city in which the team is located, Toulouse, offers possibilities in semiconductor manufacturing. This may not be a complete list, but the following were identified:
@ -41,15 +41,15 @@ The AIME is a small research lab located on our campus. Their capabilities and p
The proposed project was based on their logic transistors, scaled up not in size, but in number. As seen in the table above, one of their small logic transistors has a resistance of: The proposed project was based on their logic transistors, scaled up not in size, but in number. As seen in the table above, one of their small logic transistors has a resistance of:
\begin{equation} \begin{equation*}
R_{DS_{on}} \approx 1\ k\Omega R_{DS_{on}} \approx \SI{1}{\kilo\ohm}
\end{equation} \end{equation*}
As we need a transistor capable of passing 28 Amperes of current, this resistance is unacceptable. Therefore, they proposed to put a great number of transistors in parallel to reduce $R_{DS_{on}}$, on a big surface to better distribute and dissipate the heat (the heat calculations were not made). We can also note here that AIME does not have packaging technology to dissipate high head loads, which could be resolved using external specialist companies (expensive) or making a very thermally efficient transistor. The current also makes the attachment of wires more complicated, as the general relation (not taking into consideration the skin effect in larger diameters) they gave me gives: As we need a transistor capable of passing \SI{28}{\ampere} of current, this resistance is unacceptable. Therefore, they proposed to put a great number of transistors in parallel to reduce $R_{DS_{on}}$, on a big surface to better distribute and dissipate the heat (the heat calculations were not made). We can also note here that AIME does not have packaging technology to dissipate high head loads, which could be resolved using external specialist companies (expensive) or making a very thermally efficient transistor. The current also makes the attachment of wires more complicated, as the general relation (not taking into consideration the skin effect in larger diameters) they gave me gives:
\begin{equation} \begin{equation*}
1\ \frac{mA}{\mu m\ diameter} \Rightarrow diameter = 2,8 cm 1\ \frac{mA}{\mu m\ diameter} \Rightarrow diameter = \SI{2.8}{\centi\meter}
\end{equation} \end{equation*}
Which is extremely unrealistic for a small component and needs to be investigated further. The second problem is the voltage, as the small signal transistors they have are made for lower voltages. Therefore, we needed a thicker MOSFET with a thicker n- drift layer between the drain and source to prevent breakdown, which results in us needing a fancy and expensive epitaxial wafer instead of a cheap one. This results in another problem, an even higher Drain-source on resistance $R_{DS_{on}}$, multiplying the already great number of transistors by a good factor. At the end, this is the project they proposed: Which is extremely unrealistic for a small component and needs to be investigated further. The second problem is the voltage, as the small signal transistors they have are made for lower voltages. Therefore, we needed a thicker MOSFET with a thicker n- drift layer between the drain and source to prevent breakdown, which results in us needing a fancy and expensive epitaxial wafer instead of a cheap one. This results in another problem, an even higher Drain-source on resistance $R_{DS_{on}}$, multiplying the already great number of transistors by a good factor. At the end, this is the project they proposed:

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\usepackage{siunitx} \usepackage{siunitx}
\usepackage{graphicx} \usepackage{graphicx}
\usepackage{textcomp} \usepackage{textcomp}
\usepackage{multirow}
\usepackage{tabularx}
\usepackage{xcolor} \usepackage{xcolor}
\usepackage{tikz} \usepackage{tikz}
\usepackage{graphicx} \usepackage{graphicx}
@ -117,7 +119,7 @@ VESC, Brushless DC motor, Field Oriented Control, Trapezoidal commutation, Low-T
\input{resultats.tex} \input{resultats.tex}
\input{discussion.tex} \input{discussion.tex}
\input{futur.tex} \input{futur.tex}
\input{conclusion.tex} % \input{conclusion.tex}
\input{remerciements.tex} \input{remerciements.tex}
\input{IA.tex} \input{IA.tex}