diff --git a/Article_Scientifique/Figures/Motor_currents.png b/Article_Scientifique/Figures/Motor_currents.png new file mode 100644 index 0000000..c988e6f Binary files /dev/null and b/Article_Scientifique/Figures/Motor_currents.png differ diff --git a/Article_Scientifique/main.aux b/Article_Scientifique/main.aux index 3261566..ed830b8 100644 --- a/Article_Scientifique/main.aux +++ b/Article_Scientifique/main.aux @@ -75,10 +75,13 @@ \@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces Position tracking error between bicycle and cargo cart.}}{4}{figure.2}\protected@file@percent } \newlabel{fig:tracking-error}{{2}{4}{Position tracking error between bicycle and cargo cart}{figure.2}{}} \@writefile{toc}{\contentsline {subsubsection}{\numberline {\mbox {IX-A}2}Experimental Load Characterization}{4}{subsubsection.9.1.2}\protected@file@percent } -\@writefile{toc}{\contentsline {section}{\numberline {X}Discussion}{4}{section.10}\protected@file@percent } \bibstyle{IEEEtran} \bibdata{PIR_MadMax3} \bibcite{patil_analysis_2025}{1} +\@writefile{lof}{\contentsline {figure}{\numberline {3}{\ignorespaces Measured motor current under three loading conditions.}}{5}{figure.3}\protected@file@percent } +\newlabel{fig:motor-currents}{{3}{5}{Measured motor current under three loading conditions}{figure.3}{}} +\@writefile{toc}{\contentsline {section}{\numberline {X}Discussion}{5}{section.10}\protected@file@percent } +\@writefile{toc}{\contentsline {section}{\numberline {XI}Conclusion/Summary}{5}{section.11}\protected@file@percent } \bibcite{li_quantitative_2019}{2} \bibcite{mohammd_taher_new_2021}{3} \bibcite{gieras_modern_2023}{4} @@ -88,6 +91,5 @@ \bibcite{lee_advanced_2001}{8} \bibcite{b1}{9} \bibcite{b2}{10} -\@writefile{toc}{\contentsline {section}{\numberline {XI}Conclusion/Summary}{5}{section.11}\protected@file@percent } -\@writefile{toc}{\contentsline {section}{References}{5}{section*.2}\protected@file@percent } -\gdef \@abspage@last{5} +\@writefile{toc}{\contentsline {section}{References}{6}{section*.2}\protected@file@percent } +\gdef \@abspage@last{6} diff --git a/Article_Scientifique/main.log b/Article_Scientifique/main.log index 350909a..5a5a868 100644 --- a/Article_Scientifique/main.log +++ b/Article_Scientifique/main.log @@ -1,4 +1,4 @@ -This is pdfTeX, Version 3.141592653-2.6-1.40.22 (TeX Live 2022/dev/Debian) (preloaded format=pdflatex 2026.3.16) 12 MAY 2026 22:57 +This is pdfTeX, Version 3.141592653-2.6-1.40.22 (TeX Live 2022/dev/Debian) (preloaded format=pdflatex 2026.3.16) 13 MAY 2026 18:32 entering extended mode restricted \write18 enabled. %&-line parsing enabled. @@ -535,15 +535,21 @@ Underfull \vbox (badness 1354) has occurred while \output is active [] <./Figures/sys_dyn_matlab.png, id=202, 430.2474pt x 226.6869pt> File: ./Figures/sys_dyn_matlab.png Graphic file (type png) -Package pdftex.def Info: ./Figures/sys_dyn_matlab.png used on input line 372. +Package pdftex.def Info: ./Figures/sys_dyn_matlab.png used on input line 373. (pdftex.def) Requested size: 252.0pt x 132.77559pt. <./Figures/error_fig.png, id=206, 509.7444pt x 328.5876pt> File: ./Figures/error_fig.png Graphic file (type png) -Package pdftex.def Info: ./Figures/error_fig.png used on input line 398. +Package pdftex.def Info: ./Figures/error_fig.png used on input line 399. (pdftex.def) Requested size: 252.0pt x 162.44328pt. [4 <./Figures/sys_dyn_matlab.png> <./Figures/error_fig.png (PNG copy)>] -(./main.bbl +<./Figures/Motor_currents.png, id=218, 499.6266pt x 328.1058pt> +File: ./Figures/Motor_currents.png Graphic file (type png) + +Package pdftex.def Info: ./Figures/Motor_currents.png used on input line 421. +(pdftex.def) Requested size: 252.0pt x 165.48434pt. + +(./main.bbl [5 <./Figures/Motor_currents.png (PNG copy)>] Underfull \hbox (badness 1490) in paragraph at lines 97--99 []\OT1/ptm/m/n/8 ------, ``lispbm in vesc,'' []$https : / / github . com / vedd erb / bldc / tree / master / @@ -561,18 +567,20 @@ Before submitting the final camera ready copy, remember to: uses only Type 1 fonts and that every step in the generation process uses the appropriate paper size. -[5] (./main.aux) +[6 + +] (./main.aux) Package rerunfilecheck Info: File `main.out' has not changed. (rerunfilecheck) Checksum: 4840E35989685C6A900816FED622AB01;6851. ) Here is how much of TeX's memory you used: - 14792 strings out of 478287 - 281340 string characters out of 5849289 - 566325 words of memory out of 5000000 - 32760 multiletter control sequences out of 15000+600000 + 14802 strings out of 478287 + 281591 string characters out of 5849289 + 566416 words of memory out of 5000000 + 32767 multiletter control sequences out of 15000+600000 505639 words of font info for 98 fonts, out of 8000000 for 9000 1141 hyphenation exceptions out of 8191 - 70i,8n,79p,470b,753s stack positions out of 5000i,500n,10000p,200000b,80000s + 70i,8n,79p,470b,903s stack positions out of 5000i,500n,10000p,200000b,80000s {/usr/share/texlive/texmf-dist/fonts/enc/dvips/base/8r.enc} -Output written on main.pdf (5 pages, 244634 bytes). +Output written on main.pdf (6 pages, 315176 bytes). PDF statistics: - 294 PDF objects out of 1000 (max. 8388607) - 261 compressed objects within 3 object streams - 55 named destinations out of 1000 (max. 500000) - 299 words of extra memory for PDF output out of 10000 (max. 10000000) + 301 PDF objects out of 1000 (max. 8388607) + 266 compressed objects within 3 object streams + 57 named destinations out of 1000 (max. 500000) + 304 words of extra memory for PDF output out of 10000 (max. 10000000) diff --git a/Article_Scientifique/main.pdf b/Article_Scientifique/main.pdf index b27a9dd..280851f 100644 Binary files a/Article_Scientifique/main.pdf and b/Article_Scientifique/main.pdf differ diff --git a/Article_Scientifique/main.tex b/Article_Scientifique/main.tex index 0fe5a0f..9de8141 100644 --- a/Article_Scientifique/main.tex +++ b/Article_Scientifique/main.tex @@ -205,17 +205,157 @@ Third, the security of the wireless communication interface is investigated, wit vulnerabilities. A Flipper Zero device is used as a diagnostic tool to evaluate potential attack surfaces and identify weaknesses in the communication layer. -Finally, a dynamic model of the bicycle–cargo system is developed to improve rider experience. +Finally, a dynamic model of the bicycle-cargo system is developed to improve rider experience. The objective is to minimize the perceived additional effort when towing a cargo cart. This is achieved through a -PID-based (Proportional–Integral–Derivative) control strategy combined with distance sensing, allowing adaptive +PID-based (Proportional-Integral-Derivative) control strategy combined with distance sensing, allowing adaptive assistance based on system dynamics. +% ************************************** LOW TECH SIX STEP CONTROL ***************************************************** \section{Hardware-Based Six-Step Commutation Controller} +% ************************************** FIELD ORIENTED CONTROL ***************************************************** \section{STM32-Based Field-Oriented Control Motor Drive} +\label{sec:foc} +This section presents the design and implementation of a high-performance +motor controller based on Field-Oriented Control (FOC). + +\subsection{Choice of FOC Over Trapezoidal Commutation} + +Table~\ref{tab:foc_vs_trap} summarizes the key differences between the +two commutation strategies, based on the literature reviewed in +Section~\ref{sec:related}. + +\begin{table}[htbp] +\caption{Comparison between FOC and trapezoidal (six-step) commutation} +\label{tab:foc_vs_trap} +\centering +\begin{tabular}{lcc} +\toprule +\textbf{Criterion} & \textbf{FOC} & \textbf{Six-Step} \\ +\midrule +Torque ripple (at 500 rpm) & \SI{18.4}{\percent} & \SI{35.7}{\percent} \\ +Low-load efficiency & High & Moderate \\ +High-speed switching loss & Higher & Lower \\ +Position sensor requirement & Encoder (high resolution) & Hall sensors \\ +Implementation complexity & High & Low \\ +Hardware cost & Higher & Lower \\ +Dynamic response & Fast & Standard \\ +\bottomrule +\end{tabular} +\end{table} + +For our cargo bike application, rider comfort and smooth torque delivery +are priorities. FOC was therefore selected for the high-performance +controller, while a separate low-tech six-step board (Section~\ref{sec:sixstep}) +was developed for repairability. + +\subsection{Base Design: Cheap FOCer-2 Project} + +The starting point was the open-source \textit{Cheap FOCer-2} project, +which provides a complete KiCad design for a VESC-compatible board based +on an STM32F405 microcontroller. This design includes: +\begin{itemize} + \item A three-phase MOSFET full-bridge power stage. + \item Gate drivers with built-in dead-time insertion. + \item Shunt resistors for phase current sensing. + \item USB and CAN interfaces. + \item An expansion header for encoder or Hall sensors. +\end{itemize} + +The existing KiCad schematic and layout were used as the baseline for +our adaptations. + +\subsection{Integration of the Rocacher FOC Tile} + +Mr. Rocacher provided the Kicad schematic of a ready-to-use FOC tile based on an STM32L476 +microcontroller. + +The initial idea was to make this tile \textit{pluggable} into our +carrier board, similar to an Arduino shield. This would allow : +\begin{itemize} + \item Easy replacement of the computing core without re-soldering. + \item Modular upgrades of the microcontroller. + \item Simplified repair and maintenance. +\end{itemize} + +However, the Cheap FOCer-2 project was not designed for such modularity. +Its routing is dense and highly optimized for a single, non-removable +F405 chip. Adapting it to accept an L476 tile while preserving all +critical functions (PWM, current sensing, USB communication) proved +challenging. + +\subsection{Pin Compatibility Verification: L476 vs F405} + +Before modifying the PCB, a thorough pin compatibility check was +performed between the STM32L476 and the STM32F405 +(original Cheap FOCer-2 design). The following aspects were examined: +\begin{itemize} + \item Physical pinout in LQFP64 package. + \item Alternate functions for PWM timers. + \item USB DP/DM pins (PA11/PA12). + \item Analog inputs for current sensing. + \item UART for BLE communication. +\end{itemize} + +Three pin conflicts were identified and resolved as follows. + +First, the SPI\_MISO function on PA6 for the STM32F405 conflicts with a +DAC output on the same pin for the STM32L476 tile. Since this pin is +used for current sensing via SPI in the original Cheap FOCer-2 design, +the SPI communication was remapped to PA5 on the L476, which provides a +compatible alternate function. + +Second, the gate driver enable signal (EN\_GATE) was originally assigned +to PB5 on the F405. This pin is not accessible on the L476 +tile. The signal was therefore moved to PC5, which is available and +can be configured as a standard GPIO output. + +Third, Hall sensor C was originally connected to PC8 (TIM8) on the F405. +This pin is not available on the L476 tile. The Hall sensor input was +therefore reassigned to PB3, configured as TIM2\_CH2, which provides +the necessary input capture functionality for Hall signal decoding. + +All other critical functions (PWM timers, complementary PWM, enable +signals, encoder inputs, UART, USB, and CAN) remain fully compatible +between the two microcontrollers. The ADC channel differences between +the F405 (ADC123/ADC12) and the L476 (ADC3) must still be handled in +firmware, as noted previously. + +\subsection{Schematic Design and KiCad Implementation} + +The original Cheap FOCer-2 schematic was modified in KiCad to replace the +integrated F405 with connectors for the L476 tile. The main modifications +included: +\begin{itemize} + \item Removal of the F405 and its associated passive components. + \item Addition of two 20-pin headers to receive the Rocacher tile. + \item Re-routing of PWM, ADC, and USB signals to the headers. +\end{itemize} + +The schematic passed Electrical Rule Check (ERC) with no errors. + +\subsection{Routing Challenges and Current Status} + +The PCB layout was then started. The original Cheap FOCer-2 routing is +very dense. Inserting connectors for the removable tile while maintaining signal integrity proved +difficult. + +The main issues encountered were: +\begin{itemize} + \item Some footprints for the tile connectors did not appear correctly + in the layout after schematic import. + \item Routing of high-current paths (battery, motor phases) around the + connectors required additional vias, increasing resistance. + \item Decoupling capacitors had to be repositioned, raising concerns + about switching noise. +\end{itemize} + +Currently, the schematic is validated, and the layout is under +development. Once routing is completed, the board will be manufactured +and tested with the VESC firmware adapted to the L476 tile. % ************************************** SOFTWARE AND CONNECTIVITY ***************************************************** @@ -298,7 +438,7 @@ for the the MAD associates. % ************************************ DYNAMIC MODELLING *************************************************************** -\section{Dynamic Modelling and Control of the Bicycle–Cargo System} +\section{Dynamic Modelling and Control of the Bicycle-Cargo System} \subsection{Dynamic System Modelling} @@ -370,7 +510,7 @@ where $e_{\text{ref}} = \SI{-0.5}{\meter}$ represents the desired equilibrium of \centering \includegraphics[width=\linewidth]{./Figures/sys_dyn_matlab.png} - \caption{Closed-loop model of the bicycle–cargo system with PI control.} + \caption{Closed-loop model of the bicycle-cargo system with PI control.} \label{fig:simulink-closedloop} \end{figure} @@ -402,6 +542,33 @@ equilibrium position, demonstrating stable closed-loop behaviour and satisfactor \subsubsection{Experimental Load Characterization} +\subsection{FOC Controller Validation} + +\subsubsection{Current Status Summary} + +Table~\ref{tab:foc_status} summarizes the current status of the FOC +controller development. + +\begin{table}[htbp] +\caption{FOC controller development status} +\label{tab:foc_status} +\centering +\begin{tabular}{l c} +\toprule +\textbf{Task} & \textbf{Status} \\ +\midrule +VESC firmware compilation & Completed \\ +Pin compatibility (F405 / L476) & Completed \\ +Schematic design (KiCad) & Completed \\ +ERC validation & Completed \\ +PCB routing & In progress \\ +Tile footprint correction & In progress \\ +Board manufacturing & Planned \\ +Hardware testing & Planned \\ +\bottomrule +\end{tabular} +\end{table} + % ******************************** DISCUSSION ************************************************************************** @@ -435,6 +602,19 @@ What should be a clear conclusion from our test with the jammer is that a contro avoided when possible and practical. Examples where this could be relevant include electric skateboards, as cables could impose a tripping hazard. There, an encapsulation of an encrypted control frame could be an thought. +% ******************************** Perspectives and Future Work ************************************************************ + +\section{Perspectives and Future Work} + +Based on the results obtained and the limitations identified during this +project, several directions for future work are proposed. + +\subsection{Hardware Completion and Testing} +The VESC-based FOC PCB requires routing completion and prototype +manufacturing. Once fabricated, the board must be tested under real +operating conditions (varying loads, road profiles, and battery voltage). + +% ******************************** CONCLUSION ************************************************************************** \section{Conclusion/Summary} @@ -454,8 +634,29 @@ impose a tripping hazard. There, an encapsulation of an encrypted control frame %quantities and units. For example, write ``Temperature (K)'', not %``Temperature/K''. +% ******************************** REMERCIEMENTS ************************************************************************** + \section*{Acknowledgment} +The authors would like to thank Pascal Acco and Thierry Rocacher for their +continuous technical guidance and support throughout this project. Their +expertise in power electronics, embedded systems, and PCB design was +invaluable. + +We also thank La Manufacture Autonome Décentralisée (LaMAD) for providing +the use case, the technical requirements, and the cargo bike platform used +for validation. + +Finally, we acknowledge the INSA Toulouse GEI department for providing +access to laboratory facilities, measurement equipment, and the necessary +components for prototyping. + +This work was carried out as part of the 4th-year research project (PIR) +at INSA Toulouse. + +% ******************************** IA ************************************************************************** +\section*{Statement on AI Usage} + The authors acknowledge the use of generative AI tools during this project, both for the development work and for writing this paper.