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steb debute 2 + pwm

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This commit is contained in:
Remi Pitault 2023-04-07 13:39:22 +02:00
parent d40bdf526d
commit 2304e386e9
5 changed files with 40 additions and 29 deletions
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34
soft/PjtKEIL_StepDeb_2/Src/Cligno.s
View file

@ -6,25 +6,43 @@
;Section RAM (read only) :
area mesdata,data,readonly
IMPORT GPIOC_Set
IMPORT GPIOC_Clear
;Section RAM (read write):
area maram,data,readwrite
FlagCligno DCW 0
; ===============================================================================================
EXPORT timer_callback
;Section ROM code (read only) :
area moncode,code,readonly
; écrire le code ici
timer_callback proc
push {lr}
mov r0, #12
ldr r2, =FlagCligno
ldr r1, [r2]
cmp r1, #1
bne Reset
mov r1, #0
str r1, [r2]
bl GPIOC_Set
pop {lr}
bx lr
Reset
mov r1, #1
str r1, [r2]
bl GPIOC_Clear
pop {lr}
bx lr
ENDP
END
END

18
soft/PjtKEIL_StepDeb_2/Src/principal.c
View file

@ -42,21 +42,3 @@ while (1)
{
}
}
char FlagCligno;
void timer_callback(void)
{
if (FlagCligno==1)
{
FlagCligno=0;
GPIOC_Set(12);
}
else
{
FlagCligno=1;
GPIOC_Clear(12);
}
}

5
soft/PjtKEIL_StepSon/Src/GestionSon.s
View file

@ -6,6 +6,7 @@
;Section RAM (read only) :
area mesdata,data,readonly
IMPORT PWM_Set_Value_TIM3_Ch3
IMPORT LongueurSon
IMPORT Son
@ -26,6 +27,7 @@ SortieSon DCW 0
; écrire le code ici
CallbackSon proc
push {lr}
ldr r0, =IndexSon ; r0 = &IndexSon
ldrh r1, [r0] ; r1 = IndexSon
@ -46,6 +48,9 @@ NoReset
str r1, [r0] ; IndexSon++;
ldr r0, =SortieSon ; r0 = &SortieSon
strh r2, [r0] ; SortieSon = ce qu'on veut
mov r0, r2
bl PWM_Set_Value_TIM3_Ch3
pop {lr}
bx lr
ENDP

5
soft/PjtKEIL_StepSon/Src/principal.c
View file

@ -12,9 +12,10 @@ int main(void)
// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
CLOCK_Configure();
GPIO_Configure(GPIOB, 0, OUTPUT, ALT_PPULL);
PWM_Init_ff(TIM3, 3, 720);
Timer_1234_Init_ff(TIM4, 6552); // (91*10^-6)*(72*10^6) = 6552
PWM_Init_ff(TIM3, 3, 720); // f_PWM = 72MHz/720 = 100kHz
Timer_1234_Init_ff(TIM4, 6552); // periode_son/f_CPU = (91*10^-6)*(72*10^6) = 6552
Active_IT_Debordement_Timer(TIM4, 2, CallbackSon);
//============================================================================
while (1)

7
soft/PjtKEIL_StepSon/StepSon.uvoptx
View file

@ -215,7 +215,12 @@
<Wi>
<IntNumber>0</IntNumber>
<FirstString>`SortieSon</FirstString>
<SecondString>008000000000000000000000000000905D78864100000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000001000000000000000000F03F0D0000000000000000000000000000000000000094080008</SecondString>
<SecondString>008000000000000000000000000000905D78864100000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004100000001000000000000000000E03F170000000000000000000000000000000000000094080008</SecondString>
</Wi>
<Wi>
<IntNumber>1</IntNumber>
<FirstString>((portb &amp; 0x00000001) &amp; 0x11111111) &gt;&gt; 0</FirstString>
<SecondString>00800000000000000000000000000000E0FFEF400100000000000000000000000000000028706F72746220262030783030303030303031290000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000002000000000000000000E03F1700000000000000000000000000000000000000540A0008</SecondString>
</Wi>
</LogicAnalyzers>
<DebugDescription>