542 lines
25 KiB
Text
542 lines
25 KiB
Text
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ARM Macro Assembler Page 1
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1 00000000 PRESERVE8
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2 00000000 THUMB
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3 00000000
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4 00000000
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5 00000000 ; ====================== zone de réservation de données,
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======================================
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6 00000000 ;Section RAM (read only) :
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7 00000000 area mesdata,data,readonly
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8 00000000 extern LeSignal
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9 00000000
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10 00000000
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11 00000000 ;Section RAM (read write):
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12 00000000 area maram,data,readwrite
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13 00000000
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14 00000000 ; ======================================================
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=========================================
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15 00000000
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16 00000000
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17 00000000
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18 00000000
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19 00000000 ;Section ROM code (read only) :
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20 00000000 area moncode,code,readonly
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21 00000000 ; écrire le code ici
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22 00000000
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23 00000000 export DFT_ModuleAuCarre
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24 00000000
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25 00000000 DFT_ModuleAuCarre
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proc
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26 00000000 E92D 4FF0 push {lr, r4-r11}
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27 00000004 ;r0 := &LeSignal
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28 00000004 ;r1 := k
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29 00000004 ; stock 64
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30 00000004 F04F 0240 mov r2, #64
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31 00000008 ; sert d'index (n)
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32 00000008 F04F 0300 mov r3, #0
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33 0000000C
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34 0000000C ; r6,r9,r10,r11 : stockage temporaire
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35 0000000C
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36 0000000C ; r4 : valeur retournée des Cos
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37 0000000C F04F 0400 mov r4, #0
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38 00000010 ; r5 : valeur retournée des Sin
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39 00000010 F04F 0500 mov r5, #0
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40 00000014
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41 00000014 ; r7 : tableau des Cos
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42 00000014 4F0F ldr r7, =TabCos
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43 00000016 ; r8 : tableau des Sin
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44 00000016 F8DF 8040 ldr r8, =TabSin
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45 0000001A
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46 0000001A
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47 0000001A start
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48 0000001A 4293 cmp r3, r2
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49 0000001C D012 beq Out
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50 0000001E
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51 0000001E ; r9=LeSignal[index]=x(n)
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52 0000001E F930 9013 ldrsh r9, [r0, r3,lsl #1] ; car forma
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t 4.12 ==> 16 bits
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53 00000022
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54 00000022 ; r6 = p = k * n
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55 00000022 FB03 F601 mul r6, r3, r1
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ARM Macro Assembler Page 2
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56 00000026 ; r6 = p % 64
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57 00000026 F006 063F and r6, r6, #63
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58 0000002A
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59 0000002A ;======== partie reelle
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60 0000002A ; r10=TabCos[p]
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61 0000002A F937 A016 ldrsh r10, [r7, r6,lsl#1] ; 1.15 ==>
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toujours 16 bits
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62 0000002E
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63 0000002E ; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4
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64 0000002E FB09 FB0A mul r11, r9, r10
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65 00000032 445C add r4, r11
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66 00000034
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67 00000034 ;==== partie imaginaire
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68 00000034
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69 00000034 ; r10=TabSin[p]
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70 00000034 F938 A016 ldrsh r10, [r8, r6,lsl#1]
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71 00000038
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72 00000038 ; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4
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73 00000038 FB09 FB0A mul r11, r9, r10
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74 0000003C 445D add r5, r11
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75 0000003E
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76 0000003E
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77 0000003E F103 0301 add r3, #1
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78 00000042 E7EA b start
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79 00000044
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80 00000044 Out
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81 00000044
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82 00000044 ; on récupère r0 sur les bits de poids forts
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83 00000044
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84 00000044 FB84 1004 smull r1,r0,r4,r4 ;; r0 = Xreel^2
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85 00000048 FBC5 1005 smlal r1,r0,r5,r5 ;; r0 += Ximag^2
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86 0000004C
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87 0000004C E8BD 0FF0 pop {r4-r11}
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88 00000050 BD00 pop{pc}
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89 00000052
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90 00000052 endp
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91 00000052
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92 00000052
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93 00000052
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94 00000052
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95 00000052
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96 00000052
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97 00000052
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98 00000052
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99 00000052
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100 00000052
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101 00000052
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102 00000052
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103 00000052
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104 00000052
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105 00000052 ;Section ROM code (read only) :
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106 00000052 00 00 00000000
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00000000 AREA Trigo, DATA, READONLY
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107 00000000 ; codage fractionnaire 1.15
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108 00000000
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109 00000000 TabCos
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110 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999
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7
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111 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951
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ARM Macro Assembler Page 3
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8
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112 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807
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7
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113 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569
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4
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114 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238
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9
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115 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819
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3
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116 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314
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8
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117 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730
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1
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118 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070
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9
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119 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344
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0
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120 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555
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7
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121 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714
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1
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122 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826
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9
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123 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902
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8
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124 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951
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0
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125 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980
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2
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126 00000020 00 00 DCW 0 ; 16 0x0000 0.0000
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0
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127 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980
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2
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128 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951
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0
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129 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902
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8
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130 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826
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9
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131 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714
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1
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132 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555
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7
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133 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344
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0
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134 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070
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9
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135 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730
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1
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136 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314
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8
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137 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819
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3
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138 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238
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9
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139 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569
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4
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140 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807
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7
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ARM Macro Assembler Page 4
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141 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951
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8
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142 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000
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0
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143 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951
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8
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144 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807
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7
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145 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569
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4
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146 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238
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9
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147 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819
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3
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148 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314
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8
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149 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730
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1
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150 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070
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9
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151 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344
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0
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152 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555
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7
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153 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714
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1
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154 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826
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9
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155 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902
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8
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156 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951
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0
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157 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980
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2
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158 00000060 00 00 DCW 0 ; 48 0x0000 0.0000
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0
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159 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980
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2
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160 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951
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0
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161 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902
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8
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162 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826
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9
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163 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714
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1
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164 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555
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7
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165 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344
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0
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166 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070
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9
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167 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730
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1
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168 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314
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8
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169 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819
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3
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170 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238
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ARM Macro Assembler Page 5
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9
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171 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569
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4
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172 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807
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7
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173 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951
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8
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174 00000080 TabSin
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175 00000080 00 00 DCW 0 ; 0 0x0000 0.0000
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0
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176 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980
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2
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177 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951
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0
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178 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902
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8
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179 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826
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9
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180 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714
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1
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181 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555
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7
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182 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344
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0
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183 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070
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9
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184 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730
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1
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185 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314
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8
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186 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819
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3
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187 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238
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9
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188 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569
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4
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189 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807
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7
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190 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951
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8
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191 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999
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7
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192 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951
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8
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193 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807
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7
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194 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569
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4
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195 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238
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9
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196 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819
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3
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197 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314
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8
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198 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730
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1
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199 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070
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9
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200 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344
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ARM Macro Assembler Page 6
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0
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201 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555
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7
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202 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714
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1
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203 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826
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9
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204 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902
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8
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205 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951
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0
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206 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980
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2
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207 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000
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0
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208 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980
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2
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209 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951
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0
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210 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902
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8
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211 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826
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9
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212 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714
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1
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213 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555
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7
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214 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344
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0
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215 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070
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9
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216 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730
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1
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217 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314
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8
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218 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819
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3
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219 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238
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9
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220 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569
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4
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221 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807
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7
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222 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951
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8
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223 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000
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0
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224 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951
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8
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225 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807
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7
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226 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569
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4
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227 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238
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9
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228 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819
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3
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229 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314
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8
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ARM Macro Assembler Page 7
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230 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730
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1
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231 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070
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9
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232 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344
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0
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233 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555
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7
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234 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714
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1
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235 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826
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9
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236 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902
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8
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237 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951
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0
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238 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980
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2
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239 00000100
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240 00000100
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241 00000100
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242 00000100
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243 00000100 END
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Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
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ork --depend=.\obj\dft.d -o.\obj\dft.o -I.\RTE\_CibleSondeKEIL -IC:\Programdata
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\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Pa
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cks\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL SETA 1" --prede
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fine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 534" --predefine="
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_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --predefine="_RTE_ SETA 1" --li
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st=dft.lst Src\DFT.s
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ARM Macro Assembler Page 1 Alphabetic symbol ordering
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Relocatable symbols
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mesdata 00000000
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Symbol: mesdata
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Definitions
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At line 7 in file Src\DFT.s
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Uses
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None
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Comment: mesdata unused
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1 symbol
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ARM Macro Assembler Page 1 Alphabetic symbol ordering
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Relocatable symbols
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maram 00000000
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Symbol: maram
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Definitions
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At line 12 in file Src\DFT.s
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Uses
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None
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Comment: maram unused
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1 symbol
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ARM Macro Assembler Page 1 Alphabetic symbol ordering
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Relocatable symbols
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DFT_ModuleAuCarre 00000000
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Symbol: DFT_ModuleAuCarre
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Definitions
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At line 25 in file Src\DFT.s
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Uses
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At line 23 in file Src\DFT.s
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Comment: DFT_ModuleAuCarre used once
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|
Out 00000044
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|
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Symbol: Out
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|
Definitions
|
|
At line 80 in file Src\DFT.s
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|
Uses
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|
At line 49 in file Src\DFT.s
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|
Comment: Out used once
|
|
moncode 00000000
|
|
|
|
Symbol: moncode
|
|
Definitions
|
|
At line 20 in file Src\DFT.s
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|
Uses
|
|
None
|
|
Comment: moncode unused
|
|
start 0000001A
|
|
|
|
Symbol: start
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|
Definitions
|
|
At line 47 in file Src\DFT.s
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|
Uses
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|
At line 78 in file Src\DFT.s
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|
Comment: start used once
|
|
4 symbols
|
|
|
|
|
|
|
|
ARM Macro Assembler Page 1 Alphabetic symbol ordering
|
|
Relocatable symbols
|
|
|
|
TabCos 00000000
|
|
|
|
Symbol: TabCos
|
|
Definitions
|
|
At line 109 in file Src\DFT.s
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|
Uses
|
|
At line 42 in file Src\DFT.s
|
|
Comment: TabCos used once
|
|
TabSin 00000080
|
|
|
|
Symbol: TabSin
|
|
Definitions
|
|
At line 174 in file Src\DFT.s
|
|
Uses
|
|
At line 44 in file Src\DFT.s
|
|
Comment: TabSin used once
|
|
Trigo 00000000
|
|
|
|
Symbol: Trigo
|
|
Definitions
|
|
At line 106 in file Src\DFT.s
|
|
Uses
|
|
None
|
|
Comment: Trigo unused
|
|
3 symbols
|
|
|
|
|
|
|
|
ARM Macro Assembler Page 1 Alphabetic symbol ordering
|
|
External symbols
|
|
|
|
LeSignal 00000000
|
|
|
|
Symbol: LeSignal
|
|
Definitions
|
|
At line 8 in file Src\DFT.s
|
|
Uses
|
|
None
|
|
Comment: LeSignal unused
|
|
1 symbol
|
|
347 symbols in table
|