ARM Macro Assembler Page 1 1 00000000 PRESERVE8 2 00000000 THUMB 3 00000000 4 00000000 5 00000000 ; ====================== zone de réservation de données, ====================================== 6 00000000 ;Section RAM (read only) : 7 00000000 area mesdata,data,readonly 8 00000000 extern LeSignal 9 00000000 10 00000000 11 00000000 ;Section RAM (read write): 12 00000000 area maram,data,readwrite 13 00000000 14 00000000 ; ====================================================== ========================================= 15 00000000 16 00000000 17 00000000 18 00000000 19 00000000 ;Section ROM code (read only) : 20 00000000 area moncode,code,readonly 21 00000000 ; écrire le code ici 22 00000000 23 00000000 export DFT_ModuleAuCarre 24 00000000 25 00000000 DFT_ModuleAuCarre proc 26 00000000 E92D 4FF0 push {lr, r4-r11} 27 00000004 ;r0 := &LeSignal 28 00000004 ;r1 := k 29 00000004 ; stock 64 30 00000004 F04F 0240 mov r2, #64 31 00000008 ; sert d'index (n) 32 00000008 F04F 0300 mov r3, #0 33 0000000C 34 0000000C ; r6,r9,r10,r11 : stockage temporaire 35 0000000C 36 0000000C ; r4 : valeur retournée des Cos 37 0000000C F04F 0400 mov r4, #0 38 00000010 ; r5 : valeur retournée des Sin 39 00000010 F04F 0500 mov r5, #0 40 00000014 41 00000014 ; r7 : tableau des Cos 42 00000014 4F12 ldr r7, =TabCos 43 00000016 ; r8 : tableau des Sin 44 00000016 F8DF 804C ldr r8, =TabSin 45 0000001A 46 0000001A 47 0000001A start 48 0000001A 4293 cmp r3, r2 49 0000001C D012 beq Out 50 0000001E 51 0000001E ; r9=LeSignal[index]=x(n) 52 0000001E F930 9003 ldrsh r9, [r0, r3] 53 00000022 54 00000022 ; r6 = p = k * n 55 00000022 FB03 F601 mul r6, r3, r1 56 00000026 ; r6 = p % 64 ARM Macro Assembler Page 2 57 00000026 F006 063F and r6, r6, #63 58 0000002A 59 0000002A ;======== partie reelle 60 0000002A ; r10=TabCos[p] 61 0000002A F937 A006 ldrsh r10, [r7, r6] 62 0000002E 63 0000002E ; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4 64 0000002E FB09 FB0A mul r11, r9, r10 65 00000032 445C add r4, r11 66 00000034 67 00000034 ;==== partie imaginaire 68 00000034 69 00000034 ; r10=TabSin[p] 70 00000034 F938 A006 ldrsh r10, [r8, r6] 71 00000038 72 00000038 ; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4 73 00000038 FB09 FB0A mul r11, r9, r10 74 0000003C 445D add r5, r11 75 0000003E 76 0000003E 77 0000003E F103 0301 add r3, #1 78 00000042 E7EA b start 79 00000044 80 00000044 Out 81 00000044 82 00000044 ;pour que ca marche avec les types de format 83 00000044 EA4F 4424 asr r4, #16 84 00000048 EA4F 4525 asr r5, #16 85 0000004C 86 0000004C 87 0000004C FB04 F404 mul r4, r4 88 00000050 FB05 F505 mul r5, r5 89 00000054 EB04 0005 add r0, r4, r5 90 00000058 E8BD 0FF0 pop {r4-r11} 91 0000005C BD00 pop{pc} 92 0000005E 93 0000005E endp 94 0000005E 95 0000005E 96 0000005E 97 0000005E 98 0000005E 99 0000005E 100 0000005E 101 0000005E 102 0000005E 103 0000005E 104 0000005E 105 0000005E 106 0000005E 107 0000005E 108 0000005E ;Section ROM code (read only) : 109 0000005E 00 00 00000000 00000000 AREA Trigo, DATA, READONLY 110 00000000 ; codage fractionnaire 1.15 111 00000000 112 00000000 TabCos 113 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999 7 ARM Macro Assembler Page 3 114 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951 8 115 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807 7 116 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569 4 117 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238 9 118 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819 3 119 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314 8 120 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730 1 121 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070 9 122 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344 0 123 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555 7 124 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714 1 125 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826 9 126 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902 8 127 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951 0 128 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980 2 129 00000020 00 00 DCW 0 ; 16 0x0000 0.0000 0 130 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980 2 131 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951 0 132 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902 8 133 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826 9 134 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714 1 135 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555 7 136 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344 0 137 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070 9 138 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730 1 139 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314 8 140 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819 3 141 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238 9 142 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569 4 143 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807 ARM Macro Assembler Page 4 7 144 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951 8 145 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000 0 146 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951 8 147 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807 7 148 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569 4 149 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238 9 150 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819 3 151 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314 8 152 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730 1 153 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070 9 154 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344 0 155 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555 7 156 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714 1 157 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826 9 158 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902 8 159 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951 0 160 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980 2 161 00000060 00 00 DCW 0 ; 48 0x0000 0.0000 0 162 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980 2 163 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951 0 164 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902 8 165 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826 9 166 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714 1 167 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555 7 168 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344 0 169 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070 9 170 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730 1 171 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314 8 172 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819 3 ARM Macro Assembler Page 5 173 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238 9 174 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569 4 175 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807 7 176 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951 8 177 00000080 TabSin 178 00000080 00 00 DCW 0 ; 0 0x0000 0.0000 0 179 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980 2 180 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951 0 181 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902 8 182 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826 9 183 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714 1 184 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555 7 185 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344 0 186 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070 9 187 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730 1 188 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314 8 189 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819 3 190 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238 9 191 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569 4 192 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807 7 193 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951 8 194 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999 7 195 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951 8 196 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807 7 197 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569 4 198 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238 9 199 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819 3 200 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314 8 201 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730 1 202 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070 9 ARM Macro Assembler Page 6 203 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344 0 204 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555 7 205 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714 1 206 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826 9 207 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902 8 208 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951 0 209 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980 2 210 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000 0 211 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980 2 212 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951 0 213 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902 8 214 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826 9 215 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714 1 216 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555 7 217 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344 0 218 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070 9 219 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730 1 220 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314 8 221 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819 3 222 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238 9 223 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569 4 224 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807 7 225 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951 8 226 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000 0 227 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951 8 228 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807 7 229 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569 4 230 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238 9 231 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819 3 232 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314 ARM Macro Assembler Page 7 8 233 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730 1 234 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070 9 235 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344 0 236 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555 7 237 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714 1 238 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826 9 239 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902 8 240 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951 0 241 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980 2 242 00000100 243 00000100 244 00000100 245 00000100 246 00000100 END Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw ork --depend=.\obj\dft.d -o.\obj\dft.o -I.\Src -I.\RTE\_Simu -IC:\Programdata\K eil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Pack s\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL SETA 1" --predefi ne="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 534" --predefine="_R TE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --predefine="_RTE_ SETA 1" --list =dft.lst Src\DFT.s ARM Macro Assembler Page 1 Alphabetic symbol ordering Relocatable symbols mesdata 00000000 Symbol: mesdata Definitions At line 7 in file Src\DFT.s Uses None Comment: mesdata unused 1 symbol ARM Macro Assembler Page 1 Alphabetic symbol ordering Relocatable symbols maram 00000000 Symbol: maram Definitions At line 12 in file Src\DFT.s Uses None Comment: maram unused 1 symbol ARM Macro Assembler Page 1 Alphabetic symbol ordering Relocatable symbols DFT_ModuleAuCarre 00000000 Symbol: DFT_ModuleAuCarre Definitions At line 25 in file Src\DFT.s Uses At line 23 in file Src\DFT.s Comment: DFT_ModuleAuCarre used once Out 00000044 Symbol: Out Definitions At line 80 in file Src\DFT.s Uses At line 49 in file Src\DFT.s Comment: Out used once moncode 00000000 Symbol: moncode Definitions At line 20 in file Src\DFT.s Uses None Comment: moncode unused start 0000001A Symbol: start Definitions At line 47 in file Src\DFT.s Uses At line 78 in file Src\DFT.s Comment: start used once 4 symbols ARM Macro Assembler Page 1 Alphabetic symbol ordering Relocatable symbols TabCos 00000000 Symbol: TabCos Definitions At line 112 in file Src\DFT.s Uses At line 42 in file Src\DFT.s Comment: TabCos used once TabSin 00000080 Symbol: TabSin Definitions At line 177 in file Src\DFT.s Uses At line 44 in file Src\DFT.s Comment: TabSin used once Trigo 00000000 Symbol: Trigo Definitions At line 109 in file Src\DFT.s Uses None Comment: Trigo unused 3 symbols ARM Macro Assembler Page 1 Alphabetic symbol ordering External symbols LeSignal 00000000 Symbol: LeSignal Definitions At line 8 in file Src\DFT.s Uses None Comment: LeSignal unused 1 symbol 347 symbols in table