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added finished dft

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Lacroix Raphael 2022-04-22 09:29:28 +02:00
parent 4af860c2f8
commit 2cf54eb910
16 changed files with 7641 additions and 323 deletions
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3646
Partie son/PjtKEIL_StepSon/PjtKEIL_StepSon/StepSon.uvguix.rlacroix Normal file
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PjtKEIL_StepDFT/Obj/StepDFT.axf
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PjtKEIL_StepDFT/Obj/StepDFT.build_log.htm
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@ -21,22 +21,22 @@ Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.8.0
Dialog DLL: TCM.DLL V1.48.0.0
<h2>Project:</h2>
U:\Documents\3MIC\S2\BE_CHTI\Assembleur\Raphael_lacroix-Aurelia_lejeune-BE_CHTI\PjtKEIL_StepDFT\StepDFT.uvprojx
Project File Date: 04/06/2022
U:\Documents\3MIC\BE CHTI\ASM\Raphael_lacroix-Aurelia_lejeune-BE_CHTI\PjtKEIL_StepDFT\StepDFT.uvprojx
Project File Date: 04/21/2022
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Rebuild target 'Simu'
assembling startup-rvds.s...
assembling Signal.asm...
assembling startup-rvds.s...
assembling DFT.s...
Src\DFT.s(109): warning: A1581W: Added 2 bytes of padding at address 0x5e
Src\DFT.s(112): warning: A1581W: Added 2 bytes of padding at address 0x5a
compiling principal.c...
Src\principal.c(19): warning: #550-D: variable "tab" was set but never used
int tab[64];
Src\principal.c: 1 warning, 0 errors
linking...
Program Size: Code=552 RO-data=652 RW-data=4 ZI-data=1028
Program Size: Code=556 RO-data=652 RW-data=4 ZI-data=1028
FromELF: creating hex file...
".\Obj\StepDFT.axf" - 0 Error(s), 2 Warning(s).

74
PjtKEIL_StepDFT/Obj/StepDFT.hex
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@ -21,8 +21,8 @@
:10013000FEE7FEE7FEE7FEE7FEE7FEE72701000831
:1001400024ED00E00CED00E00003FA05ED000008EE
:10015000064C074D06E0E06840F0010394E8070014
:1001600098471034AC42F6D3FFF7C4FF14030008DD
:100170003403000870B5194C8320206000256560A9
:1001600098471034AC42F6D3FFF7C4FF18030008D9
:100170003803000870B5194C8320206000256560A5
:10018000A56017486060012000F02EF86168084300
:10019000606014490D60086840F002000860206843
:1001A00040F48030206020688003FCD5206840F057
@ -39,41 +39,41 @@
:10025000C01D0001702800D10020704702E008C8CE
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:04000005080000ED02
:00000001FF

6
PjtKEIL_StepDFT/Obj/StepDFT.htm
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@ -3,7 +3,7 @@
<title>Static Call Graph - [.\Obj\StepDFT.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\Obj\StepDFT.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Tue Apr 12 18:19:58 2022
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Thu Apr 21 22:27:04 2022
<BR><P>
<H3>Maximum Stack Usage = 272 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
@ -336,7 +336,7 @@ Global Symbols
<P><STRONG><a name="[48]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
<P><STRONG><a name="[35]"></a>main</STRONG> (Thumb, 40 bytes, Stack size 256 bytes, principal.o(i.main))
<P><STRONG><a name="[35]"></a>main</STRONG> (Thumb, 46 bytes, Stack size 256 bytes, principal.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 272<LI>Call Chain = main &rArr; CLOCK_Configure
</UL>
<BR>[Calls]<UL><LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DFT_ModuleAuCarre
@ -344,7 +344,7 @@ Global Symbols
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[3d]"></a>DFT_ModuleAuCarre</STRONG> (Thumb, 94 bytes, Stack size 0 bytes, dft.o(moncode))
<P><STRONG><a name="[3d]"></a>DFT_ModuleAuCarre</STRONG> (Thumb, 90 bytes, Stack size 0 bytes, dft.o(moncode))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P>

58
PjtKEIL_StepDFT/Obj/StepDFT.map
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@ -106,11 +106,11 @@ Image Symbol Table
i.__scatterload_null 0x0800026a Section 2 handlers.o(i.__scatterload_null)
i.__scatterload_zeroinit 0x0800026c Section 14 handlers.o(i.__scatterload_zeroinit)
i.main 0x0800027c Section 0 principal.o(i.main)
moncode 0x080002ac Section 104 dft.o(moncode)
Signal 0x08000334 Section 128 signal.o(Signal)
Trigo 0x080003b4 Section 256 dft.o(Trigo)
TabCos 0x080003b4 Data 0 dft.o(Trigo)
TabSin 0x08000434 Data 0 dft.o(Trigo)
moncode 0x080002b4 Section 100 dft.o(moncode)
Signal 0x08000338 Section 128 signal.o(Signal)
Trigo 0x080003b8 Section 256 dft.o(Trigo)
TabCos 0x080003b8 Data 0 dft.o(Trigo)
TabSin 0x08000438 Data 0 dft.o(Trigo)
.data 0x20000000 Section 4 principal.o(.data)
STACK 0x20000008 Section 1024 startup-rvds.o(STACK)
@ -199,11 +199,11 @@ Image Symbol Table
__scatterload_copy 0x0800025d Thumb Code 14 handlers.o(i.__scatterload_copy)
__scatterload_null 0x0800026b Thumb Code 2 handlers.o(i.__scatterload_null)
__scatterload_zeroinit 0x0800026d Thumb Code 14 handlers.o(i.__scatterload_zeroinit)
main 0x0800027d Thumb Code 40 principal.o(i.main)
DFT_ModuleAuCarre 0x080002ad Thumb Code 94 dft.o(moncode)
Region$$Table$$Base 0x08000314 Number 0 anon$$obj.o(Region$$Table)
LeSignal 0x08000334 Data 0 signal.o(Signal)
Region$$Table$$Limit 0x08000334 Number 0 anon$$obj.o(Region$$Table)
main 0x0800027d Thumb Code 46 principal.o(i.main)
DFT_ModuleAuCarre 0x080002b5 Thumb Code 90 dft.o(moncode)
Region$$Table$$Base 0x08000318 Number 0 anon$$obj.o(Region$$Table)
LeSignal 0x08000338 Data 0 signal.o(Signal)
Region$$Table$$Limit 0x08000338 Number 0 anon$$obj.o(Region$$Table)
a 0x20000000 Data 4 principal.o(.data)
__initial_sp 0x20000408 Data 0 startup-rvds.o(STACK)
@ -215,9 +215,9 @@ Memory Map of the image
Image Entry point : 0x080000ed
Load Region LR_IROM1 (Base: 0x08000000, Size: 0x000004b8, Max: 0x00020000, ABSOLUTE)
Load Region LR_IROM1 (Base: 0x08000000, Size: 0x000004bc, Max: 0x00020000, ABSOLUTE)
Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x000004b4, Max: 0x00020000, ABSOLUTE)
Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x000004b8, Max: 0x00020000, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
@ -240,19 +240,19 @@ Memory Map of the image
0x0800026a 0x0800026a 0x00000002 Code RO 120 i.__scatterload_null mc_w.l(handlers.o)
0x0800026c 0x0800026c 0x0000000e Code RO 121 i.__scatterload_zeroinit mc_w.l(handlers.o)
0x0800027a 0x0800027a 0x00000002 PAD
0x0800027c 0x0800027c 0x00000030 Code RO 4 i.main principal.o
0x080002ac 0x080002ac 0x00000068 Code RO 71 moncode dft.o
0x08000314 0x08000314 0x00000020 Data RO 117 Region$$Table anon$$obj.o
0x08000334 0x08000334 0x00000080 Data RO 68 Signal signal.o
0x080003b4 0x080003b4 0x00000100 Data RO 72 Trigo dft.o
0x0800027c 0x0800027c 0x00000038 Code RO 4 i.main principal.o
0x080002b4 0x080002b4 0x00000064 Code RO 71 moncode dft.o
0x08000318 0x08000318 0x00000020 Data RO 117 Region$$Table anon$$obj.o
0x08000338 0x08000338 0x00000080 Data RO 68 Signal signal.o
0x080003b8 0x080003b8 0x00000100 Data RO 72 Trigo dft.o
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x080004b4, Size: 0x00000408, Max: 0x00005000, ABSOLUTE)
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x080004b8, Size: 0x00000408, Max: 0x00005000, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x20000000 0x080004b4 0x00000004 Data RW 5 .data principal.o
0x20000004 0x080004b8 0x00000004 PAD
0x20000000 0x080004b8 0x00000004 Data RW 5 .data principal.o
0x20000004 0x080004bc 0x00000004 PAD
0x20000008 - 0x00000400 Zero RW 61 STACK startup-rvds.o
@ -263,13 +263,13 @@ Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
104 10 256 0 0 384 dft.o
48 8 0 4 0 2291 principal.o
100 10 256 0 0 380 dft.o
56 10 0 4 0 2279 principal.o
0 0 128 0 0 0 signal.o
76 20 236 0 1024 852 startup-rvds.o
76 20 236 0 1024 840 startup-rvds.o
----------------------------------------------------------------------
228 38 652 4 1028 3527 Object Totals
232 40 652 4 1028 3499 Object Totals
0 0 32 0 0 0 (incl. Generated)
0 0 0 0 4 0 (incl. Padding)
@ -311,15 +311,15 @@ Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug
552 66 652 4 1028 3739 Grand Totals
552 66 652 4 1028 3739 ELF Image Totals
552 66 652 4 0 0 ROM Totals
556 68 652 4 1028 3711 Grand Totals
556 68 652 4 1028 3711 ELF Image Totals
556 68 652 4 0 0 ROM Totals
==============================================================================
Total RO Size (Code + RO Data) 1204 ( 1.18kB)
Total RO Size (Code + RO Data) 1208 ( 1.18kB)
Total RW Size (RW Data + ZI Data) 1032 ( 1.01kB)
Total ROM Size (Code + RO Data + RW Data) 1208 ( 1.18kB)
Total ROM Size (Code + RO Data + RW Data) 1212 ( 1.18kB)
==============================================================================

14
PjtKEIL_StepDFT/Obj/StepDFT_Simu.dep
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@ -1,16 +1,16 @@
Dependencies for Project 'StepDFT', Target 'Simu': (DO NOT MODIFY !)
CompilerVersion: 5060960::V5.06 update 7 (build 960)::.\ARMCC
F (.\Src\principal.c)(0x62559D12)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Src -I .\Driver --C99 -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="534" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -DSTM32F103xB -DUSE_FULL_LL_DRIVER -o .\obj\principal.o --omf_browse .\obj\principal.crf --depend .\obj\principal.d)
I (.\Driver\DriverJeuLaser.h)(0x6037C015)
F (.\Src\principal.c)(0x6261BC3D)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Src -I .\Driver --C99 -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="534" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -DSTM32F103xB -DUSE_FULL_LL_DRIVER -o .\obj\principal.o --omf_browse .\obj\principal.crf --depend .\obj\principal.d)
I (.\Driver\DriverJeuLaser.h)(0x6255E3A5)
I (C:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\stm32f10x.h)(0x58258CCC)
I (.\RTE\_Simu\RTE_Components.h)(0x62446F31)
I (.\RTE\_Simu\RTE_Components.h)(0x6255E3A5)
I (C:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F2582)
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5E8E9122)
I (C:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F2582)
I (C:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E835B22)
I (C:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F2582)
I (C:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\system_stm32f10x.h)(0x58258CCC)
F (.\Src\startup-rvds.s)(0x5FE38AC6)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I .\Src -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 534" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list startup-rvds.lst --xref -o .\obj\startup-rvds.o --depend .\obj\startup-rvds.d)
F (.\Driver\DriverJeuLaser.lib)(0x6037BEDF)()
F (.\Src\Signal.asm)(0x604676F8)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I .\Src -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 534" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list signal.lst --xref -o .\obj\signal.o --depend .\obj\signal.d)
F (.\Src\DFT.s)(0x6255A6AC)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I .\Src -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 534" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list dft.lst --xref -o .\obj\dft.o --depend .\obj\dft.d)
F (.\Src\startup-rvds.s)(0x6255E3A5)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I .\Src -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 534" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list startup-rvds.lst --xref -o .\obj\startup-rvds.o --depend .\obj\startup-rvds.d)
F (.\Driver\DriverJeuLaser.lib)(0x6255E3A5)()
F (.\Src\Signal.asm)(0x6255E3A5)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I .\Src -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 534" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list signal.lst --xref -o .\obj\signal.o --depend .\obj\signal.d)
F (.\Src\DFT.s)(0x6261BE15)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I .\Src -I.\RTE\_Simu -IC:\Programdata\Keil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 534" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list dft.lst --xref -o .\obj\dft.o --depend .\obj\dft.d)

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PjtKEIL_StepDFT/Obj/dft.o
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PjtKEIL_StepDFT/Obj/principal.crf
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PjtKEIL_StepDFT/Obj/principal.o
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PjtKEIL_StepDFT/Obj/startup-rvds.o
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21
PjtKEIL_StepDFT/Src/DFT.s
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@ -49,7 +49,7 @@ start
beq Out
; r9=LeSignal[index]=x(n)
ldrsh r9, [r0, r3]
ldrsh r9, [r0, r3,lsl #1] ; car format 4.12 ==> 16 bits
; r6 = p = k * n
mul r6, r3, r1
@ -58,7 +58,7 @@ start
;======== partie reelle
; r10=TabCos[p]
ldrsh r10, [r7, r6]
ldrsh r10, [r7, r6,lsl#1] ; 1.15 ==> toujours 16 bits
; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4
mul r11, r9, r10
@ -67,7 +67,7 @@ start
;==== partie imaginaire
; r10=TabSin[p]
ldrsh r10, [r8, r6]
ldrsh r10, [r8, r6,lsl#1]
; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4
mul r11, r9, r10
@ -79,14 +79,17 @@ start
Out
;pour que ca marche avec les types de format
asr r4, #16
asr r5, #16
;pour que ca marche avec les types de format on utilise un smlal il faut donc initialiser les registres r0 et r1 à 0
mov r0, #0
mov r1, #0
; on récupère r0 sur les bits de poids faibles
smlal r1,r0,r4,r4 ;; r0 += Xreel^2
smlal r1,r0,r5,r5 ;; r0 += Ximag^2
mul r4, r4
mul r5, r5
add r0, r4, r5
pop {r4-r11}
pop{pc}

1
PjtKEIL_StepDFT/Src/principal.c
View file

@ -23,6 +23,7 @@ CLOCK_Configure();
a = DFT_ModuleAuCarre(&LeSignal[0], k);
tab[k] = a;
}
a=0;
//============================================================================

3646
PjtKEIL_StepDFT/StepDFT.uvguix.rlacroix Normal file
View file

File diff suppressed because one or more lines are too long

17
PjtKEIL_StepDFT/StepDFT.uvoptx
View file

@ -175,6 +175,11 @@
<WinNumber>1</WinNumber>
<ItemText>r0</ItemText>
</Ww>
<Ww>
<count>4</count>
<WinNumber>1</WinNumber>
<ItemText>a</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
@ -230,7 +235,17 @@
<Wi>
<IntNumber>0</IntNumber>
<FirstString>`a</FirstString>
<SecondString>FF0000000000C033D43ADFC10000C0BFF313DF410000000000000000000000000000000061000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F0D000000000000000000000000000000000000007C020008</SecondString>
<SecondString>FF0000000000C033D43ADFC10000C0BFF313DF410000000000000000000000000000000061000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000565555555555D53F0E000000000000000000000000000000000000007C020008</SecondString>
</Wi>
<Wi>
<IntNumber>1</IntNumber>
<FirstString>`a</FirstString>
<SecondString>00800000000000000000E0C10000C0FFFFFFDF410000000000000000000000000000000061000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000002000000565555555555D53F0E000000000000000000000000000000000000007C020008</SecondString>
</Wi>
<Wi>
<IntNumber>2</IntNumber>
<FirstString>`a</FirstString>
<SecondString>00008000000000000000E0C10000C0FFFFFFDF410000000000000000000000000000000061000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000003000000555555555555D53F0E000000000000000000000000000000000000007C020008</SecondString>
</Wi>
</LogicAnalyzers>
<DebugDescription>

471
PjtKEIL_StepDFT/dft.lst
View file

@ -48,9 +48,9 @@ ARM Macro Assembler Page 1
39 00000010 F04F 0500 mov r5, #0
40 00000014
41 00000014 ; r7 : tableau des Cos
42 00000014 4F12 ldr r7, =TabCos
42 00000014 4F11 ldr r7, =TabCos
43 00000016 ; r8 : tableau des Sin
44 00000016 F8DF 804C ldr r8, =TabSin
44 00000016 F8DF 8048 ldr r8, =TabSin
45 0000001A
46 0000001A
47 0000001A start
@ -58,22 +58,24 @@ ARM Macro Assembler Page 1
49 0000001C D012 beq Out
50 0000001E
51 0000001E ; r9=LeSignal[index]=x(n)
52 0000001E F930 9003 ldrsh r9, [r0, r3]
52 0000001E F930 9013 ldrsh r9, [r0, r3,lsl #1] ; car forma
t 4.12 ==> 16 bits
53 00000022
54 00000022 ; r6 = p = k * n
55 00000022 FB03 F601 mul r6, r3, r1
56 00000026 ; r6 = p % 64
ARM Macro Assembler Page 2
56 00000026 ; r6 = p % 64
57 00000026 F006 063F and r6, r6, #63
58 0000002A
59 0000002A ;======== partie reelle
60 0000002A ; r10=TabCos[p]
61 0000002A F937 A006 ldrsh r10, [r7, r6]
61 0000002A F937 A016 ldrsh r10, [r7, r6,lsl#1] ; 1.15 ==>
toujours 16 bits
62 0000002E
63 0000002E ; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4
64 0000002E FB09 FB0A mul r11, r9, r10
@ -82,7 +84,7 @@ ARM Macro Assembler Page 2
67 00000034 ;==== partie imaginaire
68 00000034
69 00000034 ; r10=TabSin[p]
70 00000034 F938 A006 ldrsh r10, [r8, r6]
70 00000034 F938 A016 ldrsh r10, [r8, r6,lsl#1]
71 00000038
72 00000038 ; r11=X(n)* cos(2pi*p/M) puis on accumule dans r4
73 00000038 FB09 FB0A mul r11, r9, r10
@ -94,330 +96,335 @@ ARM Macro Assembler Page 2
79 00000044
80 00000044 Out
81 00000044
82 00000044 ;pour que ca marche avec les types de format
83 00000044 EA4F 4424 asr r4, #16
84 00000048 EA4F 4525 asr r5, #16
85 0000004C
86 0000004C
87 0000004C FB04 F404 mul r4, r4
88 00000050 FB05 F505 mul r5, r5
89 00000054 EB04 0005 add r0, r4, r5
90 00000058 E8BD 0FF0 pop {r4-r11}
91 0000005C BD00 pop{pc}
92 0000005E
93 0000005E endp
94 0000005E
95 0000005E
96 0000005E
97 0000005E
98 0000005E
99 0000005E
100 0000005E
101 0000005E
102 0000005E
103 0000005E
104 0000005E
105 0000005E
106 0000005E
107 0000005E
108 0000005E ;Section ROM code (read only) :
109 0000005E 00 00 00000000
00000000 AREA Trigo, DATA, READONLY
110 00000000 ; codage fractionnaire 1.15
111 00000000
112 00000000 TabCos
113 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999
7
82 00000044
83 00000044 ;pour que ca marche avec les types de format on utilise
un smlal il faut donc initialiser les registres r0 et r1
à 0
84 00000044
85 00000044 F04F 0000 mov r0, #0
86 00000048 F04F 0100 mov r1, #0
87 0000004C
88 0000004C ; on récupère r0 sur les bits de poids faibles
89 0000004C
90 0000004C FBC4 1004 smlal r1,r0,r4,r4 ;; r0 += Xreel^2
91 00000050 FBC5 1005 smlal r1,r0,r5,r5 ;; r0 += Ximag^2
92 00000054
93 00000054 E8BD 0FF0 pop {r4-r11}
94 00000058 BD00 pop{pc}
95 0000005A
96 0000005A endp
97 0000005A
98 0000005A
99 0000005A
100 0000005A
101 0000005A
102 0000005A
103 0000005A
104 0000005A
105 0000005A
106 0000005A
107 0000005A
108 0000005A
109 0000005A
110 0000005A
111 0000005A ;Section ROM code (read only) :
ARM Macro Assembler Page 3
114 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951
8
115 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807
112 0000005A 00 00 00000000
00000000 AREA Trigo, DATA, READONLY
113 00000000 ; codage fractionnaire 1.15
114 00000000
115 00000000 TabCos
116 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999
7
116 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569
117 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951
8
118 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807
7
119 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569
4
117 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238
120 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238
9
118 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819
121 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819
3
119 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314
122 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314
8
120 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730
123 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730
1
121 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070
124 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
122 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344
125 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344
0
123 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555
126 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555
7
124 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714
127 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714
1
125 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826
128 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826
9
126 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902
129 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902
8
127 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951
130 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951
0
128 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980
131 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980
2
129 00000020 00 00 DCW 0 ; 16 0x0000 0.0000
132 00000020 00 00 DCW 0 ; 16 0x0000 0.0000
0
130 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980
133 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980
2
131 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951
134 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951
0
132 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902
135 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902
8
133 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826
136 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826
9
134 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714
137 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714
1
135 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555
138 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555
7
136 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344
139 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344
0
137 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070
140 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070
9
138 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730
141 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730
1
139 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314
142 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314
8
140 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819
3
141 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238
9
142 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569
4
143 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807
ARM Macro Assembler Page 4
7
144 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951
8
145 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000
0
146 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951
8
147 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807
7
148 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569
143 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819
3
144 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238
9
145 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569
4
149 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238
9
150 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819
3
151 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314
8
152 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730
1
153 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
154 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344
0
155 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555
146 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807
7
156 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714
1
157 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826
9
158 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902
147 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951
8
159 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951
148 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000
0
160 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980
2
161 00000060 00 00 DCW 0 ; 48 0x0000 0.0000
0
162 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980
2
163 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951
0
164 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902
149 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951
8
165 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826
9
166 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714
1
167 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555
150 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807
7
168 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344
0
169 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070
151 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569
4
152 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238
9
170 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730
1
171 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314
8
172 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819
153 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819
3
154 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314
8
155 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730
1
156 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
157 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344
0
158 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555
7
159 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714
1
160 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826
9
161 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902
8
162 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951
0
163 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980
2
164 00000060 00 00 DCW 0 ; 48 0x0000 0.0000
0
165 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980
2
166 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951
0
167 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902
8
168 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826
9
169 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714
1
170 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555
7
171 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344
0
172 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070
ARM Macro Assembler Page 5
173 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238
9
174 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569
4
175 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807
7
176 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951
173 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730
1
174 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314
8
177 00000080 TabSin
178 00000080 00 00 DCW 0 ; 0 0x0000 0.0000
175 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819
3
176 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238
9
177 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569
4
178 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807
7
179 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951
8
180 00000080 TabSin
181 00000080 00 00 DCW 0 ; 0 0x0000 0.0000
0
179 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980
182 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980
2
180 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951
183 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951
0
181 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902
184 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902
8
182 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826
185 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826
9
183 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714
186 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714
1
184 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555
187 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555
7
185 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344
188 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344
0
186 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070
189 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
187 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730
190 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730
1
188 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314
191 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314
8
189 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819
192 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819
3
190 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238
193 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238
9
191 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569
194 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569
4
192 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807
195 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807
7
193 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951
196 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951
8
194 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999
197 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999
7
195 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951
198 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951
8
196 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807
199 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807
7
197 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569
200 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569
4
198 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238
9
199 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819
3
200 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314
8
201 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730
1
202 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070
201 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238
9
202 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819
ARM Macro Assembler Page 6
203 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344
0
204 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555
7
205 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714
1
206 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826
9
207 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902
8
208 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951
0
209 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980
2
210 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000
0
211 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980
2
212 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951
0
213 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902
8
214 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826
9
215 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714
1
216 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555
7
217 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344
0
218 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
219 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730
1
220 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314
8
221 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819
3
222 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238
9
223 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569
4
224 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807
7
225 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951
203 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314
8
226 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000
204 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730
1
205 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070
9
206 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344
0
227 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951
8
228 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807
207 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555
7
229 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569
4
230 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238
208 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714
1
209 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826
9
231 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819
210 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902
8
211 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951
0
212 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980
2
213 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000
0
214 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980
2
215 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951
0
216 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902
8
217 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826
9
218 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714
1
219 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555
7
220 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344
0
221 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
222 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730
1
223 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314
8
224 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819
3
232 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314
225 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238
9
226 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569
4
227 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807
7
228 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951
8
229 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000
0
230 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951
8
231 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807
7
ARM Macro Assembler Page 7
8
233 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730
1
234 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070
232 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569
4
233 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238
9
235 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344
234 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819
3
235 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314
8
236 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730
1
237 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070
9
238 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344
0
236 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555
239 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555
7
237 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714
240 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714
1
238 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826
241 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826
9
239 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902
242 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902
8
240 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951
243 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951
0
241 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980
244 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980
2
242 00000100
243 00000100
244 00000100
245 00000100
246 00000100 END
246 00000100
247 00000100
248 00000100
249 00000100 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\dft.d -o.\obj\dft.o -I.\Src -I.\RTE\_Simu -IC:\Programdata\K
eil\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Programdata\Keil\Arm\Pack
@ -504,7 +511,7 @@ TabCos 00000000
Symbol: TabCos
Definitions
At line 112 in file Src\DFT.s
At line 115 in file Src\DFT.s
Uses
At line 42 in file Src\DFT.s
Comment: TabCos used once
@ -512,7 +519,7 @@ TabSin 00000080
Symbol: TabSin
Definitions
At line 177 in file Src\DFT.s
At line 180 in file Src\DFT.s
Uses
At line 44 in file Src\DFT.s
Comment: TabSin used once
@ -520,7 +527,7 @@ Trigo 00000000
Symbol: Trigo
Definitions
At line 109 in file Src\DFT.s
At line 112 in file Src\DFT.s
Uses
None
Comment: Trigo unused