opToBinOP = {
    "ADD": 1,
    "MUL": 2,
    "SUB": 3,
    "DIV_INT": 4,
    "COP": 5,
    "AFC": 6,
    "JMP": 7,
    "JMF": 8,
    "INF": 9,
    "SUP": 10,
    "EQ": 11,
    "PRI": 12,
    "AND": 13,
    "OR": 14,
    "NOT": 15
}

def convertToRegister(s):
    l = []
    match s[0]:
        case "ADD":
            l.append("LOAD R0 "+s[2])
            l.append("LOAD R1 "+s[3])
            l.append("ADD R0 R0 R1")
            l.append("STORE "+s[1]+" R0")
        case "MUL":
            l.append("LOAD R0 "+s[2])
            l.append("LOAD R1 "+s[3])
            l.append("MUL R0 R0 R1")
            l.append("STORE "+s[1]+" R0")
        case "SUB":
            l.append("LOAD R0 "+s[2])
            l.append("LOAD R1 "+s[3])
            l.append("SUB R0 R0 R1")
            l.append("STORE "+s[1]+" R0")
        case "DIV_INT":
            l.append("LOAD R0 "+s[2])
            l.append("LOAD R1 "+s[3])
            l.append("DIV R0 R0 R1")
            l.append("STORE "+s[1]+" R0")
        case "COP":
            l.append("LOAD R0 "+s[2])
            l.append("STORE "+s[1]+" R0")
        case "AFC":
            l.append("AFC R0 "+s[2])
            l.append("STORE "+s[1]+" R0")
        case "JMP":
            pass
        case "JMF":
            pass
        case "INF":
            l.append("LOAD R0 "+s[2])
            l.append("LOAD R1 "+s[3])
            l.append("SUB R1 ")


    return l


fileInput = open("asm", "r")
ASMLines = list(map(lambda e: e.rstrip("\n"), fileInput.readlines()))
print(ASMLines)
finalCode = []
for i, l in enumerate(ASMLines):
    items = l.split(" ")
    finalCode.extend(convertToRegister(items))
    # idée pour les jumps : quand on voit un jump à la ligne tant on peut ajouter un label là-bas

# - trucs en registre
# - décaler les Jumps
# - COP -> OPCode