---------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 12.05.2023 16:14:24 -- Design Name: -- Module Name: ALU - Behavioral -- Project Name: -- Target Devices: -- Tool Versions: -- Description: -- -- Dependencies: -- -- Revision: -- Revision 0.01 - File Created -- Additional Comments: -- ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; -- use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx leaf cells in this code. --library UNISIM; --use UNISIM.VComponents.all; entity ALU is Port ( A : in STD_LOGIC_VECTOR (7 downto 0); B : in STD_LOGIC_VECTOR (7 downto 0); Ctrl_Alu : in STD_LOGIC_VECTOR (7 downto 0); S : out STD_LOGIC_VECTOR (7 downto 0); N : out STD_LOGIC; O : out STD_LOGIC; Z : out STD_LOGIC; C : out STD_LOGIC; JumpFlag : inout STD_LOGIC -- 0 false 1 true ); end ALU; -- Instruction code -- ADD x"01" -- MUL x"02" -- SUB x"03" -- DIV x"04" -- INF x"09" -- SUP x"0A" -- EQ x"0B" -- NOT x"0C" -- AND x"0D" -- OR x"0E" -- XOR x"0F" architecture Behavioral of ALU is signal res : STD_LOGIC_VECTOR(15 downto 0):= x"0000"; signal flag : STD_LOGIC := '0'; begin process(A, B, Ctrl_Alu) begin N <= '0'; O <= '0'; Z <= '0'; C <= '0'; flag <= JumpFlag; case Ctrl_Alu is when x"01" => res <= (x"00" & A) + (x"00" & B) ; if (((x"00" & A) + (x"00" & B)) > 255) then C <= '1'; elsif (A+B = 0) then Z <= '1'; end if; -- ADD when x"02" => res <= A * B; if (A * B > 255) then O <= '1'; elsif A * B = 0 then Z <= '1'; end if; -- MUL when x"03" => res <= (x"00" & A) - (x"00" & B) ; if (B > A) then N <= '1'; elsif (B = A) then Z <= '1'; end if; -- SUB when x"04" => if (B /= 0) then res <= (x"00" & std_logic_vector(to_unsigned(to_integer(unsigned(A)) / to_integer(unsigned(B)),8))); else res <= x"0000"; end if; -- DIV when x"09" => if A < B then res <= x"0001"; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when x"0A" => if A > B then res <= x"0001"; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when x"0B" => if A = B then res <= x"0001"; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when x"0C" => if A > 0 then res <= x"0000"; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when x"0D" => if (A > 0 and B > 0) then res <= x"0001" ; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when x"0E" => if (A > 0 or B > 0) then res <= x"0001" ; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when x"0F" => if ((A > 0 and B = 0) or (A = 0 and B >0)) then res <= x"0001" ; flag <= '1'; else res <= x"0000"; flag <= '0'; end if; when others => res <= x"0000"; end case; end process; JumpFlag <= flag; S <= res(7 downto 0); end Behavioral;