Device Usage Page (usage_statistics_webtalk.html)

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software_version_and_target_device
betaFALSE build_version2258646
date_generatedWed May 31 17:58:23 2023 os_platformLIN64
product_versionVivado v2018.2 (64-bit) project_idaef36ef3a0d94dac9e6058b656907afd
project_iteration12 random_id6ef722b6-53ec-42dc-bc5c-9d79054a9923
registration_id6ef722b6-53ec-42dc-bc5c-9d79054a9923 route_designTRUE
target_devicexc7a35t target_familyartix7
target_packagecpg236 target_speed-1
tool_flowVivado

user_environment
cpu_nameIntel(R) Core(TM) i5-9500 CPU @ 3.00GHz cpu_speed3000.000 MHz
os_nameUbuntu os_releaseUbuntu 20.04.6 LTS
system_ram16.000 GB total_processors1

vivado_usage
gui_handlers
abstractcombinedpanel_add_element=36 abstractcombinedpanel_remove_selected_elements=13 abstractfileview_close=1 abstractfileview_reload=1
addsrcwizard_specify_hdl_netlist_block_design=1 addsrcwizard_specify_or_create_constraint_files=4 addsrcwizard_specify_simulation_specific_hdl_files=3 basedialog_apply=2
basedialog_cancel=31 basedialog_no=2 basedialog_ok=234 basedialog_yes=40
clockcreationpanel_clock_name=1 clockcreationpanel_enter_positive_number=5 cmdmsgdialog_messages=6 cmdmsgdialog_ok=33
cmdmsgdialog_open_messages_view=1 combinationalconstraintstablepanel_table=1 commandsinput_type_tcl_command_here=4 constraintschooserpanel_add_existing_or_create_new_constraints=5
constraintschooserpanel_add_files=4 constraintschooserpanel_create_file=4 constraintschooserpanel_file_table=2 createconstraintsfilepanel_file_name=3
createrunreportdialog_report_name=1 createsrcfiledialog_file_name=15 createsrcfiledialog_file_type=1 definemodulesdialog_define_modules_and_specify_io_ports=148
definemodulesdialog_entity_name=3 editcreateclocktablepanel_edit_create_clock_table=13 expreporttreepanel_edit_report_options=1 expreporttreepanel_exp_report_tree_table=9
expruntreepanel_exp_run_tree_table=2 filesetpanel_file_set_panel_tree=606 filesetpanel_messages=1 flownavigatortreepanel_flow_navigator_tree=374
gettingstartedview_create_new_project=1 gettingstartedview_open_project=3 graphicalview_zoom_fit=6 graphicalview_zoom_in=135
graphicalview_zoom_out=149 hcodeeditor_close=2 hcodeeditor_search_text_combo_box=40 hinputhandler_toggle_line_comments=1
hpopuptitle_close=1 inputoutputtablepanel_table=1 logmonitor_monitor=1 logpanel_copy=1
logpanel_find=1 logpanel_pause_output=2 logpanel_toggle_column_selection_mode=2 mainmenumgr_checkpoint=18
mainmenumgr_edit=16 mainmenumgr_export=7 mainmenumgr_file=76 mainmenumgr_flow=10
mainmenumgr_io_planning=1 mainmenumgr_ip=12 mainmenumgr_open_recent_project=25 mainmenumgr_project=51
mainmenumgr_reports=12 mainmenumgr_settings=2 mainmenumgr_simulation_waveform=15 mainmenumgr_text_editor=10
mainmenumgr_timing=1 mainmenumgr_tools=16 mainmenumgr_unselect_type=1 mainmenumgr_view=8
mainmenumgr_window=16 maintoolbarmgr_run=7 mainwinmenumgr_layout=12 mainwinmenumgr_load=1
messagewithoptiondialog_dont_show_this_dialog_again=1 msgtreepanel_message_severity=1 msgtreepanel_message_view_tree=172 msgview_clear_messages_resulting_from_user_executed=9
msgview_critical_warnings=2 msgview_error_messages=2 msgview_information_messages=3 msgview_warning_messages=1
navigabletimingreporttab_timing_report_navigation_tree=5 numjobschooser_number_of_jobs=2 openfileaction_cancel=2 openfileaction_open_directory=4
opentargetwizard_connect_to=3 packagetreepanel_package_tree_panel=5 pacommandnames_add_config_memory=3 pacommandnames_add_sources=21
pacommandnames_auto_connect_target=2 pacommandnames_auto_update_hier=26 pacommandnames_fileset_window=3 pacommandnames_goto_instantiation=1
pacommandnames_log_window=10 pacommandnames_open_project=1 pacommandnames_open_recent_target=3 pacommandnames_open_target_wizard=4
pacommandnames_program_fpga=4 pacommandnames_report_clock_networks=1 pacommandnames_reports_window=5 pacommandnames_run_bitgen=1
pacommandnames_run_synthesis=3 pacommandnames_set_as_top=6 pacommandnames_set_target_ucf=3 pacommandnames_simulation_relaunch=5
pacommandnames_simulation_reset=1 pacommandnames_simulation_run=1 pacommandnames_simulation_run_behavioral=174 pacommandnames_simulation_run_post_synthesis_functional=1
pacommandnames_simulation_settings=9 pacommandnames_src_replace_file=5 paviews_code=41 paviews_device=3
paviews_project_summary=2 planaheadtab_show_flow_navigator=4 primaryclockspanel_recommended_constraints_table=6 programdebugtab_open_recently_opened_target=13
programdebugtab_open_target=2 programdebugtab_refresh_device=1 programfpgadialog_check_end_of_startup=1 programfpgadialog_program=12
programfpgadialog_specify_bitstream_file=2 progressdialog_background=16 progressdialog_cancel=1 projectsettingsgadget_edit_project_settings=2
projectsettingssimulationpanel_select_testbench_top_module=2 projectsettingssimulationpanel_tabbed_pane=7 projecttab_close_design=4 projecttab_reload=7
rdicommands_custom_commands=4 rdicommands_delete=5 rdicommands_line_comment=23 rdicommands_save_file=10
rdiviews_waveform_viewer=787 removesourcesdialog_also_delete=1 reportnavigationholder_rerun=2 rtloptionspanel_select_top_module_of_your_design=2
rungadget_show_error_and_critical_warning_messages=1 saveprojectutils_cancel=1 saveprojectutils_save=46 selecttopmoduledialog_select_top_module=8
settingsdialog_project_tree=1 signaltreepanel_signal_tree_table=13 simulationobjectspanel_simulation_objects_tree_table=55 simulationscopespanel_simulate_scope_table=80
srcchooserpanel_add_hdl_and_netlist_files_to_your_project=4 srcchooserpanel_add_or_create_source_file=21 srcchooserpanel_create_file=15 srcchoosertable_src_chooser_table=2
srcmenu_ip_hierarchy=26 srcmenu_refresh_hierarchy=2 stalerundialog_yes=2 statemonitor_reset_run=3
syntheticagettingstartedview_recent_projects=8 syntheticastatemonitor_cancel=8 taskbanner_close=6 tclconsoleview_clear_all_output_in_tcl_console=3
tclconsoleview_tcl_console_code_editor=50 timingconstraintswizard_create_check_timing_report=6 timingconstraintswizard_create_methodology_report=2 timingconstraintswizard_create_timing_summary_report=6
timingconstraintswizard_goto_constraints_summary_page=4 timingconstraintswizard_view_timing_constraints=6 touchpointsurveydialog_no=1 waveformnametree_waveform_name_tree=275
waveformoptionsview_reset_to_defaults=1 waveformoptionsview_show_signal_indices=4 waveformview_add_marker=4 waveformview_goto_last_time=4
waveformview_goto_time_0=3 waveformview_next_marker=3 xdceditorview_apply_all_changes_to_xdc_constraints=2 xdcviewertreetablepanel_xdc_viewer_tree_table=4
java_command_handlers
addcfgmem=1 addsources=24 autoconnecttarget=2 closeproject=2
editdelete=5 editpaste=5 editundo=1 launchopentarget=4
launchprogramfpga=15 newproject=1 openhardwaremanager=24 openproject=4
openrecenttarget=14 programdevice=18 reporttimingsummary=1 runbitgen=47
runimplementation=6 runsynthesis=22 savefileproxyhandler=4 settargetconstrfile=3
settopnode=1 showsource=1 showview=53 simulationrelaunch=5
simulationrun=172 timingconstraintswizard=7 toggleviewnavigator=4 toolssettings=15
updatesourcefiles=5 viewlayoutcmd=1 viewtaskimplementation=4 viewtasksynthesis=1
waveformsaveconfiguration=13 xdccreateclock=1
other_data
guimode=24
project_data
constraintsetcount=1 core_container=false currentimplrun=impl_1 currentsynthesisrun=synth_1
default_library=xil_defaultlib designmode=RTL export_simulation_activehdl=0 export_simulation_ies=0
export_simulation_modelsim=0 export_simulation_questa=0 export_simulation_riviera=0 export_simulation_vcs=0
export_simulation_xsim=0 implstrategy=Vivado Implementation Defaults launch_simulation_activehdl=0 launch_simulation_ies=0
launch_simulation_modelsim=0 launch_simulation_questa=0 launch_simulation_riviera=0 launch_simulation_vcs=0
launch_simulation_xsim=174 simulator_language=Mixed srcsetcount=11 synthesisstrategy=Vivado Synthesis Defaults
target_language=VHDL target_simulator=XSim totalimplruns=1 totalsynthesisruns=1

unisim_transformation
post_unisim_transformation
bufg=1 carry4=33 fdre=330 fdse=12
gnd=8 ibuf=5 lut2=51 lut3=67
lut4=41 lut5=55 lut6=209 muxf7=19
obuf=8 vcc=5
pre_unisim_transformation
bufg=1 carry4=33 fdre=330 fdse=12
gnd=8 ibuf=5 lut2=51 lut3=67
lut4=41 lut5=55 lut6=209 muxf7=19
obuf=8 vcc=5

report_drc
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -internal=default::[not_specified] -internal_only=default::[not_specified] -messages=default::[not_specified]
-name=default::[not_specified] -no_waivers=default::[not_specified] -return_string=default::[not_specified] -ruledecks=default::[not_specified]
-upgrade_cw=default::[not_specified] -waived=default::[not_specified]
results
cfgbvs-1=1 lutlp-2=2 nstd-1=1 ucio-1=1
usage
nstd-1=Warning ucio-1=Warning

report_methodology
command_line_options
-append=default::[not_specified] -checks=default::[not_specified] -fail_on=default::[not_specified] -force=default::[not_specified]
-format=default::[not_specified] -messages=default::[not_specified] -name=default::[not_specified] -return_string=default::[not_specified]
-waived=default::[not_specified]
results
timing-17=342 timing-23=1
usage
nstd-1=Warning ucio-1=Warning

report_power
command_line_options
-advisory=default::[not_specified] -append=default::[not_specified] -file=[specified] -format=default::text
-hier=default::power -l=default::[not_specified] -name=default::[not_specified] -no_propagation=default::[not_specified]
-return_string=default::[not_specified] -rpx=[specified] -verbose=default::[not_specified] -vid=default::[not_specified]
-xpe=default::[not_specified]
usage
airflow=250 (LFM) ambient_temp=25.0 (C) bi-dir_toggle=12.500000 bidir_output_enable=1.000000
board_layers=12to15 (12 to 15 Layers) board_selection=medium (10"x10") confidence_level_clock_activity=Low confidence_level_design_state=High
confidence_level_device_models=High confidence_level_internal_activity=Medium confidence_level_io_activity=Low confidence_level_overall=Low
customer=TBD customer_class=TBD devstatic=0.081472 die=xc7a35tcpg236-1
dsp_output_toggle=12.500000 dynamic=3.252769 effective_thetaja=5.0 enable_probability=0.990000
family=artix7 ff_toggle=12.500000 flow_state=routed heatsink=medium (Medium Profile)
i/o=0.804337 input_toggle=12.500000 junction_temp=41.7 (C) logic=1.293960
mgtavcc_dynamic_current=0.000000 mgtavcc_static_current=0.000000 mgtavcc_total_current=0.000000 mgtavcc_voltage=1.000000
mgtavtt_dynamic_current=0.000000 mgtavtt_static_current=0.000000 mgtavtt_total_current=0.000000 mgtavtt_voltage=1.200000
netlist_net_matched=NA off-chip_power=0.000000 on-chip_power=3.334241 output_enable=1.000000
output_load=5.000000 output_toggle=12.500000 package=cpg236 pct_clock_constrained=0.860000
pct_inputs_defined=0 platform=lin64 process=typical ram_enable=50.000000
ram_write=50.000000 read_saif=False set/reset_probability=0.000000 signal_rate=False
signals=1.154472 simulation_file=None speedgrade=-1 static_prob=False
temp_grade=commercial thetajb=7.5 (C/W) thetasa=4.6 (C/W) toggle_rate=False
user_board_temp=25.0 (C) user_effective_thetaja=5.0 user_junc_temp=41.7 (C) user_thetajb=7.5 (C/W)
user_thetasa=4.6 (C/W) vccadc_dynamic_current=0.000000 vccadc_static_current=0.020000 vccadc_total_current=0.020000
vccadc_voltage=1.800000 vccaux_dynamic_current=0.028741 vccaux_io_dynamic_current=0.000000 vccaux_io_static_current=0.000000
vccaux_io_total_current=0.000000 vccaux_io_voltage=1.800000 vccaux_static_current=0.013356 vccaux_total_current=0.042097
vccaux_voltage=1.800000 vccbram_dynamic_current=0.000000 vccbram_static_current=0.000299 vccbram_total_current=0.000299
vccbram_voltage=1.000000 vccint_dynamic_current=2.468432 vccint_static_current=0.017832 vccint_total_current=2.486264
vccint_voltage=1.000000 vcco12_dynamic_current=0.000000 vcco12_static_current=0.000000 vcco12_total_current=0.000000
vcco12_voltage=1.200000 vcco135_dynamic_current=0.000000 vcco135_static_current=0.000000 vcco135_total_current=0.000000
vcco135_voltage=1.350000 vcco15_dynamic_current=0.000000 vcco15_static_current=0.000000 vcco15_total_current=0.000000
vcco15_voltage=1.500000 vcco18_dynamic_current=0.000000 vcco18_static_current=0.000000 vcco18_total_current=0.000000
vcco18_voltage=1.800000 vcco25_dynamic_current=0.000000 vcco25_static_current=0.000000 vcco25_total_current=0.000000
vcco25_voltage=2.500000 vcco33_dynamic_current=0.222001 vcco33_static_current=0.001000 vcco33_total_current=0.223001
vcco33_voltage=3.300000 version=2018.2

report_utilization
clocking
bufgctrl_available=32 bufgctrl_fixed=0 bufgctrl_used=1 bufgctrl_util_percentage=3.13
bufhce_available=72 bufhce_fixed=0 bufhce_used=0 bufhce_util_percentage=0.00
bufio_available=20 bufio_fixed=0 bufio_used=0 bufio_util_percentage=0.00
bufmrce_available=10 bufmrce_fixed=0 bufmrce_used=0 bufmrce_util_percentage=0.00
bufr_available=20 bufr_fixed=0 bufr_used=0 bufr_util_percentage=0.00
mmcme2_adv_available=5 mmcme2_adv_fixed=0 mmcme2_adv_used=0 mmcme2_adv_util_percentage=0.00
plle2_adv_available=5 plle2_adv_fixed=0 plle2_adv_used=0 plle2_adv_util_percentage=0.00
dsp
dsps_available=90 dsps_fixed=0 dsps_used=0 dsps_util_percentage=0.00
io_standard
blvds_25=0 diff_hstl_i=0 diff_hstl_i_18=0 diff_hstl_ii=0
diff_hstl_ii_18=0 diff_hsul_12=0 diff_mobile_ddr=0 diff_sstl135=0
diff_sstl135_r=0 diff_sstl15=0 diff_sstl15_r=0 diff_sstl18_i=0
diff_sstl18_ii=0 hstl_i=0 hstl_i_18=0 hstl_ii=0
hstl_ii_18=0 hsul_12=0 lvcmos12=0 lvcmos15=0
lvcmos18=1 lvcmos25=0 lvcmos33=1 lvds_25=0
lvttl=0 mini_lvds_25=0 mobile_ddr=0 pci33_3=0
ppds_25=0 rsds_25=0 sstl135=0 sstl135_r=0
sstl15=0 sstl15_r=0 sstl18_i=0 sstl18_ii=0
tmds_33=0
memory
block_ram_tile_available=50 block_ram_tile_fixed=0 block_ram_tile_used=0 block_ram_tile_util_percentage=0.00
ramb18_available=100 ramb18_fixed=0 ramb18_used=0 ramb18_util_percentage=0.00
ramb36_fifo_available=50 ramb36_fifo_fixed=0 ramb36_fifo_used=0 ramb36_fifo_util_percentage=0.00
primitives
bufg_functional_category=Clock bufg_used=1 carry4_functional_category=CarryLogic carry4_used=33
fdre_functional_category=Flop & Latch fdre_used=330 fdse_functional_category=Flop & Latch fdse_used=12
ibuf_functional_category=IO ibuf_used=5 lut2_functional_category=LUT lut2_used=51
lut3_functional_category=LUT lut3_used=67 lut4_functional_category=LUT lut4_used=41
lut5_functional_category=LUT lut5_used=55 lut6_functional_category=LUT lut6_used=209
muxf7_functional_category=MuxFx muxf7_used=19 obuf_functional_category=IO obuf_used=8
slice_logic
f7_muxes_available=16300 f7_muxes_fixed=0 f7_muxes_used=19 f7_muxes_util_percentage=0.12
f8_muxes_available=8150 f8_muxes_fixed=0 f8_muxes_used=0 f8_muxes_util_percentage=0.00
lut_as_logic_available=20800 lut_as_logic_fixed=0 lut_as_logic_used=371 lut_as_logic_util_percentage=1.78
lut_as_memory_available=9600 lut_as_memory_fixed=0 lut_as_memory_used=0 lut_as_memory_util_percentage=0.00
register_as_flip_flop_available=41600 register_as_flip_flop_fixed=0 register_as_flip_flop_used=342 register_as_flip_flop_util_percentage=0.82
register_as_latch_available=41600 register_as_latch_fixed=0 register_as_latch_used=0 register_as_latch_util_percentage=0.00
slice_luts_available=20800 slice_luts_fixed=0 slice_luts_used=371 slice_luts_util_percentage=1.78
slice_registers_available=41600 slice_registers_fixed=0 slice_registers_used=342 slice_registers_util_percentage=0.82
fully_used_lut_ff_pairs_fixed=0.82 fully_used_lut_ff_pairs_used=5 lut_as_distributed_ram_fixed=0 lut_as_distributed_ram_used=0
lut_as_logic_available=20800 lut_as_logic_fixed=0 lut_as_logic_used=371 lut_as_logic_util_percentage=1.78
lut_as_memory_available=9600 lut_as_memory_fixed=0 lut_as_memory_used=0 lut_as_memory_util_percentage=0.00
lut_as_shift_register_fixed=0 lut_as_shift_register_used=0 lut_ff_pairs_with_one_unused_flip_flop_fixed=0 lut_ff_pairs_with_one_unused_flip_flop_used=37
lut_ff_pairs_with_one_unused_lut_output_fixed=37 lut_ff_pairs_with_one_unused_lut_output_used=42 lut_flip_flop_pairs_available=20800 lut_flip_flop_pairs_fixed=0
lut_flip_flop_pairs_used=48 lut_flip_flop_pairs_util_percentage=0.23 slice_available=8150 slice_fixed=0
slice_used=158 slice_util_percentage=1.94 slicel_fixed=0 slicel_used=103
slicem_fixed=0 slicem_used=55 unique_control_sets_used=36 using_o5_and_o6_fixed=36
using_o5_and_o6_used=52 using_o5_output_only_fixed=52 using_o5_output_only_used=0 using_o6_output_only_fixed=0
using_o6_output_only_used=319
specific_feature
bscane2_available=4 bscane2_fixed=0 bscane2_used=0 bscane2_util_percentage=0.00
capturee2_available=1 capturee2_fixed=0 capturee2_used=0 capturee2_util_percentage=0.00
dna_port_available=1 dna_port_fixed=0 dna_port_used=0 dna_port_util_percentage=0.00
efuse_usr_available=1 efuse_usr_fixed=0 efuse_usr_used=0 efuse_usr_util_percentage=0.00
frame_ecce2_available=1 frame_ecce2_fixed=0 frame_ecce2_used=0 frame_ecce2_util_percentage=0.00
icape2_available=2 icape2_fixed=0 icape2_used=0 icape2_util_percentage=0.00
pcie_2_1_available=1 pcie_2_1_fixed=0 pcie_2_1_used=0 pcie_2_1_util_percentage=0.00
startupe2_available=1 startupe2_fixed=0 startupe2_used=0 startupe2_util_percentage=0.00
xadc_available=1 xadc_fixed=0 xadc_used=0 xadc_util_percentage=0.00

router
usage
actual_expansions=336796 bogomips=6000 bram18=0 bram36=0
bufg=0 bufr=0 ctrls=36 dsp=0
effort=2 estimated_expansions=475116 ff=342 global_clocks=1
high_fanout_nets=0 iob=13 lut=371 movable_instances=844
nets=925 pins=4840 pll=0 router_runtime=0.000000
router_timing_driven=1 threads=6 timing_constraints_exist=1

synthesis
command_line_options
-assert=default::[not_specified] -bufg=default::12 -cascade_dsp=default::auto -constrset=default::[not_specified]
-control_set_opt_threshold=default::auto -directive=default::default -fanout_limit=default::10000 -flatten_hierarchy=default::rebuilt
-fsm_extraction=default::auto -gated_clock_conversion=default::off -generic=default::[not_specified] -include_dirs=default::[not_specified]
-keep_equivalent_registers=default::[not_specified] -max_bram=default::-1 -max_bram_cascade_height=default::-1 -max_dsp=default::-1
-max_uram=default::-1 -max_uram_cascade_height=default::-1 -mode=default::default -name=default::[not_specified]
-no_lc=default::[not_specified] -no_srlextract=default::[not_specified] -no_timing_driven=default::[not_specified] -part=xc7a35tcpg236-1
-resource_sharing=default::auto -retiming=default::[not_specified] -rtl=default::[not_specified] -rtl_skip_constraints=default::[not_specified]
-rtl_skip_ip=default::[not_specified] -seu_protect=default::none -sfcu=default::[not_specified] -shreg_min_size=default::3
-top=Pipeline -verilog_define=default::[not_specified]
usage
elapsed=00:00:23s hls_ip=0 memory_gain=491.398MB memory_peak=1651.219MB

xsim
command_line_options
-sim_mode=default::behavioral -sim_type=default::