From 134db4c2c9fb78d8e2c51539cc3226b2b8f08d28 Mon Sep 17 00:00:00 2001
From: alejeune <aureliafacebook44@gmail.com>
Date: Mon, 29 May 2023 21:39:05 +0200
Subject: [PATCH] Update ALU

---
 VHDL/ALU/ALU.cache/wt/gui_handlers.wdf        |  26 +++++-----
 .../ALU.cache/wt/java_command_handlers.wdf    |   6 +--
 VHDL/ALU/ALU.cache/wt/project.wpc             |   2 +-
 VHDL/ALU/ALU.cache/wt/webtalk_pa.xml          |  34 ++++++------
 VHDL/ALU/ALU.runs/synth_1/gen_run.xml         |   2 +-
 .../sim_1/behav/xsim/Test_Alu_behav.wdb       | Bin 7598 -> 7780 bytes
 VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.log |  14 +++++
 VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.sh  |   2 +-
 .../ALU/ALU.sim/sim_1/behav/xsim/elaborate.sh |   2 +-
 VHDL/ALU/ALU.sim/sim_1/behav/xsim/simulate.sh |   2 +-
 .../Test_Alu_behav/obj/xsim_0.lnx64.o         | Bin 36800 -> 34976 bytes
 .../xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.c |   4 +-
 .../Test_Alu_behav/obj/xsim_1.lnx64.o         | Bin 4296 -> 4296 bytes
 .../webtalk/.xsim_webtallk.info               |   2 +-
 .../Test_Alu_behav/webtalk/xsim_webtalk.tcl   |  12 ++---
 .../xsim/xsim.dir/Test_Alu_behav/xsim.dbg     | Bin 3860 -> 3748 bytes
 .../xsim/xsim.dir/Test_Alu_behav/xsim.mem     | Bin 3015 -> 2973 bytes
 .../xsim/xsim.dir/Test_Alu_behav/xsim.reloc   | Bin 400 -> 378 bytes
 .../xsim/xsim.dir/Test_Alu_behav/xsim.rlx     |   2 +-
 .../xsim/xsim.dir/Test_Alu_behav/xsim.rtti    | Bin 318 -> 318 bytes
 .../xsim/xsim.dir/Test_Alu_behav/xsim.type    | Bin 7168 -> 7168 bytes
 .../xsim/xsim.dir/Test_Alu_behav/xsim.xdbg    | Bin 2456 -> 1936 bytes
 .../behav/xsim/xsim.dir/Test_Alu_behav/xsimk  | Bin 48456 -> 48432 bytes
 .../xsim.dir/Test_Alu_behav/xsimkernel.log    |  10 ++--
 .../xsim/xsim.dir/xil_defaultlib/alu.vdb      | Bin 8874 -> 9792 bytes
 .../xsim/xsim.dir/xil_defaultlib/test_alu.vdb | Bin 7771 -> 11866 bytes
 .../xil_defaultlib/xil_defaultlib.rlx         |   4 +-
 VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd          |  49 +++++++++++++++---
 VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd       |   6 +--
 VHDL/ALU/ALU.xpr                              |  15 +++---
 30 files changed, 120 insertions(+), 74 deletions(-)

diff --git a/VHDL/ALU/ALU.cache/wt/gui_handlers.wdf b/VHDL/ALU/ALU.cache/wt/gui_handlers.wdf
index 31f648f..1285b27 100644
--- a/VHDL/ALU/ALU.cache/wt/gui_handlers.wdf
+++ b/VHDL/ALU/ALU.cache/wt/gui_handlers.wdf
@@ -2,7 +2,7 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6162737472616374636f6d62696e656470616e656c5f6164645f656c656d656e74:3336:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6162737472616374636f6d62696e656470616e656c5f72656d6f76655f73656c65637465645f656c656d656e7473:3133:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:626173656469616c6f675f63616e63656c:3130:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:626173656469616c6f675f6f6b:3437:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:626173656469616c6f675f6f6b:3530:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636d646d73676469616c6f675f6d65737361676573:34:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636d646d73676469616c6f675f6f6b:3139:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:636d646d73676469616c6f675f6f70656e5f6d657373616765735f76696577:31:00:00
@@ -10,14 +10,14 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:646566696e656d6f64756c65736469616c6f675f646566696e655f6d6f64756c65735f616e645f737065636966795f696f5f706f727473:313438:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:646566696e656d6f64756c65736469616c6f675f656e746974795f6e616d65:33:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:65787072756e7472656570616e656c5f6578705f72756e5f747265655f7461626c65:32:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f66696c655f7365745f70616e656c5f74726565:323133:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f66696c655f7365745f70616e656c5f74726565:323339:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:66696c6573657470616e656c5f6d65737361676573:31:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:666c6f776e6176696761746f727472656570616e656c5f666c6f775f6e6176696761746f725f74726565:3732:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:666c6f776e6176696761746f727472656570616e656c5f666c6f775f6e6176696761746f725f74726565:3737:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6372656174655f6e65775f70726f6a656374:31:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67657474696e6773746172746564766965775f6f70656e5f70726f6a656374:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67726170686963616c766965775f7a6f6f6d5f666974:32:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67726170686963616c766965775f7a6f6f6d5f696e:3333:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67726170686963616c766965775f7a6f6f6d5f6f7574:3235:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67726170686963616c766965775f7a6f6f6d5f696e:3436:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:67726170686963616c766965775f7a6f6f6d5f6f7574:3236:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:68636f6465656469746f725f636c6f7365:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:68636f6465656469746f725f7365617263685f746578745f636f6d626f5f626f78:31:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:68706f7075707469746c655f636c6f7365:31:00:00
@@ -27,13 +27,13 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6c6f6770616e656c5f70617573655f6f7574707574:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6c6f6770616e656c5f746f67676c655f636f6c756d6e5f73656c656374696f6e5f6d6f6465:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f636865636b706f696e74:3136:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f65646974:3134:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f65646974:3136:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6578706f7274:37:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f66696c65:3630:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f66696c65:3634:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f666c6f77:38:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6970:39:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6f70656e5f726563656e745f70726f6a656374:3230:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f70726f6a656374:3430:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f6f70656e5f726563656e745f70726f6a656374:3232:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f70726f6a656374:3433:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f7265706f727473:3130:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f73657474696e6773:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:6d61696e6d656e756d67725f73696d756c6174696f6e5f77617665666f726d:3132:00:00
@@ -51,7 +51,7 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f6c6f675f77696e646f77:31:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f72756e5f73796e746865736973:33:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f73696d756c6174696f6e5f72656c61756e6368:33:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f73696d756c6174696f6e5f72756e5f6265686176696f72616c:3539:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f73696d756c6174696f6e5f72756e5f6265686176696f72616c:3634:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7061636f6d6d616e646e616d65735f7372635f7265706c6163655f66696c65:35:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:706176696577735f636f6465:3139:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:706176696577735f646576696365:31:00:00
@@ -59,7 +59,7 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:70726f6a65637473657474696e67736761646765745f656469745f70726f6a6563745f73657474696e6773:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:726469636f6d6d616e64735f64656c657465:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:726469636f6d6d616e64735f736176655f66696c65:3130:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:72646976696577735f77617665666f726d5f766965776572:313030:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:72646976696577735f77617665666f726d5f766965776572:313130:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:72746c6f7074696f6e7370616e656c5f73656c6563745f746f705f6d6f64756c655f6f665f796f75725f64657369676e:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7361766570726f6a6563747574696c735f73617665:34:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73657474696e67736469616c6f675f70726f6a6563745f74726565:31:00:00
@@ -68,10 +68,10 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73726363686f6f73657270616e656c5f6372656174655f66696c65:3133:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:7372636d656e755f69705f686965726172636879:32:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73746174656d6f6e69746f725f72657365745f72756e:31:00:00
-70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73796e7468657469636167657474696e6773746172746564766965775f726563656e745f70726f6a65637473:33:00:00
+70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73796e7468657469636167657474696e6773746172746564766965775f726563656e745f70726f6a65637473:34:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:73796e7468657469636173746174656d6f6e69746f725f63616e63656c:31:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:74636c636f6e736f6c65766965775f74636c5f636f6e736f6c655f636f64655f656469746f72:31:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:77617665666f726d6e616d65747265655f77617665666f726d5f6e616d655f74726565:3432:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:77617665666f726d766965775f6164645f6d61726b6572:34:00:00
 70726f6a656374:76697661646f5f75736167655c6775695f68616e646c657273:77617665666f726d766965775f6e6578745f6d61726b6572:32:00:00
-eof:1336689854
+eof:805443714
diff --git a/VHDL/ALU/ALU.cache/wt/java_command_handlers.wdf b/VHDL/ALU/ALU.cache/wt/java_command_handlers.wdf
index 9496387..931fa2d 100644
--- a/VHDL/ALU/ALU.cache/wt/java_command_handlers.wdf
+++ b/VHDL/ALU/ALU.cache/wt/java_command_handlers.wdf
@@ -1,6 +1,6 @@
 version:1
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:616464736f7572636573:3135:00:00
-70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:636c6f736570726f6a656374:31:00:00
+70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:636c6f736570726f6a656374:32:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6564697464656c657465:32:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6e657770726f6a656374:31:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6f70656e70726f6a656374:32:00:00
@@ -8,8 +8,8 @@ version:1
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:72756e73796e746865736973:36:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73686f7776696577:34:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73696d756c6174696f6e72656c61756e6368:33:00:00
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+70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:73696d756c6174696f6e72756e:3633:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:746f6f6c7373657474696e6773:35:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:757064617465736f7572636566696c6573:35:00:00
 70726f6a656374:76697661646f5f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:766965777461736b696d706c656d656e746174696f6e:31:00:00
-eof:2907318966
+eof:1280488146
diff --git a/VHDL/ALU/ALU.cache/wt/project.wpc b/VHDL/ALU/ALU.cache/wt/project.wpc
index f16dd14..75df9a5 100644
--- a/VHDL/ALU/ALU.cache/wt/project.wpc
+++ b/VHDL/ALU/ALU.cache/wt/project.wpc
@@ -1,3 +1,3 @@
 version:1
-6d6f64655f636f756e7465727c4755494d6f6465:16
+6d6f64655f636f756e7465727c4755494d6f6465:18
 eof:
diff --git a/VHDL/ALU/ALU.cache/wt/webtalk_pa.xml b/VHDL/ALU/ALU.cache/wt/webtalk_pa.xml
index ca8758f..9992228 100644
--- a/VHDL/ALU/ALU.cache/wt/webtalk_pa.xml
+++ b/VHDL/ALU/ALU.cache/wt/webtalk_pa.xml
@@ -3,7 +3,7 @@
 <!--The data in this file is primarily intended for consumption by Xilinx tools.
 The structure and the elements are likely to change over the next few releases.
 This means code written to parse this file will need to be revisited each subsequent release.-->
-<application name="pa" timeStamp="Mon May 29 20:28:54 2023">
+<application name="pa" timeStamp="Mon May 29 21:38:21 2023">
 <section name="Project Information" visible="false">
 <property name="ProjectID" value="489b0519ba8b4bcea2b75f67f8ebbc30" type="ProjectID"/>
 <property name="ProjectIteration" value="4" type="ProjectIteration"/>
@@ -18,7 +18,7 @@ This means code written to parse this file will need to be revisited each subseq
 </item>
 <item name="Java Command Handlers">
 <property name="AddSources" value="15" type="JavaHandler"/>
-<property name="CloseProject" value="1" type="JavaHandler"/>
+<property name="CloseProject" value="2" type="JavaHandler"/>
 <property name="EditDelete" value="2" type="JavaHandler"/>
 <property name="NewProject" value="1" type="JavaHandler"/>
 <property name="OpenProject" value="2" type="JavaHandler"/>
@@ -26,7 +26,7 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="RunSynthesis" value="6" type="JavaHandler"/>
 <property name="ShowView" value="4" type="JavaHandler"/>
 <property name="SimulationRelaunch" value="3" type="JavaHandler"/>
-<property name="SimulationRun" value="58" type="JavaHandler"/>
+<property name="SimulationRun" value="63" type="JavaHandler"/>
 <property name="ToolsSettings" value="5" type="JavaHandler"/>
 <property name="UpdateSourceFiles" value="5" type="JavaHandler"/>
 <property name="ViewTaskImplementation" value="1" type="JavaHandler"/>
@@ -35,7 +35,7 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="AbstractCombinedPanel_ADD_ELEMENT" value="36" type="GuiHandlerData"/>
 <property name="AbstractCombinedPanel_REMOVE_SELECTED_ELEMENTS" value="13" type="GuiHandlerData"/>
 <property name="BaseDialog_CANCEL" value="10" type="GuiHandlerData"/>
-<property name="BaseDialog_OK" value="47" type="GuiHandlerData"/>
+<property name="BaseDialog_OK" value="50" type="GuiHandlerData"/>
 <property name="CmdMsgDialog_MESSAGES" value="4" type="GuiHandlerData"/>
 <property name="CmdMsgDialog_OK" value="19" type="GuiHandlerData"/>
 <property name="CmdMsgDialog_OPEN_MESSAGES_VIEW" value="1" type="GuiHandlerData"/>
@@ -43,14 +43,14 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="DefineModulesDialog_DEFINE_MODULES_AND_SPECIFY_IO_PORTS" value="148" type="GuiHandlerData"/>
 <property name="DefineModulesDialog_ENTITY_NAME" value="3" type="GuiHandlerData"/>
 <property name="ExpRunTreePanel_EXP_RUN_TREE_TABLE" value="2" type="GuiHandlerData"/>
-<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="213" type="GuiHandlerData"/>
+<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="239" type="GuiHandlerData"/>
 <property name="FileSetPanel_MESSAGES" value="1" type="GuiHandlerData"/>
-<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="72" type="GuiHandlerData"/>
+<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="77" type="GuiHandlerData"/>
 <property name="GettingStartedView_CREATE_NEW_PROJECT" value="1" type="GuiHandlerData"/>
 <property name="GettingStartedView_OPEN_PROJECT" value="2" type="GuiHandlerData"/>
 <property name="GraphicalView_ZOOM_FIT" value="2" type="GuiHandlerData"/>
-<property name="GraphicalView_ZOOM_IN" value="33" type="GuiHandlerData"/>
-<property name="GraphicalView_ZOOM_OUT" value="25" type="GuiHandlerData"/>
+<property name="GraphicalView_ZOOM_IN" value="46" type="GuiHandlerData"/>
+<property name="GraphicalView_ZOOM_OUT" value="26" type="GuiHandlerData"/>
 <property name="HCodeEditor_CLOSE" value="2" type="GuiHandlerData"/>
 <property name="HCodeEditor_SEARCH_TEXT_COMBO_BOX" value="1" type="GuiHandlerData"/>
 <property name="HPopupTitle_CLOSE" value="1" type="GuiHandlerData"/>
@@ -60,13 +60,13 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="LogPanel_PAUSE_OUTPUT" value="2" type="GuiHandlerData"/>
 <property name="LogPanel_TOGGLE_COLUMN_SELECTION_MODE" value="2" type="GuiHandlerData"/>
 <property name="MainMenuMgr_CHECKPOINT" value="16" type="GuiHandlerData"/>
-<property name="MainMenuMgr_EDIT" value="14" type="GuiHandlerData"/>
+<property name="MainMenuMgr_EDIT" value="16" type="GuiHandlerData"/>
 <property name="MainMenuMgr_EXPORT" value="7" type="GuiHandlerData"/>
-<property name="MainMenuMgr_FILE" value="60" type="GuiHandlerData"/>
+<property name="MainMenuMgr_FILE" value="64" type="GuiHandlerData"/>
 <property name="MainMenuMgr_FLOW" value="8" type="GuiHandlerData"/>
 <property name="MainMenuMgr_IP" value="9" type="GuiHandlerData"/>
-<property name="MainMenuMgr_OPEN_RECENT_PROJECT" value="20" type="GuiHandlerData"/>
-<property name="MainMenuMgr_PROJECT" value="40" type="GuiHandlerData"/>
+<property name="MainMenuMgr_OPEN_RECENT_PROJECT" value="22" type="GuiHandlerData"/>
+<property name="MainMenuMgr_PROJECT" value="43" type="GuiHandlerData"/>
 <property name="MainMenuMgr_REPORTS" value="10" type="GuiHandlerData"/>
 <property name="MainMenuMgr_SETTINGS" value="2" type="GuiHandlerData"/>
 <property name="MainMenuMgr_SIMULATION_WAVEFORM" value="12" type="GuiHandlerData"/>
@@ -84,7 +84,7 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="PACommandNames_LOG_WINDOW" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_RUN_SYNTHESIS" value="3" type="GuiHandlerData"/>
 <property name="PACommandNames_SIMULATION_RELAUNCH" value="3" type="GuiHandlerData"/>
-<property name="PACommandNames_SIMULATION_RUN_BEHAVIORAL" value="59" type="GuiHandlerData"/>
+<property name="PACommandNames_SIMULATION_RUN_BEHAVIORAL" value="64" type="GuiHandlerData"/>
 <property name="PACommandNames_SRC_REPLACE_FILE" value="5" type="GuiHandlerData"/>
 <property name="PAViews_CODE" value="19" type="GuiHandlerData"/>
 <property name="PAViews_DEVICE" value="1" type="GuiHandlerData"/>
@@ -92,7 +92,7 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="ProjectSettingsGadget_EDIT_PROJECT_SETTINGS" value="2" type="GuiHandlerData"/>
 <property name="RDICommands_DELETE" value="2" type="GuiHandlerData"/>
 <property name="RDICommands_SAVE_FILE" value="10" type="GuiHandlerData"/>
-<property name="RDIViews_WAVEFORM_VIEWER" value="100" type="GuiHandlerData"/>
+<property name="RDIViews_WAVEFORM_VIEWER" value="110" type="GuiHandlerData"/>
 <property name="RTLOptionsPanel_SELECT_TOP_MODULE_OF_YOUR_DESIGN" value="2" type="GuiHandlerData"/>
 <property name="SaveProjectUtils_SAVE" value="4" type="GuiHandlerData"/>
 <property name="SettingsDialog_PROJECT_TREE" value="1" type="GuiHandlerData"/>
@@ -101,7 +101,7 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="SrcChooserPanel_CREATE_FILE" value="13" type="GuiHandlerData"/>
 <property name="SrcMenu_IP_HIERARCHY" value="2" type="GuiHandlerData"/>
 <property name="StateMonitor_RESET_RUN" value="1" type="GuiHandlerData"/>
-<property name="SyntheticaGettingStartedView_RECENT_PROJECTS" value="3" type="GuiHandlerData"/>
+<property name="SyntheticaGettingStartedView_RECENT_PROJECTS" value="4" type="GuiHandlerData"/>
 <property name="SyntheticaStateMonitor_CANCEL" value="1" type="GuiHandlerData"/>
 <property name="TclConsoleView_TCL_CONSOLE_CODE_EDITOR" value="1" type="GuiHandlerData"/>
 <property name="WaveformNameTree_WAVEFORM_NAME_TREE" value="42" type="GuiHandlerData"/>
@@ -109,9 +109,9 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="WaveformView_NEXT_MARKER" value="2" type="GuiHandlerData"/>
 </item>
 <item name="Other">
-<property name="GuiMode" value="21" type="GuiMode"/>
+<property name="GuiMode" value="22" type="GuiMode"/>
 <property name="BatchMode" value="0" type="BatchMode"/>
-<property name="TclMode" value="15" type="TclMode"/>
+<property name="TclMode" value="16" type="TclMode"/>
 </item>
 </section>
 </application>
diff --git a/VHDL/ALU/ALU.runs/synth_1/gen_run.xml b/VHDL/ALU/ALU.runs/synth_1/gen_run.xml
index 4be73d3..1dceaba 100644
--- a/VHDL/ALU/ALU.runs/synth_1/gen_run.xml
+++ b/VHDL/ALU/ALU.runs/synth_1/gen_run.xml
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <GenRun Id="synth_1" LaunchPart="xc7a35tcpg236-1" LaunchTime="1684097307">
-  <File Type="RDS-DCP" Name="ALU.dcp"/>
   <File Type="PA-TCL" Name="ALU.tcl"/>
+  <File Type="RDS-DCP" Name="ALU.dcp"/>
   <File Type="REPORTS-TCL" Name="ALU_reports.tcl"/>
   <File Type="RDS-RDS" Name="ALU.vds"/>
   <FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/Test_Alu_behav.wdb b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/Test_Alu_behav.wdb
index ba34593131186ec1c85d57400e9a5ca188e32fe2..10d13baad4027e5273667ee649a4bad89eb2b69c 100644
GIT binary patch
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diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.log b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.log
index dd78853..a57edde 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.log
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.log
@@ -169,3 +169,17 @@ INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/
 INFO: [VRFC 10-307] analyzing entity ALU
 INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd" into library xil_defaultlib
 INFO: [VRFC 10-307] analyzing entity Test_Alu
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity ALU
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity Test_Alu
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity ALU
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity Test_Alu
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity ALU
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity Test_Alu
+INFO: [VRFC 10-163] Analyzing VHDL file "/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd" into library xil_defaultlib
+INFO: [VRFC 10-307] analyzing entity Test_Alu
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.sh b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.sh
index c6f28cd..9edc23b 100755
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.sh
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/compile.sh
@@ -6,7 +6,7 @@
 # Simulator   : Xilinx Vivado Simulator
 # Description : Script for compiling the simulation design source files
 #
-# Generated by Vivado on Mon May 29 20:22:53 CEST 2023
+# Generated by Vivado on Mon May 29 21:15:03 CEST 2023
 # SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
 #
 # Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/elaborate.sh b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/elaborate.sh
index 96c200b..b9be3bd 100755
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/elaborate.sh
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/elaborate.sh
@@ -6,7 +6,7 @@
 # Simulator   : Xilinx Vivado Simulator
 # Description : Script for elaborating the compiled design
 #
-# Generated by Vivado on Mon May 29 20:22:55 CEST 2023
+# Generated by Vivado on Mon May 29 21:15:04 CEST 2023
 # SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
 #
 # Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/simulate.sh b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/simulate.sh
index bed3f56..c5fdfac 100755
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/simulate.sh
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/simulate.sh
@@ -6,7 +6,7 @@
 # Simulator   : Xilinx Vivado Simulator
 # Description : Script for simulating the design by launching the simulator
 #
-# Generated by Vivado on Mon May 29 20:22:56 CEST 2023
+# Generated by Vivado on Mon May 29 21:15:06 CEST 2023
 # SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
 #
 # Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_0.lnx64.o b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_0.lnx64.o
index 606b1a82f3b98bcd6bcad9830f22b8f8975ff916..e5329d0a592b0604455b91afa3a8fbfe86643f8b 100644
GIT binary patch
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GPW~4YQ1gHQ

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.c b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.c
index ef41977..7fda4d1 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.c
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.c
@@ -55,8 +55,8 @@ const int NumRelocateId= 6;
 void relocate(char *dp)
 {
 	iki_relocate(dp, "xsim.dir/Test_Alu_behav/xsim.reloc",  (void **)funcTab, 6);
-	iki_vhdl_file_variable_register(dp + 3800);
-	iki_vhdl_file_variable_register(dp + 3856);
+	iki_vhdl_file_variable_register(dp + 3576);
+	iki_vhdl_file_variable_register(dp + 3632);
 
 
 	/*Populate the transaction function pointer field in the whole net structure */
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.lnx64.o b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/obj/xsim_1.lnx64.o
index 72ce8da024739323340d74c3901b546cd85eeacf..f444053d1974760e790c2d2ebf282de4623f09d8 100644
GIT binary patch
delta 25
fcmX@1ctUYP3f~W228I_5K;Y4M*nn?iQJ4S#aZd;p

delta 25
fcmX@1ctUYP3f~Pr28I_5K;Y4MSb%?HQJ4S#Ze<78

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/.xsim_webtallk.info b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/.xsim_webtallk.info
index d5f5ce2..cc7f38b 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/.xsim_webtallk.info
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/.xsim_webtallk.info
@@ -1,5 +1,5 @@
 1685381189
 1685382347
-69
+79
 1
 aef36ef3a0d94dac9e6058b656907afd
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/xsim_webtalk.tcl b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/xsim_webtalk.tcl
index 3e4dbde..e95b256 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/xsim_webtalk.tcl
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/xsim_webtalk.tcl
@@ -1,6 +1,6 @@
 webtalk_init -webtalk_dir /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/
 webtalk_register_client -client project
-webtalk_add_data -client project -key date_generated -value "Mon May 29 20:28:58 2023" -context "software_version_and_target_device"
+webtalk_add_data -client project -key date_generated -value "Mon May 29 21:38:21 2023" -context "software_version_and_target_device"
 webtalk_add_data -client project -key product_version -value "XSIM v2018.2 (64-bit)" -context "software_version_and_target_device"
 webtalk_add_data -client project -key build_version -value "2258646" -context "software_version_and_target_device"
 webtalk_add_data -client project -key os_platform -value "LIN64" -context "software_version_and_target_device"
@@ -14,11 +14,11 @@ webtalk_add_data -client project -key target_package -value "not_applicable" -co
 webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device"
 webtalk_add_data -client project -key random_id -value "48ade6b1-45bb-42c1-b620-33b3e004d501" -context "software_version_and_target_device"
 webtalk_add_data -client project -key project_id -value "aef36ef3a0d94dac9e6058b656907afd" -context "software_version_and_target_device"
-webtalk_add_data -client project -key project_iteration -value "68" -context "software_version_and_target_device"
+webtalk_add_data -client project -key project_iteration -value "78" -context "software_version_and_target_device"
 webtalk_add_data -client project -key os_name -value "Ubuntu" -context "user_environment"
 webtalk_add_data -client project -key os_release -value "Ubuntu 20.04.6 LTS" -context "user_environment"
 webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) Silver 4216 CPU @ 2.10GHz" -context "user_environment"
-webtalk_add_data -client project -key cpu_speed -value "800.000 MHz" -context "user_environment"
+webtalk_add_data -client project -key cpu_speed -value "900.000 MHz" -context "user_environment"
 webtalk_add_data -client project -key total_processors -value "2" -context "user_environment"
 webtalk_add_data -client project -key system_ram -value "134.000 GB" -context "user_environment"
 webtalk_register_client -client xsim
@@ -26,7 +26,7 @@ webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command
 webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage"
 webtalk_add_data -client xsim -key runtime -value "1 us" -context "xsim\\usage"
 webtalk_add_data -client xsim -key iteration -value "0" -context "xsim\\usage"
-webtalk_add_data -client xsim -key Simulation_Time -value "0.03_sec" -context "xsim\\usage"
-webtalk_add_data -client xsim -key Simulation_Memory -value "122620_KB" -context "xsim\\usage"
-webtalk_transmit -clientid 1496851547 -regid "" -xml /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/usage_statistics_ext_xsim.xml -html /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/usage_statistics_ext_xsim.html -wdm /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
+webtalk_add_data -client xsim -key Simulation_Time -value "0.04_sec" -context "xsim\\usage"
+webtalk_add_data -client xsim -key Simulation_Memory -value "122616_KB" -context "xsim\\usage"
+webtalk_transmit -clientid 3933579741 -regid "" -xml /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/usage_statistics_ext_xsim.xml -html /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/usage_statistics_ext_xsim.html -wdm /home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
 webtalk_terminate
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.dbg b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.dbg
index c0136c083542375806f1e749474cab4a3503af5f..e76987679861374c14e2f9be7a3f63f01ecd92de 100644
GIT binary patch
delta 317
zcmbOtw?uY=NaC)aB`IJ2|Np;(fq~%$BM>t&Ff_0-FlcZ91voKr1W@b%5KrKR;1@vJ
zfscV<1{8y|fv_MHb54H9D9joH<Rwk)z0MdjIh9eFvmD3;+QHy7c_O1Urz4QX2E^VV
z9%I<#i;TgHoRd|V+<~fnndBMEC-(wLM=%*S`7DzPQ-l5F&rE6{N}3r=IYX#y2sIf(
z?S@c~!PI7MmQu#eD_B=BO|Ia$F*$?NRL;_fAty60H9p?Z&=SfrGleoN%qH*VOy8`<
X)y2XY19Th6#m<v=@;L+D2lNmCQC3S2

delta 395
zcmZ1?J4J4SNMgg=l9Vt1|Nq~?z`$^W5r~->7*?<{FjR0bFl2CI;sZc211_LqJ_wEg
z(i?!7gCB~4!a%JILQu>#`5~h)YcP<PHL>?PW9Z~mMrF=KAQxx{gX83hjMAJ=Ko%Pi
zdx3b2;gc^i1~YO^R%LPrs`h1)XH1;j3nZPuWccK>Oe#zVCQSa!qz0m-nZcAZgvy3c
zlOfb@2=y3DZRTbvWmL2Pxf%#Opfu34V2}W%1vgi+u4j@>f^tEwvIk-TAO<M~h7SYh
zWLb{KjQo=wIfN(w;jommFlETe%u9`rw={<`%*>z+3v-6a!JO&rMXAN{xurRqcXD>K
Vu!aK7NSy4;=gb-cWQBu*2LRDDRM!9i

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.mem b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.mem
index a04b33caf19a17ec165bf8e15862dea5cb235106..6b342b8e7e915c616d7aeae40e77269a8ebb608a 100644
GIT binary patch
delta 1600
zcmV-G2EX~o7o8U(00000000000000000000ARGVy00000_!|HK00000s35U14+W7x
z50gLzTz{wy007t}00000008X;00000004La?O0!L8$}R5+i_AOArSDu1Bh#clvFgn
zI4V*41Qv;uND%}jX{!ok9D5UAYu}l>a}rAkDqeW)GvWb>7m(l)sb7Fs#20}Uz5vW`
zcgMHqe{mcqO;JbQo0*;2*`1la@!ne2>EK@jFn<y(W6<`i%H9=))H7|RO?DWa)-X(G
z92wSwmK$d<je&0rFaeq|=*#Z+3s~$J0N)re95iFlm)-BgK0Jm0@Qs1}WsLp-ey2_`
z#aOE2`ooj4Pr&RCWAr_GMQJ7+Nm~h)ZA}tC_p5(2krM`JfMyK(dA|C`ZQS1T-iKT_
zUVk<hn6|PeJB;T4N5;c+`^g6R_Z{t}Rv>KrQKQXL!~T*s^7*{P^nl)MFnjGqqBGRq
zq1MqmEC<9U;0@xSX99}J_ReZ)<HN1p9aCV?ZxU^e!x$d-(e6&qK&;CqSR%bCYQUX!
z39m}5hLi>?l};gwDJzxA0EkFurn1vBl7Gk&NMbrWt%#Xy79t+b_SBieERZ;3D4wH9
zQ>D;2YgACv8Diy}N`&Q{s58o(GHet&@`?;9ujEwHNjwbE2s$Ipsg-C#35I(aa*J9V
zw^4LPm=i{&;a*+otqg8|+0+18yz1U@yLT1~cW-a5FT^5wmNfHjhz67N0;bK4ZGULa
z5Ir69wCk{wpAC?Of`Wl~<W2)ua=CP-|9~0lo@SAi%cgQu%w1}XjG6KH9vvEFoqBs;
zpuQpBMQWWoHGfzhzIX9fb8S%u<65J5X}@sYzDg`={m0Zg_V?SJ&j8kYkL0j{0%_`f
z;5XZWdr*t)pX{Z@#T9#FZEY=Y7k}$@TXu(bAVLuwifUfw9RCAo$UlHF+wA5OO3;P^
zRS7*5ZYnT|ZXGTq9i3sdSeawL*?f};V2aPf*Hj1egkARVKM3<Jjit04+7kD9Ag2Jt
zo_&`cU5}@w*R_mimVKo2#13o`fjoUl4dvC?62wgk@P8hId6xR@Z)97amw!m5dwri!
zAJ+5@HB|MBSf6><@yB1o*LS4X^pG$PqZhHhPBEhS<{$T8AKpU}TWfkv-x5w{0n%Q0
zTJP7W^Y*Uz|JC!7b_d@%$n5*CC;clDi?hxT8lTsGgWY3ld=e*8!h^2;2Dy1GTX~Y)
zkC2<Eu_t}x=11I*UG)ItjeoP9Rr@DtUoMIs-Eq35$Nfwgd+Q?N#Cw>gvmX4JTqkNC
za*K8R@)bS0;8)_`B4J4FH)>bO@vo^pruHcX_;+e^6v*SyZRD$N;OvMnDi!Ok(w?Z5
z4;|SbwVT2Uqq0{m2URN)$C2w3UoF-B1GiEt6qauoY&meFn!&fc(0@JfMAh<I4H1w&
zjkHRU-?VrxtL}QDR9aco#LXp56bd&j*Tc*ep}UsfW$k6lsre1zl<VT2XnDd}^(!=k
z7lqCZa%6kS*$Vu7BGPDKyB$WNA;N_XZ{H6Z<;eZKB|_)c`s$`r+}uUWhe0KDC={iF
z<B20F%OBRNmU9%`cYls+)mqi__wKivOHRXYd2U5VDD+!FMaW>4*4K)wPPH7B9U547
z$fAQ#;m}5eis2+}s&q`iqAP^pWtypl>G~NXFv#}8o?mV23C<~*GBu%2C~`c3e6~Hm
z8MZ^G;y0RZUF`T9ePSoygA1FD-?9lz7$?hkV|9|w^d9szY=3NlMD5~_30%aS>0St>
z9&MBhol$hu9~0HhiQniLF7s^^->SqSO~scZotu|fM~{*pr&RP)J2gRfiEc<AQ1;yJ
z+!u3qsNJS^m)gRd?Rt>N4cicrTe1D72&hzDx1*ZCmu0IS*+(vYZ0-r02G5J|TE6pX
ztZ&gW3Tu?kD1RdEl~g9p-Ab;tpsnOQjPAucw{w#vPO^JedG~6&?RE1f>7Q24`g$Io
zjsvU2)GGyN%?HLyTgp7LHo&e_zyorPc#}x1`>{Td5)49-WS;v7%OCT4K!PQW;k=&5
ym<%K0F+?dwcj@_!?#_CYDQ4yV)q~hZ!Y<1g>*29~dJRo%uvcE7qV^wd?v{Pv6b*v_

delta 1642
zcmV-w29^1p7snSO00000000000000000000P#pjO00000C>;O*00000*deho4+W7x
z50gLzTz`lT001~A00000000*T00000004La?O0oH8$}de+i_BZ5D0_>5}+YMxDkyv
ziAq|YP#}>KDT1IRw5pKI#yg3(UGJLRbrMU6%M-6Wg2Y3GctO1Kzz^V+|G@*4!XJS1
z&BZ&ucI!Boq8{n&oSAc(bD5dl9m{$+_}2hvqJOJf(Cj&B?~-ifGjHY1?kGC1V3f=_
zJop2AVjN}CL2Mde0<>;HU-Y=2gtKD+V$%S1(7FYE(c><S5wjVe8Lv4$B<|dp(`8oc
z+E<yiQbEL{0i&RG3;LI5rEFIqd8?}{B_{iP9M|A{q9z(30a~}9AJ=Pe-o_n0?RBWn
zjeloM2lH0Z?2e-K`%$-}WC!uiDZb3-hmK3PgJKvpHY~pHXs@&)&hQ}uoF&Bm5w<Fo
zifHKpx!GuT?kS=Rgl`ab<PM#Px?S)R^&n>gg5BO(t!})xwYy_74EklFO+Dynz4v!_
z`V`?8BUmE2DMGXzzj)wMS3ypJmCNUl#ebZY%M}1b<O@^9=@~&32?Q}+oR-8)u?Ut{
z*Y+$6?@+UVX<uiPrpf_z)#!zhFHl#^DOqsmfihX<6ltT>QB-75MkS^aLE>SsGRS0_
zQwh<80*vqq6c%Bcw=6Ol=7dpUxL;O8E0Q~yH#LNpdfl(Ldvjs&){V{e`IOaHcYlL5
zoTLqyHy5@cIYabx+NV{AmHcRcI4EcnU>}qo1}>FK`NCj@85*9}EUQ$^m8Nv>Lbs@x
znUA{|P$15!*Y-KiH`IHDuyambK6FN}UF_;%XN{ad*k8QDUZpP1`VUO|`|Zx}otAr>
z_&Bd{Kz95fxp%{6JMs?d3Hy;PEq^RrXB%s4YZbQQ`%DbSEaEYb4!K(qHOG4Zi24I`
zt8Mo7yM!PO0Xij=D#Dat61_6|DCx+II*X+_9k({$)C5|JyZO8vfE;H|fcGHGw^S>*
zPRv9*;DMR~kb51w80dMNmt2n<k8JlFRVN+577?h^XM{LjjU_?7NdeyHDSw#%&R^U|
zwbl0$iS+unOJnfqD?*&=XW?IGv(tR{{~Ya~qkQ_BT6}Dug@5Lq%lf^+{$U@IJJy==
z>04^Ms{n34oY(%!I&Z(n|F4m!RXF&MLuH3W*DJ?f?3R3oy7(sgUbUySE@AhW5Npd^
zU&lS`5<K(sZQ-x(bql`v)qnQ;0KWM%d$;G@fWGk!Xnp*5w|!y@fSg`y7<l2I!E(L%
zyg{<C{}Unf&my1ZKj+pT-F||HH2^<;_?#X+@H6#aA!bDQD<Px6za+dz_z@N2H^SE`
z;m5JpsJLEa@9;ROuK2C$9<Muxwir*^O>V`B6Sz*~S_wZ+ypZ~C)qf8Uyjpc}arvsz
zbs{gR8~s)gdj|n`t)SK55y_LLRZYUCrRTDIFW}Yc^#x75sff3(SzdsNYg~;iFKd}=
zmR%1U+;)6^o3{dPuZA_6AV^~SD#fwAWN$^`ZJwxRe!Cqfyusu7jbJ~F8cyPU(&DlG
z;ri;Py|TFrti(|*wtp!T)kQntM}k*5th<(d6y33p>u%i*!o54K=91kATY*<o35vs3
zRO2F7)%CTNRoitE$0kMJCW|&Qg>OJ2WC|x~Q&wXF7Cp|ncGIjZO#3Iyz%bkMd!gG_
z6P!{pMQLJHP}Fz=^=t=WGj7LrEo?MBpYMbl19B&}!I{mbH-Fg#CQOTEY*<yK6YYb6
zhK(iAeRS!c6I|?^=$;8jJuu4!Q5G5b0;6+t;x|M_$oh6m-_oQkMWvT5otvCgMrk?G
zfjkjexX;2v9{Hi;a+j6q7%H={$s;ETBj(V(We_G1O6r`&PJ=U_2M2VDci!h&5|cq@
zs7GOx(V+=n&wmYd=s3GaYTc&k@7zs}Q$2A*L2v5ZPMuR>yqNx?S$VhoY56AM4Z>T5
z^JV4*;D}?U!4t103mUjrL>1|Jq2(v+$fFyFJ<dq^GLPpfo%<1Wm0FOkYVrk1q@#i=
z<n^%RD=A1zzE-2l(asg^$%qHpIVr!_yJ7a!xMu4>dpFf(AL$@TdI))BLlUwv85oC@
oZec+8r7`ss2B0ZK<)G4&+EA1e8pF~7<p(U|n|qG%KZ&LN>n7M9aR2}S

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.reloc b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.reloc
index b47024d53dabb346ca315b64bfe820bbd88df06e..328b55c7caec3b0484af5d6ebf37e4cdf4fccdeb 100644
GIT binary patch
literal 378
zcmV-=0fqi@0RR910001Z0lkwebAwP2h0`~E4x$g*n#f2b5}BWXL?R<Akw_#G8Hq$9
zk&#Fw5{WF^{kGFmog%X5yUWboJvmJGtFLGMpw*{F)c#S=_ZM0RIJi`Hp0t**3;S1k
z?!yHfz#B*V5uC#@yuQ|c3MX&|PjC%~H~M}9AK(%8ZnZzbdwBD#=OgUH>7AbEaLwNS
zi=G=F7Myt6H@|kU`IW=wR{@(}HEe!0u=&-)=GOq5U(T!EZ+^M3`4z(E*A_OvK49}J
zh0U)DHot1v{2JgE|3)|>XW^U97czJ9{+kcvEaSZvwj8$P%=*nDhYdNie!a+Hwa8tz
z$XQHoELQ=!upGJU^_?5$uc#ya4jy3hMYsL?JF;gnw+40+-7~-Fj@d<5%q==&X3;V8
ziVnD2w2S}ctpEEd_=e=(fbZpG)*bqE)?5DXvsv%(?tIoYJBvLzJBv=(S#-$GqCIvN
YeT*kyHkWxzc34s4AG^x^pD8F)JOpLJE&u=k

literal 400
zcmV;B0dM|@0RR910001Z0lkweaKb<oMf)%P$F$x4W+IW5k&#FwGBOg0L?R<2BaxBF
z$jC?}GIAxd`{te3p{Z^o*n4&t^6s6>_Wnqp2VEl8gtd9p{q?!7Eu35^_izP!`16wA
zd(yRp9XuZCegYS83ddJ^p20bs!+W@d(`&t7!5!Se?nckI@ERUH>%NC0czLV)bGXD;
z<aFP-9`NKv&n>ShY<bOL%WDB!UL|aKRj}pNz?N4FTV6eEd3o6KieGg;%WDi<UNhM8
z%3#Z@fGw{Qw!B)nCBF`y-RXNhyoUF1LJuczdM{?~^8F`w^swMw3tLZHdT8g(pr;Kz
zwDZlNr}dzht3eMldS$&!=#BL(!ngG*{?Pe%`0#eleh+`=Hpof8{rl77y9`G?9!2l)
zBYKM$(Y5_wf?k=2pfl!|I|;Lhj+mng+8^kE|N1QW|H(_8(^nsdWrIEmdP)~ggRaQ=
uOzz-cqAKt&I>*206#t?f{zZ3q7X24b&YX_fm-yM?H$Ctz@BacHK3JwMcG2Yk

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.rlx b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.rlx
index 5238f39..354a0d7 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.rlx
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.rlx
@@ -1,6 +1,6 @@
 
 { 
-    crc :  5165304247125619484  , 
+    crc :  5457071051479180310  , 
     ccp_crc :  0  , 
     cmdline : " -wto aef36ef3a0d94dac9e6058b656907afd --incr --debug typical --relax --mt 8 -L xil_defaultlib -L secureip --snapshot Test_Alu_behav xil_defaultlib.Test_Alu" , 
     buildDate : "Jun 14 2018" , 
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.rtti b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.rtti
index d50ef2968ff9d87d07010a90b86d8bbc956071c0..75a29ab41bb190c66e4d76219c6ff9aba18d4730 100644
GIT binary patch
delta 15
XcmdnTw2x_m6ieBaT|YO<DKG*6GIs_X

delta 15
WcmdnTw2x_m6w5ZFhPNB#6c_<6aRqb$

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.type b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.type
index 447f7a9a76cb0a1ca1b544a0a7d2c1bf564b65f5..9ea3acfe1b2af2b7e7b7f18d77d58230787e0c53 100644
GIT binary patch
delta 14
VcmZp$Xt3Cj!^ik<b1vUxUH~ce1!w>O

delta 14
VcmZp$Xt3Cj!^ik%b1vUxUH~cS1!e#M

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.xdbg b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsim.xdbg
index d2e1323b444fb22edcbcb69d34aa136d3ef12cc0..199a1306208dc7cc2cd21cab368af975539dce50 100644
GIT binary patch
literal 1936
zcmb`Hy-ve06oqdnKjo(-EP!AMlz|bX4vYvP^#NESCWZov1gHZ8kHLb<BQP>Eb!6l*
zm^#CPxW~x}8GJS@o%s5G_O*{KB`<D@yN4`4D{iy=^kk479NOFW{qWe#(!}g>;ZJLx
z>${q*-54O|7=2nX#G6&@B`s^jJB@g^5%;Q?^)N)tG5Y_gj~aU}Hk^-b7Qt}PLifCZ
zuNgR{_>9ki6h}cwapbAk{&UVDwSL|iq_{t+L2*6~ejSHBUMv4c)dMCrZqYx^5aaZ(
zIQ=V5?}{T&#rCIvwVwXtd|LZQaB*3_|JS+?yd^fR{VPuYiX%_O>eIhkPw$G;zvA>C
z=fP(9U|xDv`v2H2^L%^siqpU1*cVcq{uQTx#pz#h<f)iH$DyIlr1Jl=Rp#KE4SaN6
z-p{+>lg>G;+Na>7ZpqvA{r-gcScCd$?<tJ;8=P;TIPYI^6oeG#{VUG<R~&gNc7EQy
nTF?Ky;)`A%Qhdo7r1-KkNbwbCkm4O@km6lukm9S(pcwxJ?PPle

literal 2456
zcmb`IJ4ypl7=>>%zF)z{hzjumwi;Z3gn)%8g3Xi`HUX6s7Aaju7T}|>$r7>zOIKhg
zxCH+*GiUN6|LMGNGXK5b+{d{mBw6pS_b_N>*S-5z*6p0Nj*ipQ_v7tpN~u{(X}B=a
zx{Y;BzRkN1YWDGLlniyVtZm8Ea`mpO_guYS)?5!=)a>K=AM0a{0}~qRle|g^=VYs+
zcpgsUF({3IQ;JX7JCNd75K<iDRJ8w$aY)UdH3lg@XAFvYJ0CWj?=dR<H#ac?@9jGM
z;|vj}f5quvaU1|r9OG29KmDuu^dIw1<sav~c`5S$+^~+dTIy8(6{mm2>0fdBSDfAz
zr+>xiKjwu`eB!;vYvDib6ywYuPsQn9aqJ5zPXCJ2zvA?-IL4{SpW(b=opI@Zv{j73
zHye2Wt+<~L!N(Wxu$q1Z?_U<Yv0bcMOXt=1FW>+0E1!SlI5SY3_pdnbUvb{Q;=F&w
zF;0zx^YiZ2eE!}mZhuV)Qhd=Er1+9CNbzN3km4)GAjMaWL5i;#gJN!=Y~WYr{bg1D
zlm8#Zeg4sWpMS)C{t@^2M;zy(BJT5#xX(Z0KL3dO{3Gu3kGRi2;y(X~`}`yB^Z(0#
E0ru9SQUCw|

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsimk b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsimk
index 0106c9707e8d690b149b6e0c131bdd18120cc2be..c04547e3da15770ccfce23720960451d0649f5fc 100755
GIT binary patch
literal 48432
zcmeHw4|rTvnfFbTLWGh@u}Fm~Lm8GLkfyajE3i)5w4J&EvQQwb)yX6?ZL&;~VP;YS
zUzeTQ6cf@w^eI@~x<=`0*{vGg%0{RpEVWd(YV<?xDoQ^W*%{l_$RDj*neX>|&pCJQ
zoy=sayWjKeK2I)8&VAo=&hNbEec$t*Klje`uU9v$nN?P1nXBCTQ;XF2LdEgxjL9$Q
z8zg>fxpg-FzRg--odLQ+cq-qo66C6@ZI(N&)ckU!thZO^=cfyFIg=U*nX+E7YxvD7
z$D~%ZqFHY?Z@v73%PW8F^h*&%o77oP+8fg4^U_KIwJei5>rpq&yH&mBeeTqBqSACm
z%Sm;xUQE}E>3Sxu*7`E3(I;W}IjHmV(|Y9bGAYaQYW!(3%=={@5^_rVf?``HHTC`+
z^(g1*Ub=hMExNs8dKso;;4&%g#%po3z2%x^i=*MIqV1jCJy-QCzvilImenM>YL-gB
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diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsimkernel.log b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsimkernel.log
index e52ed84..df04d3f 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsimkernel.log
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/Test_Alu_behav/xsimkernel.log
@@ -1,7 +1,7 @@
-Running: xsim.dir/Test_Alu_behav/xsimk -simmode gui -wdb Test_Alu_behav.wdb -simrunnum 0 -socket 59047
+Running: xsim.dir/Test_Alu_behav/xsimk -simmode gui -wdb Test_Alu_behav.wdb -simrunnum 0 -socket 55247
 Design successfully loaded
-Design Loading Memory Usage: 32684 KB (Peak: 32736 KB)
-Design Loading CPU Usage: 20 ms
+Design Loading Memory Usage: 32680 KB (Peak: 32740 KB)
+Design Loading CPU Usage: 30 ms
 Simulation completed
-Simulation Memory Usage: 122620 KB (Peak: 179956 KB)
-Simulation CPU Usage: 30 ms
+Simulation Memory Usage: 122616 KB (Peak: 179952 KB)
+Simulation CPU Usage: 40 ms
diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/alu.vdb b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/alu.vdb
index e9fefab23cd2296eef0d38ef2cc4c5d569d107a5..43e296bbd27e6741a402430268662b22930d8543 100644
GIT binary patch
delta 1805
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z?%imc4eZG6z)8c$x2B4}bep`2DZMf5!6SJCW#fJ^qrJxC5{U`Rz>mhuc+0BepeZJR
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zkZu8IGxy%kz2#1YedKM9>E5K#k9RpOn%*Q{a%>#%y#I&pfWBbcCwz}A!1t?o(}^)%
za>>F8?Ll00%2@U5`XcLu50EYDqu~{?&(pNaa`KDV@I&O?X)%LETnbtPi}ASP1ue1D
zgIlnKbA<*D`ZELZmk<?0Z25m+dr-%<!VC@vs<THPJ4%kyi~P}_Mx*#Q-YeCyCzuKQ
zH~i5A$TqR)8a@b`P_<cn7`%X2N@e^L)^LvP7fP)<Rczi3)9f(@=Y@$;NP~!UxL&%O
z=$Hr}!e`+uP8QQR6h0t0uZCruiE7bt#;}|)a1zcaZM37wZT$kJm!ZU>YZ->GdhB1+
zjzV-JH6D#+?;&akjhBVS+oGQ0%Y0UEM`d)%we7r~6~^D6*N`oWlR^9$O*Z-or8lWf
z=@r-4s24_54rYJmW9Pq=TaK)=ess~$t%*jT8VqBQs5-hf-M}}A8Y@DLONkmQOpS`T
zajS_8gq~vMO6%rL1qaGK9ap(>`zu+iGo)CTfjc-}DMr#uD1Up>68EHon(H<QeP%eo
WRgtK4q9mPRlMs4!z8H(wQ~v_EE^@vA

delta 1513
zcmb7EU1%It6rQ{5ZgwWw+3ek!*`1lJv)gvpl5Vq!CNWJKdizhB4NB9pNbm<L_);kP
zAZjhy#0PyyRrnyb_+S&Xqy>wmw1QBqJ_yCXq9O=ZET~WlBKjhztmlq9lTGN01GATV
z&i9@3?Kx-8wc7c;20!XWRYf_Y&?A0&!HXtt-??a9iAQeV!DsQ0Sro5zJhDY>R+MWy
z2*T*?czI=EeCd_t;1r8dNuH%&ab3YL9n+FLmhe~vGl}o+6K}PV6(;^j5|DC+0YyVz
z@MWgIa-`jSqV1BR6!H;Ok|2B!en_}%2X+=mJ0jv9!tTPDx_Rp^LP?pd!5ZRonX4gv
zfpwnEi!VYeURO)$JuM#{K6Ve9=`1|$f!IlQQhbHFHXb|6&Wf*bS}U+PKG57Wn`3k0
z8;V1JXoTYLM?o{$<ESQGyrE`U7y9))w9XQq(TDJEDj9o~P!o8f>wY$YbDf?((aI`9
z2R_j`oGu-=^z#3sXwZ`?_N4}6zAVh99>WE)$bi?AI^x~WVoEPzp69Yb+k(^Yhr+Op
zyEw*GT-8;)pXS!_1eIffL?37?kA*&7ZiitcrSkyMB&2-ABA(|PTGczlJseBMF~BX1
za%T<s&o=UZR3fhs`ANLkUBcna5Kd%7tU)R!;if&zWwxVgT3ATyh-9j06k=K5OYF5x
z2Wpuj;=G$pVkYTmlP!d>u+zw4%+&BGS2KZmbz0t$#5D68zS>_(uRHkF%;6?4;<#1e
z7Ky3_L1hnX)Z9KU2Rk%NX*C+`L4BPmZIs>6bQj7^W7B#{%G|_iIA@gCJMNCf5sPE5
zX%c6~EEuAfq)Y`>@@H-e|CoJP%vO7Dbhjoy1gw4~xRw12PiISDc9s2x0o%ckSq+En
z-|>B}griOs{kF;;!l>=yLuVM5tr2W>hjE}djMHuo`<)WLb#46Z4&u3<?PMRo&pqRW
z8^ClvkBe>*+wQI4LVjbUV4|6~a}UNyj}&}xjo^cLD&LFcLIodr4*CmfMB(_<vvXSl
z{PY_9G|FBt-YiyTWv>FC|A_~e)waKvZPg%jg*Dh6gg+F9f13gZw`P-eK)lUBC_hO6
zh~ku$VTa_VdRP%J$vwGD@Omp+01xhLi7km6a`Y(fP#ci>TQh+9De4fNhQWl~o1sH)
Q$2tldZC1Z@YQswOU)lFpmjD0&

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/test_alu.vdb b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/test_alu.vdb
index 3cffd616efceb1bec7c35a7fef3024638f8300b2..e67c615d9b858e6f2afe1f04f60fc1f8eda43e58 100644
GIT binary patch
literal 11866
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zV$bN!<J-f;*j+<=CPu^b?(yj@GpkPQ`q;nE3OkG9<f(XtJrZH|&~q!#U;DP}hJP@(
zIJ{x={QmZEduFM<^4jxP59=T6YtJ1!y#GjRere&+#q-W-&&|&rX+OK^oFj7w7M9iz
z$Dff+!%O=w8Ezk0oSQ#3v#@q}Zt>XMfw_aN;ko&RL&GCBTpe^Mi{f~HUs;6fWi);L
zvq#!P+owji?--rlz3Dr<ZoTQ1JHJ_Xoi#Z&eb@N(^REy5apyhX`i*A$!&j^Bf${P2
zv6as~-)@I(WAB@s2-~N3Kk@zcLu<eHqrS?oPbv0*-nuufzbFP|28)w#jib~-=^q)b
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z8x*1E6TJ+IF^5Vitf7cFy~3@FLp{BmknlDrLMxwM2E~{|_lrZy6j4EK%erRFH2tLl
zZ-XK<IlV$lW)5Qx{f0OsD5AGa@ir);<9v@XhaT`ygh1`s$$M(+%kE9*d%O*bI4tq>
zvP?1N(1YTTGDR4)dQV)F;=o42+n|V!^F78KI_IH?IKBFEx+ZH16mNqfPH38PS*93s
z=p*8gGDY-Ok?=Ms;$=fdD8?N6sD~n4dajvginl=#uXrfN9D2w@5xr%Kw?Ppdr(TRX
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Qm+fAR4jOyc$p2OTKdX)05dZ)H

delta 699
zcmYk2ze^lZ5Xbj<UbuLuaM`!J_iK;%UgQFIA)3NsSGXc5R<Q{Q-W_r#sECCrYy`y+
zNFxgITPRj)qu7Z>uu%LD0zoh&RUkG25p6Bv%*H1-&G7lY`OeInpS541otiGh9$MC>
zMN#=PSBNDRF81wYtYzWi;Bjm+&Uq=Z*UGuC{bO9T9vr5Yg-6xfmUZ%)Y=XVSi_G}q
z>Q193D=U%q&wYv>nMK0Wn2}Pn;j;|!!&W#avT-8=TzlGiOKrGYWu9yXe9SljCej+;
z94U%8Cpxn=Ub?cS*Fx3x@m$6`s>aJBt5_+O)xE^+41`q25v^Or@0{CFBaFtfwT7ci
zS=~!)H82nv@2oYp;>vZgk<+SfT5!FA;pX~!R6p){=*}r@c~Xqvs~4~vPFjlhD5VSL
ztc|;Nl%hQw_@H#BQU9N{0Xl2y6U`el!+HNPlFOLQ@RgS`0qR;i?@R%2XTV;~2KcTu
zMzd1*m?au~qH#)8#NTW`E+2I{<IPS3y%^1fST8AOqWRfCh*Nsr=~j4=mtp`z`2cGr
rja{N)9OpwkC@MA8Y&9@KB1iP;spw*Fd>3;?ja8p-wCfk}>RIv@QU9FD

diff --git a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
index df2a38f..435066e 100644
--- a/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
+++ b/VHDL/ALU/ALU.sim/sim_1/behav/xsim/xsim.dir/xil_defaultlib/xil_defaultlib.rlx
@@ -2,5 +2,5 @@
 2018.2
 Jun 14 2018
 20:07:38
-/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd,1685384562,vhdl,,,,test_alu,,,,,,,,
-/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd,1685384160,vhdl,,,,alu,,,,,,,,
+/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd,1685387697,vhdl,,,,test_alu,,,,,,,,
+/home/alejeune/Documents/4ir/S2/Projet/Projet-Systemes-Informatiques/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd,1685387202,vhdl,,,,alu,,,,,,,,
diff --git a/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd b/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd
index 505d645..f543e0e 100644
--- a/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd
+++ b/VHDL/ALU/ALU.srcs/sim_1/new/VHDL.vhd
@@ -80,7 +80,14 @@ instance : ALU PORT MAP (
 local_Ctrl_Alu <= x"01", -- ADD
             x"02" after 40 ns, -- MUL
             x"03" after 60 ns, -- SUB
-            x"04" after 90 ns; -- DIV
+            x"04" after 90 ns, -- DIV
+            x"09" after 120 ns, -- INF
+            x"0A" after 140 ns, -- SUP
+            x"0B" after 160 ns, -- EQ
+            x"0C" after 180 ns, -- NOT
+            x"0D" after 210 ns, -- XOR
+            x"0E" after 240 ns, -- OR
+            x"0F" after 270 ns; -- XOR
             
 local_A <= x"00",
             x"00" after 10 ns,
@@ -91,8 +98,23 @@ local_A <= x"00",
             x"0B" after 60 ns,
             x"0F" after 70 ns,
             x"19" after 80 ns,
-            x"18" after 90 ns,
-            x"19" after 100 ns;
+            x"12" after 90 ns,
+            x"18" after 100 ns,
+            x"19" after 110 ns,
+            x"10" after 120 ns,
+            x"20" after 130 ns,
+            x"10" after 150 ns,
+            x"0A" after 160 ns,
+            x"0B" after 170 ns,
+            x"01" after 180 ns,
+            x"25" after 190 ns,
+            x"00" after 200 ns,
+            x"0A" after 210 ns,
+            x"00" after 230 ns,
+            x"0A" after 240 ns,
+            x"00" after 260 ns,
+            x"0A" after 270 ns,
+            x"00" after 290 ns;
 
 local_B <= x"00",
             x"00" after 10 ns,
@@ -103,10 +125,21 @@ local_B <= x"00",
             x"0B" after 60 ns,
             x"12" after 70 ns,
             x"0B" after 80 ns,
-            x"06" after 90 ns,
-            x"07" after 100 ns;
-            
-            
-            
+            x"00" after 90 ns,
+            x"06" after 100 ns,
+            x"07" after 110 ns,
+            x"20" after 120 ns,
+            x"10" after 130 ns,
+            x"20" after 150 ns,
+            x"0A" after 160 ns,
+            x"02" after 170 ns,
+            x"00" after 190 ns,
+            x"0B" after 210 ns,
+            x"00" after 220 ns,
+            x"0B" after 240 ns,
+            x"00" after 250 ns,
+            x"0B" after 270 ns,
+            x"00" after 280 ns;
+      
            
 end Behavioral;
diff --git a/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd b/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd
index 0fd78ef..1ef8568 100644
--- a/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd
+++ b/VHDL/ALU/ALU.srcs/sources_1/new/ALU.vhd
@@ -77,9 +77,9 @@ begin
         when x"0A" => if A > B then res <= x"0001"; else res <= x"0000"; end if;
         when x"0B" => if A = B then res <= x"0001"; else res <= x"0000"; end if;
         when x"0C" => if A > 0 then res <= x"0000"; else res <= x"0001"; end if;
-        when x"0D" => res <= A or B;
-        when x"0E" => res <= A and B;
-        when x"0F" => res <= A xor B;
+        when x"0D" => if (A > 0 and B > 0) then res <= x"0001" ; else res <= x"0000"; end if;
+        when x"0E" => if (A > 0 or B > 0) then res <= x"0001" ; else res <= x"0000"; end if;
+        when x"0F" => if ((A > 0 and B = 0) or (A = 0 and B >0)) then res <= x"0001" ; else res <= x"0000"; end if;
         when others => res <= x"0000";
     end case;   
     end process;
diff --git a/VHDL/ALU/ALU.xpr b/VHDL/ALU/ALU.xpr
index 41a3ef6..8bbc006 100644
--- a/VHDL/ALU/ALU.xpr
+++ b/VHDL/ALU/ALU.xpr
@@ -33,7 +33,7 @@
     <Option Name="DSAVendor" Val="xilinx"/>
     <Option Name="DSABoardId" Val="basys3"/>
     <Option Name="DSANumComputeUnits" Val="60"/>
-    <Option Name="WTXSimLaunchSim" Val="62"/>
+    <Option Name="WTXSimLaunchSim" Val="67"/>
     <Option Name="WTModelSimLaunchSim" Val="0"/>
     <Option Name="WTQuestaLaunchSim" Val="0"/>
     <Option Name="WTIesLaunchSim" Val="0"/>
@@ -67,6 +67,12 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
+      <File Path="$PSRCDIR/sources_1/new/IP.vhd">
+        <FileInfo>
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PSRCDIR/sources_1/new/InstructionMemory.vhd">
         <FileInfo>
           <Attr Name="UsedIn" Val="synthesis"/>
@@ -115,13 +121,6 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
-      <File Path="$PSRCDIR/sources_1/new/IP.vhd">
-        <FileInfo>
-          <Attr Name="AutoDisabled" Val="1"/>
-          <Attr Name="UsedIn" Val="synthesis"/>
-          <Attr Name="UsedIn" Val="simulation"/>
-        </FileInfo>
-      </File>
       <Config>
         <Option Name="DesignMode" Val="RTL"/>
         <Option Name="TopModule" Val="Pipeline"/>