forked from acco/chti23
Step1,2 et son
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parent
31840fb669
commit
364158767e
4 changed files with 94 additions and 13 deletions
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@ -30,7 +30,7 @@
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;Section RAM (read write):
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;Section RAM (read write):
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area maram,data,readwrite
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area maram,data,readwrite
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FlagCligno dcd 0
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FlagCligno dcd 0
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index dcd 0
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; ===============================================================================================
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; ===============================================================================================
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@ -1,6 +1,11 @@
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PRESERVE8
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PRESERVE8
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THUMB
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THUMB
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export CallbackSon
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export index
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export SortieSon
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import LongueurSon
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import Son
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; ====================== zone de réservation de données, ======================================
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; ====================== zone de réservation de données, ======================================
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;Section RAM (read only) :
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;Section RAM (read only) :
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@ -9,7 +14,8 @@
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;Section RAM (read write):
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;Section RAM (read write):
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area maram,data,readwrite
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area maram,data,readwrite
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SortieSon dcw 0
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index dcd 0
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; ===============================================================================================
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; ===============================================================================================
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@ -19,12 +25,42 @@
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;Section ROM code (read only) :
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;Section ROM code (read only) :
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area moncode,code,readonly
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area moncode,code,readonly
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; écrire le code ici
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; écrire le code ici
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CallbackSon proc
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push {r4,lr,r5,r6,r7}
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ldr r4,=LongueurSon
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ldr r4,[r4]
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ldr r2,=index
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ldr r7,[r2]
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cmp r4,r7
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bne alors
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sinon
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b finsi
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alors
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ldr r3,=SortieSon
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ldr r1,=Son
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ldrsh r0,[r1,r2,lsl#1] ; R0 = *(R1+2*R2 ) R0 = R1[R2]
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mov r5,#719
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mul r3,r5
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asr r3,#16
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ldr r6,=23560192 ;719*32768
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add r3,r6
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asr r3,#16
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add r7,#1 ;index=index+1
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str r7,[r2] ; *R2 = R7
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finsi
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pop {r4,lr,r5,r6,r7}
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bx lr
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endp
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END
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END
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@ -2,7 +2,9 @@
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#include "DriverJeuLaser.h"
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#include "DriverJeuLaser.h"
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extern u32 * PeriodeSonMicroSec;
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//extern u32 * PeriodeSonMicroSec;
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extern void CallbackSon(void);
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int main(void)
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int main(void)
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{
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{
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@ -14,7 +16,8 @@ int main(void)
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// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
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// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
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CLOCK_Configure();
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CLOCK_Configure();
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Timer_1234_Init_ff( TIM4,*PeriodeSonMicroSec);
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Timer_1234_Init_ff( TIM4, 1000000/11025); //Calcul de la periode de 91 microsec
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Active_IT_Debordement_Timer( TIM4, 2, CallbackSon );
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@ -26,3 +29,15 @@ while (1)
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}
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}
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}
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}
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/*
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short int SortieSon
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int index
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Algo CallbackSon
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if index<longueur
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on stocke son[index] dans r0
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mise a l'echelle
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sortieson=a*son[index]+b
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index ++
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}
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*/
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@ -153,7 +153,32 @@
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<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
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<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
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</SetRegEntry>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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</TargetDriverDllRegistry>
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<Breakpoint/>
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<Breakpoint>
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<Bp>
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<Number>0</Number>
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<Type>0</Type>
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<LineNumber>31</LineNumber>
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<EnabledFlag>1</EnabledFlag>
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<Address>134219960</Address>
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<ByteObject>0</ByteObject>
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<HtxType>0</HtxType>
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<ManyObjects>0</ManyObjects>
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<SizeOfObject>0</SizeOfObject>
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<BreakByAccess>0</BreakByAccess>
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<BreakIfRCount>1</BreakIfRCount>
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<Filename>.\Src\GestionSon.s</Filename>
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<ExecCommand></ExecCommand>
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<Expression>\\StepSon\Src/GestionSon.s\31</Expression>
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</Bp>
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</Breakpoint>
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<MemoryWindow1>
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<Mm>
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<WinNumber>1</WinNumber>
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<SubType>0</SubType>
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<ItemText>R2</ItemText>
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<AccSizeX>0</AccSizeX>
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</Mm>
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</MemoryWindow1>
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<Tracepoint>
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<Tracepoint>
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<THDelay>0</THDelay>
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<THDelay>0</THDelay>
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</Tracepoint>
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</Tracepoint>
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@ -174,7 +199,7 @@
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<AscS3>0</AscS3>
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<AscS3>0</AscS3>
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<aSer3>0</aSer3>
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<aSer3>0</aSer3>
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<eProf>0</eProf>
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<eProf>0</eProf>
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<aLa>0</aLa>
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<aLa>1</aLa>
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<aPa1>0</aPa1>
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<aPa1>0</aPa1>
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<AscS4>0</AscS4>
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<AscS4>0</AscS4>
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<aSer4>0</aSer4>
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<aSer4>0</aSer4>
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<Wi>
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<Wi>
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<IntNumber>0</IntNumber>
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<IntNumber>0</IntNumber>
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<FirstString>((portb & 0x00000002) >> 1 & 0x2) >> 1</FirstString>
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<FirstString>((portb & 0x00000002) >> 1 & 0x2) >> 1</FirstString>
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<SecondString>FF000000000000000000000000000000E0FFEF400100000000000000000000000000000028706F7274622026203078303030303030303229203E3E2031000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000F03F160000000000000000000000000000000000000096020008</SecondString>
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<SecondString>FF000000000000000000000000000000E0FFEF400100000000000000000000000000000028706F7274622026203078303030303030303229203E3E2031000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000000000000E03F100000000000000000000000000000000000000096020008</SecondString>
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</Wi>
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<Wi>
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<IntNumber>1</IntNumber>
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<FirstString>`SortieSon</FirstString>
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<SecondString>0080000000000000000000000000E0FFFFFFEF4100000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000002000000000000000000E03F100000000000000000000000000000000000000094080008</SecondString>
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</Wi>
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</Wi>
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</LogicAnalyzers>
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</LogicAnalyzers>
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<DebugDescription>
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<DebugDescription>
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