Processeur/Processeur.srcs/sources_1/new/Keyboard.vhd
2021-09-03 14:36:09 +02:00

93 lines
2.5 KiB
VHDL

----------------------------------------------------------------------------------
-- Company: INSA-Toulouse
-- Engineer: Paul Faure
--
-- Create Date: 01.07.2021 09:09:30
-- Module Name: Keyboard - Behavioral
-- Project Name: Processeur sécurisé
-- Target Devices: Basys 3 ARTIX7
-- Tool Versions: Vivado 2016.4
--
-- Description: Composant clavier, intègre le controleur du clavier pour en faire un composant bufferisé
--
-- Dependencies:
-- - KeyboardControler
-- - KeyboardToASCII
--
-- Comments : Transforme aussi la keycode en code ASCII
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Keyboard is
Port (CLK : in STD_LOGIC;
PS2Clk : in STD_LOGIC;
PS2Data : in STD_LOGIC;
Data_read : in STD_LOGIC;
Data_av : out STD_LOGIC;
Data : out STD_LOGIC_VECTOR (0 to 6);
alert : out STD_LOGIC);
end Keyboard;
architecture Behavioral of Keyboard is
component KeyboardControler
Port (CLK : in STD_LOGIC;
PS2Clk : in STD_LOGIC;
PS2Data : in STD_LOGIC;
Data_av : out STD_LOGIC;
Data : out STD_LOGIC_VECTOR (0 to 7);
alert : out STD_LOGIC);
end component;
component KeyboardToASCII
Port ( KeyCode : in STD_LOGIC_VECTOR (0 to 7);
CodeASCII : out STD_LOGIC_VECTOR (0 to 6));
end component;
signal buffer_Data : STD_LOGIC_VECTOR (0 to 7);
signal kbCtrl_Data_av : STD_LOGIC;
signal intern_Data_av : STD_LOGIC := '0';
signal intern_Data : STD_LOGIC_VECTOR (0 to 6) := (others => '0');
begin
instance_KeyboardControler : KeyboardControler
port map (CLK => CLK,
PS2Clk => PS2Clk,
PS2Data => PS2Data,
Data_av => kbCtrl_Data_av,
Data => buffer_Data,
alert => alert);
instance_KeyboardToASCII : KeyboardToASCII
port map ( KeyCode => buffer_Data,
CodeASCII => intern_Data);
process
begin
wait until CLK'event and CLK = '1';
if (intern_Data_av = '0') then
if (kbCtrl_Data_av = '1') then
Data <= intern_Data;
intern_Data_av <= '1';
end if;
elsif (Data_read = '1') then
intern_Data_av <= '0';
end if;
end process;
Data_av <= intern_Data_av;
end Behavioral;