159 lines
12 KiB
Text
159 lines
12 KiB
Text
#-----------------------------------------------------------
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# Vivado v2016.4 (64-bit)
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# SW Build 1756540 on Mon Jan 23 19:11:23 MST 2017
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# IP Build 1755317 on Mon Jan 23 20:30:07 MST 2017
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# Start of session at: Wed Apr 14 08:09:08 2021
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# Process ID: 4032
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# Current directory: C:/Users/Hp/Documents/Compteur8BitsBasys3
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# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent6828 C:\Users\Hp\Documents\Compteur8BitsBasys3\Compteur8BitsBasys3.xpr
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# Log file: C:/Users/Hp/Documents/Compteur8BitsBasys3/vivado.log
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# Journal file: C:/Users/Hp/Documents/Compteur8BitsBasys3\vivado.jou
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#-----------------------------------------------------------
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start_gui
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open_project C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.xpr
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Scanning sources...
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Finished scanning sources
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WARNING: [Project 1-509] GeneratedRun file for 'synth_1' not found
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WARNING: [Project 1-509] GeneratedRun file for 'impl_1' not found
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WARNING: [filemgmt 56-3] IPUserFilesDir: Could not find the directory 'C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.ip_user_files'.
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INFO: [IP_Flow 19-234] Refreshing IP repositories
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INFO: [IP_Flow 19-1704] No user IP repositories specified
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INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2016.4/data/ip'.
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open_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:12 . Memory (MB): peak = 794.082 ; gain = 131.480
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd:1]
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[Wed Apr 14 08:24:05 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 08:25:26 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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remove_files -fileset sim_1 C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sim_1/new/test_Compteur.vhd
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file delete -force C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sim_1/new/test_Compteur.vhd
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reset_run impl_1
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 08:27:27 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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launch_runs impl_1 -to_step write_bitstream -jobs 2
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[Wed Apr 14 08:29:13 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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open_hw
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connect_hw_server
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INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
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INFO: [Labtools 27-2222] Launching hw_server...
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INFO: [Labtools 27-2221] Launch Output:
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****** Xilinx hw_server v2016.4
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**** Build date : Jan 23 2017-19:37:29
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** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
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connect_hw_server: Time (s): cpu = 00:00:01 ; elapsed = 00:00:06 . Memory (MB): peak = 881.043 ; gain = 0.000
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open_hw_target
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INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210183AB4E4EA
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set_property PROGRAM.FILE {C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/System.bit} [lindex [get_hw_devices xc7a35t_0] 0]
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current_hw_device [lindex [get_hw_devices xc7a35t_0] 0]
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refresh_hw_device -update_hw_probes false [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-1434] Device xc7a35t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
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WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
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Resolution:
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1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
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2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
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set_property PROBES.FILE {} [lindex [get_hw_devices xc7a35t_0] 0]
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set_property PROGRAM.FILE {C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/System.bit} [lindex [get_hw_devices xc7a35t_0] 0]
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program_hw_devices [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-3164] End of startup status: HIGH
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refresh_hw_device [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-1434] Device xc7a35t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
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WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
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Resolution:
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1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
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2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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reset_run synth_1
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/Compteur.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/Compteur.vhd:1]
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[Wed Apr 14 08:32:22 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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reset_run synth_1
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd:1]
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[Wed Apr 14 08:33:40 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 08:34:54 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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reset_run synth_1
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd:1]
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[Wed Apr 14 08:40:08 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 08:41:23 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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reset_run synth_1
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd:1]
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[Wed Apr 14 08:45:24 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 08:46:41 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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reset_run synth_1
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd:1]
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[Wed Apr 14 08:49:30 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 08:50:57 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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launch_runs impl_1 -to_step write_bitstream -jobs 2
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[Wed Apr 14 08:54:17 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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set_property PROBES.FILE {} [lindex [get_hw_devices xc7a35t_0] 0]
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set_property PROGRAM.FILE {C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/System.bit} [lindex [get_hw_devices xc7a35t_0] 0]
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program_hw_devices [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-3164] End of startup status: HIGH
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refresh_hw_device [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-1434] Device xc7a35t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
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WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
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Resolution:
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1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
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2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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reset_run synth_1
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launch_runs synth_1 -jobs 2
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INFO: [HDL 9-1061] Parsing VHDL file "C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd" into library xil_defaultlib [C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.srcs/sources_1/new/System.vhd:1]
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[Wed Apr 14 09:00:05 2021] Launched synth_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/synth_1/runme.log
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launch_runs impl_1 -jobs 2
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[Wed Apr 14 09:00:59 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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launch_runs impl_1 -to_step write_bitstream -jobs 2
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[Wed Apr 14 09:02:14 2021] Launched impl_1...
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Run output will be captured here: C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/runme.log
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set_property PROBES.FILE {} [lindex [get_hw_devices xc7a35t_0] 0]
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set_property PROGRAM.FILE {C:/Users/Hp/Documents/Compteur8BitsBasys3/Compteur8BitsBasys3.runs/impl_1/System.bit} [lindex [get_hw_devices xc7a35t_0] 0]
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program_hw_devices [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-3164] End of startup status: HIGH
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refresh_hw_device [lindex [get_hw_devices xc7a35t_0] 0]
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INFO: [Labtools 27-1434] Device xc7a35t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
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WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
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Resolution:
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1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
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2. Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
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ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Digilent/210183AB4E4EA.
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Check cable connectivity and that the target board is powered up then
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use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
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ERROR: [Labtoolstcl 44-513] HW Target shutdown. Closing target: localhost:3121/xilinx_tcf/Digilent/210183AB4E4EA
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exit
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INFO: [Common 17-206] Exiting Vivado at Wed Apr 14 18:31:17 2021...
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