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GPIO_demo_power_routed.rpt 8.2KB

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  1. Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
  2. -------------------------------------------------------------------------------------------------------------------------------------------------
  3. | Tool Version : Vivado v.2016.4 (win64) Build 1756540 Mon Jan 23 19:11:23 MST 2017
  4. | Date : Fri Apr 09 23:16:38 2021
  5. | Host : DESKTOP-GN6T5R2 running 64-bit major release (build 9200)
  6. | Command : report_power -file GPIO_demo_power_routed.rpt -pb GPIO_demo_power_summary_routed.pb -rpx GPIO_demo_power_routed.rpx
  7. | Design : GPIO_demo
  8. | Device : xc7a35tcpg236-1
  9. | Design State : routed
  10. | Grade : commercial
  11. | Process : typical
  12. | Characterization : Production
  13. -------------------------------------------------------------------------------------------------------------------------------------------------
  14. Power Report
  15. Table of Contents
  16. -----------------
  17. 1. Summary
  18. 1.1 On-Chip Components
  19. 1.2 Power Supply Summary
  20. 1.3 Confidence Level
  21. 2. Settings
  22. 2.1 Environment
  23. 2.2 Clock Constraints
  24. 3. Detailed Reports
  25. 3.1 By Hierarchy
  26. 1. Summary
  27. ----------
  28. +--------------------------+-------+
  29. | Total On-Chip Power (W) | 0.223 |
  30. | Dynamic (W) | 0.151 |
  31. | Device Static (W) | 0.072 |
  32. | Effective TJA (C/W) | 5.0 |
  33. | Max Ambient (C) | 83.9 |
  34. | Junction Temperature (C) | 26.1 |
  35. | Confidence Level | Low |
  36. | Setting File | --- |
  37. | Simulation Activity File | --- |
  38. | Design Nets Matched | NA |
  39. +--------------------------+-------+
  40. 1.1 On-Chip Components
  41. ----------------------
  42. +----------------+-----------+----------+-----------+-----------------+
  43. | On-Chip | Power (W) | Used | Available | Utilization (%) |
  44. +----------------+-----------+----------+-----------+-----------------+
  45. | Clocks | 0.005 | 5 | --- | --- |
  46. | Slice Logic | 0.003 | 1426 | --- | --- |
  47. | LUT as Logic | 0.002 | 564 | 20800 | 2.71 |
  48. | CARRY4 | <0.001 | 132 | 8150 | 1.62 |
  49. | Register | <0.001 | 578 | 41600 | 1.39 |
  50. | F7/F8 Muxes | <0.001 | 3 | 32600 | <0.01 |
  51. | Others | 0.000 | 18 | --- | --- |
  52. | Signals | 0.002 | 1137 | --- | --- |
  53. | MMCM | 0.123 | 1 | 5 | 20.00 |
  54. | I/O | 0.018 | 67 | 106 | 63.21 |
  55. | Static Power | 0.072 | | | |
  56. | Total | 0.223 | | | |
  57. +----------------+-----------+----------+-----------+-----------------+
  58. 1.2 Power Supply Summary
  59. ------------------------
  60. +-----------+-------------+-----------+-------------+------------+
  61. | Source | Voltage (V) | Total (A) | Dynamic (A) | Static (A) |
  62. +-----------+-------------+-----------+-------------+------------+
  63. | Vccint | 1.000 | 0.020 | 0.010 | 0.010 |
  64. | Vccaux | 1.800 | 0.081 | 0.069 | 0.013 |
  65. | Vcco33 | 3.300 | 0.006 | 0.005 | 0.001 |
  66. | Vcco25 | 2.500 | 0.000 | 0.000 | 0.000 |
  67. | Vcco18 | 1.800 | 0.000 | 0.000 | 0.000 |
  68. | Vcco15 | 1.500 | 0.000 | 0.000 | 0.000 |
  69. | Vcco135 | 1.350 | 0.000 | 0.000 | 0.000 |
  70. | Vcco12 | 1.200 | 0.000 | 0.000 | 0.000 |
  71. | Vccaux_io | 1.800 | 0.000 | 0.000 | 0.000 |
  72. | Vccbram | 1.000 | 0.000 | 0.000 | 0.000 |
  73. | MGTAVcc | 1.000 | 0.000 | 0.000 | 0.000 |
  74. | MGTAVtt | 1.200 | 0.000 | 0.000 | 0.000 |
  75. | Vccadc | 1.800 | 0.020 | 0.000 | 0.020 |
  76. +-----------+-------------+-----------+-------------+------------+
  77. 1.3 Confidence Level
  78. --------------------
  79. +-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
  80. | User Input Data | Confidence | Details | Action |
  81. +-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
  82. | Design implementation state | High | Design is routed | |
  83. | Clock nodes activity | High | User specified more than 95% of clocks | |
  84. | I/O nodes activity | Low | More than 75% of inputs are missing user specification | Provide missing input activity with simulation results or by editing the "By Resource Type -> I/Os" view |
  85. | Internal nodes activity | Medium | User specified less than 25% of internal nodes | Provide missing internal nodes activity with simulation results or by editing the "By Resource Type" views |
  86. | Device models | High | Device models are Production | |
  87. | | | | |
  88. | Overall confidence level | Low | | |
  89. +-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
  90. 2. Settings
  91. -----------
  92. 2.1 Environment
  93. ---------------
  94. +-----------------------+--------------------------+
  95. | Ambient Temp (C) | 25.0 |
  96. | ThetaJA (C/W) | 5.0 |
  97. | Airflow (LFM) | 250 |
  98. | Heat Sink | medium (Medium Profile) |
  99. | ThetaSA (C/W) | 4.6 |
  100. | Board Selection | medium (10"x10") |
  101. | # of Board Layers | 12to15 (12 to 15 Layers) |
  102. | Board Temperature (C) | 25.0 |
  103. +-----------------------+--------------------------+
  104. 2.2 Clock Constraints
  105. ---------------------
  106. +--------------------+----------------------------------------------------+-----------------+
  107. | Clock | Domain | Constraint (ns) |
  108. +--------------------+----------------------------------------------------+-----------------+
  109. | clk_out1_clk_wiz_0 | Inst_vga_ctrl/clk_wiz_0_inst/U0/clk_out1_clk_wiz_0 | 9.3 |
  110. | clkfbout_clk_wiz_0 | Inst_vga_ctrl/clk_wiz_0_inst/U0/clkfbout_clk_wiz_0 | 10.0 |
  111. | sys_clk_pin | CLK | 10.0 |
  112. +--------------------+----------------------------------------------------+-----------------+
  113. 3. Detailed Reports
  114. -------------------
  115. 3.1 By Hierarchy
  116. ----------------
  117. +-----------------------------+-----------+
  118. | Name | Power (W) |
  119. +-----------------------------+-----------+
  120. | GPIO_demo | 0.151 |
  121. | Inst_UART_TX_CTRL | <0.001 |
  122. | Inst_btn_debounce | <0.001 |
  123. | Inst_vga_ctrl | 0.130 |
  124. | Inst_MouseCtl | 0.004 |
  125. | Inst_Ps2Interface | 0.001 |
  126. | ps2_clk_IOBUF_inst | 0.000 |
  127. | ps2_data_IOBUF_inst | 0.000 |
  128. | Inst_MouseDisplay | <0.001 |
  129. | clk_wiz_0_inst | 0.124 |
  130. | U0 | 0.124 |
  131. +-----------------------------+-----------+