35 lines
1.3 KiB
VHDL
35 lines
1.3 KiB
VHDL
library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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package ScreenProperties is
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constant margin : Natural := 64;
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constant Display_CaracterWidht : Natural := 64;
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constant Display_CaracterHeight : Natural := 64;
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constant screen_width : natural := 1280;
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constant screen_height : natural := 1024;
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constant X_PulseWidth : Natural := 112;
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constant X_FrontPorch : Natural := 48;
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constant X_BackPorch : Natural := 248;
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constant Y_PulseWidth : Natural := 3;
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constant Y_FrontPorch : Natural := 1;
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constant Y_BackPorch : Natural := 38;
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subtype X_T is Natural range 0 to screen_width + X_PulseWidth + X_FrontPorch + X_BackPorch - 1;
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subtype Y_T is Natural range 0 to screen_height + Y_PulseWidth + Y_FrontPorch + Y_BackPorch - 1;
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constant C_Blocks : Natural := (screen_width - (2 * margin))/Display_CaracterWidht;
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constant L_Blocks : Natural := (screen_height - (2 * margin))/Display_CaracterHeight;
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constant Ecran_Taille : Natural := C_Blocks * L_Blocks * 7;
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constant L_Size : Natural := C_Blocks * 7;
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constant Zero_Line : STD_LOGIC_VECTOR (0 to L_Size - 1) := (others => '0');
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subtype L_T is Natural range 0 to L_Blocks - 1;
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subtype C_T is Natural range 0 to C_Blocks - 1;
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end package;
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