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- ----------------------------------------------------------------------------------
- -- Company:
- -- Engineer:
- --
- -- Create Date: 15.04.2021 08:23:48
- -- Design Name:
- -- Module Name: BancRegistres - Behavioral
- -- Project Name:
- -- Target Devices:
- -- Tool Versions:
- -- Description:
- --
- -- Dependencies:
- --
- -- Revision:
- -- Revision 0.01 - File Created
- -- Additional Comments:
- --
- ----------------------------------------------------------------------------------
-
-
- library IEEE;
- use IEEE.STD_LOGIC_1164.ALL;
- --use IEEE.STD_LOGIC_UNSIGNED.ALL;
- --use IEEE.STD_LOGIC_ARITH.ALL;
-
- -- Uncomment the following library declaration if using
- -- arithmetic functions with Signed or Unsigned values
- use IEEE.NUMERIC_STD.ALL;
-
- -- Uncomment the following library declaration if instantiating
- -- any Xilinx leaf cells in this code.
- --library UNISIM;
- --use UNISIM.VComponents.all;
-
- entity BancRegistres is
- Generic (Nb_bits : Natural;
- Addr_size : Natural;
- Nb_regs : Natural);
- Port ( AddrA : in STD_LOGIC_VECTOR (Addr_size-1 downto 0);
- AddrB : in STD_LOGIC_VECTOR (Addr_size-1 downto 0);
- AddrW : in STD_LOGIC_VECTOR (Addr_size-1 downto 0);
- W : in STD_LOGIC;
- DATA : in STD_LOGIC_VECTOR (Nb_bits-1 downto 0);
- RST : in STD_LOGIC;
- CLK : in STD_LOGIC;
- QA : out STD_LOGIC_VECTOR (Nb_bits-1 downto 0);
- QB : out STD_LOGIC_VECTOR (Nb_bits-1 downto 0));
- end BancRegistres;
-
- -- ASK MEILLEURE IDEE UN TABLEAU
- architecture Behavioral of BancRegistres is
- signal REGISTRES : STD_LOGIC_VECTOR ((Nb_regs * Nb_bits)-1 downto 0) := (others => '0');
- begin
- process
- begin
- wait until CLK'event and CLK = '1';
- if (RST = '0') then
- REGISTRES <= (others => '0');
- else
- if (W = '1') then
- REGISTRES (((to_integer(unsigned(AddrW)) + 1) * Nb_bits - 1) downto Nb_bits * to_integer(unsigned(AddrW))) <= DATA;
- end if;
- end if;
- end process;
- QA <= REGISTRES (((to_integer(unsigned(AddrA)) + 1) * Nb_bits) - 1 downto Nb_bits * to_integer(unsigned(AddrA)));
- QB <= REGISTRES (((to_integer(unsigned(AddrB)) + 1) * Nb_bits) - 1 downto Nb_bits * to_integer(unsigned(AddrB)));
- end Behavioral;
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