Processeur securisé acceleré
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2 changed files with 3 additions and 9 deletions
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@ -203,7 +203,7 @@ begin
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locked <= true;
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end if;
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compteur <= compteur + 1;
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if (compteur + 1 = to_integer(unsigned(Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits)))) then
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if (compteur + 1 = to_integer(unsigned(Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits))) * 1000) then
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Pointeur_Instruction <= Pointeur_Instruction + 1;
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compteur <= 0;
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end if;
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@ -56,17 +56,11 @@ architecture Structural of System is
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-- signaux auxiliaires
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signal my_RST : STD_LOGIC;
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signal my_CLK : STD_LOGIC;
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signal buff_CLK : STD_LOGIC;
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begin
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-- Premier diviseur de clock
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-- Diviseur de clock
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clk_div : Clock_Divider
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port map (CLK_IN => CLK,
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CLK_OUT => buff_CLK);
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-- Second diviseur de clock
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clk_div_2 : Clock_Divider
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port map (CLK_IN => buff_CLK,
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CLK_OUT => my_CLK);
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-- Le processeur, augmentation de la taille de la mémoire d'instruction
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