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Optimisation code

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This commit is contained in:
Paul Faure 2021-09-03 14:36:09 +02:00
parent d3d3c6da9c
commit 6eca866e43
4 changed files with 9 additions and 35 deletions
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28
Processeur.srcs/sources_1/new/Etage1_LectureInstruction.vhd
View file

@ -177,25 +177,13 @@
-- S'il ne faut pas injecter de bulles ont traite l'instruction (Possible code factorisable sur ce if)
if ((Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits) = Code_Instruction_CALL) or (Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits) = Code_Instruction_JMP)) then
-- CAS PARTICULIER : CALL ou JMP, on transmet et on saute
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
Pointeur_Instruction <= Instruction_courante (2 * Nb_bits + Addr_size_mem_instruction - 1 downto 2 * Nb_bits);
elsif (Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits) = Code_Instruction_RET) then
-- CAS PARTICULIER : RET, on transmet et on revient
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
Pointeur_Instruction <= Adresse_Retour;
elsif (Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits) = Code_Instruction_JMZ) then
-- CAS PARTICULIER : JMZ, on attends que l'instruction précedente arrive sur l'ALU, si le flag Zero est a un on saute, sinon on continue normalement
compteur <= compteur + 1;
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
if (compteur = 2) then
if (Z = '1') then
Pointeur_Instruction <= Instruction_courante (2 * Nb_bits + Addr_size_mem_instruction - 1 downto 2 * Nb_bits);
@ -218,29 +206,21 @@
compteur <= 0;
end if;
end if;
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
elsif (Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits) = Code_Instruction_PRI) then
-- CAS PARTICULIER : PRI, on transmet l'instruction et fixe le compteur pour proteger des collisions
Compteur_PRI <= Nb_bits/4 + 1;
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
Pointeur_Instruction <= Pointeur_Instruction + 1;
else
-- CAS GENERAL : On transmet l'instruction et les opérandes, si elle est critique en ecriture, on enregistre le registre associé dans le tableau
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
if (Instructions_critiques_ecriture(to_integer(unsigned(Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits)))) = '1') then
Tableau(1) <= to_integer(unsigned(Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits)));
end if;
Pointeur_Instruction <= Pointeur_Instruction + 1;
end if;
C <= Instruction_courante (1 * Nb_bits - 1 downto 0 * Nb_bits);
B <= Instruction_courante (2 * Nb_bits - 1 downto 1 * Nb_bits);
A <= Instruction_courante (3 * Nb_bits - 1 downto 2 * Nb_bits);
Instruction <= Instruction_courante (Instruction_bus_size + 3 * Nb_bits - 1 downto 3 * Nb_bits);
else
-- Si besoin de bulle, on l'injecte
C <= Argument_nul;

8
Processeur.srcs/sources_1/new/Etage2-5_Registres.vhd
View file

@ -167,13 +167,7 @@ begin
process
begin
wait until CLK'event and CLK='1';
if (RST='0') then
Request_Stopped <= false;
elsif (STD_IN_Av = '1') then
Request_Stopped <= true;
else
Request_Stopped <= false;
end if;
Request_Stopped <= (STD_IN_Av = '1') and (RST = '1');
end process;
STD_IN_Request <= '1' when not(Request_Stopped) and IN_5_Instruction = Code_Instruction_GET and not(RST='0') else '0';

6
Processeur.srcs/sources_1/new/Keyboard.vhd
View file

@ -53,7 +53,7 @@ architecture Behavioral of Keyboard is
end component;
signal buffer_Data : STD_LOGIC_VECTOR (0 to 7);
signal keyboardControleur_Data_av : STD_LOGIC;
signal kbCtrl_Data_av : STD_LOGIC;
signal intern_Data_av : STD_LOGIC := '0';
signal intern_Data : STD_LOGIC_VECTOR (0 to 6) := (others => '0');
@ -66,7 +66,7 @@ begin
PS2Clk => PS2Clk,
PS2Data => PS2Data,
Data_av => keyboardControleur_Data_av,
Data_av => kbCtrl_Data_av,
Data => buffer_Data,
alert => alert);
@ -79,7 +79,7 @@ begin
begin
wait until CLK'event and CLK = '1';
if (intern_Data_av = '0') then
if (keyboardControleur_Data_av = '1') then
if (kbCtrl_Data_av = '1') then
Data <= intern_Data;
intern_Data_av <= '1';
end if;

2
Processeur.xpr
View file

@ -35,7 +35,7 @@
<Option Name="DSAVendor" Val="xilinx"/>
<Option Name="DSABoardId" Val="basys3"/>
<Option Name="DSANumComputeUnits" Val="16"/>
<Option Name="WTXSimLaunchSim" Val="602"/>
<Option Name="WTXSimLaunchSim" Val="603"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>