157 lines
8.2 KiB
Text
157 lines
8.2 KiB
Text
Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2016.4 (win64) Build 1756540 Mon Jan 23 19:11:23 MST 2017
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| Date : Fri Apr 09 23:16:38 2021
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| Host : DESKTOP-GN6T5R2 running 64-bit major release (build 9200)
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| Command : report_power -file GPIO_demo_power_routed.rpt -pb GPIO_demo_power_summary_routed.pb -rpx GPIO_demo_power_routed.rpx
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| Design : GPIO_demo
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| Device : xc7a35tcpg236-1
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| Design State : routed
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| Grade : commercial
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| Process : typical
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| Characterization : Production
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Power Report
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Table of Contents
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-----------------
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1. Summary
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1.1 On-Chip Components
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1.2 Power Supply Summary
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1.3 Confidence Level
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2. Settings
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2.1 Environment
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2.2 Clock Constraints
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3. Detailed Reports
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3.1 By Hierarchy
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1. Summary
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----------
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+--------------------------+-------+
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| Total On-Chip Power (W) | 0.223 |
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| Dynamic (W) | 0.151 |
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| Device Static (W) | 0.072 |
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| Effective TJA (C/W) | 5.0 |
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| Max Ambient (C) | 83.9 |
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| Junction Temperature (C) | 26.1 |
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| Confidence Level | Low |
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| Setting File | --- |
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| Simulation Activity File | --- |
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| Design Nets Matched | NA |
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+--------------------------+-------+
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1.1 On-Chip Components
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----------------------
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+----------------+-----------+----------+-----------+-----------------+
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| On-Chip | Power (W) | Used | Available | Utilization (%) |
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+----------------+-----------+----------+-----------+-----------------+
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| Clocks | 0.005 | 5 | --- | --- |
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| Slice Logic | 0.003 | 1426 | --- | --- |
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| LUT as Logic | 0.002 | 564 | 20800 | 2.71 |
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| CARRY4 | <0.001 | 132 | 8150 | 1.62 |
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| Register | <0.001 | 578 | 41600 | 1.39 |
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| F7/F8 Muxes | <0.001 | 3 | 32600 | <0.01 |
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| Others | 0.000 | 18 | --- | --- |
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| Signals | 0.002 | 1137 | --- | --- |
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| MMCM | 0.123 | 1 | 5 | 20.00 |
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| I/O | 0.018 | 67 | 106 | 63.21 |
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| Static Power | 0.072 | | | |
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| Total | 0.223 | | | |
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+----------------+-----------+----------+-----------+-----------------+
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1.2 Power Supply Summary
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------------------------
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+-----------+-------------+-----------+-------------+------------+
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| Source | Voltage (V) | Total (A) | Dynamic (A) | Static (A) |
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+-----------+-------------+-----------+-------------+------------+
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| Vccint | 1.000 | 0.020 | 0.010 | 0.010 |
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| Vccaux | 1.800 | 0.081 | 0.069 | 0.013 |
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| Vcco33 | 3.300 | 0.006 | 0.005 | 0.001 |
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| Vcco25 | 2.500 | 0.000 | 0.000 | 0.000 |
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| Vcco18 | 1.800 | 0.000 | 0.000 | 0.000 |
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| Vcco15 | 1.500 | 0.000 | 0.000 | 0.000 |
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| Vcco135 | 1.350 | 0.000 | 0.000 | 0.000 |
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| Vcco12 | 1.200 | 0.000 | 0.000 | 0.000 |
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| Vccaux_io | 1.800 | 0.000 | 0.000 | 0.000 |
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| Vccbram | 1.000 | 0.000 | 0.000 | 0.000 |
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| MGTAVcc | 1.000 | 0.000 | 0.000 | 0.000 |
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| MGTAVtt | 1.200 | 0.000 | 0.000 | 0.000 |
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| Vccadc | 1.800 | 0.020 | 0.000 | 0.020 |
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+-----------+-------------+-----------+-------------+------------+
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1.3 Confidence Level
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--------------------
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+-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
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| User Input Data | Confidence | Details | Action |
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+-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
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| Design implementation state | High | Design is routed | |
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| Clock nodes activity | High | User specified more than 95% of clocks | |
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| I/O nodes activity | Low | More than 75% of inputs are missing user specification | Provide missing input activity with simulation results or by editing the "By Resource Type -> I/Os" view |
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| Internal nodes activity | Medium | User specified less than 25% of internal nodes | Provide missing internal nodes activity with simulation results or by editing the "By Resource Type" views |
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| Device models | High | Device models are Production | |
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| Overall confidence level | Low | | |
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+-----------------------------+------------+--------------------------------------------------------+------------------------------------------------------------------------------------------------------------+
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2. Settings
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-----------
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2.1 Environment
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---------------
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+-----------------------+--------------------------+
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| Ambient Temp (C) | 25.0 |
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| ThetaJA (C/W) | 5.0 |
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| Airflow (LFM) | 250 |
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| Heat Sink | medium (Medium Profile) |
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| ThetaSA (C/W) | 4.6 |
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| Board Selection | medium (10"x10") |
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| # of Board Layers | 12to15 (12 to 15 Layers) |
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| Board Temperature (C) | 25.0 |
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+-----------------------+--------------------------+
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2.2 Clock Constraints
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---------------------
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+--------------------+----------------------------------------------------+-----------------+
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| Clock | Domain | Constraint (ns) |
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+--------------------+----------------------------------------------------+-----------------+
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| clk_out1_clk_wiz_0 | Inst_vga_ctrl/clk_wiz_0_inst/U0/clk_out1_clk_wiz_0 | 9.3 |
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| clkfbout_clk_wiz_0 | Inst_vga_ctrl/clk_wiz_0_inst/U0/clkfbout_clk_wiz_0 | 10.0 |
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| sys_clk_pin | CLK | 10.0 |
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+--------------------+----------------------------------------------------+-----------------+
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3. Detailed Reports
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-------------------
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3.1 By Hierarchy
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----------------
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+-----------------------------+-----------+
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| Name | Power (W) |
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+-----------------------------+-----------+
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| GPIO_demo | 0.151 |
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| Inst_UART_TX_CTRL | <0.001 |
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| Inst_btn_debounce | <0.001 |
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| Inst_vga_ctrl | 0.130 |
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| Inst_MouseCtl | 0.004 |
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| Inst_Ps2Interface | 0.001 |
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| ps2_clk_IOBUF_inst | 0.000 |
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| ps2_data_IOBUF_inst | 0.000 |
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| Inst_MouseDisplay | <0.001 |
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| clk_wiz_0_inst | 0.124 |
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| U0 | 0.124 |
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+-----------------------------+-----------+
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