|
|
@@ -3,7 +3,7 @@
|
|
3
|
3
|
}
|
|
4
|
4
|
%{
|
|
5
|
5
|
#include "tables.h"
|
|
6
|
|
-#include <stdio.h>
|
|
|
6
|
+#include <stdio.h>
|
|
7
|
7
|
|
|
8
|
8
|
FILE * file;
|
|
9
|
9
|
FILE * file2;
|
|
|
@@ -21,56 +21,56 @@ FILE * file2;
|
|
21
|
21
|
|
|
22
|
22
|
%%
|
|
23
|
23
|
|
|
24
|
|
-Programme : Instruction Programme;
|
|
|
24
|
+Programme : Instruction Programme;
|
|
25
|
25
|
Programme : Instruction;
|
|
26
|
26
|
|
|
27
|
27
|
Instruction : tMUL tNB tNB tNB {increment_time();
|
|
28
|
28
|
int added_instruction = 0;
|
|
29
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
30
|
29
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
31
|
30
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
31
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
32
|
32
|
add_instruction(MUL, reg_dest, reg_src1, reg_src2);
|
|
33
|
33
|
new_instruction(added_instruction + 1);};
|
|
34
|
34
|
Instruction : tADD tNB tNB tNB {increment_time();
|
|
35
|
35
|
int added_instruction = 0;
|
|
36
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
37
|
36
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
38
|
37
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
38
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
39
|
39
|
add_instruction(ADD, reg_dest, reg_src1, reg_src2);
|
|
40
|
40
|
new_instruction(added_instruction + 1);};
|
|
41
|
41
|
Instruction : tDIV tNB tNB tNB {increment_time();
|
|
42
|
42
|
int added_instruction = 0;
|
|
43
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
44
|
43
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
45
|
44
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
45
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
46
|
46
|
add_instruction(DIV, reg_dest, reg_src1, reg_src2);
|
|
47
|
47
|
new_instruction(added_instruction + 1);};
|
|
48
|
48
|
Instruction : tSUB tNB tNB tNB {increment_time();
|
|
49
|
49
|
int added_instruction = 0;
|
|
50
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
51
|
50
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
52
|
51
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
52
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
53
|
53
|
add_instruction(SUB, reg_dest, reg_src1, reg_src2);
|
|
54
|
54
|
new_instruction(added_instruction + 1);};
|
|
55
|
55
|
Instruction : tINF tNB tNB tNB {increment_time();
|
|
56
|
56
|
int added_instruction = 0;
|
|
57
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
58
|
57
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
59
|
58
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
59
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
60
|
60
|
add_instruction(INF, reg_dest, reg_src1, reg_src2);
|
|
61
|
61
|
new_instruction(added_instruction + 1);};
|
|
62
|
62
|
Instruction : tSUP tNB tNB tNB {increment_time();
|
|
63
|
63
|
int added_instruction = 0;
|
|
64
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
65
|
64
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
66
|
65
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
66
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
67
|
67
|
add_instruction(SUP, reg_dest, reg_src1, reg_src2);
|
|
68
|
68
|
new_instruction(added_instruction + 1);};
|
|
69
|
69
|
Instruction : tEQU tNB tNB tNB {increment_time();
|
|
70
|
70
|
int added_instruction = 0;
|
|
71
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
72
|
71
|
int reg_src1 = get_reg_read($3, &added_instruction);
|
|
73
|
72
|
int reg_src2 = get_reg_read($4, &added_instruction);
|
|
|
73
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
74
|
74
|
add_instruction(EQU, reg_dest, reg_src1, reg_src2);
|
|
75
|
75
|
new_instruction(added_instruction + 1);};
|
|
76
|
76
|
|
|
|
@@ -82,8 +82,8 @@ Instruction : tAFC tNB tNB {increment_time();
|
|
82
|
82
|
new_instruction(added_instruction + 1);};
|
|
83
|
83
|
Instruction : tCPY tNB tNB {increment_time();
|
|
84
|
84
|
int added_instruction = 0;
|
|
85
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
86
|
85
|
int reg_src = get_reg_read($3, &added_instruction);
|
|
|
86
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
87
|
87
|
add_instruction(CPY, reg_dest, reg_src, 0);
|
|
88
|
88
|
new_instruction(added_instruction + 1);};
|
|
89
|
89
|
Instruction : tAFCA tNB tNB {increment_time();
|
|
|
@@ -105,17 +105,17 @@ Instruction : tJMF tNB tNB {increment_time();
|
|
105
|
105
|
add_instruction(JMZ, $3, 0, 0);
|
|
106
|
106
|
new_instruction(added_instruction + 2);};
|
|
107
|
107
|
|
|
108
|
|
-Instruction : tWR tNB tNB {increment_time();
|
|
|
108
|
+Instruction : tREAD tNB tNB {increment_time();
|
|
109
|
109
|
int added_instruction = 0;
|
|
110
|
|
- int reg_dest = get_reg_write($2, &added_instruction);
|
|
111
|
110
|
int reg_addr = get_reg_read($3, &added_instruction);
|
|
112
|
|
- add_instruction(STOREI, reg_dest, reg_addr, 0);
|
|
|
111
|
+ int reg_dest = get_reg_write($2, &added_instruction);
|
|
|
112
|
+ add_instruction(LOADI, reg_dest, reg_addr, 0);
|
|
113
|
113
|
new_instruction(added_instruction + 1);};
|
|
114
|
|
-Instruction : tREAD tNB tNB {increment_time();
|
|
|
114
|
+Instruction : tWR tNB tNB {increment_time();
|
|
115
|
115
|
int added_instruction = 0;
|
|
116
|
116
|
int reg_addr = get_reg_read($2, &added_instruction);
|
|
117
|
117
|
int reg_value = get_reg_read($3, &added_instruction);
|
|
118
|
|
- add_instruction(LOADI, reg_addr, reg_value, 0);
|
|
|
118
|
+ add_instruction(STOREI, reg_addr, reg_value, 0);
|
|
119
|
119
|
new_instruction(added_instruction + 1);};
|
|
120
|
120
|
|
|
121
|
121
|
|
|
|
@@ -132,8 +132,10 @@ Instruction : tPRI tNB {increment_time();
|
|
132
|
132
|
|
|
133
|
133
|
|
|
134
|
134
|
Instruction : tCALL tNB tNB {increment_time();
|
|
|
135
|
+ print();
|
|
135
|
136
|
int added_instruction = flush_and_init(file);
|
|
136
|
|
- add_instruction(STOP, $2, $3, 0);
|
|
|
137
|
+ print();
|
|
|
138
|
+ add_instruction(CALL, $2, $3, 0);
|
|
137
|
139
|
new_instruction(added_instruction + 1);};
|
|
138
|
140
|
Instruction : tRET {increment_time();
|
|
139
|
141
|
int added_instruction = flush_and_init(file);
|
|
|
@@ -149,6 +151,7 @@ Instruction : tSTOP tNB {increment_time();
|
|
149
|
151
|
int main(void) {
|
|
150
|
152
|
file = fopen("output.asm", "w");
|
|
151
|
153
|
file2 = fopen("output.bin", "w");
|
|
|
154
|
+ file = stdout;
|
|
152
|
155
|
init();
|
|
153
|
156
|
yyparse();
|
|
154
|
157
|
write_asm(file);
|
Elies Tali