Version finale PWM

This commit is contained in:
Firmin Rousseau 2023-04-19 10:54:54 +02:00
parent e36c2144b9
commit a745f81974
3 changed files with 26 additions and 28 deletions

View file

@ -18,7 +18,7 @@
SortieSon dcw 0 SortieSon dcd 0
Index dcw 0 Index dcw 0
export SortieSon export SortieSon
@ -39,17 +39,15 @@ timer_callback_son proc
push {lr,r4} push {lr,r4}
ldr r4,=Index ldr r4, =Index ; r4 = &Index
ldr r2,[r4] ldr r0, [r4] ; r0 = *r4
mov r0, r2
ldr r1, =LongueurSon ldr r1, =LongueurSon
ldr r2, [r1] ldr r2, [r1]
mov r1, r2 cmp r0, r2
cmp r0, r1
beq fin beq fin
ldr r3,=SortieSon
ldr r2,=Son ldr r2,=Son
ldrsh r1, [r2,r0, lsl #1] ldrsh r1, [r2,r0, lsl #1]
@ -58,19 +56,15 @@ timer_callback_son proc
mul r1, r2 mul r1, r2
asr r1, #16 asr r1, #16
mov r4, r0
mov r0, r1
bl PWM_Set_Value_TIM3_Ch3
;str r1, [r3] ;Mise à jour sortie son pas PWM
str r0, [r3] ;Mise à jour sortie son PWM
mov r0, r4
mov r3, r0 mov r3, r0
add r3, #1 add r3, #1
str r3, [r4] str r3, [r4]
ldr r3,=SortieSon
mov r0, r1
bl PWM_Set_Value_TIM3_Ch3
str r0, [r3] ;Mise à jour sortie son pas PWM
fin fin
pop {lr,r4} pop {lr,r4}

View file

@ -15,7 +15,6 @@ CLOCK_Configure();
// configuration du Timer 4 en débordement 91 microsecondes // configuration du Timer 4 en débordement 91 microsecondes
Timer_1234_Init_ff( TIM4, 91*72); Timer_1234_Init_ff( TIM4, 91*72);
Timer_1234_Init_ff( TIM3, 91*72);
int Periode_ticks = 720; int Periode_ticks = 720;

View file

@ -75,7 +75,7 @@
<OPTFL> <OPTFL>
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget> <IsCurrentTarget>1</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>18</CpuCode> <CpuCode>18</CpuCode>
<DebugOpt> <DebugOpt>
@ -165,7 +165,7 @@
<Mm> <Mm>
<WinNumber>1</WinNumber> <WinNumber>1</WinNumber>
<SubType>265</SubType> <SubType>265</SubType>
<ItemText>&amp;SortieSon</ItemText> <ItemText>r3</ItemText>
<AccSizeX>0</AccSizeX> <AccSizeX>0</AccSizeX>
</Mm> </Mm>
</MemoryWindow1> </MemoryWindow1>
@ -215,7 +215,12 @@
<Wi> <Wi>
<IntNumber>0</IntNumber> <IntNumber>0</IntNumber>
<FirstString>(SortieSon &amp; 0xFFFF) &gt;&gt; 0</FirstString> <FirstString>(SortieSon &amp; 0xFFFF) &gt;&gt; 0</FirstString>
<SecondString>008000000000000000000000000000000000894000000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000001000000000000000000F03F1400000000000000000000000000000000000000AE080008</SecondString> <SecondString>008000000000000000000000000000000000894000000000000000000000000000000000536F72746965536F6E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700000001000000000000000000E03F1500000000000000000000000000000000000000AE080008</SecondString>
</Wi>
<Wi>
<IntNumber>1</IntNumber>
<FirstString>(PORTB &amp; 0x00000001)</FirstString>
<SecondString>00800000000000000000000000000000E0FFEF400000000000000000000000000000000028504F52544220262030783030303030303031290000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000002000000000000000000E03F1500000000000000000000000000000000000000540A0008</SecondString>
</Wi> </Wi>
</LogicAnalyzers> </LogicAnalyzers>
<DebugDescription> <DebugDescription>
@ -282,7 +287,7 @@
<OPTFL> <OPTFL>
<tvExp>1</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget> <IsCurrentTarget>0</IsCurrentTarget>
</OPTFL> </OPTFL>
<CpuCode>18</CpuCode> <CpuCode>18</CpuCode>
<DebugOpt> <DebugOpt>