diff --git a/Objectif 1/Project.uvoptx b/Objectif 1/Project.uvoptx new file mode 100644 index 0000000..8ef74cf --- /dev/null +++ b/Objectif 1/Project.uvoptx @@ -0,0 +1,357 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Simu + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 1 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 5 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + DLGDARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=859,154,1280,581,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0) + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + -T0 + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)) + + + 0 + ST-LINKIII-KEIL_SWO + -U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM) + + + + + 0 + 0 + 12 + 1 +
134218152
+ 0 + 0 + 0 + 0 + 0 + 1 + .\Src\principal.c + + \\CHTI\Src/principal.c\12 + + + + + 0 + 1 + S + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Sources + 1 + 0 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + .\Src\startup-rvds.s + startup-rvds.s + 0 + 0 + + + 1 + 2 + 1 + 1 + 0 + 0 + .\Src\principal.c + principal.c + 0 + 0 + + + 1 + 3 + 2 + 0 + 0 + 0 + .\Src\f1p-45.asm + f1p-45.asm + 0 + 0 + + + 1 + 4 + 2 + 0 + 0 + 0 + .\Src\f17p30_f18p135.asm + f17p30_f18p135.asm + 0 + 0 + + + 1 + 5 + 2 + 0 + 0 + 0 + .\Src\f23p-26_f24p-116.asm + f23p-26_f24p-116.asm + 0 + 0 + + + 1 + 6 + 2 + 0 + 0 + 0 + .\Src\fonction.s + fonction.s + 0 + 0 + + + 1 + 7 + 2 + 0 + 0 + 0 + .\Src\module.s + module.s + 0 + 0 + + + 1 + 8 + 2 + 0 + 0 + 0 + .\Src\tabsig.asm + tabsig.asm + 0 + 0 + + + 1 + 9 + 2 + 0 + 0 + 0 + .\Src\trigo.asm + trigo.asm + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/Objectif 1/Project.uvprojx b/Objectif 1/Project.uvprojx new file mode 100644 index 0000000..f0b4a5c --- /dev/null +++ b/Objectif 1/Project.uvprojx @@ -0,0 +1,452 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + Simu + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F103RB + STMicroelectronics + Keil.STM32F1xx_DFP.2.3.0 + http://www.keil.com/pack/ + IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3") + + + + + + + + + + + + + + + $$Device:STM32F103RB$SVD\STM32F103xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Obj\ + CHTI + 1 + 0 + 1 + 1 + 1 + + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP + DARMSTM.DLL + -pSTM32F103RB + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 1 + STLink\ST-LINKIII-KEIL_SWO.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x5000 + + + 1 + 0x8000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x5000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + --C99 + STM32F103xB,USE_FULL_LL_DRIVER + + .\Src + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + Sources + + + startup-rvds.s + 2 + .\Src\startup-rvds.s + + + principal.c + 1 + .\Src\principal.c + + + f1p-45.asm + 2 + .\Src\f1p-45.asm + + + f17p30_f18p135.asm + 2 + .\Src\f17p30_f18p135.asm + + + f23p-26_f24p-116.asm + 2 + .\Src\f23p-26_f24p-116.asm + + + fonction.s + 2 + .\Src\fonction.s + + + module.s + 2 + .\Src\module.s + + + tabsig.asm + 2 + .\Src\tabsig.asm + + + trigo.asm + 2 + .\Src\trigo.asm + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + diff --git a/Objectif 1/Src/f17p30_f18p135.asm b/Objectif 1/Src/f17p30_f18p135.asm new file mode 100644 index 0000000..07e781a --- /dev/null +++ b/Objectif 1/Src/f17p30_f18p135.asm @@ -0,0 +1,90 @@ + AREA Signal, DATA, READONLY + export TabSig + +; Fnor1 = 17.000 +; Ph1 = 30.000 +; A1 = 1024.000 +; Fnor2 = 18.000 +; Ph2 = 135.000 +; A2 = 1024.000 + +; valeurs attendues pour k = 17 : +; Re 0x376C909D env 0.866 * 2^30 +; Im 0xE000C6D7 env -0.5 * 2^30 +; M2 0x0FFFA278 env 2^28 +; +; valeurs attendues pour k = 18 : +; Re 0xD2BDF5FC env -sqrt(0.5) * 2^30 +; Im 0xD2BE8C7F env -sqrt(0.5) * 2^30 +; M2 0x10005BE5 env 2^28 +; +; pour les autres valeurs de k sauf les alias de 17 et 18 : +; M2 < 0x0000000F + +TabSig + DCW 2211 ; 0 0x08a3 0.53979 + DCW 883 ; 1 0x0373 0.21558 + DCW 2224 ; 2 0x08b0 0.54297 + DCW 2995 ; 3 0x0bb3 0.73120 + DCW 1647 ; 4 0x066f 0.40210 + DCW 1378 ; 5 0x0562 0.33643 + DCW 2541 ; 6 0x09ed 0.62036 + DCW 2437 ; 7 0x0985 0.59497 + DCW 1589 ; 8 0x0635 0.38794 + DCW 1889 ; 9 0x0761 0.46118 + DCW 2373 ; 10 0x0945 0.57935 + DCW 2067 ; 11 0x0813 0.50464 + DCW 1914 ; 12 0x077a 0.46729 + DCW 2055 ; 13 0x0807 0.50171 + DCW 1985 ; 14 0x07c1 0.48462 + DCW 2129 ; 15 0x0851 0.51978 + DCW 2260 ; 16 0x08d4 0.55176 + DCW 1785 ; 17 0x06f9 0.43579 + DCW 1777 ; 18 0x06f1 0.43384 + DCW 2548 ; 19 0x09f4 0.62207 + DCW 2260 ; 20 0x08d4 0.55176 + DCW 1307 ; 21 0x051b 0.31909 + DCW 2020 ; 22 0x07e4 0.49316 + DCW 2978 ; 23 0x0ba2 0.72705 + DCW 1783 ; 24 0x06f7 0.43530 + DCW 1030 ; 25 0x0406 0.25146 + DCW 2678 ; 26 0x0a76 0.65381 + DCW 3019 ; 27 0x0bcb 0.73706 + DCW 1033 ; 28 0x0409 0.25220 + DCW 1276 ; 29 0x04fc 0.31152 + DCW 3410 ; 30 0x0d52 0.83252 + DCW 2477 ; 31 0x09ad 0.60474 + DCW 437 ; 32 0x01b5 0.10669 + DCW 2076 ; 33 0x081c 0.50684 + DCW 3764 ; 34 0x0eb4 0.91895 + DCW 1500 ; 35 0x05dc 0.36621 + DCW 401 ; 36 0x0191 0.09790 + DCW 3117 ; 37 0x0c2d 0.76099 + DCW 3447 ; 38 0x0d77 0.84155 + DCW 521 ; 39 0x0209 0.12720 + DCW 1059 ; 40 0x0423 0.25854 + DCW 3910 ; 41 0x0f46 0.95459 + DCW 2507 ; 42 0x09cb 0.61206 + DCW 20 ; 43 0x0014 0.00488 + DCW 2182 ; 44 0x0886 0.53271 + DCW 4050 ; 45 0x0fd2 0.98877 + DCW 1327 ; 46 0x052f 0.32397 + DCW 264 ; 47 0x0108 0.06445 + DCW 3284 ; 48 0x0cd4 0.80176 + DCW 3449 ; 49 0x0d79 0.84204 + DCW 427 ; 50 0x01ab 0.10425 + DCW 1148 ; 51 0x047c 0.28027 + DCW 3884 ; 52 0x0f2c 0.94824 + DCW 2389 ; 53 0x0955 0.58325 + DCW 184 ; 54 0x00b8 0.04492 + DCW 2256 ; 55 0x08d0 0.55078 + DCW 3761 ; 56 0x0eb1 0.91821 + DCW 1363 ; 57 0x0553 0.33276 + DCW 634 ; 58 0x027a 0.15479 + DCW 3086 ; 59 0x0c0e 0.75342 + DCW 3063 ; 60 0x0bf7 0.74780 + DCW 811 ; 61 0x032b 0.19800 + DCW 1470 ; 62 0x05be 0.35889 + DCW 3322 ; 63 0x0cfa 0.81104 + + END diff --git a/Objectif 1/Src/f1p-45.asm b/Objectif 1/Src/f1p-45.asm new file mode 100644 index 0000000..4ae22a0 --- /dev/null +++ b/Objectif 1/Src/f1p-45.asm @@ -0,0 +1,76 @@ + AREA Signal, DATA, READONLY +; export TabSig +; fonction cosinus, frequence relative 1, phase -45 degres, amplitude max +; valeurs attendues pour k = 1 : +; Re 0x5A82562C env +sqrt(0.5) * 2^31 +; Im 0x5A82562C env +sqrt(0.5) * 2^31 +; M2 0x3FFFCDE5 env 2^30 +; pour 1 < k < 63 +; M2 < 0x0000000F + +TabSig + dcw 0x0da8 ; 0 3496 0.85352 + dcw 0x0e2f ; 1 3631 0.88647 + dcw 0x0ea7 ; 2 3751 0.91577 + dcw 0x0f0e ; 3 3854 0.94092 + dcw 0x0f64 ; 4 3940 0.96191 + dcw 0x0fa8 ; 5 4008 0.97852 + dcw 0x0fd9 ; 6 4057 0.99048 + dcw 0x0ff6 ; 7 4086 0.99756 + dcw 0x0fff ; 8 4095 0.99976 + dcw 0x0ff6 ; 9 4086 0.99756 + dcw 0x0fd9 ; 10 4057 0.99048 + dcw 0x0fa8 ; 11 4008 0.97852 + dcw 0x0f64 ; 12 3940 0.96191 + dcw 0x0f0e ; 13 3854 0.94092 + dcw 0x0ea7 ; 14 3751 0.91577 + dcw 0x0e2f ; 15 3631 0.88647 + dcw 0x0da8 ; 16 3496 0.85352 + dcw 0x0d13 ; 17 3347 0.81714 + dcw 0x0c72 ; 18 3186 0.77783 + dcw 0x0bc5 ; 19 3013 0.73560 + dcw 0x0b10 ; 20 2832 0.69141 + dcw 0x0a53 ; 21 2643 0.64526 + dcw 0x0990 ; 22 2448 0.59766 + dcw 0x08c9 ; 23 2249 0.54907 + dcw 0x0800 ; 24 2048 0.50000 + dcw 0x0737 ; 25 1847 0.45093 + dcw 0x0670 ; 26 1648 0.40234 + dcw 0x05ad ; 27 1453 0.35474 + dcw 0x04f0 ; 28 1264 0.30859 + dcw 0x043b ; 29 1083 0.26440 + dcw 0x038e ; 30 910 0.22217 + dcw 0x02ed ; 31 749 0.18286 + dcw 0x0258 ; 32 600 0.14648 + dcw 0x01d1 ; 33 465 0.11353 + dcw 0x0159 ; 34 345 0.08423 + dcw 0x00f2 ; 35 242 0.05908 + dcw 0x009c ; 36 156 0.03809 + dcw 0x0058 ; 37 88 0.02148 + dcw 0x0027 ; 38 39 0.00952 + dcw 0x000a ; 39 10 0.00244 + dcw 0x0000 ; 40 0 0.00000 + dcw 0x000a ; 41 10 0.00244 + dcw 0x0027 ; 42 39 0.00952 + dcw 0x0058 ; 43 88 0.02148 + dcw 0x009c ; 44 156 0.03809 + dcw 0x00f2 ; 45 242 0.05908 + dcw 0x0159 ; 46 345 0.08423 + dcw 0x01d1 ; 47 465 0.11353 + dcw 0x0258 ; 48 600 0.14648 + dcw 0x02ed ; 49 749 0.18286 + dcw 0x038e ; 50 910 0.22217 + dcw 0x043b ; 51 1083 0.26440 + dcw 0x04f0 ; 52 1264 0.30859 + dcw 0x05ad ; 53 1453 0.35474 + dcw 0x0670 ; 54 1648 0.40234 + dcw 0x0737 ; 55 1847 0.45093 + dcw 0x0800 ; 56 2048 0.50000 + dcw 0x08c9 ; 57 2249 0.54907 + dcw 0x0990 ; 58 2448 0.59766 + dcw 0x0a53 ; 59 2643 0.64526 + dcw 0x0b10 ; 60 2832 0.69141 + dcw 0x0bc5 ; 61 3013 0.73560 + dcw 0x0c72 ; 62 3186 0.77783 + dcw 0x0d13 ; 63 3347 0.81714 + end diff --git a/Objectif 1/Src/f23p-26_f24p-116.asm b/Objectif 1/Src/f23p-26_f24p-116.asm new file mode 100644 index 0000000..ad80c83 --- /dev/null +++ b/Objectif 1/Src/f23p-26_f24p-116.asm @@ -0,0 +1,91 @@ + AREA Signal, DATA, READONLY +; export TabSig + +; Fnor1 = 23.000 +; Ph1 = -26.565 +; A1 = 62.000 env. 50mV/3300mV +; Fnor2 = 24.000 +; Ph2 = -116.565 +; A2 = 1024.000 + +; valeurs attendues pour k = 23 : +; Re 0x0378FDBD +; Im 0x01BAD0C5 env 0.5 * Re, car tan(26.565) ~= 0.5 +; M2 0x000F0D16 986390 +; +; valeurs attendues pour k = 24 : +; Re 0xE36136DD env -0.447 * 2^30 +; Im 0x393E61CA env -2 * Re, car tan(116.565) ~= 2.0 +; M2 0x0FFFF53C env 2^28 +; +; pour les autres valeurs de k sauf les alias de 23 et 24 : +; M2 < 0x0000000F + +TabSig + DCW 1646 ; 0 0x066e 0.40186 + DCW 3006 ; 1 0x0bbe 0.73389 + DCW 1094 ; 2 0x0446 0.26709 + DCW 2434 ; 3 0x0982 0.59424 + DCW 2465 ; 4 0x09a1 0.60181 + DCW 1066 ; 5 0x042a 0.26025 + DCW 3018 ; 6 0x0bca 0.73682 + DCW 1666 ; 7 0x0682 0.40674 + DCW 1610 ; 8 0x064a 0.39307 + DCW 3052 ; 9 0x0bec 0.74512 + DCW 1071 ; 10 0x042f 0.26147 + DCW 2417 ; 11 0x0971 0.59009 + DCW 2510 ; 12 0x09ce 0.61279 + DCW 1026 ; 13 0x0402 0.25049 + DCW 3024 ; 14 0x0bd0 0.73828 + DCW 1699 ; 15 0x06a3 0.41479 + DCW 1562 ; 16 0x061a 0.38135 + DCW 3080 ; 17 0x0c08 0.75195 + DCW 1083 ; 18 0x043b 0.26440 + DCW 2374 ; 19 0x0946 0.57959 + DCW 2553 ; 20 0x09f9 0.62329 + DCW 1015 ; 21 0x03f7 0.24780 + DCW 2995 ; 22 0x0bb3 0.73120 + DCW 1746 ; 23 0x06d2 0.42627 + DCW 1531 ; 24 0x05fb 0.37378 + DCW 3072 ; 25 0x0c00 0.75000 + DCW 1124 ; 26 0x0464 0.27441 + DCW 2329 ; 27 0x0919 0.56860 + DCW 2568 ; 28 0x0a08 0.62695 + DCW 1041 ; 29 0x0411 0.25415 + DCW 2948 ; 30 0x0b84 0.71973 + DCW 1781 ; 31 0x06f5 0.43481 + DCW 1535 ; 32 0x05ff 0.37476 + DCW 3033 ; 33 0x0bd9 0.74048 + DCW 1170 ; 34 0x0492 0.28564 + DCW 2310 ; 35 0x0906 0.56396 + DCW 2547 ; 36 0x09f3 0.62183 + DCW 1087 ; 37 0x043f 0.26538 + DCW 2910 ; 38 0x0b5e 0.71045 + DCW 1782 ; 39 0x06f6 0.43506 + DCW 1570 ; 40 0x0622 0.38330 + DCW 2986 ; 41 0x0baa 0.72900 + DCW 1194 ; 42 0x04aa 0.29150 + DCW 2327 ; 43 0x0917 0.56812 + DCW 2502 ; 44 0x09c6 0.61084 + DCW 1127 ; 45 0x0467 0.27515 + DCW 2904 ; 46 0x0b58 0.70898 + DCW 1749 ; 47 0x06d5 0.42700 + DCW 1618 ; 48 0x0652 0.39502 + DCW 2959 ; 49 0x0b8f 0.72241 + DCW 1181 ; 50 0x049d 0.28833 + DCW 2370 ; 51 0x0942 0.57861 + DCW 2459 ; 52 0x099b 0.60034 + DCW 1138 ; 53 0x0472 0.27783 + DCW 2933 ; 54 0x0b75 0.71606 + DCW 1702 ; 55 0x06a6 0.41553 + DCW 1649 ; 56 0x0671 0.40259 + DCW 2967 ; 57 0x0b97 0.72437 + DCW 1140 ; 58 0x0474 0.27832 + DCW 2414 ; 59 0x096e 0.58936 + DCW 2444 ; 60 0x098c 0.59668 + DCW 1112 ; 61 0x0458 0.27148 + DCW 2980 ; 62 0x0ba4 0.72754 + DCW 1668 ; 63 0x0684 0.40723 + + END + diff --git a/Objectif 1/Src/fonction.s b/Objectif 1/Src/fonction.s new file mode 100644 index 0000000..c8ad180 --- /dev/null +++ b/Objectif 1/Src/fonction.s @@ -0,0 +1,41 @@ +; ce programme est pour l'assembleur RealView (Keil) + thumb + + import TabCos + import TabSin + ;import TabSig + + area moncode, code, readonly + export reelle + +reelle proc + + mov r2, #0 + mov r3, #0 + + +boucle push {r3} + push {r0} + mul r0,r0,r2 + and r0,#0x3F + ldrsh r3, [r1, r0, LSL #0x01] + pop {r0} + ;push {r1} + ;ldr r1,=TabSig + ldrsh r12, [r9,r2, LSL #0x01] + ;pop {r1} + mul r12,r12,r3 + pop {r3} + add r3,r3,r12 + add r2,#1 + cmp r2,#64 + bne boucle + + mov r0,r3 + + + endp + bx lr + + end + diff --git a/Objectif 1/Src/module.s b/Objectif 1/Src/module.s new file mode 100644 index 0000000..3d03f33 --- /dev/null +++ b/Objectif 1/Src/module.s @@ -0,0 +1,37 @@ +; ce programme est pour l'assembleur RealView (Keil) + thumb + + import TabCos + import TabSin + import TabSig + import reelle + + area moncode, code, readonly + export module + +module proc + + push {lr} + push {r9} + push {r8} + mov r9,r1 + mov r8,r0 ;on garde la valeur k dans r8 + ldr r1,=TabSin + bl reelle + push {r0} + mov r0,r8 ;je remets la valeur k dans r8 + ldr r1,=TabCos + bl reelle + pop {r1} + SMULL r1,r2,r1,r1 + SMLAL r1,r2,r0,r0 + mov r0,r2 + pop {r8} + pop {r9} + pop {pc} + + endp + bx lr + + end + \ No newline at end of file diff --git a/Objectif 1/Src/module1.s b/Objectif 1/Src/module1.s new file mode 100644 index 0000000..1f28bc8 --- /dev/null +++ b/Objectif 1/Src/module1.s @@ -0,0 +1,26 @@ +; ce programme est pour l'assembleur RealView (Keil) + thumb + + import TabCos + import TabSin + import TabSig + + area moncode, code, readonly + export module + +module proc + ldr r1,=TabCos + bx boucle + push {r0} + ldr r1,=TabSin + bx boucle + pop {r1} + mla r0,r0,#1,r1 + + + + endp + bx lr + + end + diff --git a/Objectif 1/Src/principal.c b/Objectif 1/Src/principal.c new file mode 100644 index 0000000..45abdfc --- /dev/null +++ b/Objectif 1/Src/principal.c @@ -0,0 +1,15 @@ + +int module(int k,unsigned short *); +extern unsigned short TabSig; + +int S[64]; +int main(void) +{ + for(int i=0;i<64;i++) + { + S[i]=module(i,&TabSig); + } +while (1) + { + } +} diff --git a/Objectif 1/Src/startup-rvds.s b/Objectif 1/Src/startup-rvds.s new file mode 100644 index 0000000..a7b631a --- /dev/null +++ b/Objectif 1/Src/startup-rvds.s @@ -0,0 +1,335 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f10x_md.s +;* Author : MCD Application Team +;* Version : V3.5.0 +;* Date : 11-March-2011 +;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM +;* toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Configure the clock system +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD TAMPER_IRQHandler ; Tamper + DCD RTC_IRQHandler ; RTC + DCD FLASH_IRQHandler ; Flash + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line 0 + DCD EXTI1_IRQHandler ; EXTI Line 1 + DCD EXTI2_IRQHandler ; EXTI Line 2 + DCD EXTI3_IRQHandler ; EXTI Line 3 + DCD EXTI4_IRQHandler ; EXTI Line 4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1_2 + DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX + DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 + DCD TIM1_BRK_IRQHandler ; TIM1 Break + DCD TIM1_UP_IRQHandler ; TIM1 Update + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 + DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line + DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + +; +; Enable UsageFault, MemFault and Busfault interrupts +; +_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24 + LDR.W R0, =_SHCSR + LDR R1, [R0] ; Read CPACR + ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts + STR R1, [R0] ; Write back the modified value to the CPACR + DSB ; Wait for store to complete + +; +; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority) +; +_AIRCR EQU 0xE000ED0C +_AIRCR_VAL EQU 0x05FA0300 + LDR.W R0, =_AIRCR + LDR.W R1, =_AIRCR_VAL + STR R1,[R0] + +; +; Finaly, jump to main function (void main (void)) +; + LDR R0, =__main + BX R0 + ENDP + +SystemInit PROC + EXPORT SystemInit [WEAK] + BX LR + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] + EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT USBWakeUp_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +USB_HP_CAN1_TX_IRQHandler +USB_LP_CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTCAlarm_IRQHandler +USBWakeUp_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/Objectif 1/Src/tabsig.asm b/Objectif 1/Src/tabsig.asm new file mode 100644 index 0000000..b96fe11 --- /dev/null +++ b/Objectif 1/Src/tabsig.asm @@ -0,0 +1,75 @@ + AREA Signal, DATA, READWRITE + ;export TabSig + +; Fnor = 1.000 +; Ph = 0.000 +; A = 2048.000 + +TabSig + DCW 4095 ; 0 0x0fff 0.99976 + DCW 4086 ; 1 0x0ff6 0.99756 + DCW 4057 ; 2 0x0fd9 0.99048 + DCW 4008 ; 3 0x0fa8 0.97852 + DCW 3940 ; 4 0x0f64 0.96191 + DCW 3854 ; 5 0x0f0e 0.94092 + DCW 3751 ; 6 0x0ea7 0.91577 + DCW 3631 ; 7 0x0e2f 0.88647 + DCW 3496 ; 8 0x0da8 0.85352 + DCW 3347 ; 9 0x0d13 0.81714 + DCW 3186 ; 10 0x0c72 0.77783 + DCW 3013 ; 11 0x0bc5 0.73560 + DCW 2832 ; 12 0x0b10 0.69141 + DCW 2643 ; 13 0x0a53 0.64526 + DCW 2448 ; 14 0x0990 0.59766 + DCW 2249 ; 15 0x08c9 0.54907 + DCW 2048 ; 16 0x0800 0.50000 + DCW 1847 ; 17 0x0737 0.45093 + DCW 1648 ; 18 0x0670 0.40234 + DCW 1453 ; 19 0x05ad 0.35474 + DCW 1264 ; 20 0x04f0 0.30859 + DCW 1083 ; 21 0x043b 0.26440 + DCW 910 ; 22 0x038e 0.22217 + DCW 749 ; 23 0x02ed 0.18286 + DCW 600 ; 24 0x0258 0.14648 + DCW 465 ; 25 0x01d1 0.11353 + DCW 345 ; 26 0x0159 0.08423 + DCW 242 ; 27 0x00f2 0.05908 + DCW 156 ; 28 0x009c 0.03809 + DCW 88 ; 29 0x0058 0.02148 + DCW 39 ; 30 0x0027 0.00952 + DCW 10 ; 31 0x000a 0.00244 + DCW 0 ; 32 0x0000 0.00000 + DCW 10 ; 33 0x000a 0.00244 + DCW 39 ; 34 0x0027 0.00952 + DCW 88 ; 35 0x0058 0.02148 + DCW 156 ; 36 0x009c 0.03809 + DCW 242 ; 37 0x00f2 0.05908 + DCW 345 ; 38 0x0159 0.08423 + DCW 465 ; 39 0x01d1 0.11353 + DCW 600 ; 40 0x0258 0.14648 + DCW 749 ; 41 0x02ed 0.18286 + DCW 910 ; 42 0x038e 0.22217 + DCW 1083 ; 43 0x043b 0.26440 + DCW 1264 ; 44 0x04f0 0.30859 + DCW 1453 ; 45 0x05ad 0.35474 + DCW 1648 ; 46 0x0670 0.40234 + DCW 1847 ; 47 0x0737 0.45093 + DCW 2048 ; 48 0x0800 0.50000 + DCW 2249 ; 49 0x08c9 0.54907 + DCW 2448 ; 50 0x0990 0.59766 + DCW 2643 ; 51 0x0a53 0.64526 + DCW 2832 ; 52 0x0b10 0.69141 + DCW 3013 ; 53 0x0bc5 0.73560 + DCW 3186 ; 54 0x0c72 0.77783 + DCW 3347 ; 55 0x0d13 0.81714 + DCW 3496 ; 56 0x0da8 0.85352 + DCW 3631 ; 57 0x0e2f 0.88647 + DCW 3751 ; 58 0x0ea7 0.91577 + DCW 3854 ; 59 0x0f0e 0.94092 + DCW 3940 ; 60 0x0f64 0.96191 + DCW 4008 ; 61 0x0fa8 0.97852 + DCW 4057 ; 62 0x0fd9 0.99048 + DCW 4086 ; 63 0x0ff6 0.99756 + + END + diff --git a/Objectif 1/Src/trigo.asm b/Objectif 1/Src/trigo.asm new file mode 100644 index 0000000..cd1d094 --- /dev/null +++ b/Objectif 1/Src/trigo.asm @@ -0,0 +1,136 @@ + AREA Trigo, DATA, READONLY + export TabSin + export TabCos + +TabCos + DCW 32767 ; 0 0x7fff 0.99997 + DCW 32610 ; 1 0x7f62 0.99518 + DCW 32138 ; 2 0x7d8a 0.98077 + DCW 31357 ; 3 0x7a7d 0.95694 + DCW 30274 ; 4 0x7642 0.92389 + DCW 28899 ; 5 0x70e3 0.88193 + DCW 27246 ; 6 0x6a6e 0.83148 + DCW 25330 ; 7 0x62f2 0.77301 + DCW 23170 ; 8 0x5a82 0.70709 + DCW 20788 ; 9 0x5134 0.63440 + DCW 18205 ; 10 0x471d 0.55557 + DCW 15447 ; 11 0x3c57 0.47141 + DCW 12540 ; 12 0x30fc 0.38269 + DCW 9512 ; 13 0x2528 0.29028 + DCW 6393 ; 14 0x18f9 0.19510 + DCW 3212 ; 15 0x0c8c 0.09802 + DCW 0 ; 16 0x0000 0.00000 + DCW -3212 ; 17 0xf374 -0.09802 + DCW -6393 ; 18 0xe707 -0.19510 + DCW -9512 ; 19 0xdad8 -0.29028 + DCW -12540 ; 20 0xcf04 -0.38269 + DCW -15447 ; 21 0xc3a9 -0.47141 + DCW -18205 ; 22 0xb8e3 -0.55557 + DCW -20788 ; 23 0xaecc -0.63440 + DCW -23170 ; 24 0xa57e -0.70709 + DCW -25330 ; 25 0x9d0e -0.77301 + DCW -27246 ; 26 0x9592 -0.83148 + DCW -28899 ; 27 0x8f1d -0.88193 + DCW -30274 ; 28 0x89be -0.92389 + DCW -31357 ; 29 0x8583 -0.95694 + DCW -32138 ; 30 0x8276 -0.98077 + DCW -32610 ; 31 0x809e -0.99518 + DCW -32768 ; 32 0x8000 -1.00000 + DCW -32610 ; 33 0x809e -0.99518 + DCW -32138 ; 34 0x8276 -0.98077 + DCW -31357 ; 35 0x8583 -0.95694 + DCW -30274 ; 36 0x89be -0.92389 + DCW -28899 ; 37 0x8f1d -0.88193 + DCW -27246 ; 38 0x9592 -0.83148 + DCW -25330 ; 39 0x9d0e -0.77301 + DCW -23170 ; 40 0xa57e -0.70709 + DCW -20788 ; 41 0xaecc -0.63440 + DCW -18205 ; 42 0xb8e3 -0.55557 + DCW -15447 ; 43 0xc3a9 -0.47141 + DCW -12540 ; 44 0xcf04 -0.38269 + DCW -9512 ; 45 0xdad8 -0.29028 + DCW -6393 ; 46 0xe707 -0.19510 + DCW -3212 ; 47 0xf374 -0.09802 + DCW 0 ; 48 0x0000 0.00000 + DCW 3212 ; 49 0x0c8c 0.09802 + DCW 6393 ; 50 0x18f9 0.19510 + DCW 9512 ; 51 0x2528 0.29028 + DCW 12540 ; 52 0x30fc 0.38269 + DCW 15447 ; 53 0x3c57 0.47141 + DCW 18205 ; 54 0x471d 0.55557 + DCW 20788 ; 55 0x5134 0.63440 + DCW 23170 ; 56 0x5a82 0.70709 + DCW 25330 ; 57 0x62f2 0.77301 + DCW 27246 ; 58 0x6a6e 0.83148 + DCW 28899 ; 59 0x70e3 0.88193 + DCW 30274 ; 60 0x7642 0.92389 + DCW 31357 ; 61 0x7a7d 0.95694 + DCW 32138 ; 62 0x7d8a 0.98077 + DCW 32610 ; 63 0x7f62 0.99518 +TabSin + DCW 0 ; 0 0x0000 0.00000 + DCW 3212 ; 1 0x0c8c 0.09802 + DCW 6393 ; 2 0x18f9 0.19510 + DCW 9512 ; 3 0x2528 0.29028 + DCW 12540 ; 4 0x30fc 0.38269 + DCW 15447 ; 5 0x3c57 0.47141 + DCW 18205 ; 6 0x471d 0.55557 + DCW 20788 ; 7 0x5134 0.63440 + DCW 23170 ; 8 0x5a82 0.70709 + DCW 25330 ; 9 0x62f2 0.77301 + DCW 27246 ; 10 0x6a6e 0.83148 + DCW 28899 ; 11 0x70e3 0.88193 + DCW 30274 ; 12 0x7642 0.92389 + DCW 31357 ; 13 0x7a7d 0.95694 + DCW 32138 ; 14 0x7d8a 0.98077 + DCW 32610 ; 15 0x7f62 0.99518 + DCW 32767 ; 16 0x7fff 0.99997 + DCW 32610 ; 17 0x7f62 0.99518 + DCW 32138 ; 18 0x7d8a 0.98077 + DCW 31357 ; 19 0x7a7d 0.95694 + DCW 30274 ; 20 0x7642 0.92389 + DCW 28899 ; 21 0x70e3 0.88193 + DCW 27246 ; 22 0x6a6e 0.83148 + DCW 25330 ; 23 0x62f2 0.77301 + DCW 23170 ; 24 0x5a82 0.70709 + DCW 20788 ; 25 0x5134 0.63440 + DCW 18205 ; 26 0x471d 0.55557 + DCW 15447 ; 27 0x3c57 0.47141 + DCW 12540 ; 28 0x30fc 0.38269 + DCW 9512 ; 29 0x2528 0.29028 + DCW 6393 ; 30 0x18f9 0.19510 + DCW 3212 ; 31 0x0c8c 0.09802 + DCW 0 ; 32 0x0000 0.00000 + DCW -3212 ; 33 0xf374 -0.09802 + DCW -6393 ; 34 0xe707 -0.19510 + DCW -9512 ; 35 0xdad8 -0.29028 + DCW -12540 ; 36 0xcf04 -0.38269 + DCW -15447 ; 37 0xc3a9 -0.47141 + DCW -18205 ; 38 0xb8e3 -0.55557 + DCW -20788 ; 39 0xaecc -0.63440 + DCW -23170 ; 40 0xa57e -0.70709 + DCW -25330 ; 41 0x9d0e -0.77301 + DCW -27246 ; 42 0x9592 -0.83148 + DCW -28899 ; 43 0x8f1d -0.88193 + DCW -30274 ; 44 0x89be -0.92389 + DCW -31357 ; 45 0x8583 -0.95694 + DCW -32138 ; 46 0x8276 -0.98077 + DCW -32610 ; 47 0x809e -0.99518 + DCW -32768 ; 48 0x8000 -1.00000 + DCW -32610 ; 49 0x809e -0.99518 + DCW -32138 ; 50 0x8276 -0.98077 + DCW -31357 ; 51 0x8583 -0.95694 + DCW -30274 ; 52 0x89be -0.92389 + DCW -28899 ; 53 0x8f1d -0.88193 + DCW -27246 ; 54 0x9592 -0.83148 + DCW -25330 ; 55 0x9d0e -0.77301 + DCW -23170 ; 56 0xa57e -0.70709 + DCW -20788 ; 57 0xaecc -0.63440 + DCW -18205 ; 58 0xb8e3 -0.55557 + DCW -15447 ; 59 0xc3a9 -0.47141 + DCW -12540 ; 60 0xcf04 -0.38269 + DCW -9512 ; 61 0xdad8 -0.29028 + DCW -6393 ; 62 0xe707 -0.19510 + DCW -3212 ; 63 0xf374 -0.09802 + + END diff --git a/README.md b/README.md index 14327ef..c110ed6 100644 --- a/README.md +++ b/README.md @@ -1,2 +1,17 @@ # BE-INTE +****OBJECTIF 1**** + +-> Ouvrir le projet +-> Décider de quel test effectuer entre f1p-45.asm, f17p30_f18p135.asm et f23p-26_f24p-116.asm +-> Une fois le test choisi, aller dans le fichier correspondant +-> Retirer le ';' devant la ligne export TabSig +-> S'assurer que ce ';' est présent devant la même ligne sur les deux autres fichiers +-> Dans principal.c mettre un point d'arrêt devant la ligne while(1) s'il n'y en a pas déjà un +-> Compiler et aller dans le débugger +-> Cliquer sur View > Watch Windows > Watch 1 +-> Dans la fenêtre Watch 1, entrer la variable S qui est en fait un tableau +-> Lancer la simulation +-> Dans la fenêtre Watch 1, cliquer sur le '+' devant le S et s'assurer qu'on a bien les valeurs correspondantes pour les différentes valeurs. +Exemple: Pour f17p30_f18p135.asm, S[17]=0x0FFFA278 et S[18]=0x10005BE5 sont attendus +