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Etape 2.2 presque terminée

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Nabzzz 2020-03-26 16:13:37 +01:00
parent 24ff4477ed
commit bde787b899
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36
PROJ_QUATRE/DebugConfig/Simu_STM32F103RB_1.0.0.dbgconf Normal file
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// File: STM32F101_102_103_105_107.dbgconf
// Version: 1.0.0
// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU configuration register (DBGMCU_CR)
// <i> Reserved bits must be kept at reset value
// <o.30> DBG_TIM11_STOP <i> TIM11 counter stopped when core is halted
// <o.29> DBG_TIM10_STOP <i> TIM10 counter stopped when core is halted
// <o.28> DBG_TIM9_STOP <i> TIM9 counter stopped when core is halted
// <o.27> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted
// <o.26> DBG_TIM13_STOP <i> TIM13 counter stopped when core is halted
// <o.25> DBG_TIM12_STOP <i> TIM12 counter stopped when core is halted
// <o.21> DBG_CAN2_STOP <i> Debug CAN2 stopped when core is halted
// <o.20> DBG_TIM7_STOP <i> TIM7 counter stopped when core is halted
// <o.19> DBG_TIM6_STOP <i> TIM6 counter stopped when core is halted
// <o.18> DBG_TIM5_STOP <i> TIM5 counter stopped when core is halted
// <o.17> DBG_TIM8_STOP <i> TIM8 counter stopped when core is halted
// <o.16> DBG_I2C2_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.15> DBG_I2C1_SMBUS_TIMEOUT <i> SMBUS timeout mode stopped when core is halted
// <o.14> DBG_CAN1_STOP <i> Debug CAN1 stopped when Core is halted
// <o.13> DBG_TIM4_STOP <i> TIM4 counter stopped when core is halted
// <o.12> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted
// <o.11> DBG_TIM2_STOP <i> TIM2 counter stopped when core is halted
// <o.10> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted
// <o.9> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted
// <o.8> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted
// <o.2> DBG_STANDBY <i> Debug standby mode
// <o.1> DBG_STOP <i> Debug stop mode
// <o.0> DBG_SLEEP <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

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PROJ_QUATRE/EventRecorderStub.scvd Normal file
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<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>

BIN
PROJ_QUATRE/Obj/CHTI.axf Normal file
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PROJ_QUATRE/Obj/CHTI.build_log.htm Normal file
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<html>
<body>
<pre>
<h1>µVision Build Log</h1>
<h2>Tool Versions:</h2>
IDE-Version: µVision V5.29.0.0
Copyright (C) 2019 ARM Ltd and ARM Germany GmbH. All rights reserved.
License Information: Nabil Moukhlis, None, LIC=----
Tool Versions:
Toolchain: MDK-Lite Version: 5.29.0.0
Toolchain Path: C:\Keil_v5\ARM\ARMCC\Bin
C Compiler: Armcc.exe V5.06 update 6 (build 750)
Assembler: Armasm.exe V5.06 update 6 (build 750)
Linker/Locator: ArmLink.exe V5.06 update 6 (build 750)
Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
CPU DLL: SARMCM3.DLL V5.29.0.0
Dialog DLL: DARMSTM.DLL V1.68.0.0
Target DLL: STLink\ST-LINKIII-KEIL_SWO.dll V3.0.7.0
Dialog DLL: TCM.DLL V1.36.5.0
<h2>Project:</h2>
C:\Users\nmouk\Desktop\BE chti\BE-CHTI\PROJ_QUATRE\Project.uvprojx
Project File Date: 03/26/2020
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Rebuild target 'Simu'
assembling tabsig.asm...
assembling startup-rvds.s...
assembling trigo.asm...
assembling module.s...
assembling fonction.s...
assembling f1p-45.asm...
compiling principal.c...
assembling f17p30_f18p135.asm...
assembling f23p-26_f24p-116.asm...
linking...
Program Size: Code=308 RO-data=636 RW-data=0 ZI-data=1280
FromELF: creating hex file...
".\Obj\CHTI.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
Package Vendor: ARM
http://www.keil.com/pack/ARM.CMSIS.5.6.0.pack
ARM.CMSIS.5.6.0
CMSIS (Cortex Microcontroller Software Interface Standard)
* Component: CORE Version: 5.3.0
Package Vendor: Keil
http://www.keil.com/pack/Keil.STM32F1xx_DFP.2.3.0.pack
Keil.STM32F1xx_DFP.2.3.0
STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
<h2>Collection of Component include folders:</h2>
.\RTE\_Simu
C:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include
C:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include
<h2>Collection of Component Files used:</h2>
* Component: ARM::CMSIS:CORE:5.3.0
Build Time Elapsed: 00:00:01
</pre>
</body>
</html>

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PROJ_QUATRE/Obj/CHTI.hex Normal file
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:020000040800F2
:100000000005002001010008250100082701000863
:10001000290100082B0100082D0100080000000044
:100020000000000000000000000000002F01000898
:10003000310100080000000033010008350100080C
:1000400037010008370100083701000837010008B0
:1000500037010008370100083701000837010008A0
:100060003701000837010008370100083701000890
:100070003701000837010008370100083701000880
:100080003701000837010008370100083701000870
:100090003701000837010008370100083701000860
:1000A0003701000837010008370100083701000850
:1000B0003701000837010008370100083701000840
:1000C0003701000837010008370100083701000830
:1000D0003701000837010008370100083701000820
:1000E000370100083701000837010008DFF80CD09D
:1000F00000F02CF80048004791010008000500209E
:100100000D488047DFF83400016841F4E0210160C8
:10011000BFF34F8FDFF82800DFF8281001600A488E
:1001200000477047FEE7FEE7FEE7FEE7FEE7FEE773
:10013000FEE7FEE7FEE7FEE72301000824ED00E00E
:100140000CED00E00003FA05ED000008064C074D39
:1001500006E0E06840F0010394E807009847103497
:10016000AC42F6D3FFF7C6FF2002000830020008B9
:1001700002E008C8121F08C1002AFAD17047704770
:10018000002001E001C1121F002AFBD170470000CE
:10019000002406E0204600F029F8044941F8240034
:1001A000641C402CF6DB00BFFEE7000000000020CE
:1001B0004FF000024FF0000308B401B400FB02F05E
:1001C00000F03F0031F9103001BC02B4064931F9AA
:1001D00012C002BC0CFB03FC08BC634402F1010228
:1001E000402AE9D1184670473002000800B54DF8A2
:1001F000048D80460849FFF7DBFF01B440460749FC
:10020000FFF7D6FF02BC81FB0112C0FB00121046B3
:100210005DF8048B00BD704730030008B002000891
:10022000B003000800000020000500008001000865
:10023000A3087303B008B30B6F066205ED098509C7
:1002400035066107450913087A070708C1075108F1
:10025000D408F906F106F409D4081B05E407A20B3B
:10026000F7060604760ACB0B0904FC04520DAD090F
:10027000B5011C08B40EDC0591012D0C770D0902A7
:100280002304460FCB0914008608D20F2F0508015E
:10029000D40C790DAB017C042C0F5509B800D008A3
:1002A000B10E53057A020E0CF70B2B03BE05FA0CA8
:1002B000FF7F627F8A7D7D7A4276E3706E6AF262AA
:1002C000825A34511D47573CFC302825F9188C0CB4
:1002D000000074F307E7D8DA04CFA9C3E3B8CCAEC3
:1002E0007EA50E9D92951D8FBE89838576829E8008
:1002F00000809E8076828385BE891D8F92950E9D9B
:100300007EA5CCAEE3B8A9C304CFD8DA07E774F36F
:1003100000008C0CF9182825FC30573C1D4734513F
:10032000825AF2626E6AE37042767D7A8A7D627FDB
:1003300000008C0CF9182825FC30573C1D4734511F
:10034000825AF2626E6AE37042767D7A8A7D627FBB
:10035000FF7F627F8A7D7D7A4276E3706E6AF26209
:10036000825A34511D47573CFC302825F9188C0C13
:10037000000074F307E7D8DA04CFA9C3E3B8CCAE22
:100380007EA50E9D92951D8FBE89838576829E8067
:1003900000809E8076828385BE891D8F92950E9DFA
:1003A0007EA5CCAEE3B8A9C304CFD8DA07E774F3CF
:04000005080000ED02
:00000001FF

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PROJ_QUATRE/Obj/CHTI.htm Normal file
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html><head>
<title>Static Call Graph - [.\Obj\CHTI.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\Obj\CHTI.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Thu Mar 26 15:57:10 2020
<BR><P>
<H3>Maximum Stack Usage = 0 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
<LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
<LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
<LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
<LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
<LI><a href="#[6]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[6]">SVC_Handler</a><BR>
<LI><a href="#[7]">DebugMon_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[7]">DebugMon_Handler</a><BR>
<LI><a href="#[8]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[8]">PendSV_Handler</a><BR>
<LI><a href="#[9]">SysTick_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[9]">SysTick_Handler</a><BR>
<LI><a href="#[1c]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC1_2_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
<LI><a href="#[1c]">ADC1_2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[4]">BusFault_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[15]">DMA1_Channel1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[16]">DMA1_Channel2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[17]">DMA1_Channel3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[18]">DMA1_Channel4_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[19]">DMA1_Channel5_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1a]">DMA1_Channel6_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1b]">DMA1_Channel7_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[7]">DebugMon_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[10]">EXTI0_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[11]">EXTI1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[12]">EXTI2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[13]">EXTI3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[14]">EXTI4_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[e]">FLASH_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2]">HardFault_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[3]">MemManage_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1]">NMI_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[b]">PVD_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[8]">PendSV_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[f]">RCC_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[33]">RTCAlarm_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[d]">RTC_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[0]">Reset_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2d]">SPI1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2e]">SPI2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[6]">SVC_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[9]">SysTick_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[36]">SystemInit</a> from startup-rvds.o(.text) referenced from startup-rvds.o(.text)
<LI><a href="#[c]">TAMPER_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[26]">TIM2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[27]">TIM3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[28]">TIM4_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[2f]">USART1_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[30]">USART2_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[31]">USART3_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[34]">USBWakeUp_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1d]">USB_HP_CAN1_TX_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[1e]">USB_LP_CAN1_RX0_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[5]">UsageFault_Handler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[a]">WWDG_IRQHandler</a> from startup-rvds.o(.text) referenced from startup-rvds.o(RESET)
<LI><a href="#[37]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup-rvds.o(.text)
<LI><a href="#[35]">main</a> from principal.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[37]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(.text)
</UL>
<P><STRONG><a name="[3d]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
<P><STRONG><a name="[38]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>
<P><STRONG><a name="[3a]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>
<P><STRONG><a name="[3e]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
<P><STRONG><a name="[3f]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
<P><STRONG><a name="[40]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
<P><STRONG><a name="[41]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
<P><STRONG><a name="[42]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>SystemInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(.text)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTCAlarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup-rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup-rvds.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>
<P><STRONG><a name="[43]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
<P><STRONG><a name="[44]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
<P><STRONG><a name="[45]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
<P><STRONG><a name="[46]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
<P><STRONG><a name="[35]"></a>main</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, principal.o(i.main))
<BR><BR>[Calls]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;module
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[3c]"></a>reelle</STRONG> (Thumb, 54 bytes, Stack size 0 bytes, fonction.o(moncode))
<BR><BR>[Called By]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;module
</UL>
<P><STRONG><a name="[3b]"></a>module</STRONG> (Thumb, 42 bytes, Stack size 0 bytes, module.o(moncode))
<BR><BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reelle
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P>
<H3>
Local Symbols
</H3><P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>

14
PROJ_QUATRE/Obj/CHTI.lnp Normal file
View file

@ -0,0 +1,14 @@
--cpu Cortex-M3
".\obj\startup-rvds.o"
".\obj\principal.o"
".\obj\fonction.o"
".\obj\module.o"
".\obj\tabsig.o"
".\obj\trigo.o"
".\obj\f1p-45.o"
".\obj\f17p30_f18p135.o"
".\obj\f23p-26_f24p-116.o"
--library_type=microlib --strict --scatter ".\Obj\CHTI.sct"
--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
--info sizes --info totals --info unused --info veneers
--list "CHTI.map" -o .\Obj\CHTI.axf

306
PROJ_QUATRE/Obj/CHTI.map Normal file
View file

@ -0,0 +1,306 @@
Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed]
==============================================================================
Section Cross References
startup-rvds.o(RESET) refers to startup-rvds.o(STACK) for __initial_sp
startup-rvds.o(RESET) refers to startup-rvds.o(.text) for Reset_Handler
startup-rvds.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main
principal.o(i.main) refers to module.o(moncode) for module
principal.o(i.main) refers to principal.o(.bss) for S
fonction.o(moncode) refers (Special) to trigo.o(Trigo) for TabCos
fonction.o(moncode) refers to f17p30_f18p135.o(Signal) for TabSig
module.o(moncode) refers (Special) to f17p30_f18p135.o(Signal) for TabSig
module.o(moncode) refers to fonction.o(moncode) for reelle
module.o(moncode) refers to trigo.o(Trigo) for TabSin
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload
entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk
entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000
entry2.o(.ARM.Collect$$$$00002712) refers to startup-rvds.o(STACK) for __initial_sp
entry2.o(__vectab_stack_and_reset_area) refers to startup-rvds.o(STACK) for __initial_sp
entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main
entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload
entry9a.o(.ARM.Collect$$$$0000000B) refers to principal.o(i.main) for main
entry9b.o(.ARM.Collect$$$$0000000C) refers to principal.o(i.main) for main
init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload
==============================================================================
Removing Unused input sections from the image.
Removing startup-rvds.o(HEAP), (512 bytes).
Removing tabsig.o(Signal), (128 bytes).
Removing f1p-45.o(Signal), (128 bytes).
Removing f23p-26_f24p-116.o(Signal), (128 bytes).
4 unused section(s) (total 896 bytes) removed from the image.
==============================================================================
Image Symbol Table
Local Symbols
Symbol Name Value Ov Type Size Object(Section)
../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE
../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE
Src\principal.c 0x00000000 Number 0 principal.o ABSOLUTE
Src\startup-rvds.s 0x00000000 Number 0 startup-rvds.o ABSOLUTE
dc.s 0x00000000 Number 0 dc.o ABSOLUTE
f17p30_f18p135.asm 0x00000000 Number 0 f17p30_f18p135.o ABSOLUTE
f1p-45.asm 0x00000000 Number 0 f1p-45.o ABSOLUTE
f23p-26_f24p-116.asm 0x00000000 Number 0 f23p-26_f24p-116.o ABSOLUTE
fonction.s 0x00000000 Number 0 fonction.o ABSOLUTE
handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE
init.s 0x00000000 Number 0 init.o ABSOLUTE
module.s 0x00000000 Number 0 module.o ABSOLUTE
tabsig.asm 0x00000000 Number 0 tabsig.o ABSOLUTE
trigo.asm 0x00000000 Number 0 trigo.o ABSOLUTE
RESET 0x08000000 Section 236 startup-rvds.o(RESET)
.ARM.Collect$$$$00000000 0x080000ec Section 0 entry.o(.ARM.Collect$$$$00000000)
.ARM.Collect$$$$00000001 0x080000ec Section 4 entry2.o(.ARM.Collect$$$$00000001)
.ARM.Collect$$$$00000004 0x080000f0 Section 4 entry5.o(.ARM.Collect$$$$00000004)
.ARM.Collect$$$$00000008 0x080000f4 Section 0 entry7b.o(.ARM.Collect$$$$00000008)
.ARM.Collect$$$$0000000A 0x080000f4 Section 0 entry8b.o(.ARM.Collect$$$$0000000A)
.ARM.Collect$$$$0000000B 0x080000f4 Section 8 entry9a.o(.ARM.Collect$$$$0000000B)
.ARM.Collect$$$$0000000D 0x080000fc Section 0 entry10a.o(.ARM.Collect$$$$0000000D)
.ARM.Collect$$$$0000000F 0x080000fc Section 0 entry11a.o(.ARM.Collect$$$$0000000F)
.ARM.Collect$$$$00002712 0x080000fc Section 4 entry2.o(.ARM.Collect$$$$00002712)
__lit__00000000 0x080000fc Data 4 entry2.o(.ARM.Collect$$$$00002712)
.text 0x08000100 Section 76 startup-rvds.o(.text)
.text 0x0800014c Section 36 init.o(.text)
i.__scatterload_copy 0x08000170 Section 14 handlers.o(i.__scatterload_copy)
i.__scatterload_null 0x0800017e Section 2 handlers.o(i.__scatterload_null)
i.__scatterload_zeroinit 0x08000180 Section 14 handlers.o(i.__scatterload_zeroinit)
i.main 0x08000190 Section 0 principal.o(i.main)
moncode 0x080001b0 Section 60 fonction.o(moncode)
moncode 0x080001ec Section 52 module.o(moncode)
Signal 0x08000230 Section 128 f17p30_f18p135.o(Signal)
Trigo 0x080002b0 Section 256 trigo.o(Trigo)
.bss 0x20000000 Section 256 principal.o(.bss)
STACK 0x20000100 Section 1024 startup-rvds.o(STACK)
Global Symbols
Symbol Name Value Ov Type Size Object(Section)
BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$EBA8$MICROLIB$REQ8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE
__ARM_use_no_argv 0x00000000 Number 0 principal.o ABSOLUTE
__cpp_initialize__aeabi_ - Undefined Weak Reference
__cxa_finalize - Undefined Weak Reference
__decompress - Undefined Weak Reference
_clock_init - Undefined Weak Reference
_microlib_exit - Undefined Weak Reference
__Vectors_Size 0x000000ec Number 0 startup-rvds.o ABSOLUTE
__Vectors 0x08000000 Data 4 startup-rvds.o(RESET)
__Vectors_End 0x080000ec Data 0 startup-rvds.o(RESET)
__main 0x080000ed Thumb Code 0 entry.o(.ARM.Collect$$$$00000000)
_main_stk 0x080000ed Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001)
_main_scatterload 0x080000f1 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004)
__main_after_scatterload 0x080000f5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004)
_main_clock 0x080000f5 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008)
_main_cpp_init 0x080000f5 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A)
_main_init 0x080000f5 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B)
__rt_final_cpp 0x080000fd Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D)
__rt_final_exit 0x080000fd Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F)
Reset_Handler 0x08000101 Thumb Code 34 startup-rvds.o(.text)
SystemInit 0x08000123 Thumb Code 2 startup-rvds.o(.text)
NMI_Handler 0x08000125 Thumb Code 2 startup-rvds.o(.text)
HardFault_Handler 0x08000127 Thumb Code 2 startup-rvds.o(.text)
MemManage_Handler 0x08000129 Thumb Code 2 startup-rvds.o(.text)
BusFault_Handler 0x0800012b Thumb Code 2 startup-rvds.o(.text)
UsageFault_Handler 0x0800012d Thumb Code 2 startup-rvds.o(.text)
SVC_Handler 0x0800012f Thumb Code 2 startup-rvds.o(.text)
DebugMon_Handler 0x08000131 Thumb Code 2 startup-rvds.o(.text)
PendSV_Handler 0x08000133 Thumb Code 2 startup-rvds.o(.text)
SysTick_Handler 0x08000135 Thumb Code 2 startup-rvds.o(.text)
ADC1_2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
CAN1_RX1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
CAN1_SCE_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel5_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel6_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
DMA1_Channel7_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI0_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI15_10_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
EXTI9_5_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
FLASH_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C1_ER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C1_EV_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C2_ER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
I2C2_EV_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
PVD_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
RCC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
RTCAlarm_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
RTC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
SPI1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
SPI2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TAMPER_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_BRK_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_CC_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_TRG_COM_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM1_UP_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
TIM4_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USART1_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USART2_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USART3_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USBWakeUp_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USB_HP_CAN1_TX_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
USB_LP_CAN1_RX0_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
WWDG_IRQHandler 0x08000137 Thumb Code 0 startup-rvds.o(.text)
__scatterload 0x0800014d Thumb Code 28 init.o(.text)
__scatterload_rt2 0x0800014d Thumb Code 0 init.o(.text)
__scatterload_copy 0x08000171 Thumb Code 14 handlers.o(i.__scatterload_copy)
__scatterload_null 0x0800017f Thumb Code 2 handlers.o(i.__scatterload_null)
__scatterload_zeroinit 0x08000181 Thumb Code 14 handlers.o(i.__scatterload_zeroinit)
main 0x08000191 Thumb Code 26 principal.o(i.main)
reelle 0x080001b1 Thumb Code 54 fonction.o(moncode)
module 0x080001ed Thumb Code 42 module.o(moncode)
Region$$Table$$Base 0x08000220 Number 0 anon$$obj.o(Region$$Table)
Region$$Table$$Limit 0x08000230 Number 0 anon$$obj.o(Region$$Table)
TabSig 0x08000230 Data 0 f17p30_f18p135.o(Signal)
TabCos 0x080002b0 Data 0 trigo.o(Trigo)
TabSin 0x08000330 Data 0 trigo.o(Trigo)
S 0x20000000 Data 256 principal.o(.bss)
__initial_sp 0x20000500 Data 0 startup-rvds.o(STACK)
==============================================================================
Memory Map of the image
Image Entry point : 0x080000ed
Load Region LR_IROM1 (Base: 0x08000000, Size: 0x000003b0, Max: 0x00020000, ABSOLUTE)
Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x000003b0, Max: 0x00020000, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x08000000 0x08000000 0x000000ec Data RO 3 RESET startup-rvds.o
0x080000ec 0x080000ec 0x00000000 Code RO 37 * .ARM.Collect$$$$00000000 mc_w.l(entry.o)
0x080000ec 0x080000ec 0x00000004 Code RO 40 .ARM.Collect$$$$00000001 mc_w.l(entry2.o)
0x080000f0 0x080000f0 0x00000004 Code RO 43 .ARM.Collect$$$$00000004 mc_w.l(entry5.o)
0x080000f4 0x080000f4 0x00000000 Code RO 45 .ARM.Collect$$$$00000008 mc_w.l(entry7b.o)
0x080000f4 0x080000f4 0x00000000 Code RO 47 .ARM.Collect$$$$0000000A mc_w.l(entry8b.o)
0x080000f4 0x080000f4 0x00000008 Code RO 48 .ARM.Collect$$$$0000000B mc_w.l(entry9a.o)
0x080000fc 0x080000fc 0x00000000 Code RO 50 .ARM.Collect$$$$0000000D mc_w.l(entry10a.o)
0x080000fc 0x080000fc 0x00000000 Code RO 52 .ARM.Collect$$$$0000000F mc_w.l(entry11a.o)
0x080000fc 0x080000fc 0x00000004 Code RO 41 .ARM.Collect$$$$00002712 mc_w.l(entry2.o)
0x08000100 0x08000100 0x0000004c Code RO 4 .text startup-rvds.o
0x0800014c 0x0800014c 0x00000024 Code RO 54 .text mc_w.l(init.o)
0x08000170 0x08000170 0x0000000e Code RO 58 i.__scatterload_copy mc_w.l(handlers.o)
0x0800017e 0x0800017e 0x00000002 Code RO 59 i.__scatterload_null mc_w.l(handlers.o)
0x08000180 0x08000180 0x0000000e Code RO 60 i.__scatterload_zeroinit mc_w.l(handlers.o)
0x0800018e 0x0800018e 0x00000002 PAD
0x08000190 0x08000190 0x00000020 Code RO 10 i.main principal.o
0x080001b0 0x080001b0 0x0000003c Code RO 24 moncode fonction.o
0x080001ec 0x080001ec 0x00000034 Code RO 28 moncode module.o
0x08000220 0x08000220 0x00000010 Data RO 56 Region$$Table anon$$obj.o
0x08000230 0x08000230 0x00000080 Data RO 35 Signal f17p30_f18p135.o
0x080002b0 0x080002b0 0x00000100 Data RO 33 Trigo trigo.o
Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x080003b0, Size: 0x00000500, Max: 0x00005000, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x20000000 - 0x00000100 Zero RW 11 .bss principal.o
0x20000100 - 0x00000400 Zero RW 1 STACK startup-rvds.o
==============================================================================
Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
0 0 128 0 0 0 f17p30_f18p135.o
60 4 0 0 0 324 fonction.o
52 8 0 0 0 316 module.o
32 6 0 0 256 2283 principal.o
76 20 236 0 1024 840 startup-rvds.o
0 0 256 0 0 0 trigo.o
----------------------------------------------------------------------
220 38 636 0 1280 3763 Object Totals
0 0 16 0 0 0 (incl. Generated)
0 0 0 0 0 0 (incl. Padding)
----------------------------------------------------------------------
Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name
0 0 0 0 0 0 entry.o
0 0 0 0 0 0 entry10a.o
0 0 0 0 0 0 entry11a.o
8 4 0 0 0 0 entry2.o
4 0 0 0 0 0 entry5.o
0 0 0 0 0 0 entry7b.o
0 0 0 0 0 0 entry8b.o
8 4 0 0 0 0 entry9a.o
30 0 0 0 0 0 handlers.o
36 8 0 0 0 68 init.o
----------------------------------------------------------------------
88 16 0 0 0 68 Library Totals
2 0 0 0 0 0 (incl. Padding)
----------------------------------------------------------------------
Code (inc. data) RO Data RW Data ZI Data Debug Library Name
86 16 0 0 0 68 mc_w.l
----------------------------------------------------------------------
88 16 0 0 0 68 Library Totals
----------------------------------------------------------------------
==============================================================================
Code (inc. data) RO Data RW Data ZI Data Debug
308 54 636 0 1280 3879 Grand Totals
308 54 636 0 1280 3879 ELF Image Totals
308 54 636 0 0 0 ROM Totals
==============================================================================
Total RO Size (Code + RO Data) 944 ( 0.92kB)
Total RW Size (RW Data + ZI Data) 1280 ( 1.25kB)
Total ROM Size (Code + RO Data + RW Data) 944 ( 0.92kB)
==============================================================================

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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00020000 { ; load region size_region
ER_IROM1 0x08000000 0x00020000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
.ANY (+XO)
}
RW_IRAM1 0x20000000 0x00005000 { ; RW data
.ANY (+RW +ZI)
}
}

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Dependencies for Project 'Project', Target 'Simu': (DO NOT MODIFY !)
CompilerVersion: 5060750::V5.06 update 6 (build 750)::ARMCC
F (.\Src\startup-rvds.s)(0x51CAF88C)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list startup-rvds.lst --xref -o .\obj\startup-rvds.o --depend .\obj\startup-rvds.d)
F (.\Src\principal.c)(0x5E7CBF91)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections --C99 -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="529" -D_RTE_ -DSTM32F10X_MD -DSTM32F103xB -DUSE_FULL_LL_DRIVER -o .\obj\principal.o --omf_browse .\obj\principal.crf --depend .\obj\principal.d)
F (.\fonction.s)(0x5E7CB3A9)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list fonction.lst --xref -o .\obj\fonction.o --depend .\obj\fonction.d)
F (.\module.s)(0x5E7CBDCF)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list module.lst --xref -o .\obj\module.o --depend .\obj\module.d)
F (.\tabsig.asm)(0x5E7CB78A)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list tabsig.lst --xref -o .\obj\tabsig.o --depend .\obj\tabsig.d)
F (.\trigo.asm)(0x5E7CBA75)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list trigo.lst --xref -o .\obj\trigo.o --depend .\obj\trigo.d)
F (.\f1p-45.asm)(0x5E7CC167)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list f1p-45.lst --xref -o .\obj\f1p-45.o --depend .\obj\f1p-45.d)
F (.\f17p30_f18p135.asm)(0x5E7516DF)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list f17p30_f18p135.lst --xref -o .\obj\f17p30_f18p135.o --depend .\obj\f17p30_f18p135.d)
F (.\f23p-26_f24p-116.asm)(0x5E7CC2BE)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\_Simu -IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --list f23p-26_f24p-116.lst --xref -o .\obj\f23p-26_f24p-116.o --depend .\obj\f23p-26_f24p-116.d)

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.\obj\f17p30_f18p135.o: f17p30_f18p135.asm

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.\obj\f1p-45.o: f1p-45.asm

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.\obj\f23p-26_f24p-116.o: f23p-26_f24p-116.asm

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--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1"
-I.\RTE\_Simu
-IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include
-IC:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include
--pd "__UVISION_VERSION SETA 529" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1"
--list fonction.lst --xref -o .\obj\fonction.o --depend .\obj\fonction.d "fonction.s"

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.\obj\fonction.o: fonction.s

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.\obj\module.o: module.s

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.\obj\principal.o: Src\principal.c

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.\obj\startup-rvds.o: Src\startup-rvds.s

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.\obj\tabsig.o: tabsig.asm

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.\obj\trigo.o: trigo.asm

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath></ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>18</CpuCode>
<DebugOpt>
<uSim>1</uSim>
<uTrg>0</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>1</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>5</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=859,154,1280,581,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGTARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name>-T0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGUARM</Key>
<Name>(105=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM))</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ST-LINKIII-KEIL_SWO</Key>
<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>11</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>0</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount>
<Filename>.\Src\principal.c</Filename>
<ExecCommand></ExecCommand>
<Expression></Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>S</ItemText>
</Ww>
</WatchWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>0</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
<Group>
<GroupName>Sources</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\startup-rvds.s</PathWithFileName>
<FilenameWithoutPath>startup-rvds.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\Src\principal.c</PathWithFileName>
<FilenameWithoutPath>principal.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
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<bDave2>0</bDave2>
<PathWithFileName>.\fonction.s</PathWithFileName>
<FilenameWithoutPath>fonction.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
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</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
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<bDave2>0</bDave2>
<PathWithFileName>.\module.s</PathWithFileName>
<FilenameWithoutPath>module.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\tabsig.asm</PathWithFileName>
<FilenameWithoutPath>tabsig.asm</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
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<FileType>2</FileType>
<tvExp>0</tvExp>
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<bDave2>0</bDave2>
<PathWithFileName>.\trigo.asm</PathWithFileName>
<FilenameWithoutPath>trigo.asm</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>7</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
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<bDave2>0</bDave2>
<PathWithFileName>.\f1p-45.asm</PathWithFileName>
<FilenameWithoutPath>f1p-45.asm</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>8</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
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<RteFlg>0</RteFlg>
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</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>9</FileNumber>
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<tvExp>0</tvExp>
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<PathWithFileName>.\f23p-26_f24p-116.asm</PathWithFileName>
<FilenameWithoutPath>f23p-26_f24p-116.asm</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

452
PROJ_QUATRE/Project.uvprojx Normal file
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@ -0,0 +1,452 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>Simu</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F103RB</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.3.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId></DeviceId>
<RegisterFile></RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:STM32F103RB$SVD\STM32F103xx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Obj\</OutputDirectory>
<OutputName>CHTI</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath></ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>0</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-REMAP</SimDllArguments>
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
<SimDlgDllArguments>-pSTM32F103RB</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4100</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x5000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>--C99</MiscControls>
<Define>STM32F103xB,USE_FULL_LL_DRIVER</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Sources</GroupName>
<Files>
<File>
<FileName>startup-rvds.s</FileName>
<FileType>2</FileType>
<FilePath>.\Src\startup-rvds.s</FilePath>
</File>
<File>
<FileName>principal.c</FileName>
<FileType>1</FileType>
<FilePath>.\Src\principal.c</FilePath>
</File>
<File>
<FileName>fonction.s</FileName>
<FileType>2</FileType>
<FilePath>.\fonction.s</FilePath>
</File>
<File>
<FileName>module.s</FileName>
<FileType>2</FileType>
<FilePath>.\module.s</FilePath>
</File>
<File>
<FileName>tabsig.asm</FileName>
<FileType>2</FileType>
<FilePath>.\tabsig.asm</FilePath>
</File>
<File>
<FileName>trigo.asm</FileName>
<FileType>2</FileType>
<FilePath>.\trigo.asm</FilePath>
</File>
<File>
<FileName>f1p-45.asm</FileName>
<FileType>2</FileType>
<FilePath>.\f1p-45.asm</FilePath>
</File>
<File>
<FileName>f17p30_f18p135.asm</FileName>
<FileType>2</FileType>
<FilePath>.\f17p30_f18p135.asm</FilePath>
</File>
<File>
<FileName>f23p-26_f24p-116.asm</FileName>
<FileType>2</FileType>
<FilePath>.\f23p-26_f24p-116.asm</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0"/>
<targetInfos>
<targetInfo name="Simu"/>
</targetInfos>
</component>
</components>
<files/>
</RTE>
</Project>

21
PROJ_QUATRE/RTE/_Simu/RTE_Components.h Normal file
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/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'Project'
* Target: 'Simu'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f10x.h"
#endif /* RTE_COMPONENTS_H */

14
PROJ_QUATRE/Src/principal.c Normal file
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int module(int k);
int S[64];
int main(void)
{
for(int i=0;i<64;i++)
{
S[i]=module(i);
}
while (1)
{
}
}

335
PROJ_QUATRE/Src/startup-rvds.s Normal file
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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
LDR R0, =SystemInit
BLX R0
;
; Enable UsageFault, MemFault and Busfault interrupts
;
_SHCSR EQU 0xE000ED24 ; SHCSR is located at address 0xE000ED24
LDR.W R0, =_SHCSR
LDR R1, [R0] ; Read CPACR
ORR R1, R1, #(0x7 << 16) ; Set bits 16,17,18 to enable usagefault, busfault, memfault interrupts
STR R1, [R0] ; Write back the modified value to the CPACR
DSB ; Wait for store to complete
;
; Set priority grouping (PRIGROUP) in AIRCR to 3 (16 levels for group priority and 0 for subpriority)
;
_AIRCR EQU 0xE000ED0C
_AIRCR_VAL EQU 0x05FA0300
LDR.W R0, =_AIRCR
LDR.W R1, =_AIRCR_VAL
STR R1,[R0]
;
; Finaly, jump to main function (void main (void))
;
LDR R0, =__main
BX R0
ENDP
SystemInit PROC
EXPORT SystemInit [WEAK]
BX LR
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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PROJ_QUATRE/f17p30_f18p135.asm Normal file
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AREA Signal, DATA, READONLY
export TabSig
; Fnor1 = 17.000
; Ph1 = 30.000
; A1 = 1024.000
; Fnor2 = 18.000
; Ph2 = 135.000
; A2 = 1024.000
; valeurs attendues pour k = 17 :
; Re 0x376C909D env 0.866 * 2^30
; Im 0xE000C6D7 env -0.5 * 2^30
; M2 0x0FFFA278 env 2^28
;
; valeurs attendues pour k = 18 :
; Re 0xD2BDF5FC env -sqrt(0.5) * 2^30
; Im 0xD2BE8C7F env -sqrt(0.5) * 2^30
; M2 0x10005BE5 env 2^28
;
; pour les autres valeurs de k sauf les alias de 17 et 18 :
; M2 < 0x0000000F
TabSig
DCW 2211 ; 0 0x08a3 0.53979
DCW 883 ; 1 0x0373 0.21558
DCW 2224 ; 2 0x08b0 0.54297
DCW 2995 ; 3 0x0bb3 0.73120
DCW 1647 ; 4 0x066f 0.40210
DCW 1378 ; 5 0x0562 0.33643
DCW 2541 ; 6 0x09ed 0.62036
DCW 2437 ; 7 0x0985 0.59497
DCW 1589 ; 8 0x0635 0.38794
DCW 1889 ; 9 0x0761 0.46118
DCW 2373 ; 10 0x0945 0.57935
DCW 2067 ; 11 0x0813 0.50464
DCW 1914 ; 12 0x077a 0.46729
DCW 2055 ; 13 0x0807 0.50171
DCW 1985 ; 14 0x07c1 0.48462
DCW 2129 ; 15 0x0851 0.51978
DCW 2260 ; 16 0x08d4 0.55176
DCW 1785 ; 17 0x06f9 0.43579
DCW 1777 ; 18 0x06f1 0.43384
DCW 2548 ; 19 0x09f4 0.62207
DCW 2260 ; 20 0x08d4 0.55176
DCW 1307 ; 21 0x051b 0.31909
DCW 2020 ; 22 0x07e4 0.49316
DCW 2978 ; 23 0x0ba2 0.72705
DCW 1783 ; 24 0x06f7 0.43530
DCW 1030 ; 25 0x0406 0.25146
DCW 2678 ; 26 0x0a76 0.65381
DCW 3019 ; 27 0x0bcb 0.73706
DCW 1033 ; 28 0x0409 0.25220
DCW 1276 ; 29 0x04fc 0.31152
DCW 3410 ; 30 0x0d52 0.83252
DCW 2477 ; 31 0x09ad 0.60474
DCW 437 ; 32 0x01b5 0.10669
DCW 2076 ; 33 0x081c 0.50684
DCW 3764 ; 34 0x0eb4 0.91895
DCW 1500 ; 35 0x05dc 0.36621
DCW 401 ; 36 0x0191 0.09790
DCW 3117 ; 37 0x0c2d 0.76099
DCW 3447 ; 38 0x0d77 0.84155
DCW 521 ; 39 0x0209 0.12720
DCW 1059 ; 40 0x0423 0.25854
DCW 3910 ; 41 0x0f46 0.95459
DCW 2507 ; 42 0x09cb 0.61206
DCW 20 ; 43 0x0014 0.00488
DCW 2182 ; 44 0x0886 0.53271
DCW 4050 ; 45 0x0fd2 0.98877
DCW 1327 ; 46 0x052f 0.32397
DCW 264 ; 47 0x0108 0.06445
DCW 3284 ; 48 0x0cd4 0.80176
DCW 3449 ; 49 0x0d79 0.84204
DCW 427 ; 50 0x01ab 0.10425
DCW 1148 ; 51 0x047c 0.28027
DCW 3884 ; 52 0x0f2c 0.94824
DCW 2389 ; 53 0x0955 0.58325
DCW 184 ; 54 0x00b8 0.04492
DCW 2256 ; 55 0x08d0 0.55078
DCW 3761 ; 56 0x0eb1 0.91821
DCW 1363 ; 57 0x0553 0.33276
DCW 634 ; 58 0x027a 0.15479
DCW 3086 ; 59 0x0c0e 0.75342
DCW 3063 ; 60 0x0bf7 0.74780
DCW 811 ; 61 0x032b 0.19800
DCW 1470 ; 62 0x05be 0.35889
DCW 3322 ; 63 0x0cfa 0.81104
END

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ARM Macro Assembler Page 1
1 00000000 AREA Signal, DATA, READONLY
2 00000000 export TabSig
3 00000000
4 00000000 ; Fnor1 = 17.000
5 00000000 ; Ph1 = 30.000
6 00000000 ; A1 = 1024.000
7 00000000 ; Fnor2 = 18.000
8 00000000 ; Ph2 = 135.000
9 00000000 ; A2 = 1024.000
10 00000000
11 00000000 ; valeurs attendues pour k = 17 :
12 00000000 ; Re 0x376C909D env 0.866 * 2^30
13 00000000 ; Im 0xE000C6D7 env -0.5 * 2^30
14 00000000 ; M2 0x0FFFA278 env 2^28
15 00000000 ;
16 00000000 ; valeurs attendues pour k = 18 :
17 00000000 ; Re 0xD2BDF5FC env -sqrt(0.5) * 2^30
18 00000000 ; Im 0xD2BE8C7F env -sqrt(0.5) * 2^30
19 00000000 ; M2 0x10005BE5 env 2^28
20 00000000 ;
21 00000000 ; pour les autres valeurs de k sauf les alias de 17 et 1
8 :
22 00000000 ; M2 < 0x0000000F
23 00000000
24 00000000 TabSig
25 00000000 A3 08 DCW 2211 ; 0 0x08a3 0.5397
9
26 00000002 73 03 DCW 883 ; 1 0x0373 0.2155
8
27 00000004 B0 08 DCW 2224 ; 2 0x08b0 0.5429
7
28 00000006 B3 0B DCW 2995 ; 3 0x0bb3 0.7312
0
29 00000008 6F 06 DCW 1647 ; 4 0x066f 0.4021
0
30 0000000A 62 05 DCW 1378 ; 5 0x0562 0.3364
3
31 0000000C ED 09 DCW 2541 ; 6 0x09ed 0.6203
6
32 0000000E 85 09 DCW 2437 ; 7 0x0985 0.5949
7
33 00000010 35 06 DCW 1589 ; 8 0x0635 0.3879
4
34 00000012 61 07 DCW 1889 ; 9 0x0761 0.4611
8
35 00000014 45 09 DCW 2373 ; 10 0x0945 0.5793
5
36 00000016 13 08 DCW 2067 ; 11 0x0813 0.5046
4
37 00000018 7A 07 DCW 1914 ; 12 0x077a 0.4672
9
38 0000001A 07 08 DCW 2055 ; 13 0x0807 0.5017
1
39 0000001C C1 07 DCW 1985 ; 14 0x07c1 0.4846
2
40 0000001E 51 08 DCW 2129 ; 15 0x0851 0.5197
8
41 00000020 D4 08 DCW 2260 ; 16 0x08d4 0.5517
6
ARM Macro Assembler Page 2
42 00000022 F9 06 DCW 1785 ; 17 0x06f9 0.4357
9
43 00000024 F1 06 DCW 1777 ; 18 0x06f1 0.4338
4
44 00000026 F4 09 DCW 2548 ; 19 0x09f4 0.6220
7
45 00000028 D4 08 DCW 2260 ; 20 0x08d4 0.5517
6
46 0000002A 1B 05 DCW 1307 ; 21 0x051b 0.3190
9
47 0000002C E4 07 DCW 2020 ; 22 0x07e4 0.4931
6
48 0000002E A2 0B DCW 2978 ; 23 0x0ba2 0.7270
5
49 00000030 F7 06 DCW 1783 ; 24 0x06f7 0.4353
0
50 00000032 06 04 DCW 1030 ; 25 0x0406 0.2514
6
51 00000034 76 0A DCW 2678 ; 26 0x0a76 0.6538
1
52 00000036 CB 0B DCW 3019 ; 27 0x0bcb 0.7370
6
53 00000038 09 04 DCW 1033 ; 28 0x0409 0.2522
0
54 0000003A FC 04 DCW 1276 ; 29 0x04fc 0.3115
2
55 0000003C 52 0D DCW 3410 ; 30 0x0d52 0.8325
2
56 0000003E AD 09 DCW 2477 ; 31 0x09ad 0.6047
4
57 00000040 B5 01 DCW 437 ; 32 0x01b5 0.1066
9
58 00000042 1C 08 DCW 2076 ; 33 0x081c 0.5068
4
59 00000044 B4 0E DCW 3764 ; 34 0x0eb4 0.9189
5
60 00000046 DC 05 DCW 1500 ; 35 0x05dc 0.3662
1
61 00000048 91 01 DCW 401 ; 36 0x0191 0.0979
0
62 0000004A 2D 0C DCW 3117 ; 37 0x0c2d 0.7609
9
63 0000004C 77 0D DCW 3447 ; 38 0x0d77 0.8415
5
64 0000004E 09 02 DCW 521 ; 39 0x0209 0.1272
0
65 00000050 23 04 DCW 1059 ; 40 0x0423 0.2585
4
66 00000052 46 0F DCW 3910 ; 41 0x0f46 0.9545
9
67 00000054 CB 09 DCW 2507 ; 42 0x09cb 0.6120
6
68 00000056 14 00 DCW 20 ; 43 0x0014 0.0048
8
69 00000058 86 08 DCW 2182 ; 44 0x0886 0.5327
1
70 0000005A D2 0F DCW 4050 ; 45 0x0fd2 0.9887
7
71 0000005C 2F 05 DCW 1327 ; 46 0x052f 0.3239
ARM Macro Assembler Page 3
7
72 0000005E 08 01 DCW 264 ; 47 0x0108 0.0644
5
73 00000060 D4 0C DCW 3284 ; 48 0x0cd4 0.8017
6
74 00000062 79 0D DCW 3449 ; 49 0x0d79 0.8420
4
75 00000064 AB 01 DCW 427 ; 50 0x01ab 0.1042
5
76 00000066 7C 04 DCW 1148 ; 51 0x047c 0.2802
7
77 00000068 2C 0F DCW 3884 ; 52 0x0f2c 0.9482
4
78 0000006A 55 09 DCW 2389 ; 53 0x0955 0.5832
5
79 0000006C B8 00 DCW 184 ; 54 0x00b8 0.0449
2
80 0000006E D0 08 DCW 2256 ; 55 0x08d0 0.5507
8
81 00000070 B1 0E DCW 3761 ; 56 0x0eb1 0.9182
1
82 00000072 53 05 DCW 1363 ; 57 0x0553 0.3327
6
83 00000074 7A 02 DCW 634 ; 58 0x027a 0.1547
9
84 00000076 0E 0C DCW 3086 ; 59 0x0c0e 0.7534
2
85 00000078 F7 0B DCW 3063 ; 60 0x0bf7 0.7478
0
86 0000007A 2B 03 DCW 811 ; 61 0x032b 0.1980
0
87 0000007C BE 05 DCW 1470 ; 62 0x05be 0.3588
9
88 0000007E FA 0C DCW 3322 ; 63 0x0cfa 0.8110
4
89 00000080
90 00000080 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\f17p30_f18p135.d -o.\obj\f17p30_f18p135.o -I.\RTE\_Simu -IC:
\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Us
ers\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pre
define="__EVAL SETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_V
ERSION SETA 529" --predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" -
-list=f17p30_f18p135.lst f17p30_f18p135.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
Signal 00000000
Symbol: Signal
Definitions
At line 1 in file f17p30_f18p135.asm
Uses
None
Comment: Signal unused
TabSig 00000000
Symbol: TabSig
Definitions
At line 24 in file f17p30_f18p135.asm
Uses
At line 2 in file f17p30_f18p135.asm
Comment: TabSig used once
2 symbols
337 symbols in table

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PROJ_QUATRE/f1p-45.asm Normal file
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AREA Signal, DATA, READONLY
; export TabSig
; fonction cosinus, frequence relative 1, phase -45 degres, amplitude max
; valeurs attendues pour k = 1 :
; Re 0x5A82562C env +sqrt(0.5) * 2^31
; Im 0x5A82562C env +sqrt(0.5) * 2^31
; M2 0x3FFFCDE5 env 2^30
; pour 1 < k < 63
; M2 < 0x0000000F
TabSig
dcw 0x0da8 ; 0 3496 0.85352
dcw 0x0e2f ; 1 3631 0.88647
dcw 0x0ea7 ; 2 3751 0.91577
dcw 0x0f0e ; 3 3854 0.94092
dcw 0x0f64 ; 4 3940 0.96191
dcw 0x0fa8 ; 5 4008 0.97852
dcw 0x0fd9 ; 6 4057 0.99048
dcw 0x0ff6 ; 7 4086 0.99756
dcw 0x0fff ; 8 4095 0.99976
dcw 0x0ff6 ; 9 4086 0.99756
dcw 0x0fd9 ; 10 4057 0.99048
dcw 0x0fa8 ; 11 4008 0.97852
dcw 0x0f64 ; 12 3940 0.96191
dcw 0x0f0e ; 13 3854 0.94092
dcw 0x0ea7 ; 14 3751 0.91577
dcw 0x0e2f ; 15 3631 0.88647
dcw 0x0da8 ; 16 3496 0.85352
dcw 0x0d13 ; 17 3347 0.81714
dcw 0x0c72 ; 18 3186 0.77783
dcw 0x0bc5 ; 19 3013 0.73560
dcw 0x0b10 ; 20 2832 0.69141
dcw 0x0a53 ; 21 2643 0.64526
dcw 0x0990 ; 22 2448 0.59766
dcw 0x08c9 ; 23 2249 0.54907
dcw 0x0800 ; 24 2048 0.50000
dcw 0x0737 ; 25 1847 0.45093
dcw 0x0670 ; 26 1648 0.40234
dcw 0x05ad ; 27 1453 0.35474
dcw 0x04f0 ; 28 1264 0.30859
dcw 0x043b ; 29 1083 0.26440
dcw 0x038e ; 30 910 0.22217
dcw 0x02ed ; 31 749 0.18286
dcw 0x0258 ; 32 600 0.14648
dcw 0x01d1 ; 33 465 0.11353
dcw 0x0159 ; 34 345 0.08423
dcw 0x00f2 ; 35 242 0.05908
dcw 0x009c ; 36 156 0.03809
dcw 0x0058 ; 37 88 0.02148
dcw 0x0027 ; 38 39 0.00952
dcw 0x000a ; 39 10 0.00244
dcw 0x0000 ; 40 0 0.00000
dcw 0x000a ; 41 10 0.00244
dcw 0x0027 ; 42 39 0.00952
dcw 0x0058 ; 43 88 0.02148
dcw 0x009c ; 44 156 0.03809
dcw 0x00f2 ; 45 242 0.05908
dcw 0x0159 ; 46 345 0.08423
dcw 0x01d1 ; 47 465 0.11353
dcw 0x0258 ; 48 600 0.14648
dcw 0x02ed ; 49 749 0.18286
dcw 0x038e ; 50 910 0.22217
dcw 0x043b ; 51 1083 0.26440
dcw 0x04f0 ; 52 1264 0.30859
dcw 0x05ad ; 53 1453 0.35474
dcw 0x0670 ; 54 1648 0.40234
dcw 0x0737 ; 55 1847 0.45093
dcw 0x0800 ; 56 2048 0.50000
dcw 0x08c9 ; 57 2249 0.54907
dcw 0x0990 ; 58 2448 0.59766
dcw 0x0a53 ; 59 2643 0.64526
dcw 0x0b10 ; 60 2832 0.69141
dcw 0x0bc5 ; 61 3013 0.73560
dcw 0x0c72 ; 62 3186 0.77783
dcw 0x0d13 ; 63 3347 0.81714
end

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ARM Macro Assembler Page 1
1 00000000 AREA Signal, DATA, READONLY
2 00000000 ; export TabSig
3 00000000 ; fonction cosinus, frequence relative 1, phase -45 degr
es, amplitude max
4 00000000 ; valeurs attendues pour k = 1 :
5 00000000 ; Re 0x5A82562C env +sqrt(0.5) * 2^31
6 00000000 ; Im 0x5A82562C env +sqrt(0.5) * 2^31
7 00000000 ; M2 0x3FFFCDE5 env 2^30
8 00000000 ; pour 1 < k < 63
9 00000000 ; M2 < 0x0000000F
10 00000000
11 00000000 TabSig
12 00000000 A8 0D dcw 0x0da8 ; 0 3496 0.8535
2
13 00000002 2F 0E dcw 0x0e2f ; 1 3631 0.8864
7
14 00000004 A7 0E dcw 0x0ea7 ; 2 3751 0.9157
7
15 00000006 0E 0F dcw 0x0f0e ; 3 3854 0.9409
2
16 00000008 64 0F dcw 0x0f64 ; 4 3940 0.9619
1
17 0000000A A8 0F dcw 0x0fa8 ; 5 4008 0.9785
2
18 0000000C D9 0F dcw 0x0fd9 ; 6 4057 0.9904
8
19 0000000E F6 0F dcw 0x0ff6 ; 7 4086 0.9975
6
20 00000010 FF 0F dcw 0x0fff ; 8 4095 0.9997
6
21 00000012 F6 0F dcw 0x0ff6 ; 9 4086 0.9975
6
22 00000014 D9 0F dcw 0x0fd9 ; 10 4057 0.9904
8
23 00000016 A8 0F dcw 0x0fa8 ; 11 4008 0.9785
2
24 00000018 64 0F dcw 0x0f64 ; 12 3940 0.9619
1
25 0000001A 0E 0F dcw 0x0f0e ; 13 3854 0.9409
2
26 0000001C A7 0E dcw 0x0ea7 ; 14 3751 0.9157
7
27 0000001E 2F 0E dcw 0x0e2f ; 15 3631 0.8864
7
28 00000020 A8 0D dcw 0x0da8 ; 16 3496 0.8535
2
29 00000022 13 0D dcw 0x0d13 ; 17 3347 0.8171
4
30 00000024 72 0C dcw 0x0c72 ; 18 3186 0.7778
3
31 00000026 C5 0B dcw 0x0bc5 ; 19 3013 0.7356
0
32 00000028 10 0B dcw 0x0b10 ; 20 2832 0.6914
1
33 0000002A 53 0A dcw 0x0a53 ; 21 2643 0.6452
6
34 0000002C 90 09 dcw 0x0990 ; 22 2448 0.5976
6
35 0000002E C9 08 dcw 0x08c9 ; 23 2249 0.5490
ARM Macro Assembler Page 2
7
36 00000030 00 08 dcw 0x0800 ; 24 2048 0.5000
0
37 00000032 37 07 dcw 0x0737 ; 25 1847 0.4509
3
38 00000034 70 06 dcw 0x0670 ; 26 1648 0.4023
4
39 00000036 AD 05 dcw 0x05ad ; 27 1453 0.3547
4
40 00000038 F0 04 dcw 0x04f0 ; 28 1264 0.3085
9
41 0000003A 3B 04 dcw 0x043b ; 29 1083 0.2644
0
42 0000003C 8E 03 dcw 0x038e ; 30 910 0.2221
7
43 0000003E ED 02 dcw 0x02ed ; 31 749 0.1828
6
44 00000040 58 02 dcw 0x0258 ; 32 600 0.1464
8
45 00000042 D1 01 dcw 0x01d1 ; 33 465 0.1135
3
46 00000044 59 01 dcw 0x0159 ; 34 345 0.0842
3
47 00000046 F2 00 dcw 0x00f2 ; 35 242 0.0590
8
48 00000048 9C 00 dcw 0x009c ; 36 156 0.0380
9
49 0000004A 58 00 dcw 0x0058 ; 37 88 0.0214
8
50 0000004C 27 00 dcw 0x0027 ; 38 39 0.0095
2
51 0000004E 0A 00 dcw 0x000a ; 39 10 0.0024
4
52 00000050 00 00 dcw 0x0000 ; 40 0 0.0000
0
53 00000052 0A 00 dcw 0x000a ; 41 10 0.0024
4
54 00000054 27 00 dcw 0x0027 ; 42 39 0.0095
2
55 00000056 58 00 dcw 0x0058 ; 43 88 0.0214
8
56 00000058 9C 00 dcw 0x009c ; 44 156 0.0380
9
57 0000005A F2 00 dcw 0x00f2 ; 45 242 0.0590
8
58 0000005C 59 01 dcw 0x0159 ; 46 345 0.0842
3
59 0000005E D1 01 dcw 0x01d1 ; 47 465 0.1135
3
60 00000060 58 02 dcw 0x0258 ; 48 600 0.1464
8
61 00000062 ED 02 dcw 0x02ed ; 49 749 0.1828
6
62 00000064 8E 03 dcw 0x038e ; 50 910 0.2221
7
63 00000066 3B 04 dcw 0x043b ; 51 1083 0.2644
0
64 00000068 F0 04 dcw 0x04f0 ; 52 1264 0.3085
9
ARM Macro Assembler Page 3
65 0000006A AD 05 dcw 0x05ad ; 53 1453 0.3547
4
66 0000006C 70 06 dcw 0x0670 ; 54 1648 0.4023
4
67 0000006E 37 07 dcw 0x0737 ; 55 1847 0.4509
3
68 00000070 00 08 dcw 0x0800 ; 56 2048 0.5000
0
69 00000072 C9 08 dcw 0x08c9 ; 57 2249 0.5490
7
70 00000074 90 09 dcw 0x0990 ; 58 2448 0.5976
6
71 00000076 53 0A dcw 0x0a53 ; 59 2643 0.6452
6
72 00000078 10 0B dcw 0x0b10 ; 60 2832 0.6914
1
73 0000007A C5 0B dcw 0x0bc5 ; 61 3013 0.7356
0
74 0000007C 72 0C dcw 0x0c72 ; 62 3186 0.7778
3
75 0000007E 13 0D dcw 0x0d13 ; 63 3347 0.8171
4
76 00000080 end
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\f1p-45.d -o.\obj\f1p-45.o -I.\RTE\_Simu -IC:\Users\nmouk\App
Data\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppDat
a\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL S
ETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 529"
--predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=f1p-45.lst
f1p-45.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
Signal 00000000
Symbol: Signal
Definitions
At line 1 in file f1p-45.asm
Uses
None
Comment: Signal unused
TabSig 00000000
Symbol: TabSig
Definitions
At line 11 in file f1p-45.asm
Uses
None
Comment: TabSig unused
2 symbols
337 symbols in table

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AREA Signal, DATA, READONLY
; export TabSig
; Fnor1 = 23.000
; Ph1 = -26.565
; A1 = 62.000 env. 50mV/3300mV
; Fnor2 = 24.000
; Ph2 = -116.565
; A2 = 1024.000
; valeurs attendues pour k = 23 :
; Re 0x0378FDBD
; Im 0x01BAD0C5 env 0.5 * Re, car tan(26.565) ~= 0.5
; M2 0x000F0D16 986390
;
; valeurs attendues pour k = 24 :
; Re 0xE36136DD env -0.447 * 2^30
; Im 0x393E61CA env -2 * Re, car tan(116.565) ~= 2.0
; M2 0x0FFFF53C env 2^28
;
; pour les autres valeurs de k sauf les alias de 23 et 24 :
; M2 < 0x0000000F
TabSig
DCW 1646 ; 0 0x066e 0.40186
DCW 3006 ; 1 0x0bbe 0.73389
DCW 1094 ; 2 0x0446 0.26709
DCW 2434 ; 3 0x0982 0.59424
DCW 2465 ; 4 0x09a1 0.60181
DCW 1066 ; 5 0x042a 0.26025
DCW 3018 ; 6 0x0bca 0.73682
DCW 1666 ; 7 0x0682 0.40674
DCW 1610 ; 8 0x064a 0.39307
DCW 3052 ; 9 0x0bec 0.74512
DCW 1071 ; 10 0x042f 0.26147
DCW 2417 ; 11 0x0971 0.59009
DCW 2510 ; 12 0x09ce 0.61279
DCW 1026 ; 13 0x0402 0.25049
DCW 3024 ; 14 0x0bd0 0.73828
DCW 1699 ; 15 0x06a3 0.41479
DCW 1562 ; 16 0x061a 0.38135
DCW 3080 ; 17 0x0c08 0.75195
DCW 1083 ; 18 0x043b 0.26440
DCW 2374 ; 19 0x0946 0.57959
DCW 2553 ; 20 0x09f9 0.62329
DCW 1015 ; 21 0x03f7 0.24780
DCW 2995 ; 22 0x0bb3 0.73120
DCW 1746 ; 23 0x06d2 0.42627
DCW 1531 ; 24 0x05fb 0.37378
DCW 3072 ; 25 0x0c00 0.75000
DCW 1124 ; 26 0x0464 0.27441
DCW 2329 ; 27 0x0919 0.56860
DCW 2568 ; 28 0x0a08 0.62695
DCW 1041 ; 29 0x0411 0.25415
DCW 2948 ; 30 0x0b84 0.71973
DCW 1781 ; 31 0x06f5 0.43481
DCW 1535 ; 32 0x05ff 0.37476
DCW 3033 ; 33 0x0bd9 0.74048
DCW 1170 ; 34 0x0492 0.28564
DCW 2310 ; 35 0x0906 0.56396
DCW 2547 ; 36 0x09f3 0.62183
DCW 1087 ; 37 0x043f 0.26538
DCW 2910 ; 38 0x0b5e 0.71045
DCW 1782 ; 39 0x06f6 0.43506
DCW 1570 ; 40 0x0622 0.38330
DCW 2986 ; 41 0x0baa 0.72900
DCW 1194 ; 42 0x04aa 0.29150
DCW 2327 ; 43 0x0917 0.56812
DCW 2502 ; 44 0x09c6 0.61084
DCW 1127 ; 45 0x0467 0.27515
DCW 2904 ; 46 0x0b58 0.70898
DCW 1749 ; 47 0x06d5 0.42700
DCW 1618 ; 48 0x0652 0.39502
DCW 2959 ; 49 0x0b8f 0.72241
DCW 1181 ; 50 0x049d 0.28833
DCW 2370 ; 51 0x0942 0.57861
DCW 2459 ; 52 0x099b 0.60034
DCW 1138 ; 53 0x0472 0.27783
DCW 2933 ; 54 0x0b75 0.71606
DCW 1702 ; 55 0x06a6 0.41553
DCW 1649 ; 56 0x0671 0.40259
DCW 2967 ; 57 0x0b97 0.72437
DCW 1140 ; 58 0x0474 0.27832
DCW 2414 ; 59 0x096e 0.58936
DCW 2444 ; 60 0x098c 0.59668
DCW 1112 ; 61 0x0458 0.27148
DCW 2980 ; 62 0x0ba4 0.72754
DCW 1668 ; 63 0x0684 0.40723
END

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ARM Macro Assembler Page 1
1 00000000 AREA Signal, DATA, READONLY
2 00000000 ; export TabSig
3 00000000
4 00000000 ; Fnor1 = 23.000
5 00000000 ; Ph1 = -26.565
6 00000000 ; A1 = 62.000 env. 50mV/3300mV
7 00000000 ; Fnor2 = 24.000
8 00000000 ; Ph2 = -116.565
9 00000000 ; A2 = 1024.000
10 00000000
11 00000000 ; valeurs attendues pour k = 23 :
12 00000000 ; Re 0x0378FDBD
13 00000000 ; Im 0x01BAD0C5 env 0.5 * Re, car tan(26.565) ~= 0.5
14 00000000 ; M2 0x000F0D16 986390
15 00000000 ;
16 00000000 ; valeurs attendues pour k = 24 :
17 00000000 ; Re 0xE36136DD env -0.447 * 2^30
18 00000000 ; Im 0x393E61CA env -2 * Re, car tan(116.565) ~= 2.0
19 00000000 ; M2 0x0FFFF53C env 2^28
20 00000000 ;
21 00000000 ; pour les autres valeurs de k sauf les alias de 23 et 2
4 :
22 00000000 ; M2 < 0x0000000F
23 00000000
24 00000000 TabSig
25 00000000 6E 06 DCW 1646 ; 0 0x066e 0.4018
6
26 00000002 BE 0B DCW 3006 ; 1 0x0bbe 0.7338
9
27 00000004 46 04 DCW 1094 ; 2 0x0446 0.2670
9
28 00000006 82 09 DCW 2434 ; 3 0x0982 0.5942
4
29 00000008 A1 09 DCW 2465 ; 4 0x09a1 0.6018
1
30 0000000A 2A 04 DCW 1066 ; 5 0x042a 0.2602
5
31 0000000C CA 0B DCW 3018 ; 6 0x0bca 0.7368
2
32 0000000E 82 06 DCW 1666 ; 7 0x0682 0.4067
4
33 00000010 4A 06 DCW 1610 ; 8 0x064a 0.3930
7
34 00000012 EC 0B DCW 3052 ; 9 0x0bec 0.7451
2
35 00000014 2F 04 DCW 1071 ; 10 0x042f 0.2614
7
36 00000016 71 09 DCW 2417 ; 11 0x0971 0.5900
9
37 00000018 CE 09 DCW 2510 ; 12 0x09ce 0.6127
9
38 0000001A 02 04 DCW 1026 ; 13 0x0402 0.2504
9
39 0000001C D0 0B DCW 3024 ; 14 0x0bd0 0.7382
8
40 0000001E A3 06 DCW 1699 ; 15 0x06a3 0.4147
9
41 00000020 1A 06 DCW 1562 ; 16 0x061a 0.3813
5
ARM Macro Assembler Page 2
42 00000022 08 0C DCW 3080 ; 17 0x0c08 0.7519
5
43 00000024 3B 04 DCW 1083 ; 18 0x043b 0.2644
0
44 00000026 46 09 DCW 2374 ; 19 0x0946 0.5795
9
45 00000028 F9 09 DCW 2553 ; 20 0x09f9 0.6232
9
46 0000002A F7 03 DCW 1015 ; 21 0x03f7 0.2478
0
47 0000002C B3 0B DCW 2995 ; 22 0x0bb3 0.7312
0
48 0000002E D2 06 DCW 1746 ; 23 0x06d2 0.4262
7
49 00000030 FB 05 DCW 1531 ; 24 0x05fb 0.3737
8
50 00000032 00 0C DCW 3072 ; 25 0x0c00 0.7500
0
51 00000034 64 04 DCW 1124 ; 26 0x0464 0.2744
1
52 00000036 19 09 DCW 2329 ; 27 0x0919 0.5686
0
53 00000038 08 0A DCW 2568 ; 28 0x0a08 0.6269
5
54 0000003A 11 04 DCW 1041 ; 29 0x0411 0.2541
5
55 0000003C 84 0B DCW 2948 ; 30 0x0b84 0.7197
3
56 0000003E F5 06 DCW 1781 ; 31 0x06f5 0.4348
1
57 00000040 FF 05 DCW 1535 ; 32 0x05ff 0.3747
6
58 00000042 D9 0B DCW 3033 ; 33 0x0bd9 0.7404
8
59 00000044 92 04 DCW 1170 ; 34 0x0492 0.2856
4
60 00000046 06 09 DCW 2310 ; 35 0x0906 0.5639
6
61 00000048 F3 09 DCW 2547 ; 36 0x09f3 0.6218
3
62 0000004A 3F 04 DCW 1087 ; 37 0x043f 0.2653
8
63 0000004C 5E 0B DCW 2910 ; 38 0x0b5e 0.7104
5
64 0000004E F6 06 DCW 1782 ; 39 0x06f6 0.4350
6
65 00000050 22 06 DCW 1570 ; 40 0x0622 0.3833
0
66 00000052 AA 0B DCW 2986 ; 41 0x0baa 0.7290
0
67 00000054 AA 04 DCW 1194 ; 42 0x04aa 0.2915
0
68 00000056 17 09 DCW 2327 ; 43 0x0917 0.5681
2
69 00000058 C6 09 DCW 2502 ; 44 0x09c6 0.6108
4
70 0000005A 67 04 DCW 1127 ; 45 0x0467 0.2751
5
71 0000005C 58 0B DCW 2904 ; 46 0x0b58 0.7089
ARM Macro Assembler Page 3
8
72 0000005E D5 06 DCW 1749 ; 47 0x06d5 0.4270
0
73 00000060 52 06 DCW 1618 ; 48 0x0652 0.3950
2
74 00000062 8F 0B DCW 2959 ; 49 0x0b8f 0.7224
1
75 00000064 9D 04 DCW 1181 ; 50 0x049d 0.2883
3
76 00000066 42 09 DCW 2370 ; 51 0x0942 0.5786
1
77 00000068 9B 09 DCW 2459 ; 52 0x099b 0.6003
4
78 0000006A 72 04 DCW 1138 ; 53 0x0472 0.2778
3
79 0000006C 75 0B DCW 2933 ; 54 0x0b75 0.7160
6
80 0000006E A6 06 DCW 1702 ; 55 0x06a6 0.4155
3
81 00000070 71 06 DCW 1649 ; 56 0x0671 0.4025
9
82 00000072 97 0B DCW 2967 ; 57 0x0b97 0.7243
7
83 00000074 74 04 DCW 1140 ; 58 0x0474 0.2783
2
84 00000076 6E 09 DCW 2414 ; 59 0x096e 0.5893
6
85 00000078 8C 09 DCW 2444 ; 60 0x098c 0.5966
8
86 0000007A 58 04 DCW 1112 ; 61 0x0458 0.2714
8
87 0000007C A4 0B DCW 2980 ; 62 0x0ba4 0.7275
4
88 0000007E 84 06 DCW 1668 ; 63 0x0684 0.4072
3
89 00000080
90 00000080 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\f23p-26_f24p-116.d -o.\obj\f23p-26_f24p-116.o -I.\RTE\_Simu
-IC:\Users\nmouk\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC
:\Users\nmouk\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -
-predefine="__EVAL SETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISI
ON_VERSION SETA 529" --predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA
1" --list=f23p-26_f24p-116.lst f23p-26_f24p-116.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
Signal 00000000
Symbol: Signal
Definitions
At line 1 in file f23p-26_f24p-116.asm
Uses
None
Comment: Signal unused
TabSig 00000000
Symbol: TabSig
Definitions
At line 24 in file f23p-26_f24p-116.asm
Uses
None
Comment: TabSig unused
2 symbols
337 symbols in table

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ARM Macro Assembler Page 1
1 00000000 ; ce programme est pour l'assembleur RealView (Keil)
2 00000000 thumb
3 00000000
4 00000000 import TabCos
5 00000000 import TabSin
6 00000000 import TabSig
7 00000000
8 00000000 area moncode, code, readonly
9 00000000 export reelle
10 00000000
11 00000000 reelle proc
12 00000000
13 00000000 F04F 0200 mov r2, #0
14 00000004 F04F 0300 mov r3, #0
15 00000008
16 00000008
17 00000008 B408 boucle push {r3}
18 0000000A B401 push {r0}
19 0000000C FB00 F002 mul r0,r0,r2
20 00000010 F000 003F and r0,#0x3F
21 00000014 F931 3010 ldrsh r3, [r1, r0, LSL #0x01]
22 00000018 BC01 pop {r0}
23 0000001A B402 push {r1}
24 0000001C 4906 ldr r1,=TabSig
25 0000001E F931 C012 ldrsh r12, [r1,r2, LSL #0x01]
26 00000022 BC02 pop {r1}
27 00000024 FB0C FC03 mul r12,r12,r3
28 00000028 BC08 pop {r3}
29 0000002A 4463 add r3,r3,r12
30 0000002C F102 0201 add r2,#1
31 00000030 2A40 cmp r2,#64
32 00000032 D1E9 bne boucle
33 00000034
34 00000034 4618 mov r0,r3
35 00000036
36 00000036
37 00000036 endp
38 00000036 4770 bx lr
39 00000038
40 00000038 end
00000000
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\fonction.d -o.\obj\fonction.o -I.\RTE\_Simu -IC:\Users\nmouk
\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\Ap
pData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EV
AL SETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA
529" --predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=foncti
on.lst fonction.s
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
boucle 00000008
Symbol: boucle
Definitions
At line 17 in file fonction.s
Uses
At line 32 in file fonction.s
Comment: boucle used once
moncode 00000000
Symbol: moncode
Definitions
At line 8 in file fonction.s
Uses
None
Comment: moncode unused
reelle 00000000
Symbol: reelle
Definitions
At line 11 in file fonction.s
Uses
At line 9 in file fonction.s
Comment: reelle used once
3 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
External symbols
TabCos 00000000
Symbol: TabCos
Definitions
At line 4 in file fonction.s
Uses
None
Comment: TabCos unused
TabSig 00000000
Symbol: TabSig
Definitions
At line 6 in file fonction.s
Uses
At line 24 in file fonction.s
Comment: TabSig used once
TabSin 00000000
Symbol: TabSin
Definitions
At line 5 in file fonction.s
Uses
None
Comment: TabSin unused
3 symbols
343 symbols in table

41
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; ce programme est pour l'assembleur RealView (Keil)
thumb
import TabCos
import TabSin
import TabSig
area moncode, code, readonly
export reelle
reelle proc
mov r2, #0
mov r3, #0
boucle push {r3}
push {r0}
mul r0,r0,r2
and r0,#0x3F
ldrsh r3, [r1, r0, LSL #0x01]
pop {r0}
push {r1}
ldr r1,=TabSig
ldrsh r12, [r1,r2, LSL #0x01]
pop {r1}
mul r12,r12,r3
pop {r3}
add r3,r3,r12
add r2,#1
cmp r2,#64
bne boucle
mov r0,r3
endp
bx lr
end

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ARM Macro Assembler Page 1
1 00000000 ; ce programme est pour l'assembleur RealView (Keil)
2 00000000 thumb
3 00000000
4 00000000 import TabCos
5 00000000 import TabSin
6 00000000 import TabSig
7 00000000 import reelle
8 00000000
9 00000000 area moncode, code, readonly
10 00000000 export module
11 00000000
12 00000000 module proc
13 00000000 B500 push {lr}
14 00000002 F84D 8D04 push {r8}
15 00000006 4680 mov r8,r0 ;on garde la valeur
k dans r8
16 00000008 4908 ldr r1,=TabSin
17 0000000A F7FF FFFE bl reelle
18 0000000E B401 push {r0}
19 00000010 4640 mov r0,r8 ;je remets la valeu
r k dans r8
20 00000012 4907 ldr r1,=TabCos
21 00000014 F7FF FFFE bl reelle
22 00000018 BC02 pop {r1}
23 0000001A FB81 1201 SMULL r1,r2,r1,r1
24 0000001E FBC0 1200 SMLAL r1,r2,r0,r0
25 00000022 4610 mov r0,r2
26 00000024 F85D 8B04 pop {r8}
27 00000028 BD00 pop {pc}
28 0000002A
29 0000002A
30 0000002A endp
31 0000002A 4770 bx lr
32 0000002C
33 0000002C end
00000000
00000000
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\module.d -o.\obj\module.o -I.\RTE\_Simu -IC:\Users\nmouk\App
Data\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppDat
a\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL S
ETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 529"
--predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=module.lst
module.s
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
module 00000000
Symbol: module
Definitions
At line 12 in file module.s
Uses
At line 10 in file module.s
Comment: module used once
moncode 00000000
Symbol: moncode
Definitions
At line 9 in file module.s
Uses
None
Comment: moncode unused
2 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
External symbols
TabCos 00000000
Symbol: TabCos
Definitions
At line 4 in file module.s
Uses
At line 20 in file module.s
Comment: TabCos used once
TabSig 00000000
Symbol: TabSig
Definitions
At line 6 in file module.s
Uses
None
Comment: TabSig unused
TabSin 00000000
Symbol: TabSin
Definitions
At line 5 in file module.s
Uses
At line 16 in file module.s
Comment: TabSin used once
reelle 00000000
Symbol: reelle
Definitions
At line 7 in file module.s
Uses
At line 17 in file module.s
At line 21 in file module.s
4 symbols
343 symbols in table

34
PROJ_QUATRE/module.s Normal file
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@ -0,0 +1,34 @@
; ce programme est pour l'assembleur RealView (Keil)
thumb
import TabCos
import TabSin
import TabSig
import reelle
area moncode, code, readonly
export module
module proc
push {lr}
push {r8}
mov r8,r0 ;on garde la valeur k dans r8
ldr r1,=TabSin
bl reelle
push {r0}
mov r0,r8 ;je remets la valeur k dans r8
ldr r1,=TabCos
bl reelle
pop {r1}
SMULL r1,r2,r1,r1
SMLAL r1,r2,r0,r0
mov r0,r2
pop {r8}
pop {pc}
endp
bx lr
end

26
PROJ_QUATRE/module1.s Normal file
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; ce programme est pour l'assembleur RealView (Keil)
thumb
import TabCos
import TabSin
import TabSig
area moncode, code, readonly
export module
module proc
ldr r1,=TabCos
bx boucle
push {r0}
ldr r1,=TabSin
bx boucle
pop {r1}
mla r0,r0,#1,r1
endp
bx lr
end

1251
PROJ_QUATRE/startup-rvds.lst Normal file
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File diff suppressed because it is too large Load diff

75
PROJ_QUATRE/tabsig.asm Normal file
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@ -0,0 +1,75 @@
AREA Signal, DATA, READWRITE
;export TabSig
; Fnor = 1.000
; Ph = 0.000
; A = 2048.000
TabSig
DCW 4095 ; 0 0x0fff 0.99976
DCW 4086 ; 1 0x0ff6 0.99756
DCW 4057 ; 2 0x0fd9 0.99048
DCW 4008 ; 3 0x0fa8 0.97852
DCW 3940 ; 4 0x0f64 0.96191
DCW 3854 ; 5 0x0f0e 0.94092
DCW 3751 ; 6 0x0ea7 0.91577
DCW 3631 ; 7 0x0e2f 0.88647
DCW 3496 ; 8 0x0da8 0.85352
DCW 3347 ; 9 0x0d13 0.81714
DCW 3186 ; 10 0x0c72 0.77783
DCW 3013 ; 11 0x0bc5 0.73560
DCW 2832 ; 12 0x0b10 0.69141
DCW 2643 ; 13 0x0a53 0.64526
DCW 2448 ; 14 0x0990 0.59766
DCW 2249 ; 15 0x08c9 0.54907
DCW 2048 ; 16 0x0800 0.50000
DCW 1847 ; 17 0x0737 0.45093
DCW 1648 ; 18 0x0670 0.40234
DCW 1453 ; 19 0x05ad 0.35474
DCW 1264 ; 20 0x04f0 0.30859
DCW 1083 ; 21 0x043b 0.26440
DCW 910 ; 22 0x038e 0.22217
DCW 749 ; 23 0x02ed 0.18286
DCW 600 ; 24 0x0258 0.14648
DCW 465 ; 25 0x01d1 0.11353
DCW 345 ; 26 0x0159 0.08423
DCW 242 ; 27 0x00f2 0.05908
DCW 156 ; 28 0x009c 0.03809
DCW 88 ; 29 0x0058 0.02148
DCW 39 ; 30 0x0027 0.00952
DCW 10 ; 31 0x000a 0.00244
DCW 0 ; 32 0x0000 0.00000
DCW 10 ; 33 0x000a 0.00244
DCW 39 ; 34 0x0027 0.00952
DCW 88 ; 35 0x0058 0.02148
DCW 156 ; 36 0x009c 0.03809
DCW 242 ; 37 0x00f2 0.05908
DCW 345 ; 38 0x0159 0.08423
DCW 465 ; 39 0x01d1 0.11353
DCW 600 ; 40 0x0258 0.14648
DCW 749 ; 41 0x02ed 0.18286
DCW 910 ; 42 0x038e 0.22217
DCW 1083 ; 43 0x043b 0.26440
DCW 1264 ; 44 0x04f0 0.30859
DCW 1453 ; 45 0x05ad 0.35474
DCW 1648 ; 46 0x0670 0.40234
DCW 1847 ; 47 0x0737 0.45093
DCW 2048 ; 48 0x0800 0.50000
DCW 2249 ; 49 0x08c9 0.54907
DCW 2448 ; 50 0x0990 0.59766
DCW 2643 ; 51 0x0a53 0.64526
DCW 2832 ; 52 0x0b10 0.69141
DCW 3013 ; 53 0x0bc5 0.73560
DCW 3186 ; 54 0x0c72 0.77783
DCW 3347 ; 55 0x0d13 0.81714
DCW 3496 ; 56 0x0da8 0.85352
DCW 3631 ; 57 0x0e2f 0.88647
DCW 3751 ; 58 0x0ea7 0.91577
DCW 3854 ; 59 0x0f0e 0.94092
DCW 3940 ; 60 0x0f64 0.96191
DCW 4008 ; 61 0x0fa8 0.97852
DCW 4057 ; 62 0x0fd9 0.99048
DCW 4086 ; 63 0x0ff6 0.99756
END

187
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ARM Macro Assembler Page 1
1 00000000 AREA Signal, DATA, READWRITE
2 00000000 ;export TabSig
3 00000000
4 00000000 ; Fnor = 1.000
5 00000000 ; Ph = 0.000
6 00000000 ; A = 2048.000
7 00000000
8 00000000 TabSig
9 00000000 FF 0F DCW 4095 ; 0 0x0fff 0.9997
6
10 00000002 F6 0F DCW 4086 ; 1 0x0ff6 0.9975
6
11 00000004 D9 0F DCW 4057 ; 2 0x0fd9 0.9904
8
12 00000006 A8 0F DCW 4008 ; 3 0x0fa8 0.9785
2
13 00000008 64 0F DCW 3940 ; 4 0x0f64 0.9619
1
14 0000000A 0E 0F DCW 3854 ; 5 0x0f0e 0.9409
2
15 0000000C A7 0E DCW 3751 ; 6 0x0ea7 0.9157
7
16 0000000E 2F 0E DCW 3631 ; 7 0x0e2f 0.8864
7
17 00000010 A8 0D DCW 3496 ; 8 0x0da8 0.8535
2
18 00000012 13 0D DCW 3347 ; 9 0x0d13 0.8171
4
19 00000014 72 0C DCW 3186 ; 10 0x0c72 0.7778
3
20 00000016 C5 0B DCW 3013 ; 11 0x0bc5 0.7356
0
21 00000018 10 0B DCW 2832 ; 12 0x0b10 0.6914
1
22 0000001A 53 0A DCW 2643 ; 13 0x0a53 0.6452
6
23 0000001C 90 09 DCW 2448 ; 14 0x0990 0.5976
6
24 0000001E C9 08 DCW 2249 ; 15 0x08c9 0.5490
7
25 00000020 00 08 DCW 2048 ; 16 0x0800 0.5000
0
26 00000022 37 07 DCW 1847 ; 17 0x0737 0.4509
3
27 00000024 70 06 DCW 1648 ; 18 0x0670 0.4023
4
28 00000026 AD 05 DCW 1453 ; 19 0x05ad 0.3547
4
29 00000028 F0 04 DCW 1264 ; 20 0x04f0 0.3085
9
30 0000002A 3B 04 DCW 1083 ; 21 0x043b 0.2644
0
31 0000002C 8E 03 DCW 910 ; 22 0x038e 0.2221
7
32 0000002E ED 02 DCW 749 ; 23 0x02ed 0.1828
6
33 00000030 58 02 DCW 600 ; 24 0x0258 0.1464
8
34 00000032 D1 01 DCW 465 ; 25 0x01d1 0.1135
ARM Macro Assembler Page 2
3
35 00000034 59 01 DCW 345 ; 26 0x0159 0.0842
3
36 00000036 F2 00 DCW 242 ; 27 0x00f2 0.0590
8
37 00000038 9C 00 DCW 156 ; 28 0x009c 0.0380
9
38 0000003A 58 00 DCW 88 ; 29 0x0058 0.0214
8
39 0000003C 27 00 DCW 39 ; 30 0x0027 0.0095
2
40 0000003E 0A 00 DCW 10 ; 31 0x000a 0.0024
4
41 00000040 00 00 DCW 0 ; 32 0x0000 0.0000
0
42 00000042 0A 00 DCW 10 ; 33 0x000a 0.0024
4
43 00000044 27 00 DCW 39 ; 34 0x0027 0.0095
2
44 00000046 58 00 DCW 88 ; 35 0x0058 0.0214
8
45 00000048 9C 00 DCW 156 ; 36 0x009c 0.0380
9
46 0000004A F2 00 DCW 242 ; 37 0x00f2 0.0590
8
47 0000004C 59 01 DCW 345 ; 38 0x0159 0.0842
3
48 0000004E D1 01 DCW 465 ; 39 0x01d1 0.1135
3
49 00000050 58 02 DCW 600 ; 40 0x0258 0.1464
8
50 00000052 ED 02 DCW 749 ; 41 0x02ed 0.1828
6
51 00000054 8E 03 DCW 910 ; 42 0x038e 0.2221
7
52 00000056 3B 04 DCW 1083 ; 43 0x043b 0.2644
0
53 00000058 F0 04 DCW 1264 ; 44 0x04f0 0.3085
9
54 0000005A AD 05 DCW 1453 ; 45 0x05ad 0.3547
4
55 0000005C 70 06 DCW 1648 ; 46 0x0670 0.4023
4
56 0000005E 37 07 DCW 1847 ; 47 0x0737 0.4509
3
57 00000060 00 08 DCW 2048 ; 48 0x0800 0.5000
0
58 00000062 C9 08 DCW 2249 ; 49 0x08c9 0.5490
7
59 00000064 90 09 DCW 2448 ; 50 0x0990 0.5976
6
60 00000066 53 0A DCW 2643 ; 51 0x0a53 0.6452
6
61 00000068 10 0B DCW 2832 ; 52 0x0b10 0.6914
1
62 0000006A C5 0B DCW 3013 ; 53 0x0bc5 0.7356
0
63 0000006C 72 0C DCW 3186 ; 54 0x0c72 0.7778
3
ARM Macro Assembler Page 3
64 0000006E 13 0D DCW 3347 ; 55 0x0d13 0.8171
4
65 00000070 A8 0D DCW 3496 ; 56 0x0da8 0.8535
2
66 00000072 2F 0E DCW 3631 ; 57 0x0e2f 0.8864
7
67 00000074 A7 0E DCW 3751 ; 58 0x0ea7 0.9157
7
68 00000076 0E 0F DCW 3854 ; 59 0x0f0e 0.9409
2
69 00000078 64 0F DCW 3940 ; 60 0x0f64 0.9619
1
70 0000007A A8 0F DCW 4008 ; 61 0x0fa8 0.9785
2
71 0000007C D9 0F DCW 4057 ; 62 0x0fd9 0.9904
8
72 0000007E F6 0F DCW 4086 ; 63 0x0ff6 0.9975
6
73 00000080
74 00000080 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\tabsig.d -o.\obj\tabsig.o -I.\RTE\_Simu -IC:\Users\nmouk\App
Data\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppDat
a\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL S
ETA 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 529"
--predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=tabsig.lst
tabsig.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
Signal 00000000
Symbol: Signal
Definitions
At line 1 in file tabsig.asm
Uses
None
Comment: Signal unused
TabSig 00000000
Symbol: TabSig
Definitions
At line 8 in file tabsig.asm
Uses
None
Comment: TabSig unused
2 symbols
337 symbols in table

136
PROJ_QUATRE/trigo.asm Normal file
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@ -0,0 +1,136 @@
AREA Trigo, DATA, READONLY
export TabSin
export TabCos
TabCos
DCW 32767 ; 0 0x7fff 0.99997
DCW 32610 ; 1 0x7f62 0.99518
DCW 32138 ; 2 0x7d8a 0.98077
DCW 31357 ; 3 0x7a7d 0.95694
DCW 30274 ; 4 0x7642 0.92389
DCW 28899 ; 5 0x70e3 0.88193
DCW 27246 ; 6 0x6a6e 0.83148
DCW 25330 ; 7 0x62f2 0.77301
DCW 23170 ; 8 0x5a82 0.70709
DCW 20788 ; 9 0x5134 0.63440
DCW 18205 ; 10 0x471d 0.55557
DCW 15447 ; 11 0x3c57 0.47141
DCW 12540 ; 12 0x30fc 0.38269
DCW 9512 ; 13 0x2528 0.29028
DCW 6393 ; 14 0x18f9 0.19510
DCW 3212 ; 15 0x0c8c 0.09802
DCW 0 ; 16 0x0000 0.00000
DCW -3212 ; 17 0xf374 -0.09802
DCW -6393 ; 18 0xe707 -0.19510
DCW -9512 ; 19 0xdad8 -0.29028
DCW -12540 ; 20 0xcf04 -0.38269
DCW -15447 ; 21 0xc3a9 -0.47141
DCW -18205 ; 22 0xb8e3 -0.55557
DCW -20788 ; 23 0xaecc -0.63440
DCW -23170 ; 24 0xa57e -0.70709
DCW -25330 ; 25 0x9d0e -0.77301
DCW -27246 ; 26 0x9592 -0.83148
DCW -28899 ; 27 0x8f1d -0.88193
DCW -30274 ; 28 0x89be -0.92389
DCW -31357 ; 29 0x8583 -0.95694
DCW -32138 ; 30 0x8276 -0.98077
DCW -32610 ; 31 0x809e -0.99518
DCW -32768 ; 32 0x8000 -1.00000
DCW -32610 ; 33 0x809e -0.99518
DCW -32138 ; 34 0x8276 -0.98077
DCW -31357 ; 35 0x8583 -0.95694
DCW -30274 ; 36 0x89be -0.92389
DCW -28899 ; 37 0x8f1d -0.88193
DCW -27246 ; 38 0x9592 -0.83148
DCW -25330 ; 39 0x9d0e -0.77301
DCW -23170 ; 40 0xa57e -0.70709
DCW -20788 ; 41 0xaecc -0.63440
DCW -18205 ; 42 0xb8e3 -0.55557
DCW -15447 ; 43 0xc3a9 -0.47141
DCW -12540 ; 44 0xcf04 -0.38269
DCW -9512 ; 45 0xdad8 -0.29028
DCW -6393 ; 46 0xe707 -0.19510
DCW -3212 ; 47 0xf374 -0.09802
DCW 0 ; 48 0x0000 0.00000
DCW 3212 ; 49 0x0c8c 0.09802
DCW 6393 ; 50 0x18f9 0.19510
DCW 9512 ; 51 0x2528 0.29028
DCW 12540 ; 52 0x30fc 0.38269
DCW 15447 ; 53 0x3c57 0.47141
DCW 18205 ; 54 0x471d 0.55557
DCW 20788 ; 55 0x5134 0.63440
DCW 23170 ; 56 0x5a82 0.70709
DCW 25330 ; 57 0x62f2 0.77301
DCW 27246 ; 58 0x6a6e 0.83148
DCW 28899 ; 59 0x70e3 0.88193
DCW 30274 ; 60 0x7642 0.92389
DCW 31357 ; 61 0x7a7d 0.95694
DCW 32138 ; 62 0x7d8a 0.98077
DCW 32610 ; 63 0x7f62 0.99518
TabSin
DCW 0 ; 0 0x0000 0.00000
DCW 3212 ; 1 0x0c8c 0.09802
DCW 6393 ; 2 0x18f9 0.19510
DCW 9512 ; 3 0x2528 0.29028
DCW 12540 ; 4 0x30fc 0.38269
DCW 15447 ; 5 0x3c57 0.47141
DCW 18205 ; 6 0x471d 0.55557
DCW 20788 ; 7 0x5134 0.63440
DCW 23170 ; 8 0x5a82 0.70709
DCW 25330 ; 9 0x62f2 0.77301
DCW 27246 ; 10 0x6a6e 0.83148
DCW 28899 ; 11 0x70e3 0.88193
DCW 30274 ; 12 0x7642 0.92389
DCW 31357 ; 13 0x7a7d 0.95694
DCW 32138 ; 14 0x7d8a 0.98077
DCW 32610 ; 15 0x7f62 0.99518
DCW 32767 ; 16 0x7fff 0.99997
DCW 32610 ; 17 0x7f62 0.99518
DCW 32138 ; 18 0x7d8a 0.98077
DCW 31357 ; 19 0x7a7d 0.95694
DCW 30274 ; 20 0x7642 0.92389
DCW 28899 ; 21 0x70e3 0.88193
DCW 27246 ; 22 0x6a6e 0.83148
DCW 25330 ; 23 0x62f2 0.77301
DCW 23170 ; 24 0x5a82 0.70709
DCW 20788 ; 25 0x5134 0.63440
DCW 18205 ; 26 0x471d 0.55557
DCW 15447 ; 27 0x3c57 0.47141
DCW 12540 ; 28 0x30fc 0.38269
DCW 9512 ; 29 0x2528 0.29028
DCW 6393 ; 30 0x18f9 0.19510
DCW 3212 ; 31 0x0c8c 0.09802
DCW 0 ; 32 0x0000 0.00000
DCW -3212 ; 33 0xf374 -0.09802
DCW -6393 ; 34 0xe707 -0.19510
DCW -9512 ; 35 0xdad8 -0.29028
DCW -12540 ; 36 0xcf04 -0.38269
DCW -15447 ; 37 0xc3a9 -0.47141
DCW -18205 ; 38 0xb8e3 -0.55557
DCW -20788 ; 39 0xaecc -0.63440
DCW -23170 ; 40 0xa57e -0.70709
DCW -25330 ; 41 0x9d0e -0.77301
DCW -27246 ; 42 0x9592 -0.83148
DCW -28899 ; 43 0x8f1d -0.88193
DCW -30274 ; 44 0x89be -0.92389
DCW -31357 ; 45 0x8583 -0.95694
DCW -32138 ; 46 0x8276 -0.98077
DCW -32610 ; 47 0x809e -0.99518
DCW -32768 ; 48 0x8000 -1.00000
DCW -32610 ; 49 0x809e -0.99518
DCW -32138 ; 50 0x8276 -0.98077
DCW -31357 ; 51 0x8583 -0.95694
DCW -30274 ; 52 0x89be -0.92389
DCW -28899 ; 53 0x8f1d -0.88193
DCW -27246 ; 54 0x9592 -0.83148
DCW -25330 ; 55 0x9d0e -0.77301
DCW -23170 ; 56 0xa57e -0.70709
DCW -20788 ; 57 0xaecc -0.63440
DCW -18205 ; 58 0xb8e3 -0.55557
DCW -15447 ; 59 0xc3a9 -0.47141
DCW -12540 ; 60 0xcf04 -0.38269
DCW -9512 ; 61 0xdad8 -0.29028
DCW -6393 ; 62 0xe707 -0.19510
DCW -3212 ; 63 0xf374 -0.09802
END

333
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ARM Macro Assembler Page 1
1 00000000 AREA Trigo, DATA, READONLY
2 00000000 export TabSin
3 00000000 export TabCos
4 00000000
5 00000000 TabCos
6 00000000 FF 7F DCW 32767 ; 0 0x7fff 0.9999
7
7 00000002 62 7F DCW 32610 ; 1 0x7f62 0.9951
8
8 00000004 8A 7D DCW 32138 ; 2 0x7d8a 0.9807
7
9 00000006 7D 7A DCW 31357 ; 3 0x7a7d 0.9569
4
10 00000008 42 76 DCW 30274 ; 4 0x7642 0.9238
9
11 0000000A E3 70 DCW 28899 ; 5 0x70e3 0.8819
3
12 0000000C 6E 6A DCW 27246 ; 6 0x6a6e 0.8314
8
13 0000000E F2 62 DCW 25330 ; 7 0x62f2 0.7730
1
14 00000010 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
15 00000012 34 51 DCW 20788 ; 9 0x5134 0.6344
0
16 00000014 1D 47 DCW 18205 ; 10 0x471d 0.5555
7
17 00000016 57 3C DCW 15447 ; 11 0x3c57 0.4714
1
18 00000018 FC 30 DCW 12540 ; 12 0x30fc 0.3826
9
19 0000001A 28 25 DCW 9512 ; 13 0x2528 0.2902
8
20 0000001C F9 18 DCW 6393 ; 14 0x18f9 0.1951
0
21 0000001E 8C 0C DCW 3212 ; 15 0x0c8c 0.0980
2
22 00000020 00 00 DCW 0 ; 16 0x0000 0.0000
0
23 00000022 74 F3 DCW -3212 ; 17 0xf374 -0.0980
2
24 00000024 07 E7 DCW -6393 ; 18 0xe707 -0.1951
0
25 00000026 D8 DA DCW -9512 ; 19 0xdad8 -0.2902
8
26 00000028 04 CF DCW -12540 ; 20 0xcf04 -0.3826
9
27 0000002A A9 C3 DCW -15447 ; 21 0xc3a9 -0.4714
1
28 0000002C E3 B8 DCW -18205 ; 22 0xb8e3 -0.5555
7
29 0000002E CC AE DCW -20788 ; 23 0xaecc -0.6344
0
30 00000030 7E A5 DCW -23170 ; 24 0xa57e -0.7070
9
31 00000032 0E 9D DCW -25330 ; 25 0x9d0e -0.7730
1
32 00000034 92 95 DCW -27246 ; 26 0x9592 -0.8314
8
ARM Macro Assembler Page 2
33 00000036 1D 8F DCW -28899 ; 27 0x8f1d -0.8819
3
34 00000038 BE 89 DCW -30274 ; 28 0x89be -0.9238
9
35 0000003A 83 85 DCW -31357 ; 29 0x8583 -0.9569
4
36 0000003C 76 82 DCW -32138 ; 30 0x8276 -0.9807
7
37 0000003E 9E 80 DCW -32610 ; 31 0x809e -0.9951
8
38 00000040 00 80 DCW -32768 ; 32 0x8000 -1.0000
0
39 00000042 9E 80 DCW -32610 ; 33 0x809e -0.9951
8
40 00000044 76 82 DCW -32138 ; 34 0x8276 -0.9807
7
41 00000046 83 85 DCW -31357 ; 35 0x8583 -0.9569
4
42 00000048 BE 89 DCW -30274 ; 36 0x89be -0.9238
9
43 0000004A 1D 8F DCW -28899 ; 37 0x8f1d -0.8819
3
44 0000004C 92 95 DCW -27246 ; 38 0x9592 -0.8314
8
45 0000004E 0E 9D DCW -25330 ; 39 0x9d0e -0.7730
1
46 00000050 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
47 00000052 CC AE DCW -20788 ; 41 0xaecc -0.6344
0
48 00000054 E3 B8 DCW -18205 ; 42 0xb8e3 -0.5555
7
49 00000056 A9 C3 DCW -15447 ; 43 0xc3a9 -0.4714
1
50 00000058 04 CF DCW -12540 ; 44 0xcf04 -0.3826
9
51 0000005A D8 DA DCW -9512 ; 45 0xdad8 -0.2902
8
52 0000005C 07 E7 DCW -6393 ; 46 0xe707 -0.1951
0
53 0000005E 74 F3 DCW -3212 ; 47 0xf374 -0.0980
2
54 00000060 00 00 DCW 0 ; 48 0x0000 0.0000
0
55 00000062 8C 0C DCW 3212 ; 49 0x0c8c 0.0980
2
56 00000064 F9 18 DCW 6393 ; 50 0x18f9 0.1951
0
57 00000066 28 25 DCW 9512 ; 51 0x2528 0.2902
8
58 00000068 FC 30 DCW 12540 ; 52 0x30fc 0.3826
9
59 0000006A 57 3C DCW 15447 ; 53 0x3c57 0.4714
1
60 0000006C 1D 47 DCW 18205 ; 54 0x471d 0.5555
7
61 0000006E 34 51 DCW 20788 ; 55 0x5134 0.6344
0
62 00000070 82 5A DCW 23170 ; 56 0x5a82 0.7070
ARM Macro Assembler Page 3
9
63 00000072 F2 62 DCW 25330 ; 57 0x62f2 0.7730
1
64 00000074 6E 6A DCW 27246 ; 58 0x6a6e 0.8314
8
65 00000076 E3 70 DCW 28899 ; 59 0x70e3 0.8819
3
66 00000078 42 76 DCW 30274 ; 60 0x7642 0.9238
9
67 0000007A 7D 7A DCW 31357 ; 61 0x7a7d 0.9569
4
68 0000007C 8A 7D DCW 32138 ; 62 0x7d8a 0.9807
7
69 0000007E 62 7F DCW 32610 ; 63 0x7f62 0.9951
8
70 00000080 TabSin
71 00000080 00 00 DCW 0 ; 0 0x0000 0.0000
0
72 00000082 8C 0C DCW 3212 ; 1 0x0c8c 0.0980
2
73 00000084 F9 18 DCW 6393 ; 2 0x18f9 0.1951
0
74 00000086 28 25 DCW 9512 ; 3 0x2528 0.2902
8
75 00000088 FC 30 DCW 12540 ; 4 0x30fc 0.3826
9
76 0000008A 57 3C DCW 15447 ; 5 0x3c57 0.4714
1
77 0000008C 1D 47 DCW 18205 ; 6 0x471d 0.5555
7
78 0000008E 34 51 DCW 20788 ; 7 0x5134 0.6344
0
79 00000090 82 5A DCW 23170 ; 8 0x5a82 0.7070
9
80 00000092 F2 62 DCW 25330 ; 9 0x62f2 0.7730
1
81 00000094 6E 6A DCW 27246 ; 10 0x6a6e 0.8314
8
82 00000096 E3 70 DCW 28899 ; 11 0x70e3 0.8819
3
83 00000098 42 76 DCW 30274 ; 12 0x7642 0.9238
9
84 0000009A 7D 7A DCW 31357 ; 13 0x7a7d 0.9569
4
85 0000009C 8A 7D DCW 32138 ; 14 0x7d8a 0.9807
7
86 0000009E 62 7F DCW 32610 ; 15 0x7f62 0.9951
8
87 000000A0 FF 7F DCW 32767 ; 16 0x7fff 0.9999
7
88 000000A2 62 7F DCW 32610 ; 17 0x7f62 0.9951
8
89 000000A4 8A 7D DCW 32138 ; 18 0x7d8a 0.9807
7
90 000000A6 7D 7A DCW 31357 ; 19 0x7a7d 0.9569
4
91 000000A8 42 76 DCW 30274 ; 20 0x7642 0.9238
9
92 000000AA E3 70 DCW 28899 ; 21 0x70e3 0.8819
ARM Macro Assembler Page 4
3
93 000000AC 6E 6A DCW 27246 ; 22 0x6a6e 0.8314
8
94 000000AE F2 62 DCW 25330 ; 23 0x62f2 0.7730
1
95 000000B0 82 5A DCW 23170 ; 24 0x5a82 0.7070
9
96 000000B2 34 51 DCW 20788 ; 25 0x5134 0.6344
0
97 000000B4 1D 47 DCW 18205 ; 26 0x471d 0.5555
7
98 000000B6 57 3C DCW 15447 ; 27 0x3c57 0.4714
1
99 000000B8 FC 30 DCW 12540 ; 28 0x30fc 0.3826
9
100 000000BA 28 25 DCW 9512 ; 29 0x2528 0.2902
8
101 000000BC F9 18 DCW 6393 ; 30 0x18f9 0.1951
0
102 000000BE 8C 0C DCW 3212 ; 31 0x0c8c 0.0980
2
103 000000C0 00 00 DCW 0 ; 32 0x0000 0.0000
0
104 000000C2 74 F3 DCW -3212 ; 33 0xf374 -0.0980
2
105 000000C4 07 E7 DCW -6393 ; 34 0xe707 -0.1951
0
106 000000C6 D8 DA DCW -9512 ; 35 0xdad8 -0.2902
8
107 000000C8 04 CF DCW -12540 ; 36 0xcf04 -0.3826
9
108 000000CA A9 C3 DCW -15447 ; 37 0xc3a9 -0.4714
1
109 000000CC E3 B8 DCW -18205 ; 38 0xb8e3 -0.5555
7
110 000000CE CC AE DCW -20788 ; 39 0xaecc -0.6344
0
111 000000D0 7E A5 DCW -23170 ; 40 0xa57e -0.7070
9
112 000000D2 0E 9D DCW -25330 ; 41 0x9d0e -0.7730
1
113 000000D4 92 95 DCW -27246 ; 42 0x9592 -0.8314
8
114 000000D6 1D 8F DCW -28899 ; 43 0x8f1d -0.8819
3
115 000000D8 BE 89 DCW -30274 ; 44 0x89be -0.9238
9
116 000000DA 83 85 DCW -31357 ; 45 0x8583 -0.9569
4
117 000000DC 76 82 DCW -32138 ; 46 0x8276 -0.9807
7
118 000000DE 9E 80 DCW -32610 ; 47 0x809e -0.9951
8
119 000000E0 00 80 DCW -32768 ; 48 0x8000 -1.0000
0
120 000000E2 9E 80 DCW -32610 ; 49 0x809e -0.9951
8
121 000000E4 76 82 DCW -32138 ; 50 0x8276 -0.9807
7
ARM Macro Assembler Page 5
122 000000E6 83 85 DCW -31357 ; 51 0x8583 -0.9569
4
123 000000E8 BE 89 DCW -30274 ; 52 0x89be -0.9238
9
124 000000EA 1D 8F DCW -28899 ; 53 0x8f1d -0.8819
3
125 000000EC 92 95 DCW -27246 ; 54 0x9592 -0.8314
8
126 000000EE 0E 9D DCW -25330 ; 55 0x9d0e -0.7730
1
127 000000F0 7E A5 DCW -23170 ; 56 0xa57e -0.7070
9
128 000000F2 CC AE DCW -20788 ; 57 0xaecc -0.6344
0
129 000000F4 E3 B8 DCW -18205 ; 58 0xb8e3 -0.5555
7
130 000000F6 A9 C3 DCW -15447 ; 59 0xc3a9 -0.4714
1
131 000000F8 04 CF DCW -12540 ; 60 0xcf04 -0.3826
9
132 000000FA D8 DA DCW -9512 ; 61 0xdad8 -0.2902
8
133 000000FC 07 E7 DCW -6393 ; 62 0xe707 -0.1951
0
134 000000FE 74 F3 DCW -3212 ; 63 0xf374 -0.0980
2
135 00000100
136 00000100 END
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=.\obj\trigo.d -o.\obj\trigo.o -I.\RTE\_Simu -IC:\Users\nmouk\AppDa
ta\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\nmouk\AppData\
Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --predefine="__EVAL SET
A 1" --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 529" -
-predefine="_RTE_ SETA 1" --predefine="STM32F10X_MD SETA 1" --list=trigo.lst tr
igo.asm
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
TabCos 00000000
Symbol: TabCos
Definitions
At line 5 in file trigo.asm
Uses
At line 3 in file trigo.asm
Comment: TabCos used once
TabSin 00000080
Symbol: TabSin
Definitions
At line 70 in file trigo.asm
Uses
At line 2 in file trigo.asm
Comment: TabSin used once
Trigo 00000000
Symbol: Trigo
Definitions
At line 1 in file trigo.asm
Uses
None
Comment: Trigo unused
3 symbols
338 symbols in table