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ADC without interruptions

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This commit is contained in:
Clement Marce 2023-03-27 16:50:48 +02:00
parent 6d91d3c4ae
commit 4d69e527e5
1 changed files with 31 additions and 14 deletions
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41
Drivers/Sources/Driver_ADC.c
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@ -1,27 +1,44 @@
#include "Driver_ADC.h" #include "Driver_ADC.h"
#include "Driver_GPIO.h"
//----------------------INIT--------------------//
void MyADC_Base_Init(MyADC_Struct_TypeDef * ADC){ void MyADC_Base_Init(MyADC_Struct_TypeDef * ADC){
RCC->CFGR |= RCC_CFGR_ADCPRE_DIV6; //Division par 6 de la clock (72MHz) pour l'ADC (14MHz max)
//Division par 6 de la clock (72MHz) pour l'ADC (14MHz max)
RCC->CFGR |= RCC_CFGR_ADCPRE_DIV6;
//Selection du channel PC0 pour l'ADC
MyGPIO_Struct_TypeDef * GPIO_ADC;
GPIO_ADC->GPIO = GPIOC;
GPIO_ADC->GPIO_Conf = In_Analog;
GPIO_ADC->GPIO_Pin = 0;
//Selection entre ADC1 ou ADC2
if(ADC->ADC == ADC1){ if(ADC->ADC == ADC1){
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; //Enable Clock ADC1 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; //Enable Clock ADC1
ADC1->CR2 |= ADC_CR2_ADON; //Enable ADC1
ADC1->SQR1&= ADC_SQR1_L;
ADC1->SQR3|= 8;
}else if(ADC->ADC == ADC2){ }else if(ADC->ADC == ADC2){
RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; //Enable Clock ADC1 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; //Enable Clock ADC2
ADC1->CR2 |= ADC_CR2_ADON; //Enable ADC1
ADC1->SQR1&= ADC_SQR1_L;
ADC1->SQR3|= 8;
} }
} }
//---------------------START--------------------//
void MyADC_Base_Start(ADC_TypeDef * ADC){ void MyADC_Base_Start(ADC_TypeDef * ADC){
if(ADC == ADC1){
ADC1->CR2 |= ADC_CR2_ADON; //Enable ADC1
} else if (ADC == ADC2){
ADC2->CR2 |= ADC_CR2_ADON; //Enable ADC2
}
} }
//---------------------STOP--------------------//
void MyADC_Base_Stop(ADC_TypeDef * ADC){ void MyADC_Base_Stop(ADC_TypeDef * ADC){
if(ADC == ADC1){
ADC1->CR2 &= ~ADC_CR2_ADON;
}else if(ADC == ADC2){
ADC2->CR2 &= ~ADC_CR2_ADON;
}
} }