diff --git a/Project.uvoptx b/Project.uvoptx
index 19d9f3d..9c7f8c8 100644
--- a/Project.uvoptx
+++ b/Project.uvoptx
@@ -153,24 +153,7 @@
-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)
-
-
- 0
- 0
- 61
- 1
- 0
- 0
- 0
- 0
- 0
- 0
- 0
- .\Src\principal.c
-
-
-
-
+
0
diff --git a/Src/principal.c b/Src/principal.c
index 5a09d6d..a634fd7 100644
--- a/Src/principal.c
+++ b/Src/principal.c
@@ -60,7 +60,6 @@ int main(void)
}
-
// activation de la PLL qui multiplie la fréquence du quartz par 9
CLOCK_Configure();
// PA2 (ADC voie 2) = entrée analog
@@ -71,7 +70,7 @@ int main(void)
GPIO_Configure(GPIOB, 14, OUTPUT, OUTPUT_PPULL);
// activation ADC, sampling time 1us
- Init_TimingADC_ActiveADC_ff( ADC1, 0x31 );
+ Init_TimingADC_ActiveADC_ff( ADC1, 0x33 );
Single_Channel_ADC( ADC1, 2 );
// Déclenchement ADC par timer2, periode (72MHz/320kHz)ticks
Init_Conversion_On_Trig_Timer_ff( ADC1, TIM2_CC2, 225 );