From a7a27d7bb3aee8e00dc500a4beb133d508845978 Mon Sep 17 00:00:00 2001 From: orvik Date: Tue, 4 Nov 2025 09:02:56 +0100 Subject: [PATCH] Premier commit --- CantoOrvikPilotes/Source/ADC.c | Bin 0 -> 1024 bytes CantoOrvikPilotes/Source/GPIO.c | 83 +++++++++++++++++++++++++++++ CantoOrvikPilotes/Source/MyTimer.c | 60 +++++++++++++++++++++ CantoOrvikPilotes/Source/Nucleo.c | 32 +++++++++++ CantoOrvikPilotes/Source/PWM.c | 69 ++++++++++++++++++++++++ 5 files changed, 244 insertions(+) create mode 100644 CantoOrvikPilotes/Source/ADC.c create mode 100644 CantoOrvikPilotes/Source/GPIO.c create mode 100644 CantoOrvikPilotes/Source/MyTimer.c create mode 100644 CantoOrvikPilotes/Source/Nucleo.c create mode 100644 CantoOrvikPilotes/Source/PWM.c diff --git a/CantoOrvikPilotes/Source/ADC.c b/CantoOrvikPilotes/Source/ADC.c new file mode 100644 index 0000000000000000000000000000000000000000..06d7405020018ddf3cacee90fd4af10487da3d20 GIT binary patch literal 1024 ScmZQz7zLvtFd70QH3R?z00031 literal 0 HcmV?d00001 diff --git a/CantoOrvikPilotes/Source/GPIO.c b/CantoOrvikPilotes/Source/GPIO.c new file mode 100644 index 0000000..c407c49 --- /dev/null +++ b/CantoOrvikPilotes/Source/GPIO.c @@ -0,0 +1,83 @@ +#include "stm32f10x.h" +#include + +int ChercherEtat(GPIO_TypeDef * GPIO, int pin){ +return((GPIO -> IDR & (0x01 << pin))); +} + +void ResetBroche(uint32_t GPIO, int Broche){ + GPIO -> BSRR |= BSBroche; +} + +void SetBroche(uint32_t GPIO, int Broche){ + GPIO -> BSRR |= BSBroche << 16; +} + +void ConfigureGPIO(uint32_t GPIO, int Broche, int IO, char Mode){ + RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; // Clock GPIOA enable + if (Broche < 8) { + GPIO -> CRL &= ~(0x1 << Broche *4) & ~(0x1 << Broche *4 +1) & ~(0x1 << Broche *4 + 2) & ~(0x1 << Broche *4 + 3); // Clean bits + if (IO == 0){ //Input + if (strcmp(Mode,"Floating")) { + GPIO -> CRL |= (0x1 << Broche *4) | (0x1 << Broche * 4 + 1); + } + else if (strcmp(Mode,"Pull-Up") || strcmp(Mode,"Pull-Down")){ + GPIO -> CRL |= (0x1 << 6*4 + 1); + } + else { + } + } + else if ( IO < 5) { // Output + GPIO -> CRL |= (0xIO << Broche * 4 + 2); // Frequency mode + if (strcmp(Mode, "Open-Drain")){ + GPIO -> CRL |= (0x1 << Broche *4); + } + else if (strcmp(Mode, "Push-Pull Alterne")){ + GPIO -> CRL |= (0x1 << Broche *4 + 1); + RCC->APB2ENR |= RCC_APB2ENR_AFIOEN; // Alternate Function I/O clock enable GPIOA + } + else if (strcmp(Mode, "Open-Drain Alterne")){ + GPIO -> CRL |= (0x1 << Broche * 4) | (0x1 << Broche * 4 + 1); + } + else { + } + } + else{ + return; + } + } + else if (Broche < 16) { + GPIO -> CRH &= ~(0x1 << Broche *4) & ~(0x1 << Broche *4 +1) & ~(0x1 << Broche *4 + 2) & ~(0x1 << Broche *4 + 3); // Clean bits + if (IO == 0){ //Input + if (strcmp(Mode,"Floating")) { + GPIO -> CRH |= (0x1 << Broche *4) | (0x1 << Broche * 4 + 1); + } + else if (strcmp(Mode,"Pull-Up") || strcmp(Mode,"Pull-Down")){ + GPIO -> CRH |= (0x1 << 6*4 + 1); + } + else { + } + } + else if ( IO < 5) { // Output + GPIO -> CRH |= (0xIO << Broche * 4 + 2); // Frequency mode + if (strcmp(Mode, "Open-Drain")){ + GPIO -> CRH |= (0x1 << Broche *4); + } + else if (strcmp(Mode, "Push-Pull Alterne")){ + GPIO -> CRH |= (0x1 << Broche *4 + 1); + } + else if (strcmp(Mode, "Open-Drain Alterne")){ + GPIO -> CRH |= (0x1 << Broche * 4) | (0x1 << Broche * 4 + 1); + } + else { + } + } + else{ + return; // IO invalid + } + } + else{ + return; // Pin number invalid + } +} + diff --git a/CantoOrvikPilotes/Source/MyTimer.c b/CantoOrvikPilotes/Source/MyTimer.c new file mode 100644 index 0000000..17b0536 --- /dev/null +++ b/CantoOrvikPilotes/Source/MyTimer.c @@ -0,0 +1,60 @@ +#include "stm32f10x.h" +#include "Nucleo.h" +#include "Timer.h" +#include "PWM.h" +#include "GPIO.h" +#define ARR_TIM1 0xFFAD +#define PSC_TIM1 0xFF +#define ARR_TIM2 0xFFAD +#define PSC_TIM2 0x0225 +#define ARR_TIM3 0x2CF +#define PSC_TIM3 0x0 + +volatile int g_tick_count; + +void Test(void){ + // Signal + g_tick_count++; + TogglePin(GPIOA, 8); +} + + +void ConfigureBroches(){ + ConfigureGPIO(GPIOA, 6, 4, Push-Pull); + //GPIOA->CRL &= ~(0xF << 6*4); // clean pin 6 + //GPIOA->CRL |= (0xB << 6*4); // Alternate Function output, Push-Pull max 50 Hz + + //Mettre Broche 5 sur input Pull-up/down + ConfigureGPIO(GPIOC, 3, 0, Pull-Up); + //GPIOC ->CRL &= ~(0xF << (4 *3)); + //GPIOC ->CRL |= (0x1 << (4 *3)); + + //Mettre Broche 5 sur input Pull-up/down + ConfigureGPIO(GPIOA, 5, 0, Pull-Up); + //GPIOA ->CRL &= ~(0xF << (4 *5)); + //GPIOA ->CRL |= (0x3 << (4 *5)); + + //Mettre Broche D7 sur input Open drain + ConfigureGPIO(GPIOA, 0, 0, Open-Drain); + //GPIOA ->CRH &= ~(0xF << (4 *0)); + //GPIOA ->CRH |= (0x7 << (4 *0)); + +} + + +void ConfigureTimers(){ +MyTimer_Base_Init(TIM2, ARR_TIM2, PSC_TIM2); +MyTimer_Base_Init(TIM1, ARR_TIM1, PSC_TIM1); +MyTimer_Base_Init(TIM3, ARR_TIM2, PSC_TIM2); +} +void ConfigureIT(){ +//MyTimer_ActiveIT(TIM2, 4, Test); //start interruption with priority 4 +//MyTimer_ActiveIT(TIM1, 4, Test); //start interruption with priority 4 +MyTimer_ActiveIT(TIM3, 4, Test); //start interruption with priority 4 + +} + +void ConfigurePWM(){ +MyTimer_PWM(TIM1, 1); +MyTimer_Set_DutyCycle(TIM1, 1, 20.0); +} diff --git a/CantoOrvikPilotes/Source/Nucleo.c b/CantoOrvikPilotes/Source/Nucleo.c new file mode 100644 index 0000000..786830d --- /dev/null +++ b/CantoOrvikPilotes/Source/Nucleo.c @@ -0,0 +1,32 @@ +#include "stm32f10x.h" + +void ConfigHorloge(void) { +RCC->APB2ENR |= (0x01 << 2) | (0x01 << 3) | (0x01 << 4) | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_TIM1EN; +}; + +void ConfigBroche(void){ + //Mettre Broche 5 GPIOA à output push-pull + GPIOA ->CRL &= ~(0x1 << (5*4 + 2)); //0x44144444; + GPIOA ->CRL |= (0x1 << 5*4); //0x44144444; + + //Mettre Broche 5 sur input Pull-up/down + GPIOA ->CRH &= ~(0x1 << (4 + 2)); + GPIOA ->CRH |= (0x1 << (4 + 3)); + + //Mettre broche 8 sur GPIOA à output open drain + GPIOA ->CRH |= (0x1 ); +}; + +int BoutonAppuye(void){ + return((GPIOA -> IDR & (0x01 << 9))); + //return(ChercherEtat(GPIOA, 9)); +} +void AllumerLED(void){ + GPIOA -> ODR &= ~(0x1 << 8); +} +void EteindreLED(void){ + GPIOA -> ODR |= (0x1 << 8); +} +void TogglePin(GPIO_TypeDef*GPIO, int Broche){ +GPIO -> ODR = GPIO -> ODR ^ (0x1 << Broche); +} \ No newline at end of file diff --git a/CantoOrvikPilotes/Source/PWM.c b/CantoOrvikPilotes/Source/PWM.c new file mode 100644 index 0000000..6abfb6f --- /dev/null +++ b/CantoOrvikPilotes/Source/PWM.c @@ -0,0 +1,69 @@ +#include "stm32f10x.h" +#include "PWM.h" + + +void MyTimer_PWM(TIM_TypeDef *Timer, char Channel) { + // preload + Timer->CR1 |= TIM_CR1_ARPE; + + switch (Channel) { + case 1: + // Config o channel 1 in "PWM Mode 1" and enable preload of CCR1 + Timer->CCMR1 &= ~TIM_CCMR1_OC1M; // clean bit modes + Timer->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1; // Mode PWM 1 + Timer->CCMR1 |= TIM_CCMR1_OC1PE; // enable preload + + // enable exit 1 (Output enable) + Timer->CCER |= TIM_CCER_CC1E; + break; + case 2: + Timer->CCMR1 &= ~TIM_CCMR1_OC2M; + Timer->CCMR1 |= TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1; + Timer->CCMR1 |= TIM_CCMR1_OC2PE; + Timer->CCER |= TIM_CCER_CC2E; + break; + case 3: + Timer->CCMR2 &= ~TIM_CCMR2_OC3M; + Timer->CCMR2 |= TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_1; + Timer->CCMR2 |= TIM_CCMR2_OC3PE; + Timer->CCER |= TIM_CCER_CC3E; + break; + case 4: + Timer->CCMR2 &= ~TIM_CCMR2_OC4M; + Timer->CCMR2 |= TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4M_1; + Timer->CCMR2 |= TIM_CCMR2_OC4PE; + Timer->CCER |= TIM_CCER_CC4E; + break; + } + + // special case(specific timers) + if (Timer == TIM1 || Timer == TIM8) { + Timer->BDTR |= TIM_BDTR_MOE; + } +} + +void MyTimer_Set_DutyCycle(TIM_TypeDef *Timer, char Channel, float DutyCycle_Percent) { + unsigned short ccr_value; + + // Percentages between 0 and 100 + if (DutyCycle_Percent > 100.0) DutyCycle_Percent = 100.0; + if (DutyCycle_Percent < 0.0) DutyCycle_Percent = 0.0; + + // calcule of crr + ccr_value = (unsigned short)((DutyCycle_Percent / 100.0) * (Timer->ARR)); + + switch (Channel) { + case 1: + Timer->CCR1 = ccr_value; + break; + case 2: + Timer->CCR2 = ccr_value; + break; + case 3: + Timer->CCR3 = ccr_value; + break; + case 4: + Timer->CCR4 = ccr_value; + break; + } +}