diff --git a/Application/principal.c b/Application/principal.c deleted file mode 100644 index 45041b3..0000000 --- a/Application/principal.c +++ /dev/null @@ -1,67 +0,0 @@ -#include -#include // Pour afficher -#include "Horloge.h" -#include "Accelerometre.h" -#include "Girouette.h" -#include "Servo.h" -#include "MyUart.h" -#include "Plateau.h" -#include "I2C.h" -#include "RTC.h" - -//Variables -int angleVentVar; -int angleVoileVar; -uint16_t moyenne[LONGUEUR_MOY]; -uint32_t sum; -//uint16_t i; -volatile uint32_t moy; // Volatile pour pouvoir le regarder dans Keil µVision - -void pilotage(int commande) { - Update_Motor_PWM(commande,TIM3,3); - }; - -int main(void) { - // ---- Setup ------ - // Servo.c - initServo(TIM4, 3); - // Giroutte.c - configEncoder(TIM2); - // init plateau - initPlato(TIM3, 3); - - //init Uart - My_USART_Config(USART1, 7500); //call with baudrate which is one over this value times clock frequency - USART_IT_Receive_Enable(USART1); - Init_IT_Receive(pilotage); - USART_Send_String(USART1,"bonjour bateau\r\n"); - - - // Initialisation des modules - initAccelo(); - initLacheur(); - - - //RTC - initRTC(); - getTime(); - - for (int p = 0; p= LONGUEUR_MOY) {i = 0;} // Géstion de la position i dans le tableau pour la moyenne glissante - sum = 0; for (int j = 0; j < LONGUEUR_MOY; j++){sum += moyenne[j];} moy = sum / LONGUEUR_MOY; // Calcul de la moyenne glissante - LacheVoile(ANGLE_LIMITE, (uint16_t) moy); // Lache la voile si le bateau dépasse l'angle limite - } -}; diff --git a/DebugConfig/Reel_STM32F103RB_1.0.0.dbgconf b/DebugConfig/Reel_STM32F103RB_1.0.0.dbgconf deleted file mode 100644 index 9c4804d..0000000 --- a/DebugConfig/Reel_STM32F103RB_1.0.0.dbgconf +++ /dev/null @@ -1,36 +0,0 @@ -// File: STM32F101_102_103_105_107.dbgconf -// Version: 1.0.0 -// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) -// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets - -// <<< Use Configuration Wizard in Context Menu >>> - -// Debug MCU configuration register (DBGMCU_CR) -// Reserved bits must be kept at reset value -// DBG_TIM11_STOP TIM11 counter stopped when core is halted -// DBG_TIM10_STOP TIM10 counter stopped when core is halted -// DBG_TIM9_STOP TIM9 counter stopped when core is halted -// DBG_TIM14_STOP TIM14 counter stopped when core is halted -// DBG_TIM13_STOP TIM13 counter stopped when core is halted -// DBG_TIM12_STOP TIM12 counter stopped when core is halted -// DBG_CAN2_STOP Debug CAN2 stopped when core is halted -// DBG_TIM7_STOP TIM7 counter stopped when core is halted -// DBG_TIM6_STOP TIM6 counter stopped when core is halted -// DBG_TIM5_STOP TIM5 counter stopped when core is halted -// DBG_TIM8_STOP TIM8 counter stopped when core is halted -// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted -// DBG_TIM4_STOP TIM4 counter stopped when core is halted -// DBG_TIM3_STOP TIM3 counter stopped when core is halted -// DBG_TIM2_STOP TIM2 counter stopped when core is halted -// DBG_TIM1_STOP TIM1 counter stopped when core is halted -// DBG_WWDG_STOP Debug window watchdog stopped when core is halted -// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted -// DBG_STANDBY Debug standby mode -// DBG_STOP Debug stop mode -// DBG_SLEEP Debug sleep mode -// -DbgMCU_CR = 0x00000007; - -// <<< end of configuration section >>> diff --git a/DebugConfig/Simulation_STM32F103RB_1.0.0.dbgconf b/DebugConfig/Simulation_STM32F103RB_1.0.0.dbgconf deleted file mode 100644 index 9c4804d..0000000 --- a/DebugConfig/Simulation_STM32F103RB_1.0.0.dbgconf +++ /dev/null @@ -1,36 +0,0 @@ -// File: STM32F101_102_103_105_107.dbgconf -// Version: 1.0.0 -// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) -// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets - -// <<< Use Configuration Wizard in Context Menu >>> - -// Debug MCU configuration register (DBGMCU_CR) -// Reserved bits must be kept at reset value -// DBG_TIM11_STOP TIM11 counter stopped when core is halted -// DBG_TIM10_STOP TIM10 counter stopped when core is halted -// DBG_TIM9_STOP TIM9 counter stopped when core is halted -// DBG_TIM14_STOP TIM14 counter stopped when core is halted -// DBG_TIM13_STOP TIM13 counter stopped when core is halted -// DBG_TIM12_STOP TIM12 counter stopped when core is halted -// DBG_CAN2_STOP Debug CAN2 stopped when core is halted -// DBG_TIM7_STOP TIM7 counter stopped when core is halted -// DBG_TIM6_STOP TIM6 counter stopped when core is halted -// DBG_TIM5_STOP TIM5 counter stopped when core is halted -// DBG_TIM8_STOP TIM8 counter stopped when core is halted -// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted -// DBG_TIM4_STOP TIM4 counter stopped when core is halted -// DBG_TIM3_STOP TIM3 counter stopped when core is halted -// DBG_TIM2_STOP TIM2 counter stopped when core is halted -// DBG_TIM1_STOP TIM1 counter stopped when core is halted -// DBG_WWDG_STOP Debug window watchdog stopped when core is halted -// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted -// DBG_STANDBY Debug standby mode -// DBG_STOP Debug stop mode -// DBG_SLEEP Debug sleep mode -// -DbgMCU_CR = 0x00000007; - -// <<< end of configuration section >>> diff --git a/EventRecorderStub.scvd b/EventRecorderStub.scvd deleted file mode 100644 index 0fb3ee5..0000000 --- a/EventRecorderStub.scvd +++ /dev/null @@ -1,9 +0,0 @@ - - - - - - - - - diff --git a/Listings/Projet3FISA.map b/Listings/Projet3FISA.map deleted file mode 100644 index 2cb2ce0..0000000 --- a/Listings/Projet3FISA.map +++ /dev/null @@ -1,889 +0,0 @@ -Component: Arm Compiler for Embedded 6.24 Tool: armlink [5f371500] - -============================================================================== - -Section Cross References - - principal.o(.text.main) refers to servo.o(.text.initServo) for initServo - principal.o(.text.main) refers to girouette.o(.text.configEncoder) for configEncoder - principal.o(.text.main) refers to accelerometre.o(.text.initAccelo) for initAccelo - principal.o(.text.main) refers to accelerometre.o(.text.initLacheur) for initLacheur - principal.o(.text.main) refers to principal.o(.bss.moyenne) for moyenne - principal.o(.text.main) refers to girouette.o(.text.LocaliserZero) for LocaliserZero - principal.o(.text.main) refers to girouette.o(.text.angleVent) for angleVent - principal.o(.text.main) refers to principal.o(.bss.angleVentVar) for angleVentVar - principal.o(.text.main) refers to girouette.o(.text.vent2voile) for vent2voile - principal.o(.text.main) refers to principal.o(.bss.angleVoileVar) for angleVoileVar - principal.o(.text.main) refers to servo.o(.text.Servo_Moteur) for Servo_Moteur - principal.o(.text.main) refers to accelerometre.o(.text.RecupAccelo) for RecupAccelo - principal.o(.text.main) refers to principal.o(.bss.sum) for sum - principal.o(.text.main) refers to principal.o(.bss.moy) for moy - principal.o(.ARM.exidx.text.main) refers to principal.o(.text.main) for [Anonymous Symbol] - accelerometre.o(.ARM.exidx.text.initAccelo) refers to accelerometre.o(.text.initAccelo) for [Anonymous Symbol] - accelerometre.o(.text.RecupAccelo) refers to accelerometre.o(.bss.RecupAccelo.Messie) for RecupAccelo.Messie - accelerometre.o(.ARM.exidx.text.RecupAccelo) refers to accelerometre.o(.text.RecupAccelo) for [Anonymous Symbol] - accelerometre.o(.text.initLacheur) refers to horloge.o(.text.Timer_Init) for Timer_Init - accelerometre.o(.ARM.exidx.text.initLacheur) refers to accelerometre.o(.text.initLacheur) for [Anonymous Symbol] - accelerometre.o(.text.LacheVoile) refers to servo.o(.text.Servo_Moteur) for Servo_Moteur - accelerometre.o(.ARM.exidx.text.LacheVoile) refers to accelerometre.o(.text.LacheVoile) for [Anonymous Symbol] - girouette.o(.text.configEncoder) refers to timer.o(.text.EnableTimer) for EnableTimer - girouette.o(.text.configEncoder) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - girouette.o(.ARM.exidx.text.configEncoder) refers to girouette.o(.text.configEncoder) for [Anonymous Symbol] - girouette.o(.ARM.exidx.text.angleVent) refers to girouette.o(.text.angleVent) for [Anonymous Symbol] - girouette.o(.ARM.exidx.text.vent2voile) refers to girouette.o(.text.vent2voile) for [Anonymous Symbol] - girouette.o(.text.LocaliserZero) refers to drivergpio.o(.text.MyGPIO_Read) for MyGPIO_Read - girouette.o(.ARM.exidx.text.LocaliserZero) refers to girouette.o(.text.LocaliserZero) for [Anonymous Symbol] - myuart.o(.text.My_USART_Config) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - myuart.o(.text.My_USART_Config) refers to myuart.o(.text.__NVIC_EnableIRQ) for __NVIC_EnableIRQ - myuart.o(.text.My_USART_Config) refers to myuart.o(.text.__NVIC_SetPriority) for __NVIC_SetPriority - myuart.o(.ARM.exidx.text.My_USART_Config) refers to myuart.o(.text.My_USART_Config) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.__NVIC_EnableIRQ) refers to myuart.o(.text.__NVIC_EnableIRQ) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.__NVIC_SetPriority) refers to myuart.o(.text.__NVIC_SetPriority) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.USART_Send_Char) refers to myuart.o(.text.USART_Send_Char) for [Anonymous Symbol] - myuart.o(.text.USART_Send_String) refers to myuart.o(.text.USART_Send_Char) for USART_Send_Char - myuart.o(.ARM.exidx.text.USART_Send_String) refers to myuart.o(.text.USART_Send_String) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.USART_IT_Receive_Enable) refers to myuart.o(.text.USART_IT_Receive_Enable) for [Anonymous Symbol] - myuart.o(.text.Init_IT_Receive) refers to myuart.o(.bss.pFnc_Receive) for pFnc_Receive - myuart.o(.ARM.exidx.text.Init_IT_Receive) refers to myuart.o(.text.Init_IT_Receive) for [Anonymous Symbol] - myuart.o(.text.USART1_IRQHandler) refers to myuart.o(.bss.pFnc_Receive) for pFnc_Receive - myuart.o(.ARM.exidx.text.USART1_IRQHandler) refers to myuart.o(.text.USART1_IRQHandler) for [Anonymous Symbol] - servo.o(.text.Servo_Moteur) refers to pwm.o(.text.Set_DutyCycle_PWM) for Set_DutyCycle_PWM - servo.o(.ARM.exidx.text.Servo_Moteur) refers to servo.o(.text.Servo_Moteur) for [Anonymous Symbol] - servo.o(.text.initServo) refers to horloge.o(.text.Timer_Init) for Timer_Init - servo.o(.text.initServo) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - servo.o(.text.initServo) refers to pwm.o(.text.MyTimer_PWM) for MyTimer_PWM - servo.o(.ARM.exidx.text.initServo) refers to servo.o(.text.initServo) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Init) refers to drivergpio.o(.text.MyGPIO_Init) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Read) refers to drivergpio.o(.text.MyGPIO_Read) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Set) refers to drivergpio.o(.text.MyGPIO_Set) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Reset) refers to drivergpio.o(.text.MyGPIO_Reset) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Toggle) refers to drivergpio.o(.text.MyGPIO_Toggle) for [Anonymous Symbol] - horloge.o(.ARM.exidx.text.Timer_Init) refers to horloge.o(.text.Timer_Init) for [Anonymous Symbol] - horloge.o(.text.TIM2_IRQHandler) refers to horloge.o(.bss.TIM2_Appel) for TIM2_Appel - horloge.o(.ARM.exidx.text.TIM2_IRQHandler) refers to horloge.o(.text.TIM2_IRQHandler) for [Anonymous Symbol] - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.bss.TIM2_Appel) for TIM2_Appel - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.text.__NVIC_EnableIRQ) for __NVIC_EnableIRQ - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.text.__NVIC_SetPriority) for __NVIC_SetPriority - horloge.o(.ARM.exidx.text.MyTimer_ActiveIT) refers to horloge.o(.text.MyTimer_ActiveIT) for [Anonymous Symbol] - horloge.o(.ARM.exidx.text.__NVIC_EnableIRQ) refers to horloge.o(.text.__NVIC_EnableIRQ) for [Anonymous Symbol] - horloge.o(.ARM.exidx.text.__NVIC_SetPriority) refers to horloge.o(.text.__NVIC_SetPriority) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.initGPIO_Interne) refers to mygpio.o(.text.initGPIO_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.boutonAppuye_Interne) refers to mygpio.o(.text.boutonAppuye_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.allumerDEL_Interne) refers to mygpio.o(.text.allumerDEL_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.eteindreDEL_Interne) refers to mygpio.o(.text.eteindreDEL_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.commuterDEL_Interne) refers to mygpio.o(.text.commuterDEL_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.initGPIO_Externe) refers to mygpio.o(.text.initGPIO_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.boutonAppuye_Externe) refers to mygpio.o(.text.boutonAppuye_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.allumerDEL_Externe) refers to mygpio.o(.text.allumerDEL_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.eteindreDEL_Externe) refers to mygpio.o(.text.eteindreDEL_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.commuterDEL_Externe) refers to mygpio.o(.text.commuterDEL_Externe) for [Anonymous Symbol] - mytimer.o(.text.Test) refers to mytimer.o(.bss.g_tick_count) for g_tick_count - mytimer.o(.text.Test) refers to drivergpio.o(.text.MyGPIO_Toggle) for MyGPIO_Toggle - mytimer.o(.ARM.exidx.text.Test) refers to mytimer.o(.text.Test) for [Anonymous Symbol] - mytimer.o(.text.ConfigureTimers) refers to horloge.o(.text.Timer_Init) for Timer_Init - mytimer.o(.ARM.exidx.text.ConfigureTimers) refers to mytimer.o(.text.ConfigureTimers) for [Anonymous Symbol] - mytimer.o(.text.ConfigureIT) refers to mytimer.o(.text.Test) for Test - mytimer.o(.text.ConfigureIT) refers to horloge.o(.text.MyTimer_ActiveIT) for MyTimer_ActiveIT - mytimer.o(.ARM.exidx.text.ConfigureIT) refers to mytimer.o(.text.ConfigureIT) for [Anonymous Symbol] - mytimer.o(.text.ConfigurePWM) refers to pwm.o(.text.MyTimer_PWM) for MyTimer_PWM - mytimer.o(.ARM.exidx.text.ConfigurePWM) refers to mytimer.o(.text.ConfigurePWM) for [Anonymous Symbol] - pwm.o(.ARM.exidx.text.MyTimer_PWM) refers to pwm.o(.text.MyTimer_PWM) for [Anonymous Symbol] - pwm.o(.ARM.exidx.text.Set_DutyCycle_PWM) refers to pwm.o(.text.Set_DutyCycle_PWM) for [Anonymous Symbol] - timer.o(.ARM.exidx.text.MyTimer_Base_Init) refers to timer.o(.text.MyTimer_Base_Init) for [Anonymous Symbol] - timer.o(.ARM.exidx.text.EnableTimer) refers to timer.o(.text.EnableTimer) for [Anonymous Symbol] - i2c.o(.ARM.exidx.text.initI2C) refers to i2c.o(.text.initI2C) for [Anonymous Symbol] - startup_stm32f10x_md.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(STACK) for __initial_sp - startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(.text) for Reset_Handler - startup_stm32f10x_md.o(RESET) refers to horloge.o(.text.TIM2_IRQHandler) for TIM2_IRQHandler - startup_stm32f10x_md.o(RESET) refers to myuart.o(.text.USART1_IRQHandler) for USART1_IRQHandler - startup_stm32f10x_md.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(.text) refers to system_stm32f10x.o(.text.SystemInit) for SystemInit - startup_stm32f10x_md.o(.text) refers to __main.o(!!!main) for __main - startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(HEAP) for Heap_Mem - startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(STACK) for Stack_Mem - system_stm32f10x.o(.text.SystemInit) refers to system_stm32f10x.o(.text.SetSysClock) for SetSysClock - system_stm32f10x.o(.ARM.exidx.text.SystemInit) refers to system_stm32f10x.o(.text.SystemInit) for [Anonymous Symbol] - system_stm32f10x.o(.text.SetSysClock) refers to system_stm32f10x.o(.text.SetSysClockTo72) for SetSysClockTo72 - system_stm32f10x.o(.ARM.exidx.text.SetSysClock) refers to system_stm32f10x.o(.text.SetSysClock) for [Anonymous Symbol] - system_stm32f10x.o(.text.SystemCoreClockUpdate) refers to system_stm32f10x.o(.data.SystemCoreClock) for SystemCoreClock - system_stm32f10x.o(.text.SystemCoreClockUpdate) refers to system_stm32f10x.o(.rodata.AHBPrescTable) for AHBPrescTable - system_stm32f10x.o(.ARM.exidx.text.SystemCoreClockUpdate) refers to system_stm32f10x.o(.text.SystemCoreClockUpdate) for [Anonymous Symbol] - system_stm32f10x.o(.ARM.exidx.text.SetSysClockTo72) refers to system_stm32f10x.o(.text.SetSysClockTo72) for [Anonymous Symbol] - __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh - __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to principal.o(.text.main) for main - __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D - __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap - __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 - sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace - sys_stackheap_outer.o(.text) refers to startup_stm32f10x_md.o(.text) for __user_initial_stackheap - exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_alloca_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_argv_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_atexit_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_clock_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000034) for __rt_lib_init_cpp_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_exceptions_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000002) for __rt_lib_init_fp_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_fp_trap_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_getenv_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_heap_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_collate_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_ctype_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_monetary_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_numeric_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_lc_time_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000006) for __rt_lib_init_preinit_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000010) for __rt_lib_init_rand_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_relocate_pie_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000035) for __rt_lib_init_return - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_signal_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000027) for __rt_lib_init_stdio_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_user_alloc_1 - libspace.o(.text) refers to libspace.o(.bss) for __libspace_start - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 - rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 - libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$0000001A) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000028) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer - libinit2.o(.ARM.Collect$$libinit$$00000029) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer - rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown - rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 - argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv - sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_exit_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_exit_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard - _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM - _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1 - sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_command_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_command_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner - defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit - defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise - rt_raise.o(.text) refers to __raise.o(.text) for __raise - rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit - defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit - defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler - defsig_general.o(.text) refers to sys_wrch.o(.text) for _ttywrch - sys_wrch.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_wrch.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_wrch_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_wrch_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner - defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display - - -============================================================================== - -Removing Unused input sections from the image. - - Removing principal.o(.text), (0 bytes). - Removing principal.o(.ARM.exidx.text.main), (8 bytes). - Removing principal.o(.ARM.use_no_argv), (4 bytes). - Removing accelerometre.o(.text), (0 bytes). - Removing accelerometre.o(.ARM.exidx.text.initAccelo), (8 bytes). - Removing accelerometre.o(.ARM.exidx.text.RecupAccelo), (8 bytes). - Removing accelerometre.o(.ARM.exidx.text.initLacheur), (8 bytes). - Removing accelerometre.o(.text.LacheVoile), (64 bytes). - Removing accelerometre.o(.ARM.exidx.text.LacheVoile), (8 bytes). - Removing girouette.o(.text), (0 bytes). - Removing girouette.o(.ARM.exidx.text.configEncoder), (8 bytes). - Removing girouette.o(.ARM.exidx.text.angleVent), (8 bytes). - Removing girouette.o(.ARM.exidx.text.vent2voile), (8 bytes). - Removing girouette.o(.ARM.exidx.text.LocaliserZero), (8 bytes). - Removing myuart.o(.text), (0 bytes). - Removing myuart.o(.text.My_USART_Config), (108 bytes). - Removing myuart.o(.ARM.exidx.text.My_USART_Config), (8 bytes). - Removing myuart.o(.text.__NVIC_EnableIRQ), (48 bytes). - Removing myuart.o(.ARM.exidx.text.__NVIC_EnableIRQ), (8 bytes). - Removing myuart.o(.text.__NVIC_SetPriority), (66 bytes). - Removing myuart.o(.ARM.exidx.text.__NVIC_SetPriority), (8 bytes). - Removing myuart.o(.text.USART_Send_Char), (36 bytes). - Removing myuart.o(.ARM.exidx.text.USART_Send_Char), (8 bytes). - Removing myuart.o(.text.USART_Send_String), (40 bytes). - Removing myuart.o(.ARM.exidx.text.USART_Send_String), (8 bytes). - Removing myuart.o(.text.USART_IT_Receive_Enable), (18 bytes). - Removing myuart.o(.ARM.exidx.text.USART_IT_Receive_Enable), (8 bytes). - Removing myuart.o(.text.Init_IT_Receive), (20 bytes). - Removing myuart.o(.ARM.exidx.text.Init_IT_Receive), (8 bytes). - Removing myuart.o(.ARM.exidx.text.USART1_IRQHandler), (8 bytes). - Removing servo.o(.text), (0 bytes). - Removing servo.o(.ARM.exidx.text.Servo_Moteur), (8 bytes). - Removing servo.o(.ARM.exidx.text.initServo), (8 bytes). - Removing drivergpio.o(.text), (0 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Init), (8 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Read), (8 bytes). - Removing drivergpio.o(.text.MyGPIO_Set), (24 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Set), (8 bytes). - Removing drivergpio.o(.text.MyGPIO_Reset), (28 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Reset), (8 bytes). - Removing drivergpio.o(.text.MyGPIO_Toggle), (30 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Toggle), (8 bytes). - Removing horloge.o(.text), (0 bytes). - Removing horloge.o(.ARM.exidx.text.Timer_Init), (8 bytes). - Removing horloge.o(.ARM.exidx.text.TIM2_IRQHandler), (8 bytes). - Removing horloge.o(.text.MyTimer_ActiveIT), (84 bytes). - Removing horloge.o(.ARM.exidx.text.MyTimer_ActiveIT), (8 bytes). - Removing horloge.o(.text.__NVIC_EnableIRQ), (48 bytes). - Removing horloge.o(.ARM.exidx.text.__NVIC_EnableIRQ), (8 bytes). - Removing horloge.o(.text.__NVIC_SetPriority), (66 bytes). - Removing horloge.o(.ARM.exidx.text.__NVIC_SetPriority), (8 bytes). - Removing mygpio.o(.text), (0 bytes). - Removing mygpio.o(.text.initGPIO_Interne), (66 bytes). - Removing mygpio.o(.ARM.exidx.text.initGPIO_Interne), (8 bytes). - Removing mygpio.o(.text.boutonAppuye_Interne), (16 bytes). - Removing mygpio.o(.ARM.exidx.text.boutonAppuye_Interne), (8 bytes). - Removing mygpio.o(.text.allumerDEL_Interne), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.allumerDEL_Interne), (8 bytes). - Removing mygpio.o(.text.eteindreDEL_Interne), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.eteindreDEL_Interne), (8 bytes). - Removing mygpio.o(.text.commuterDEL_Interne), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.commuterDEL_Interne), (8 bytes). - Removing mygpio.o(.text.initGPIO_Externe), (58 bytes). - Removing mygpio.o(.ARM.exidx.text.initGPIO_Externe), (8 bytes). - Removing mygpio.o(.text.boutonAppuye_Externe), (16 bytes). - Removing mygpio.o(.ARM.exidx.text.boutonAppuye_Externe), (8 bytes). - Removing mygpio.o(.text.allumerDEL_Externe), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.allumerDEL_Externe), (8 bytes). - Removing mygpio.o(.text.eteindreDEL_Externe), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.eteindreDEL_Externe), (8 bytes). - Removing mygpio.o(.text.commuterDEL_Externe), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.commuterDEL_Externe), (8 bytes). - Removing mytimer.o(.text), (0 bytes). - Removing mytimer.o(.text.Test), (32 bytes). - Removing mytimer.o(.ARM.exidx.text.Test), (8 bytes). - Removing mytimer.o(.text.ConfigureTimers), (38 bytes). - Removing mytimer.o(.ARM.exidx.text.ConfigureTimers), (8 bytes). - Removing mytimer.o(.text.ConfigureIT), (26 bytes). - Removing mytimer.o(.ARM.exidx.text.ConfigureIT), (8 bytes). - Removing mytimer.o(.text.ConfigurePWM), (18 bytes). - Removing mytimer.o(.ARM.exidx.text.ConfigurePWM), (8 bytes). - Removing mytimer.o(.bss.g_tick_count), (4 bytes). - Removing pwm.o(.text), (0 bytes). - Removing pwm.o(.ARM.exidx.text.MyTimer_PWM), (8 bytes). - Removing pwm.o(.ARM.exidx.text.Set_DutyCycle_PWM), (8 bytes). - Removing timer.o(.text), (0 bytes). - Removing timer.o(.text.MyTimer_Base_Init), (42 bytes). - Removing timer.o(.ARM.exidx.text.MyTimer_Base_Init), (8 bytes). - Removing timer.o(.ARM.exidx.text.EnableTimer), (8 bytes). - Removing i2c.o(.text), (0 bytes). - Removing i2c.o(.text.initI2C), (42 bytes). - Removing i2c.o(.ARM.exidx.text.initI2C), (8 bytes). - Removing system_stm32f10x.o(.text), (0 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SystemInit), (8 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SetSysClock), (8 bytes). - Removing system_stm32f10x.o(.text.SystemCoreClockUpdate), (290 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SystemCoreClockUpdate), (8 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SetSysClockTo72), (8 bytes). - Removing system_stm32f10x.o(.data.SystemCoreClock), (4 bytes). - Removing system_stm32f10x.o(.rodata.AHBPrescTable), (16 bytes). - -100 unused section(s) (total 1876 bytes) removed from the image. - -============================================================================== - -Image Symbol Table - - Local Symbols - - Symbol Name Value Ov Type Size Object(Section) - - ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE - ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE - ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE - ../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE - ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE - ../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE - ../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE - ../clib/angel/scatter.s 0x00000000 Number 0 __scatter.o ABSOLUTE - ../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE - ../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_exit.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_exit_hlt.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command_hlt.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_wrch.o ABSOLUTE - ../clib/angel/sysapp.c 0x00000000 Number 0 sys_wrch_hlt.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 _get_argv_nomalloc.o ABSOLUTE - ../clib/armsys.c 0x00000000 Number 0 no_argv.o ABSOLUTE - ../clib/heapalloc.c 0x00000000 Number 0 hrguard.o ABSOLUTE - ../clib/heapaux.c 0x00000000 Number 0 heapauxi.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libinit.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libinit2.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libshutdown.o ABSOLUTE - ../clib/libinit.s 0x00000000 Number 0 libshutdown2.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_outer.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_formal.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_exit.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 __raise.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_general.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_abrt_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_fpe_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_rtred_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_stak_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_pvfn_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_cppl_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_segv_inner.o ABSOLUTE - ../clib/signal.c 0x00000000 Number 0 defsig_other.o ABSOLUTE - ../clib/signal.s 0x00000000 Number 0 defsig.o ABSOLUTE - ../clib/stdlib.c 0x00000000 Number 0 exit.o ABSOLUTE - ../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE - ../fplib/fpinit_empty.s 0x00000000 Number 0 fpinit_empty.o ABSOLUTE - Accelerometre.c 0x00000000 Number 0 accelerometre.o ABSOLUTE - DriverGPIO.c 0x00000000 Number 0 drivergpio.o ABSOLUTE - Girouette.c 0x00000000 Number 0 girouette.o ABSOLUTE - Horloge.c 0x00000000 Number 0 horloge.o ABSOLUTE - I2C.c 0x00000000 Number 0 i2c.o ABSOLUTE - MYGPIO.c 0x00000000 Number 0 mygpio.o ABSOLUTE - MyTimer.c 0x00000000 Number 0 mytimer.o ABSOLUTE - MyUart.c 0x00000000 Number 0 myuart.o ABSOLUTE - PWM.c 0x00000000 Number 0 pwm.o ABSOLUTE - RTE/Device/STM32F103RB/startup_stm32f10x_md.s 0x00000000 Number 0 startup_stm32f10x_md.o ABSOLUTE - Servo.c 0x00000000 Number 0 servo.o ABSOLUTE - Timer.c 0x00000000 Number 0 timer.o ABSOLUTE - dc.s 0x00000000 Number 0 dc.o ABSOLUTE - principal.c 0x00000000 Number 0 principal.o ABSOLUTE - system_stm32f10x.c 0x00000000 Number 0 system_stm32f10x.o ABSOLUTE - RESET 0x08000000 Section 236 startup_stm32f10x_md.o(RESET) - !!!main 0x080000ec Section 8 __main.o(!!!main) - !!!scatter 0x080000f4 Section 92 __scatter.o(!!!scatter) - !!handler_null 0x08000150 Section 2 __scatter.o(!!handler_null) - !!handler_zi 0x08000154 Section 28 __scatter_zi.o(!!handler_zi) - .ARM.Collect$$libinit$$00000000 0x08000170 Section 2 libinit.o(.ARM.Collect$$libinit$$00000000) - .ARM.Collect$$libinit$$00000002 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000002) - .ARM.Collect$$libinit$$00000004 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000004) - .ARM.Collect$$libinit$$00000006 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000006) - .ARM.Collect$$libinit$$0000000C 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) - .ARM.Collect$$libinit$$0000000E 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) - .ARM.Collect$$libinit$$00000010 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000010) - .ARM.Collect$$libinit$$00000013 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000013) - .ARM.Collect$$libinit$$00000015 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000015) - .ARM.Collect$$libinit$$00000017 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000017) - .ARM.Collect$$libinit$$00000019 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000019) - .ARM.Collect$$libinit$$0000001B 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) - .ARM.Collect$$libinit$$0000001D 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) - .ARM.Collect$$libinit$$0000001F 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) - .ARM.Collect$$libinit$$00000021 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000021) - .ARM.Collect$$libinit$$00000023 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000023) - .ARM.Collect$$libinit$$00000025 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000025) - .ARM.Collect$$libinit$$00000027 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000027) - .ARM.Collect$$libinit$$0000002E 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) - .ARM.Collect$$libinit$$00000030 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000030) - .ARM.Collect$$libinit$$00000032 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000032) - .ARM.Collect$$libinit$$00000034 0x08000172 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000034) - .ARM.Collect$$libinit$$00000035 0x08000172 Section 2 libinit2.o(.ARM.Collect$$libinit$$00000035) - .ARM.Collect$$libshutdown$$00000000 0x08000174 Section 2 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) - .ARM.Collect$$libshutdown$$00000002 0x08000176 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) - .ARM.Collect$$libshutdown$$00000004 0x08000176 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) - .ARM.Collect$$libshutdown$$00000007 0x08000176 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) - .ARM.Collect$$libshutdown$$0000000A 0x08000176 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) - .ARM.Collect$$libshutdown$$0000000C 0x08000176 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) - .ARM.Collect$$libshutdown$$0000000F 0x08000176 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) - .ARM.Collect$$libshutdown$$00000010 0x08000176 Section 2 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) - .ARM.Collect$$rtentry$$00000000 0x08000178 Section 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) - .ARM.Collect$$rtentry$$00000002 0x08000178 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) - .ARM.Collect$$rtentry$$00000004 0x08000178 Section 6 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) - .ARM.Collect$$rtentry$$00000009 0x0800017e Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) - .ARM.Collect$$rtentry$$0000000A 0x0800017e Section 4 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) - .ARM.Collect$$rtentry$$0000000C 0x08000182 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) - .ARM.Collect$$rtentry$$0000000D 0x08000182 Section 8 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) - .ARM.Collect$$rtexit$$00000000 0x0800018a Section 2 rtexit.o(.ARM.Collect$$rtexit$$00000000) - .ARM.Collect$$rtexit$$00000002 0x0800018c Section 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) - .ARM.Collect$$rtexit$$00000003 0x0800018c Section 4 rtexit2.o(.ARM.Collect$$rtexit$$00000003) - .ARM.Collect$$rtexit$$00000004 0x08000190 Section 6 rtexit2.o(.ARM.Collect$$rtexit$$00000004) - .text 0x08000198 Section 64 startup_stm32f10x_md.o(.text) - .text 0x080001d8 Section 0 heapauxi.o(.text) - .text 0x080001de Section 74 sys_stackheap_outer.o(.text) - .text 0x08000228 Section 0 exit.o(.text) - .text 0x0800023c Section 8 libspace.o(.text) - .text 0x08000244 Section 0 sys_exit.o(.text) - .text 0x08000250 Section 2 use_no_semi.o(.text) - .text 0x08000252 Section 0 indicate_semi.o(.text) - [Anonymous Symbol] 0x08000254 Section 0 timer.o(.text.EnableTimer) - [Anonymous Symbol] 0x080002e8 Section 0 girouette.o(.text.LocaliserZero) - [Anonymous Symbol] 0x08000324 Section 0 drivergpio.o(.text.MyGPIO_Init) - [Anonymous Symbol] 0x080004ec Section 0 drivergpio.o(.text.MyGPIO_Read) - [Anonymous Symbol] 0x08000508 Section 0 pwm.o(.text.MyTimer_PWM) - [Anonymous Symbol] 0x080008fc Section 0 accelerometre.o(.text.RecupAccelo) - [Anonymous Symbol] 0x08000934 Section 0 servo.o(.text.Servo_Moteur) - SetSysClock 0x0800096d Thumb Code 8 system_stm32f10x.o(.text.SetSysClock) - [Anonymous Symbol] 0x0800096c Section 0 system_stm32f10x.o(.text.SetSysClock) - SetSysClockTo72 0x08000975 Thumb Code 290 system_stm32f10x.o(.text.SetSysClockTo72) - [Anonymous Symbol] 0x08000974 Section 0 system_stm32f10x.o(.text.SetSysClockTo72) - [Anonymous Symbol] 0x08000a98 Section 0 pwm.o(.text.Set_DutyCycle_PWM) - [Anonymous Symbol] 0x08000b00 Section 0 system_stm32f10x.o(.text.SystemInit) - [Anonymous Symbol] 0x08000b68 Section 0 horloge.o(.text.TIM2_IRQHandler) - [Anonymous Symbol] 0x08000ba8 Section 0 horloge.o(.text.Timer_Init) - [Anonymous Symbol] 0x08000c70 Section 0 myuart.o(.text.USART1_IRQHandler) - [Anonymous Symbol] 0x08000ca8 Section 0 girouette.o(.text.angleVent) - [Anonymous Symbol] 0x08000ce0 Section 0 girouette.o(.text.configEncoder) - [Anonymous Symbol] 0x08000d7c Section 0 accelerometre.o(.text.initAccelo) - [Anonymous Symbol] 0x08000db0 Section 0 accelerometre.o(.text.initLacheur) - [Anonymous Symbol] 0x08000de0 Section 0 servo.o(.text.initServo) - [Anonymous Symbol] 0x08000e3c Section 0 principal.o(.text.main) - [Anonymous Symbol] 0x08000f58 Section 0 girouette.o(.text.vent2voile) - .bss 0x20000000 Section 96 libspace.o(.bss) - RecupAccelo.Messie 0x20000060 Data 6 accelerometre.o(.bss.RecupAccelo.Messie) - [Anonymous Symbol] 0x20000060 Section 0 accelerometre.o(.bss.RecupAccelo.Messie) - TIM2_Appel 0x20000068 Data 4 horloge.o(.bss.TIM2_Appel) - [Anonymous Symbol] 0x20000068 Section 0 horloge.o(.bss.TIM2_Appel) - Heap_Mem 0x20000098 Data 512 startup_stm32f10x_md.o(HEAP) - HEAP 0x20000098 Section 512 startup_stm32f10x_md.o(HEAP) - Stack_Mem 0x20000298 Data 1024 startup_stm32f10x_md.o(STACK) - STACK 0x20000298 Section 1024 startup_stm32f10x_md.o(STACK) - __initial_sp 0x20000698 Data 0 startup_stm32f10x_md.o(STACK) - - Global Symbols - - Symbol Name Value Ov Type Size Object(Section) - - BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$~IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$ROPI$EBA8$UX$STANDARDLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE - __fp_init_empty 0x00000000 Number 0 fpinit_empty.o ABSOLUTE - __ARM_exceptions_init - Undefined Weak Reference - __alloca_initialize - Undefined Weak Reference - __arm_preinit_ - Undefined Weak Reference - __arm_relocate_pie_ - Undefined Weak Reference - __cpp_initialize__aeabi_ - Undefined Weak Reference - __cxa_finalize - Undefined Weak Reference - __rt_locale - Undefined Weak Reference - __sigvec_lookup - Undefined Weak Reference - _atexit_init - Undefined Weak Reference - _call_atexit_fns - Undefined Weak Reference - _clock_init - Undefined Weak Reference - _fp_trap_init - Undefined Weak Reference - _fp_trap_shutdown - Undefined Weak Reference - _get_lc_collate - Undefined Weak Reference - _get_lc_ctype - Undefined Weak Reference - _get_lc_monetary - Undefined Weak Reference - _get_lc_numeric - Undefined Weak Reference - _get_lc_time - Undefined Weak Reference - _getenv_init - Undefined Weak Reference - _handle_redirection - Undefined Weak Reference - _init_alloc - Undefined Weak Reference - _init_user_alloc - Undefined Weak Reference - _initio - Undefined Weak Reference - _rand_init - Undefined Weak Reference - _signal_finish - Undefined Weak Reference - _signal_init - Undefined Weak Reference - _terminate_alloc - Undefined Weak Reference - _terminate_user_alloc - Undefined Weak Reference - _terminateio - Undefined Weak Reference - __Vectors_Size 0x000000ec Number 0 startup_stm32f10x_md.o ABSOLUTE - __Vectors 0x08000000 Data 4 startup_stm32f10x_md.o(RESET) - __Vectors_End 0x080000ec Data 0 startup_stm32f10x_md.o(RESET) - __main 0x080000ed Thumb Code 8 __main.o(!!!main) - __scatterload 0x080000f5 Thumb Code 0 __scatter.o(!!!scatter) - __scatterload_rt2 0x080000f5 Thumb Code 84 __scatter.o(!!!scatter) - __scatterload_rt2_thumb_only 0x080000f5 Thumb Code 0 __scatter.o(!!!scatter) - __scatterload_loop 0x080000ff Thumb Code 0 __scatter.o(!!!scatter) - __scatterload_null 0x08000151 Thumb Code 2 __scatter.o(!!handler_null) - __scatterload_zeroinit 0x08000155 Thumb Code 28 __scatter_zi.o(!!handler_zi) - __rt_lib_init 0x08000171 Thumb Code 0 libinit.o(.ARM.Collect$$libinit$$00000000) - __rt_lib_init_alloca_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000030) - __rt_lib_init_argv_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) - __rt_lib_init_atexit_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) - __rt_lib_init_clock_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000023) - __rt_lib_init_cpp_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000034) - __rt_lib_init_exceptions_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000032) - __rt_lib_init_fp_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000002) - __rt_lib_init_fp_trap_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000021) - __rt_lib_init_getenv_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000025) - __rt_lib_init_heap_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) - __rt_lib_init_lc_collate_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000013) - __rt_lib_init_lc_ctype_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000015) - __rt_lib_init_lc_monetary_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000017) - __rt_lib_init_lc_numeric_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000019) - __rt_lib_init_lc_time_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) - __rt_lib_init_preinit_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000006) - __rt_lib_init_rand_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000010) - __rt_lib_init_relocate_pie_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000004) - __rt_lib_init_return 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000035) - __rt_lib_init_signal_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) - __rt_lib_init_stdio_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000027) - __rt_lib_init_user_alloc_1 0x08000173 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) - __rt_lib_shutdown 0x08000175 Thumb Code 0 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) - __rt_lib_shutdown_cpp_1 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) - __rt_lib_shutdown_fp_trap_1 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) - __rt_lib_shutdown_heap_1 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) - __rt_lib_shutdown_return 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) - __rt_lib_shutdown_signal_1 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) - __rt_lib_shutdown_stdio_1 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) - __rt_lib_shutdown_user_alloc_1 0x08000177 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) - __rt_entry 0x08000179 Thumb Code 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) - __rt_entry_presh_1 0x08000179 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) - __rt_entry_sh 0x08000179 Thumb Code 0 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) - __rt_entry_li 0x0800017f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) - __rt_entry_postsh_1 0x0800017f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) - __rt_entry_main 0x08000183 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) - __rt_entry_postli_1 0x08000183 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) - __rt_exit 0x0800018b Thumb Code 0 rtexit.o(.ARM.Collect$$rtexit$$00000000) - __rt_exit_ls 0x0800018d Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000003) - __rt_exit_prels_1 0x0800018d Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) - __rt_exit_exit 0x08000191 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000004) - Reset_Handler 0x08000199 Thumb Code 8 startup_stm32f10x_md.o(.text) - NMI_Handler 0x080001a1 Thumb Code 2 startup_stm32f10x_md.o(.text) - HardFault_Handler 0x080001a3 Thumb Code 2 startup_stm32f10x_md.o(.text) - MemManage_Handler 0x080001a5 Thumb Code 2 startup_stm32f10x_md.o(.text) - BusFault_Handler 0x080001a7 Thumb Code 2 startup_stm32f10x_md.o(.text) - UsageFault_Handler 0x080001a9 Thumb Code 2 startup_stm32f10x_md.o(.text) - SVC_Handler 0x080001ab Thumb Code 2 startup_stm32f10x_md.o(.text) - DebugMon_Handler 0x080001ad Thumb Code 2 startup_stm32f10x_md.o(.text) - PendSV_Handler 0x080001af Thumb Code 2 startup_stm32f10x_md.o(.text) - SysTick_Handler 0x080001b1 Thumb Code 2 startup_stm32f10x_md.o(.text) - ADC1_2_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - CAN1_RX1_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - CAN1_SCE_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel1_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel2_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel3_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel4_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel5_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel6_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - DMA1_Channel7_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI0_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI15_10_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI1_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI2_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI3_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI4_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - EXTI9_5_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - FLASH_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C1_ER_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C1_EV_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C2_ER_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - I2C2_EV_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - PVD_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - RCC_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - RTCAlarm_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - RTC_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - SPI1_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - SPI2_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TAMPER_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_BRK_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_CC_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_TRG_COM_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM1_UP_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM3_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - TIM4_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - USART2_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - USART3_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - USBWakeUp_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - USB_HP_CAN1_TX_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - USB_LP_CAN1_RX0_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - WWDG_IRQHandler 0x080001b3 Thumb Code 0 startup_stm32f10x_md.o(.text) - __user_initial_stackheap 0x080001b5 Thumb Code 0 startup_stm32f10x_md.o(.text) - __use_two_region_memory 0x080001d9 Thumb Code 2 heapauxi.o(.text) - __rt_heap_escrow$2region 0x080001db Thumb Code 2 heapauxi.o(.text) - __rt_heap_expand$2region 0x080001dd Thumb Code 2 heapauxi.o(.text) - __user_setup_stackheap 0x080001df Thumb Code 74 sys_stackheap_outer.o(.text) - exit 0x08000229 Thumb Code 18 exit.o(.text) - __user_libspace 0x0800023d Thumb Code 8 libspace.o(.text) - __user_perproc_libspace 0x0800023d Thumb Code 0 libspace.o(.text) - __user_perthread_libspace 0x0800023d Thumb Code 0 libspace.o(.text) - _sys_exit 0x08000245 Thumb Code 8 sys_exit.o(.text) - __I$use$semihosting 0x08000251 Thumb Code 0 use_no_semi.o(.text) - __use_no_semihosting_swi 0x08000251 Thumb Code 2 use_no_semi.o(.text) - __semihosting_library_function 0x08000253 Thumb Code 0 indicate_semi.o(.text) - EnableTimer 0x08000255 Thumb Code 146 timer.o(.text.EnableTimer) - LocaliserZero 0x080002e9 Thumb Code 58 girouette.o(.text.LocaliserZero) - MyGPIO_Init 0x08000325 Thumb Code 454 drivergpio.o(.text.MyGPIO_Init) - MyGPIO_Read 0x080004ed Thumb Code 26 drivergpio.o(.text.MyGPIO_Read) - MyTimer_PWM 0x08000509 Thumb Code 1010 pwm.o(.text.MyTimer_PWM) - RecupAccelo 0x080008fd Thumb Code 56 accelerometre.o(.text.RecupAccelo) - Servo_Moteur 0x08000935 Thumb Code 56 servo.o(.text.Servo_Moteur) - Set_DutyCycle_PWM 0x08000a99 Thumb Code 102 pwm.o(.text.Set_DutyCycle_PWM) - SystemInit 0x08000b01 Thumb Code 102 system_stm32f10x.o(.text.SystemInit) - TIM2_IRQHandler 0x08000b69 Thumb Code 62 horloge.o(.text.TIM2_IRQHandler) - Timer_Init 0x08000ba9 Thumb Code 198 horloge.o(.text.Timer_Init) - USART1_IRQHandler 0x08000c71 Thumb Code 54 myuart.o(.text.USART1_IRQHandler) - angleVent 0x08000ca9 Thumb Code 54 girouette.o(.text.angleVent) - configEncoder 0x08000ce1 Thumb Code 154 girouette.o(.text.configEncoder) - initAccelo 0x08000d7d Thumb Code 50 accelerometre.o(.text.initAccelo) - initLacheur 0x08000db1 Thumb Code 46 accelerometre.o(.text.initLacheur) - initServo 0x08000de1 Thumb Code 92 servo.o(.text.initServo) - main 0x08000e3d Thumb Code 284 principal.o(.text.main) - vent2voile 0x08000f59 Thumb Code 54 girouette.o(.text.vent2voile) - Region$$Table$$Base 0x08000f90 Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x08000fa0 Number 0 anon$$obj.o(Region$$Table) - __libspace_start 0x20000000 Data 96 libspace.o(.bss) - __temporary_stack_top$libspace 0x20000060 Data 0 libspace.o(.bss) - angleVentVar 0x2000006c Data 4 principal.o(.bss.angleVentVar) - angleVoileVar 0x20000070 Data 4 principal.o(.bss.angleVoileVar) - moy 0x20000074 Data 4 principal.o(.bss.moy) - moyenne 0x20000078 Data 20 principal.o(.bss.moyenne) - pFnc_Receive 0x2000008c Data 4 myuart.o(.bss.pFnc_Receive) - sum 0x20000090 Data 4 principal.o(.bss.sum) - - - -============================================================================== - -Memory Map of the image - - Image Entry point : 0x08000199 - - Load Region LR_1 (Base: 0x08000000, Size: 0x00000fa0, Max: 0xffffffff, ABSOLUTE) - - Execution Region ER_RO (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00000fa0, Max: 0xffffffff, ABSOLUTE) - - Exec Addr Load Addr Size Type Attr Idx E Section Name Object - - 0x08000000 0x08000000 0x000000ec Data RO 191 RESET startup_stm32f10x_md.o - 0x080000ec 0x080000ec 0x00000008 Code RO 219 * !!!main c_w.l(__main.o) - 0x080000f4 0x080000f4 0x0000005c Code RO 384 !!!scatter c_w.l(__scatter.o) - 0x08000150 0x08000150 0x00000002 Code RO 385 !!handler_null c_w.l(__scatter.o) - 0x08000152 0x08000152 0x00000002 PAD - 0x08000154 0x08000154 0x0000001c Code RO 388 !!handler_zi c_w.l(__scatter_zi.o) - 0x08000170 0x08000170 0x00000002 Code RO 246 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o) - 0x08000172 0x08000172 0x00000000 Code RO 253 .ARM.Collect$$libinit$$00000002 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 255 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 257 .ARM.Collect$$libinit$$00000006 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 260 .ARM.Collect$$libinit$$0000000C c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 262 .ARM.Collect$$libinit$$0000000E c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 264 .ARM.Collect$$libinit$$00000010 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 267 .ARM.Collect$$libinit$$00000013 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 269 .ARM.Collect$$libinit$$00000015 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 271 .ARM.Collect$$libinit$$00000017 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 273 .ARM.Collect$$libinit$$00000019 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 275 .ARM.Collect$$libinit$$0000001B c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 277 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 279 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 281 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 283 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 285 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 287 .ARM.Collect$$libinit$$00000027 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 291 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 293 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 295 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000000 Code RO 297 .ARM.Collect$$libinit$$00000034 c_w.l(libinit2.o) - 0x08000172 0x08000172 0x00000002 Code RO 298 .ARM.Collect$$libinit$$00000035 c_w.l(libinit2.o) - 0x08000174 0x08000174 0x00000002 Code RO 320 .ARM.Collect$$libshutdown$$00000000 c_w.l(libshutdown.o) - 0x08000176 0x08000176 0x00000000 Code RO 335 .ARM.Collect$$libshutdown$$00000002 c_w.l(libshutdown2.o) - 0x08000176 0x08000176 0x00000000 Code RO 337 .ARM.Collect$$libshutdown$$00000004 c_w.l(libshutdown2.o) - 0x08000176 0x08000176 0x00000000 Code RO 340 .ARM.Collect$$libshutdown$$00000007 c_w.l(libshutdown2.o) - 0x08000176 0x08000176 0x00000000 Code RO 343 .ARM.Collect$$libshutdown$$0000000A c_w.l(libshutdown2.o) - 0x08000176 0x08000176 0x00000000 Code RO 345 .ARM.Collect$$libshutdown$$0000000C c_w.l(libshutdown2.o) - 0x08000176 0x08000176 0x00000000 Code RO 348 .ARM.Collect$$libshutdown$$0000000F c_w.l(libshutdown2.o) - 0x08000176 0x08000176 0x00000002 Code RO 349 .ARM.Collect$$libshutdown$$00000010 c_w.l(libshutdown2.o) - 0x08000178 0x08000178 0x00000000 Code RO 221 .ARM.Collect$$rtentry$$00000000 c_w.l(__rtentry.o) - 0x08000178 0x08000178 0x00000000 Code RO 223 .ARM.Collect$$rtentry$$00000002 c_w.l(__rtentry2.o) - 0x08000178 0x08000178 0x00000006 Code RO 235 .ARM.Collect$$rtentry$$00000004 c_w.l(__rtentry4.o) - 0x0800017e 0x0800017e 0x00000000 Code RO 225 .ARM.Collect$$rtentry$$00000009 c_w.l(__rtentry2.o) - 0x0800017e 0x0800017e 0x00000004 Code RO 226 .ARM.Collect$$rtentry$$0000000A c_w.l(__rtentry2.o) - 0x08000182 0x08000182 0x00000000 Code RO 228 .ARM.Collect$$rtentry$$0000000C c_w.l(__rtentry2.o) - 0x08000182 0x08000182 0x00000008 Code RO 229 .ARM.Collect$$rtentry$$0000000D c_w.l(__rtentry2.o) - 0x0800018a 0x0800018a 0x00000002 Code RO 250 .ARM.Collect$$rtexit$$00000000 c_w.l(rtexit.o) - 0x0800018c 0x0800018c 0x00000000 Code RO 300 .ARM.Collect$$rtexit$$00000002 c_w.l(rtexit2.o) - 0x0800018c 0x0800018c 0x00000004 Code RO 301 .ARM.Collect$$rtexit$$00000003 c_w.l(rtexit2.o) - 0x08000190 0x08000190 0x00000006 Code RO 302 .ARM.Collect$$rtexit$$00000004 c_w.l(rtexit2.o) - 0x08000196 0x08000196 0x00000002 PAD - 0x08000198 0x08000198 0x00000040 Code RO 192 * .text startup_stm32f10x_md.o - 0x080001d8 0x080001d8 0x00000006 Code RO 217 .text c_w.l(heapauxi.o) - 0x080001de 0x080001de 0x0000004a Code RO 237 .text c_w.l(sys_stackheap_outer.o) - 0x08000228 0x08000228 0x00000012 Code RO 239 .text c_w.l(exit.o) - 0x0800023a 0x0800023a 0x00000002 PAD - 0x0800023c 0x0800023c 0x00000008 Code RO 247 .text c_w.l(libspace.o) - 0x08000244 0x08000244 0x0000000c Code RO 310 .text c_w.l(sys_exit.o) - 0x08000250 0x08000250 0x00000002 Code RO 325 .text c_w.l(use_no_semi.o) - 0x08000252 0x08000252 0x00000000 Code RO 327 .text c_w.l(indicate_semi.o) - 0x08000252 0x08000252 0x00000002 PAD - 0x08000254 0x08000254 0x00000092 Code RO 173 .text.EnableTimer timer.o - 0x080002e6 0x080002e6 0x00000002 PAD - 0x080002e8 0x080002e8 0x0000003a Code RO 38 .text.LocaliserZero girouette.o - 0x08000322 0x08000322 0x00000002 PAD - 0x08000324 0x08000324 0x000001c6 Code RO 82 .text.MyGPIO_Init drivergpio.o - 0x080004ea 0x080004ea 0x00000002 PAD - 0x080004ec 0x080004ec 0x0000001a Code RO 84 .text.MyGPIO_Read drivergpio.o - 0x08000506 0x08000506 0x00000002 PAD - 0x08000508 0x08000508 0x000003f2 Code RO 160 .text.MyTimer_PWM pwm.o - 0x080008fa 0x080008fa 0x00000002 PAD - 0x080008fc 0x080008fc 0x00000038 Code RO 18 .text.RecupAccelo accelerometre.o - 0x08000934 0x08000934 0x00000038 Code RO 71 .text.Servo_Moteur servo.o - 0x0800096c 0x0800096c 0x00000008 Code RO 201 .text.SetSysClock system_stm32f10x.o - 0x08000974 0x08000974 0x00000122 Code RO 205 .text.SetSysClockTo72 system_stm32f10x.o - 0x08000a96 0x08000a96 0x00000002 PAD - 0x08000a98 0x08000a98 0x00000066 Code RO 162 .text.Set_DutyCycle_PWM pwm.o - 0x08000afe 0x08000afe 0x00000002 PAD - 0x08000b00 0x08000b00 0x00000066 Code RO 199 .text.SystemInit system_stm32f10x.o - 0x08000b66 0x08000b66 0x00000002 PAD - 0x08000b68 0x08000b68 0x0000003e Code RO 101 .text.TIM2_IRQHandler horloge.o - 0x08000ba6 0x08000ba6 0x00000002 PAD - 0x08000ba8 0x08000ba8 0x000000c6 Code RO 99 .text.Timer_Init horloge.o - 0x08000c6e 0x08000c6e 0x00000002 PAD - 0x08000c70 0x08000c70 0x00000036 Code RO 61 .text.USART1_IRQHandler myuart.o - 0x08000ca6 0x08000ca6 0x00000002 PAD - 0x08000ca8 0x08000ca8 0x00000036 Code RO 34 .text.angleVent girouette.o - 0x08000cde 0x08000cde 0x00000002 PAD - 0x08000ce0 0x08000ce0 0x0000009a Code RO 32 .text.configEncoder girouette.o - 0x08000d7a 0x08000d7a 0x00000002 PAD - 0x08000d7c 0x08000d7c 0x00000032 Code RO 16 .text.initAccelo accelerometre.o - 0x08000dae 0x08000dae 0x00000002 PAD - 0x08000db0 0x08000db0 0x0000002e Code RO 20 .text.initLacheur accelerometre.o - 0x08000dde 0x08000dde 0x00000002 PAD - 0x08000de0 0x08000de0 0x0000005c Code RO 73 .text.initServo servo.o - 0x08000e3c 0x08000e3c 0x0000011c Code RO 2 .text.main principal.o - 0x08000f58 0x08000f58 0x00000036 Code RO 36 .text.vent2voile girouette.o - 0x08000f8e 0x08000f8e 0x00000002 PAD - 0x08000f90 0x08000f90 0x00000010 Data RO 383 Region$$Table anon$$obj.o - - - Execution Region ER_RW (Exec base: 0x20000000, Load base: 0x08000fa0, Size: 0x00000000, Max: 0xffffffff, ABSOLUTE) - - **** No section assigned to this execution region **** - - - Execution Region ER_ZI (Exec base: 0x20000000, Load base: 0x08000fa0, Size: 0x00000698, Max: 0xffffffff, ABSOLUTE) - - Exec Addr Load Addr Size Type Attr Idx E Section Name Object - - 0x20000000 - 0x00000060 Zero RW 248 .bss c_w.l(libspace.o) - 0x20000060 - 0x00000006 Zero RW 24 .bss.RecupAccelo.Messie accelerometre.o - 0x20000066 0x08000fa0 0x00000002 PAD - 0x20000068 - 0x00000004 Zero RW 109 .bss.TIM2_Appel horloge.o - 0x2000006c - 0x00000004 Zero RW 5 .bss.angleVentVar principal.o - 0x20000070 - 0x00000004 Zero RW 6 .bss.angleVoileVar principal.o - 0x20000074 - 0x00000004 Zero RW 8 .bss.moy principal.o - 0x20000078 - 0x00000014 Zero RW 4 .bss.moyenne principal.o - 0x2000008c - 0x00000004 Zero RW 63 .bss.pFnc_Receive myuart.o - 0x20000090 - 0x00000004 Zero RW 7 .bss.sum principal.o - 0x20000094 0x08000fa0 0x00000004 PAD - 0x20000098 - 0x00000200 Zero RW 190 HEAP startup_stm32f10x_md.o - 0x20000298 - 0x00000400 Zero RW 189 STACK startup_stm32f10x_md.o - - -============================================================================== - -Image component sizes - - - Code (inc. data) RO Data RW Data ZI Data Debug Object Name - - 152 0 0 0 6 2735 accelerometre.o - 480 0 0 0 0 2085 drivergpio.o - 320 0 0 0 0 2385 girouette.o - 260 0 0 0 4 4929 horloge.o - 54 0 0 0 4 4856 myuart.o - 284 0 0 0 36 2061 principal.o - 1112 12 0 0 0 2752 pwm.o - 148 0 0 0 0 2081 servo.o - 64 26 236 0 1536 852 startup_stm32f10x_md.o - 400 0 0 0 0 3008 system_stm32f10x.o - 146 0 0 0 0 2141 timer.o - - ---------------------------------------------------------------------- - 3452 38 252 0 1592 29885 Object Totals - 0 0 16 0 0 0 (incl. Generated) - 32 0 0 0 6 0 (incl. Padding) - - ---------------------------------------------------------------------- - - Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name - - 8 0 0 0 0 68 __main.o - 0 0 0 0 0 0 __rtentry.o - 12 0 0 0 0 0 __rtentry2.o - 6 0 0 0 0 0 __rtentry4.o - 94 8 0 0 0 0 __scatter.o - 28 0 0 0 0 0 __scatter_zi.o - 18 0 0 0 0 80 exit.o - 6 0 0 0 0 152 heapauxi.o - 0 0 0 0 0 0 indicate_semi.o - 2 0 0 0 0 0 libinit.o - 2 0 0 0 0 0 libinit2.o - 2 0 0 0 0 0 libshutdown.o - 2 0 0 0 0 0 libshutdown2.o - 8 4 0 0 96 68 libspace.o - 2 0 0 0 0 0 rtexit.o - 10 0 0 0 0 0 rtexit2.o - 12 4 0 0 0 68 sys_exit.o - 74 0 0 0 0 80 sys_stackheap_outer.o - 2 0 0 0 0 68 use_no_semi.o - - ---------------------------------------------------------------------- - 296 16 0 0 96 584 Library Totals - 8 0 0 0 0 0 (incl. Padding) - - ---------------------------------------------------------------------- - - Code (inc. data) RO Data RW Data ZI Data Debug Library Name - - 288 16 0 0 96 584 c_w.l - - ---------------------------------------------------------------------- - 296 16 0 0 96 584 Library Totals - - ---------------------------------------------------------------------- - -============================================================================== - - - Code (inc. data) RO Data RW Data ZI Data Debug - - 3748 54 252 0 1688 30181 Grand Totals - 3748 54 252 0 1688 30181 ELF Image Totals - 3748 54 252 0 0 0 ROM Totals - -============================================================================== - - Total RO Size (Code + RO Data) 4000 ( 3.91kB) - Total RW Size (RW Data + ZI Data) 1688 ( 1.65kB) - Total ROM Size (Code + RO Data + RW Data) 4000 ( 3.91kB) - -============================================================================== - diff --git a/Listings/ProjetVide.map b/Listings/ProjetVide.map deleted file mode 100644 index 3cb280e..0000000 --- a/Listings/ProjetVide.map +++ /dev/null @@ -1,329 +0,0 @@ -Component: Arm Compiler for Embedded 6.23 Tool: armlink [5f102400] - -============================================================================== - -Section Cross References - - principal.o(.text.pilotage) refers to plateau.o(.text.Update_Motor_PWM) for Update_Motor_PWM - principal.o(.ARM.exidx.text.pilotage) refers to principal.o(.text.pilotage) for [Anonymous Symbol] - principal.o(.text.main) refers to servo.o(.text.initServo) for initServo - principal.o(.text.main) refers to girouette.o(.text.configEncoder) for configEncoder - principal.o(.text.main) refers to plateau.o(.text.initPlato) for initPlato - principal.o(.text.main) refers to myuart.o(.text.My_USART_Config) for My_USART_Config - principal.o(.text.main) refers to myuart.o(.text.USART_IT_Receive_Enable) for USART_IT_Receive_Enable - principal.o(.text.main) refers to principal.o(.text.pilotage) for pilotage - principal.o(.text.main) refers to myuart.o(.text.Init_IT_Receive) for Init_IT_Receive - principal.o(.text.main) refers to principal.o(.rodata.str1.1) for .L.str - principal.o(.text.main) refers to myuart.o(.text.USART_Send_String) for USART_Send_String - principal.o(.text.main) refers to accelerometre.o(.text.initAccelo) for initAccelo - principal.o(.text.main) refers to accelerometre.o(.text.initLacheur) for initLacheur - principal.o(.text.main) refers to principal.o(.bss.moyenne) for moyenne - principal.o(.text.main) refers to girouette.o(.text.LocaliserZero) for LocaliserZero - principal.o(.text.main) refers to girouette.o(.text.angleVent) for angleVent - principal.o(.text.main) refers to principal.o(.bss.angleVentVar) for angleVentVar - principal.o(.text.main) refers to girouette.o(.text.vent2voile) for vent2voile - principal.o(.text.main) refers to principal.o(.bss.angleVoileVar) for angleVoileVar - principal.o(.text.main) refers to servo.o(.text.Servo_Moteur) for Servo_Moteur - principal.o(.text.main) refers to accelerometre.o(.text.RecupAccelo) for RecupAccelo - principal.o(.text.main) refers to principal.o(.bss.sum) for sum - principal.o(.text.main) refers to principal.o(.bss.moy) for moy - principal.o(.text.main) refers to accelerometre.o(.text.LacheVoile) for LacheVoile - principal.o(.ARM.exidx.text.main) refers to principal.o(.text.main) for [Anonymous Symbol] - accelerometre.o(.ARM.exidx.text.initAccelo) refers to accelerometre.o(.text.initAccelo) for [Anonymous Symbol] - accelerometre.o(.text.RecupAccelo) refers to accelerometre.o(.bss.RecupAccelo.Messie) for RecupAccelo.Messie - accelerometre.o(.ARM.exidx.text.RecupAccelo) refers to accelerometre.o(.text.RecupAccelo) for [Anonymous Symbol] - accelerometre.o(.text.initLacheur) refers to horloge.o(.text.Timer_Init) for Timer_Init - accelerometre.o(.ARM.exidx.text.initLacheur) refers to accelerometre.o(.text.initLacheur) for [Anonymous Symbol] - accelerometre.o(.text.LacheVoile) refers to servo.o(.text.Servo_Moteur) for Servo_Moteur - accelerometre.o(.ARM.exidx.text.LacheVoile) refers to accelerometre.o(.text.LacheVoile) for [Anonymous Symbol] - girouette.o(.text.configEncoder) refers to horloge.o(.text.Timer_Init) for Timer_Init - girouette.o(.text.configEncoder) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - girouette.o(.ARM.exidx.text.configEncoder) refers to girouette.o(.text.configEncoder) for [Anonymous Symbol] - girouette.o(.ARM.exidx.text.angleVent) refers to girouette.o(.text.angleVent) for [Anonymous Symbol] - girouette.o(.ARM.exidx.text.vent2voile) refers to girouette.o(.text.vent2voile) for [Anonymous Symbol] - girouette.o(.text.LocaliserZero) refers to drivergpio.o(.text.MyGPIO_Read) for MyGPIO_Read - girouette.o(.ARM.exidx.text.LocaliserZero) refers to girouette.o(.text.LocaliserZero) for [Anonymous Symbol] - myuart.o(.text.My_USART_Config) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - myuart.o(.text.My_USART_Config) refers to myuart.o(.text.__NVIC_EnableIRQ) for __NVIC_EnableIRQ - myuart.o(.text.My_USART_Config) refers to myuart.o(.text.__NVIC_SetPriority) for __NVIC_SetPriority - myuart.o(.ARM.exidx.text.My_USART_Config) refers to myuart.o(.text.My_USART_Config) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.__NVIC_EnableIRQ) refers to myuart.o(.text.__NVIC_EnableIRQ) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.__NVIC_SetPriority) refers to myuart.o(.text.__NVIC_SetPriority) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.USART_Send_Char) refers to myuart.o(.text.USART_Send_Char) for [Anonymous Symbol] - myuart.o(.text.USART_Send_String) refers to myuart.o(.text.USART_Send_Char) for USART_Send_Char - myuart.o(.ARM.exidx.text.USART_Send_String) refers to myuart.o(.text.USART_Send_String) for [Anonymous Symbol] - myuart.o(.ARM.exidx.text.USART_IT_Receive_Enable) refers to myuart.o(.text.USART_IT_Receive_Enable) for [Anonymous Symbol] - myuart.o(.text.Init_IT_Receive) refers to myuart.o(.bss.pFnc_Receive) for pFnc_Receive - myuart.o(.ARM.exidx.text.Init_IT_Receive) refers to myuart.o(.text.Init_IT_Receive) for [Anonymous Symbol] - myuart.o(.text.USART1_IRQHandler) refers to myuart.o(.bss.pFnc_Receive) for pFnc_Receive - myuart.o(.ARM.exidx.text.USART1_IRQHandler) refers to myuart.o(.text.USART1_IRQHandler) for [Anonymous Symbol] - servo.o(.text.Servo_Moteur) refers to pwm.o(.text.Set_DutyCycle_PWM) for Set_DutyCycle_PWM - servo.o(.ARM.exidx.text.Servo_Moteur) refers to servo.o(.text.Servo_Moteur) for [Anonymous Symbol] - servo.o(.text.initServo) refers to horloge.o(.text.Timer_Init) for Timer_Init - servo.o(.text.initServo) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - servo.o(.text.initServo) refers to pwm.o(.text.MyTimer_PWM) for MyTimer_PWM - servo.o(.ARM.exidx.text.initServo) refers to servo.o(.text.initServo) for [Anonymous Symbol] - plateau.o(.text.initPlato) refers to drivergpio.o(.text.MyGPIO_Init) for MyGPIO_Init - plateau.o(.text.initPlato) refers to horloge.o(.text.Timer_Init) for Timer_Init - plateau.o(.text.initPlato) refers to pwm.o(.text.MyTimer_PWM) for MyTimer_PWM - plateau.o(.ARM.exidx.text.initPlato) refers to plateau.o(.text.initPlato) for [Anonymous Symbol] - plateau.o(.text.Update_Motor_PWM) refers to drivergpio.o(.text.MYGPIO_PinOn) for MYGPIO_PinOn - plateau.o(.text.Update_Motor_PWM) refers to drivergpio.o(.text.MYGPIO_PinOff) for MYGPIO_PinOff - plateau.o(.text.Update_Motor_PWM) refers to pwm.o(.text.Set_DutyCycle_PWM) for Set_DutyCycle_PWM - plateau.o(.ARM.exidx.text.Update_Motor_PWM) refers to plateau.o(.text.Update_Motor_PWM) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Init) refers to drivergpio.o(.text.MyGPIO_Init) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Read) refers to drivergpio.o(.text.MyGPIO_Read) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Set) refers to drivergpio.o(.text.MyGPIO_Set) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Reset) refers to drivergpio.o(.text.MyGPIO_Reset) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MYGPIO_PinOn) refers to drivergpio.o(.text.MYGPIO_PinOn) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MYGPIO_PinOff) refers to drivergpio.o(.text.MYGPIO_PinOff) for [Anonymous Symbol] - drivergpio.o(.ARM.exidx.text.MyGPIO_Toggle) refers to drivergpio.o(.text.MyGPIO_Toggle) for [Anonymous Symbol] - horloge.o(.ARM.exidx.text.Timer_Init) refers to horloge.o(.text.Timer_Init) for [Anonymous Symbol] - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.bss.TIM2_Appel) for TIM2_Appel - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.text.__NVIC_EnableIRQ) for __NVIC_EnableIRQ - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.text.__NVIC_SetPriority) for __NVIC_SetPriority - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.bss.TIM3_Appel) for TIM3_Appel - horloge.o(.text.MyTimer_ActiveIT) refers to horloge.o(.bss.TIM4_Appel) for TIM4_Appel - horloge.o(.ARM.exidx.text.MyTimer_ActiveIT) refers to horloge.o(.text.MyTimer_ActiveIT) for [Anonymous Symbol] - horloge.o(.ARM.exidx.text.__NVIC_EnableIRQ) refers to horloge.o(.text.__NVIC_EnableIRQ) for [Anonymous Symbol] - horloge.o(.ARM.exidx.text.__NVIC_SetPriority) refers to horloge.o(.text.__NVIC_SetPriority) for [Anonymous Symbol] - horloge.o(.text.TIM2_IRQHandler) refers to horloge.o(.bss.TIM2_Appel) for TIM2_Appel - horloge.o(.ARM.exidx.text.TIM2_IRQHandler) refers to horloge.o(.text.TIM2_IRQHandler) for [Anonymous Symbol] - horloge.o(.text.TIM3_IRQHandler) refers to horloge.o(.bss.TIM3_Appel) for TIM3_Appel - horloge.o(.ARM.exidx.text.TIM3_IRQHandler) refers to horloge.o(.text.TIM3_IRQHandler) for [Anonymous Symbol] - horloge.o(.text.TIM4_IRQHandler) refers to horloge.o(.bss.TIM4_Appel) for TIM4_Appel - horloge.o(.ARM.exidx.text.TIM4_IRQHandler) refers to horloge.o(.text.TIM4_IRQHandler) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.initGPIO_Interne) refers to mygpio.o(.text.initGPIO_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.boutonAppuye_Interne) refers to mygpio.o(.text.boutonAppuye_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.allumerDEL_Interne) refers to mygpio.o(.text.allumerDEL_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.eteindreDEL_Interne) refers to mygpio.o(.text.eteindreDEL_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.commuterDEL_Interne) refers to mygpio.o(.text.commuterDEL_Interne) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.initGPIO_Externe) refers to mygpio.o(.text.initGPIO_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.boutonAppuye_Externe) refers to mygpio.o(.text.boutonAppuye_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.allumerDEL_Externe) refers to mygpio.o(.text.allumerDEL_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.eteindreDEL_Externe) refers to mygpio.o(.text.eteindreDEL_Externe) for [Anonymous Symbol] - mygpio.o(.ARM.exidx.text.commuterDEL_Externe) refers to mygpio.o(.text.commuterDEL_Externe) for [Anonymous Symbol] - pwm.o(.ARM.exidx.text.MyTimer_PWM) refers to pwm.o(.text.MyTimer_PWM) for [Anonymous Symbol] - pwm.o(.ARM.exidx.text.Set_DutyCycle_PWM) refers to pwm.o(.text.Set_DutyCycle_PWM) for [Anonymous Symbol] - i2c.o(.ARM.exidx.text.initI2C) refers to i2c.o(.text.initI2C) for [Anonymous Symbol] - startup_stm32f10x_md.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(STACK) for __initial_sp - startup_stm32f10x_md.o(RESET) refers to startup_stm32f10x_md.o(.text) for Reset_Handler - startup_stm32f10x_md.o(RESET) refers to horloge.o(.text.TIM2_IRQHandler) for TIM2_IRQHandler - startup_stm32f10x_md.o(RESET) refers to horloge.o(.text.TIM3_IRQHandler) for TIM3_IRQHandler - startup_stm32f10x_md.o(RESET) refers to horloge.o(.text.TIM4_IRQHandler) for TIM4_IRQHandler - startup_stm32f10x_md.o(RESET) refers to myuart.o(.text.USART1_IRQHandler) for USART1_IRQHandler - startup_stm32f10x_md.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory - startup_stm32f10x_md.o(.text) refers to system_stm32f10x.o(.text.SystemInit) for SystemInit - startup_stm32f10x_md.o(.text) refers to __main.o(!!!main) for __main - startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(HEAP) for Heap_Mem - startup_stm32f10x_md.o(.text) refers to startup_stm32f10x_md.o(STACK) for Stack_Mem - system_stm32f10x.o(.text.SystemInit) refers to system_stm32f10x.o(.text.SetSysClock) for SetSysClock - system_stm32f10x.o(.ARM.exidx.text.SystemInit) refers to system_stm32f10x.o(.text.SystemInit) for [Anonymous Symbol] - system_stm32f10x.o(.text.SetSysClock) refers to system_stm32f10x.o(.text.SetSysClockTo72) for SetSysClockTo72 - system_stm32f10x.o(.ARM.exidx.text.SetSysClock) refers to system_stm32f10x.o(.text.SetSysClock) for [Anonymous Symbol] - system_stm32f10x.o(.text.SystemCoreClockUpdate) refers to system_stm32f10x.o(.data.SystemCoreClock) for SystemCoreClock - system_stm32f10x.o(.text.SystemCoreClockUpdate) refers to system_stm32f10x.o(.rodata.AHBPrescTable) for AHBPrescTable - system_stm32f10x.o(.ARM.exidx.text.SystemCoreClockUpdate) refers to system_stm32f10x.o(.text.SystemCoreClockUpdate) for [Anonymous Symbol] - system_stm32f10x.o(.ARM.exidx.text.SetSysClockTo72) refers to system_stm32f10x.o(.text.SetSysClockTo72) for [Anonymous Symbol] - __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 - __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh - __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init - __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to principal.o(.text.main) for main - __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B - __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D - __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap - __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 - sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace - sys_stackheap_outer.o(.text) refers to startup_stm32f10x_md.o(.text) for __user_initial_stackheap - exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_alloca_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_argv_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_atexit_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_clock_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000034) for __rt_lib_init_cpp_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_exceptions_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000002) for __rt_lib_init_fp_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_fp_trap_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_getenv_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_heap_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_collate_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_ctype_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_monetary_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_numeric_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_lc_time_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000006) for __rt_lib_init_preinit_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000010) for __rt_lib_init_rand_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_relocate_pie_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000035) for __rt_lib_init_return - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_signal_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000027) for __rt_lib_init_stdio_1 - libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_user_alloc_1 - libspace.o(.text) refers to libspace.o(.bss) for __libspace_start - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls - rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls - rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 - rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 - libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$0000001A) refers to libinit2.o(.ARM.Collect$$libinit$$00000011) for .ARM.Collect$$libinit$$00000011 - libinit2.o(.ARM.Collect$$libinit$$00000028) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer - libinit2.o(.ARM.Collect$$libinit$$00000029) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer - rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown - rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 - rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 - argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv - sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_exit_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_exit_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard - _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM - _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1 - libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1 - sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_command_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_command_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner - defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit - defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise - rt_raise.o(.text) refers to __raise.o(.text) for __raise - rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit - defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit - defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler - defsig_general.o(.text) refers to sys_wrch.o(.text) for _ttywrch - sys_wrch.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_wrch.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - sys_wrch_hlt.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting - sys_wrch_hlt.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function - defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner - defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display - defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display - - -============================================================================== - -Removing Unused input sections from the image. - - Removing principal.o(.text), (0 bytes). - Removing principal.o(.ARM.exidx.text.pilotage), (8 bytes). - Removing principal.o(.ARM.exidx.text.main), (8 bytes). - Removing principal.o(.ARM.use_no_argv), (4 bytes). - Removing accelerometre.o(.text), (0 bytes). - Removing accelerometre.o(.ARM.exidx.text.initAccelo), (8 bytes). - Removing accelerometre.o(.ARM.exidx.text.RecupAccelo), (8 bytes). - Removing accelerometre.o(.ARM.exidx.text.initLacheur), (8 bytes). - Removing accelerometre.o(.ARM.exidx.text.LacheVoile), (8 bytes). - Removing girouette.o(.text), (0 bytes). - Removing girouette.o(.ARM.exidx.text.configEncoder), (8 bytes). - Removing girouette.o(.ARM.exidx.text.angleVent), (8 bytes). - Removing girouette.o(.ARM.exidx.text.vent2voile), (8 bytes). - Removing girouette.o(.ARM.exidx.text.LocaliserZero), (8 bytes). - Removing myuart.o(.text), (0 bytes). - Removing myuart.o(.ARM.exidx.text.My_USART_Config), (8 bytes). - Removing myuart.o(.ARM.exidx.text.__NVIC_EnableIRQ), (8 bytes). - Removing myuart.o(.ARM.exidx.text.__NVIC_SetPriority), (8 bytes). - Removing myuart.o(.ARM.exidx.text.USART_Send_Char), (8 bytes). - Removing myuart.o(.ARM.exidx.text.USART_Send_String), (8 bytes). - Removing myuart.o(.ARM.exidx.text.USART_IT_Receive_Enable), (8 bytes). - Removing myuart.o(.ARM.exidx.text.Init_IT_Receive), (8 bytes). - Removing myuart.o(.ARM.exidx.text.USART1_IRQHandler), (8 bytes). - Removing servo.o(.text), (0 bytes). - Removing servo.o(.ARM.exidx.text.Servo_Moteur), (8 bytes). - Removing servo.o(.ARM.exidx.text.initServo), (8 bytes). - Removing plateau.o(.text), (0 bytes). - Removing plateau.o(.ARM.exidx.text.initPlato), (8 bytes). - Removing plateau.o(.ARM.exidx.text.Update_Motor_PWM), (8 bytes). - Removing drivergpio.o(.text), (0 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Init), (8 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Read), (8 bytes). - Removing drivergpio.o(.text.MyGPIO_Set), (24 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Set), (8 bytes). - Removing drivergpio.o(.text.MyGPIO_Reset), (28 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Reset), (8 bytes). - Removing drivergpio.o(.ARM.exidx.text.MYGPIO_PinOn), (8 bytes). - Removing drivergpio.o(.ARM.exidx.text.MYGPIO_PinOff), (8 bytes). - Removing drivergpio.o(.text.MyGPIO_Toggle), (30 bytes). - Removing drivergpio.o(.ARM.exidx.text.MyGPIO_Toggle), (8 bytes). - Removing horloge.o(.text), (0 bytes). - Removing horloge.o(.ARM.exidx.text.Timer_Init), (8 bytes). - Removing horloge.o(.text.MyTimer_ActiveIT), (268 bytes). - Removing horloge.o(.ARM.exidx.text.MyTimer_ActiveIT), (8 bytes). - Removing horloge.o(.text.__NVIC_EnableIRQ), (48 bytes). - Removing horloge.o(.ARM.exidx.text.__NVIC_EnableIRQ), (8 bytes). - Removing horloge.o(.text.__NVIC_SetPriority), (66 bytes). - Removing horloge.o(.ARM.exidx.text.__NVIC_SetPriority), (8 bytes). - Removing horloge.o(.ARM.exidx.text.TIM2_IRQHandler), (8 bytes). - Removing horloge.o(.ARM.exidx.text.TIM3_IRQHandler), (8 bytes). - Removing horloge.o(.ARM.exidx.text.TIM4_IRQHandler), (8 bytes). - Removing mygpio.o(.text), (0 bytes). - Removing mygpio.o(.text.initGPIO_Interne), (66 bytes). - Removing mygpio.o(.ARM.exidx.text.initGPIO_Interne), (8 bytes). - Removing mygpio.o(.text.boutonAppuye_Interne), (16 bytes). - Removing mygpio.o(.ARM.exidx.text.boutonAppuye_Interne), (8 bytes). - Removing mygpio.o(.text.allumerDEL_Interne), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.allumerDEL_Interne), (8 bytes). - Removing mygpio.o(.text.eteindreDEL_Interne), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.eteindreDEL_Interne), (8 bytes). - Removing mygpio.o(.text.commuterDEL_Interne), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.commuterDEL_Interne), (8 bytes). - Removing mygpio.o(.text.initGPIO_Externe), (58 bytes). - Removing mygpio.o(.ARM.exidx.text.initGPIO_Externe), (8 bytes). - Removing mygpio.o(.text.boutonAppuye_Externe), (16 bytes). - Removing mygpio.o(.ARM.exidx.text.boutonAppuye_Externe), (8 bytes). - Removing mygpio.o(.text.allumerDEL_Externe), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.allumerDEL_Externe), (8 bytes). - Removing mygpio.o(.text.eteindreDEL_Externe), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.eteindreDEL_Externe), (8 bytes). - Removing mygpio.o(.text.commuterDEL_Externe), (18 bytes). - Removing mygpio.o(.ARM.exidx.text.commuterDEL_Externe), (8 bytes). - Removing pwm.o(.text), (0 bytes). - Removing pwm.o(.ARM.exidx.text.MyTimer_PWM), (8 bytes). - Removing pwm.o(.ARM.exidx.text.Set_DutyCycle_PWM), (8 bytes). - Removing i2c.o(.text), (0 bytes). - Removing i2c.o(.text.initI2C), (42 bytes). - Removing i2c.o(.ARM.exidx.text.initI2C), (8 bytes). - Removing system_stm32f10x.o(.text), (0 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SystemInit), (8 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SetSysClock), (8 bytes). - Removing system_stm32f10x.o(.text.SystemCoreClockUpdate), (290 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SystemCoreClockUpdate), (8 bytes). - Removing system_stm32f10x.o(.ARM.exidx.text.SetSysClockTo72), (8 bytes). - Removing system_stm32f10x.o(.data.SystemCoreClock), (4 bytes). - Removing system_stm32f10x.o(.rodata.AHBPrescTable), (16 bytes). - -86 unused section(s) (total 1508 bytes) removed from the image. diff --git a/Objects/ExtDll.iex b/Objects/ExtDll.iex deleted file mode 100644 index b661f48..0000000 --- a/Objects/ExtDll.iex +++ /dev/null @@ -1,2 +0,0 @@ -[EXTDLL] -Count=0 diff --git a/Objects/Lib_Com_Periph_2022.lib b/Objects/Lib_Com_Periph_2022.lib deleted file mode 100644 index ce805ab..0000000 Binary files a/Objects/Lib_Com_Periph_2022.lib and /dev/null differ diff --git a/Objects/Projet3FISA.axf b/Objects/Projet3FISA.axf deleted file mode 100644 index 75b4451..0000000 Binary files a/Objects/Projet3FISA.axf and /dev/null differ diff --git a/Objects/Projet3FISA.build_log.htm b/Objects/Projet3FISA.build_log.htm deleted file mode 100644 index 77ccc7e..0000000 --- a/Objects/Projet3FISA.build_log.htm +++ /dev/null @@ -1,80 +0,0 @@ - - -
-
µVision Build Log

-
Tool Versions:

-IDE-Version: µVision V5.43.1.0
-Copyright (C) 2025 ARM Ltd and ARM Germany GmbH. All rights reserved.
-License Information: Jens Kielland, University, LIC=----
- 
-Tool Versions:
-Toolchain:       MDK-Lite  Version: 5.43.0.0
-Toolchain Path:  C:\users\klinx\AppData\Local\Keil_v5\ARM\ARMCLANG\Bin
-C Compiler:      ArmClang.exe V6.24
-Assembler:       Armasm.exe V6.24
-Linker/Locator:  ArmLink.exe V6.24
-Library Manager: ArmAr.exe V6.24
-Hex Converter:   FromElf.exe V6.24
-CPU DLL:         SARMCM3.DLL V5.43.0.0
-Dialog DLL:      DARMSTM.DLL V1.69.1.0
-Target DLL:      STLink\ST-LINKIII-KEIL_SWO.dll V3.3.1.0
-Dialog DLL:      TARMSTM.DLL V1.67.1.0
- 
-
Project:

-C:\users\klinx\Documents\ecole\4A\µ\BE_VOILIER\ProjetVoilier\ProjetVoilier.uvprojx
-Project File Date:  12/15/2025
-
-
Output:

-*** Using Compiler 'V6.24', folder: 'C:\users\klinx\AppData\Local\Keil_v5\ARM\ARMCLANG\Bin'
-Rebuild target 'Reel'
-compiling principal.c...
-compiling Accelerometre.c...
-compiling Girouette.c...
-compiling MyUart.c...
-compiling Servo.c...
-compiling DriverGPIO.c...
-compiling Horloge.c...
-compiling MYGPIO.c...
-compiling MyTimer.c...
-compiling PWM.c...
-compiling Timer.c...
-compiling I2C.c...
-assembling startup_stm32f10x_md.s...
-compiling system_stm32f10x.c...
-linking...
-Program Size: Code=3748 RO-data=252 RW-data=0 ZI-data=1688  
-".\Objects\Projet3FISA.axf" - 0 Error(s), 0 Warning(s).
-
-
Software Packages used:

-
-Package Vendor: ARM
-                https://www.keil.com/pack/ARM.CMSIS.6.2.0.pack
-                ARM::CMSIS@6.2.0
-                CMSIS (Common Microcontroller Software Interface Standard)
-   * Component: CORE Version: 6.1.1
-
-Package Vendor: Keil
-                https://www.keil.com/pack/Keil.STM32F1xx_DFP.2.4.1.pack
-                Keil::STM32F1xx_DFP@2.4.1
-                STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
-   * Component: Startup Version: 1.0.0
-
-
Collection of Component include folders:

-  ./RTE/Device/STM32F103RB
-  ./RTE/_Reel
-  C:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include
-  C:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include
-
-
Collection of Component Files used:

-
-   * Component: ARM::CMSIS:CORE@6.1.1
-
-   * Component: Keil::Device:Startup@1.0.0
-      Source file:   Device/Source/ARM/startup_stm32f10x_md.s
-      Source file:   Device/Source/system_stm32f10x.c
-      Include file:  RTE_Driver/Config/RTE_Device.h
-      Source file:   Device/Source/ARM/STM32F1xx_OPT.s
-Build Time Elapsed:  00:00:27
-
- - diff --git a/Objects/Projet3FISA.htm b/Objects/Projet3FISA.htm deleted file mode 100644 index b10eec8..0000000 --- a/Objects/Projet3FISA.htm +++ /dev/null @@ -1,625 +0,0 @@ - - -Static Call Graph - [.\Objects\Projet3FISA.axf] -
-

Static Call Graph for image .\Objects\Projet3FISA.axf

-

#<CALLGRAPH># ARM Linker, 6240002: Last Updated: Mon Dec 15 21:13:00 2025 -

-

Maximum Stack Usage = 76 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)

-Call chain for Maximum Stack Depth:

-__rt_entry_main ⇒ main ⇒ Servo_Moteur ⇒ Set_DutyCycle_PWM -

-

-Functions with no stack information -

- -

-

-Mutually Recursive functions -

  • NMI_Handler   ⇒   NMI_Handler
    -
  • HardFault_Handler   ⇒   HardFault_Handler
    -
  • MemManage_Handler   ⇒   MemManage_Handler
    -
  • BusFault_Handler   ⇒   BusFault_Handler
    -
  • UsageFault_Handler   ⇒   UsageFault_Handler
    -
  • SVC_Handler   ⇒   SVC_Handler
    -
  • DebugMon_Handler   ⇒   DebugMon_Handler
    -
  • PendSV_Handler   ⇒   PendSV_Handler
    -
  • SysTick_Handler   ⇒   SysTick_Handler
    -
  • ADC1_2_IRQHandler   ⇒   ADC1_2_IRQHandler
    - -

    -

    -Function Pointers -

      -
    • ADC1_2_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • BusFault_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • CAN1_RX1_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • CAN1_SCE_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel1_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel2_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel3_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel4_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel5_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel6_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DMA1_Channel7_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • DebugMon_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI0_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI15_10_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI1_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI2_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI3_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI4_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • EXTI9_5_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • FLASH_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • HardFault_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • I2C1_ER_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • I2C1_EV_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • I2C2_ER_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • I2C2_EV_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • MemManage_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • NMI_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • PVD_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • PendSV_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • RCC_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • RTCAlarm_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • RTC_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • Reset_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • SPI1_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • SPI2_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • SVC_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • SysTick_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • SystemInit from system_stm32f10x.o(.text.SystemInit) referenced from startup_stm32f10x_md.o(.text) -
    • TAMPER_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM1_BRK_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM1_CC_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM1_TRG_COM_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM1_UP_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM2_IRQHandler from horloge.o(.text.TIM2_IRQHandler) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM3_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • TIM4_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • USART1_IRQHandler from myuart.o(.text.USART1_IRQHandler) referenced from startup_stm32f10x_md.o(RESET) -
    • USART2_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • USART3_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • USBWakeUp_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • USB_HP_CAN1_TX_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • USB_LP_CAN1_RX0_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • UsageFault_Handler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • WWDG_IRQHandler from startup_stm32f10x_md.o(.text) referenced from startup_stm32f10x_md.o(RESET) -
    • __main from __main.o(!!!main) referenced from startup_stm32f10x_md.o(.text) -
    -

    -

    -Global Symbols -

    -

    __main (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main)) -

    [Calls]

    • >>   __scatterload -
    • >>   __rt_entry -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(.text) -
    -

    __scatterload (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter)) -

    [Called By]

    • >>   __main -
    - -

    __scatterload_rt2 (Thumb, 84 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) -

    [Calls]

    • >>   __rt_entry -
    - -

    __scatterload_rt2_thumb_only (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) - -

    __scatterload_loop (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) - -

    __scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, __scatter.o(!!handler_null), UNUSED) - -

    __scatterload_zeroinit (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED) - -

    __rt_lib_init (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000)) -

    [Called By]

    • >>   __rt_entry_li -
    - -

    __rt_lib_init_alloca_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030)) - -

    __rt_lib_init_argv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E)) - -

    __rt_lib_init_atexit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D)) - -

    __rt_lib_init_clock_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023)) - -

    __rt_lib_init_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000034)) - -

    __rt_lib_init_exceptions_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032)) - -

    __rt_lib_init_fp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000002)) - -

    __rt_lib_init_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021)) - -

    __rt_lib_init_getenv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025)) - -

    __rt_lib_init_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C)) - -

    __rt_lib_init_lc_collate_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013)) - -

    __rt_lib_init_lc_ctype_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015)) - -

    __rt_lib_init_lc_monetary_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017)) - -

    __rt_lib_init_lc_numeric_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019)) - -

    __rt_lib_init_lc_time_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B)) - -

    __rt_lib_init_preinit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000006)) - -

    __rt_lib_init_rand_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000010)) - -

    __rt_lib_init_relocate_pie_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004)) - -

    __rt_lib_init_return (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000035)) - -

    __rt_lib_init_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F)) - -

    __rt_lib_init_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000027)) - -

    __rt_lib_init_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E)) - -

    __rt_lib_shutdown (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000)) -

    [Called By]

    • >>   __rt_exit_ls -
    - -

    __rt_lib_shutdown_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002)) - -

    __rt_lib_shutdown_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007)) - -

    __rt_lib_shutdown_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)) - -

    __rt_lib_shutdown_return (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010)) - -

    __rt_lib_shutdown_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A)) - -

    __rt_lib_shutdown_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004)) - -

    __rt_lib_shutdown_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C)) - -

    __rt_entry (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000)) -

    [Called By]

    • >>   __scatterload_rt2 -
    • >>   __main -
    - -

    __rt_entry_presh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002)) - -

    __rt_entry_sh (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004)) -

    [Stack]

    • Max Depth = 8 + Unknown Stack Size -
    • Call Chain = __rt_entry_sh ⇒ __user_setup_stackheap -
    -
    [Calls]
    • >>   __user_setup_stackheap -
    - -

    __rt_entry_li (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A)) -

    [Calls]

    • >>   __rt_lib_init -
    - -

    __rt_entry_postsh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009)) - -

    __rt_entry_main (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D)) -

    [Stack]

    • Max Depth = 76 + Unknown Stack Size -
    • Call Chain = __rt_entry_main ⇒ main ⇒ Servo_Moteur ⇒ Set_DutyCycle_PWM -
    -
    [Calls]
    • >>   exit -
    • >>   main -
    - -

    __rt_entry_postli_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)) - -

    __rt_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000)) -

    [Called By]

    • >>   exit -
    - -

    __rt_exit_ls (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003)) -

    [Calls]

    • >>   __rt_lib_shutdown -
    - -

    __rt_exit_prels_1 (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002)) - -

    __rt_exit_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004)) -

    [Calls]

    • >>   _sys_exit -
    - -

    Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   NMI_Handler -
    -
    [Called By]
    • >>   NMI_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    HardFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   HardFault_Handler -
    -
    [Called By]
    • >>   HardFault_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    MemManage_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   MemManage_Handler -
    -
    [Called By]
    • >>   MemManage_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    BusFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   BusFault_Handler -
    -
    [Called By]
    • >>   BusFault_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   UsageFault_Handler -
    -
    [Called By]
    • >>   UsageFault_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   SVC_Handler -
    -
    [Called By]
    • >>   SVC_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   DebugMon_Handler -
    -
    [Called By]
    • >>   DebugMon_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   PendSV_Handler -
    -
    [Called By]
    • >>   PendSV_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    SysTick_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   SysTick_Handler -
    -
    [Called By]
    • >>   SysTick_Handler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    ADC1_2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -

    [Calls]

    • >>   ADC1_2_IRQHandler -
    -
    [Called By]
    • >>   ADC1_2_IRQHandler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    CAN1_RX1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    CAN1_SCE_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel6_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    DMA1_Channel7_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI15_10_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    EXTI9_5_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    FLASH_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    I2C1_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    I2C1_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    I2C2_ER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    I2C2_EV_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    PVD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    RCC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    RTCAlarm_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    RTC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    SPI1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    SPI2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TAMPER_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TIM1_BRK_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TIM1_CC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TIM1_TRG_COM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TIM1_UP_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TIM3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    TIM4_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    USART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    USART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    USBWakeUp_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    USB_HP_CAN1_TX_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    USB_LP_CAN1_RX0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    WWDG_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f10x_md.o(.text)) -
    [Address Reference Count : 1]

    • startup_stm32f10x_md.o(RESET) -
    -

    __user_initial_stackheap (Thumb, 0 bytes, Stack size unknown bytes, startup_stm32f10x_md.o(.text)) -

    [Called By]

    • >>   __user_setup_stackheap -
    - -

    __use_two_region_memory (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) - -

    __rt_heap_escrow$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) - -

    __rt_heap_expand$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) - -

    __user_setup_stackheap (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text)) -

    [Stack]

    • Max Depth = 8 + Unknown Stack Size -
    • Call Chain = __user_setup_stackheap -
    -
    [Calls]
    • >>   __user_perproc_libspace -
    • >>   __user_initial_stackheap -
    -
    [Called By]
    • >>   __rt_entry_sh -
    - -

    exit (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text)) -

    [Stack]

    • Max Depth = 8 + Unknown Stack Size -
    • Call Chain = exit -
    -
    [Calls]
    • >>   __rt_exit -
    -
    [Called By]
    • >>   __rt_entry_main -
    - -

    __user_libspace (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) - -

    __user_perproc_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text)) -

    [Called By]

    • >>   __user_setup_stackheap -
    - -

    __user_perthread_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) - -

    _sys_exit (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text)) -

    [Called By]

    • >>   __rt_exit_exit -
    - -

    __I$use$semihosting (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) - -

    __use_no_semihosting_swi (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) - -

    __semihosting_library_function (Thumb, 0 bytes, Stack size unknown bytes, indicate_semi.o(.text), UNUSED) - -

    EnableTimer (Thumb, 146 bytes, Stack size 4 bytes, timer.o(.text.EnableTimer)) -

    [Stack]

    • Max Depth = 4
    • Call Chain = EnableTimer -
    -
    [Called By]
    • >>   configEncoder -
    - -

    LocaliserZero (Thumb, 58 bytes, Stack size 16 bytes, girouette.o(.text.LocaliserZero)) -

    [Stack]

    • Max Depth = 24
    • Call Chain = LocaliserZero ⇒ MyGPIO_Read -
    -
    [Calls]
    • >>   MyGPIO_Read -
    -
    [Called By]
    • >>   main -
    - -

    MyGPIO_Init (Thumb, 454 bytes, Stack size 12 bytes, drivergpio.o(.text.MyGPIO_Init)) -

    [Stack]

    • Max Depth = 12
    • Call Chain = MyGPIO_Init -
    -
    [Called By]
    • >>   configEncoder -
    • >>   initServo -
    - -

    MyGPIO_Read (Thumb, 26 bytes, Stack size 8 bytes, drivergpio.o(.text.MyGPIO_Read)) -

    [Stack]

    • Max Depth = 8
    • Call Chain = MyGPIO_Read -
    -
    [Called By]
    • >>   LocaliserZero -
    - -

    MyTimer_PWM (Thumb, 1010 bytes, Stack size 16 bytes, pwm.o(.text.MyTimer_PWM)) -

    [Stack]

    • Max Depth = 16
    • Call Chain = MyTimer_PWM -
    -
    [Called By]
    • >>   initServo -
    - -

    RecupAccelo (Thumb, 56 bytes, Stack size 8 bytes, accelerometre.o(.text.RecupAccelo)) -

    [Stack]

    • Max Depth = 8
    • Call Chain = RecupAccelo -
    -
    [Called By]
    • >>   main -
    - -

    Servo_Moteur (Thumb, 56 bytes, Stack size 24 bytes, servo.o(.text.Servo_Moteur)) -

    [Stack]

    • Max Depth = 44
    • Call Chain = Servo_Moteur ⇒ Set_DutyCycle_PWM -
    -
    [Calls]
    • >>   Set_DutyCycle_PWM -
    -
    [Called By]
    • >>   main -
    - -

    Set_DutyCycle_PWM (Thumb, 102 bytes, Stack size 20 bytes, pwm.o(.text.Set_DutyCycle_PWM)) -

    [Stack]

    • Max Depth = 20
    • Call Chain = Set_DutyCycle_PWM -
    -
    [Called By]
    • >>   Servo_Moteur -
    - -

    SystemInit (Thumb, 102 bytes, Stack size 8 bytes, system_stm32f10x.o(.text.SystemInit)) -

    [Stack]

    • Max Depth = 32
    • Call Chain = SystemInit ⇒ SetSysClock ⇒ SetSysClockTo72 -
    -
    [Calls]
    • >>   SetSysClock -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(.text) -
    -

    TIM2_IRQHandler (Thumb, 62 bytes, Stack size 8 bytes, horloge.o(.text.TIM2_IRQHandler)) -

    [Stack]

    • Max Depth = 8
    • Call Chain = TIM2_IRQHandler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    Timer_Init (Thumb, 198 bytes, Stack size 8 bytes, horloge.o(.text.Timer_Init)) -

    [Stack]

    • Max Depth = 8
    • Call Chain = Timer_Init -
    -
    [Called By]
    • >>   initLacheur -
    • >>   initServo -
    - -

    USART1_IRQHandler (Thumb, 54 bytes, Stack size 16 bytes, myuart.o(.text.USART1_IRQHandler)) -

    [Stack]

    • Max Depth = 16
    • Call Chain = USART1_IRQHandler -
    -
    [Address Reference Count : 1]
    • startup_stm32f10x_md.o(RESET) -
    -

    angleVent (Thumb, 54 bytes, Stack size 8 bytes, girouette.o(.text.angleVent)) -

    [Stack]

    • Max Depth = 8
    • Call Chain = angleVent -
    -
    [Called By]
    • >>   main -
    - -

    configEncoder (Thumb, 154 bytes, Stack size 24 bytes, girouette.o(.text.configEncoder)) -

    [Stack]

    • Max Depth = 36
    • Call Chain = configEncoder ⇒ MyGPIO_Init -
    -
    [Calls]
    • >>   MyGPIO_Init -
    • >>   EnableTimer -
    -
    [Called By]
    • >>   main -
    - -

    initAccelo (Thumb, 50 bytes, Stack size 4 bytes, accelerometre.o(.text.initAccelo)) -

    [Stack]

    • Max Depth = 4
    • Call Chain = initAccelo -
    -
    [Called By]
    • >>   main -
    - -

    initLacheur (Thumb, 46 bytes, Stack size 8 bytes, accelerometre.o(.text.initLacheur)) -

    [Stack]

    • Max Depth = 16
    • Call Chain = initLacheur ⇒ Timer_Init -
    -
    [Calls]
    • >>   Timer_Init -
    -
    [Called By]
    • >>   main -
    - -

    initServo (Thumb, 92 bytes, Stack size 16 bytes, servo.o(.text.initServo)) -

    [Stack]

    • Max Depth = 32
    • Call Chain = initServo ⇒ MyTimer_PWM -
    -
    [Calls]
    • >>   MyTimer_PWM -
    • >>   MyGPIO_Init -
    • >>   Timer_Init -
    -
    [Called By]
    • >>   main -
    - -

    main (Thumb, 284 bytes, Stack size 32 bytes, principal.o(.text.main)) -

    [Stack]

    • Max Depth = 76
    • Call Chain = main ⇒ Servo_Moteur ⇒ Set_DutyCycle_PWM -
    -
    [Calls]
    • >>   RecupAccelo -
    • >>   Servo_Moteur -
    • >>   vent2voile -
    • >>   angleVent -
    • >>   LocaliserZero -
    • >>   initLacheur -
    • >>   initAccelo -
    • >>   configEncoder -
    • >>   initServo -
    -
    [Called By]
    • >>   __rt_entry_main -
    - -

    vent2voile (Thumb, 54 bytes, Stack size 8 bytes, girouette.o(.text.vent2voile)) -

    [Stack]

    • Max Depth = 8
    • Call Chain = vent2voile -
    -
    [Called By]
    • >>   main -
    -

    -

    -Local Symbols -

    -

    SetSysClock (Thumb, 8 bytes, Stack size 8 bytes, system_stm32f10x.o(.text.SetSysClock)) -

    [Stack]

    • Max Depth = 24
    • Call Chain = SetSysClock ⇒ SetSysClockTo72 -
    -
    [Calls]
    • >>   SetSysClockTo72 -
    -
    [Called By]
    • >>   SystemInit -
    - -

    SetSysClockTo72 (Thumb, 290 bytes, Stack size 16 bytes, system_stm32f10x.o(.text.SetSysClockTo72)) -

    [Stack]

    • Max Depth = 16
    • Call Chain = SetSysClockTo72 -
    -
    [Called By]
    • >>   SetSysClock -
    -

    -

    -Undefined Global Symbols -

    diff --git a/Objects/Projet3FISA.lnp b/Objects/Projet3FISA.lnp deleted file mode 100644 index 5cfa38d..0000000 --- a/Objects/Projet3FISA.lnp +++ /dev/null @@ -1,18 +0,0 @@ ---cpu Cortex-M3 -".\objects\principal.o" -".\objects\accelerometre.o" -".\objects\girouette.o" -".\objects\myuart.o" -".\objects\servo.o" -".\objects\drivergpio.o" -".\objects\horloge.o" -".\objects\mygpio.o" -".\objects\mytimer.o" -".\objects\pwm.o" -".\objects\timer.o" -".\objects\i2c.o" -".\objects\startup_stm32f10x_md.o" -".\objects\system_stm32f10x.o" ---ro-base 0x08000000 --entry 0x08000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols ---info sizes --info totals --info unused --info veneers ---list ".\Listings\Projet3FISA.map" -o .\Objects\Projet3FISA.axf \ No newline at end of file diff --git a/Objects/ProjetVide.build_log.htm b/Objects/ProjetVide.build_log.htm deleted file mode 100644 index a1f3f9e..0000000 --- a/Objects/ProjetVide.build_log.htm +++ /dev/null @@ -1,77 +0,0 @@ - - -
    -
    µVision Build Log
    
-
    Tool Versions:
    
-IDE-Version: µVision V5.42.0.0
-Copyright (C) 2025 ARM Ltd and ARM Germany GmbH. All rights reserved.
-License Information: user user, INSA Toulouse, LIC=----
- 
-Tool Versions:
-Toolchain:       MDK-Lite  Version: 5.42.0.0
-Toolchain Path:  C:\Keil\542a\ARM\ARMCLANG\Bin
-C Compiler:      ArmClang.exe V6.23
-Assembler:       Armasm.exe V6.23
-Linker/Locator:  ArmLink.exe V6.23
-Library Manager: ArmAr.exe V6.23
-Hex Converter:   FromElf.exe V6.23
-CPU DLL:         SARMCM3.DLL V5.42.0.0
-Dialog DLL:      DARMSTM.DLL V1.69.1.0
-Target DLL:      STLink\ST-LINKIII-KEIL_SWO.dll V3.3.0.0
-Dialog DLL:      TARMSTM.DLL V1.67.1.0
- 
-
    Project:
    
-U:\Documents\ProjetVoilier\BE_VOILIER\ProjetVoilier.uvprojx
-Project File Date:  12/16/2025
-
-
    Output:
    
-*** Using Compiler 'V6.23', folder: 'C:\Keil\542a\ARM\ARMCLANG\Bin'
-Build target 'Simulation'
-compiling principal.c...
-linking...
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol initRTC (referred from principal.o).
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol getTime (referred from principal.o).
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol MySPI_Init (referred from accelerometre.o).
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol MySPI_Clear_NSS (referred from accelerometre.o).
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol MySPI_Send (referred from accelerometre.o).
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol MySPI_Set_NSS (referred from accelerometre.o).
-.\Objects\ProjetVide.axf: Error: L6218E: Undefined symbol MySPI_Read (referred from accelerometre.o).
-Not enough information to list image symbols.
-Not enough information to list load addresses in the image map.
-Finished: 2 information, 0 warning and 7 error messages.
-".\Objects\ProjetVide.axf" - 7 Error(s), 0 Warning(s).
-
-
    Software Packages used:
    
-
-Package Vendor: ARM
-                https://www.keil.com/pack/ARM.CMSIS.6.2.0.pack
-                ARM::CMSIS@6.2.0
-                CMSIS (Common Microcontroller Software Interface Standard)
-   * Component: CORE Version: 6.1.1
-
-Package Vendor: Keil
-                https://www.keil.com/pack/Keil.STM32F1xx_DFP.2.4.1.pack
-                Keil::STM32F1xx_DFP@2.4.1
-                STMicroelectronics STM32F1 Series Device Support, Drivers and Examples
-   * Component: Startup Version: 1.0.0
-
-
    Collection of Component include folders:
    
-  ./RTE/Device/STM32F103RB
-  ./RTE/_Simulation
-  C:/ProgramData/Keil/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include
-  C:/ProgramData/Keil/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include
-
-
    Collection of Component Files used:
    
-
-   * Component: ARM::CMSIS:CORE@6.1.1
-
-   * Component: Keil::Device:Startup@1.0.0
-      Source file:   Device/Source/ARM/STM32F1xx_OPT.s
-      Source file:   Device/Source/system_stm32f10x.c
-      Include file:  RTE_Driver/Config/RTE_Device.h
-      Source file:   Device/Source/ARM/startup_stm32f10x_md.s
-Target not created.
-Build Time Elapsed:  00:00:02
-
    - - diff --git a/Objects/ProjetVide.lnp b/Objects/ProjetVide.lnp deleted file mode 100644 index cf79c38..0000000 --- a/Objects/ProjetVide.lnp +++ /dev/null @@ -1,17 +0,0 @@ ---cpu Cortex-M3 -".\objects\principal.o" -".\objects\accelerometre.o" -".\objects\girouette.o" -".\objects\myuart.o" -".\objects\servo.o" -".\objects\plateau.o" -".\objects\drivergpio.o" -".\objects\horloge.o" -".\objects\mygpio.o" -".\objects\pwm.o" -".\objects\i2c.o" -".\objects\startup_stm32f10x_md.o" -".\objects\system_stm32f10x.o" ---ro-base 0x08000000 --entry 0x08000000 --rw-base 0x20000000 --entry Reset_Handler --first __Vectors --strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols ---info sizes --info totals --info unused --info veneers ---list ".\Listings\ProjetVide.map" -o .\Objects\ProjetVide.axf \ No newline at end of file diff --git a/Objects/ProjetVoilier_Reel.dep b/Objects/ProjetVoilier_Reel.dep deleted file mode 100644 index d8d5df1..0000000 --- a/Objects/ProjetVoilier_Reel.dep +++ /dev/null @@ -1,99 +0,0 @@ -Dependencies for Project 'ProjetVoilier', Target 'Reel': (DO NOT MODIFY !) -CompilerVersion: 6240000::V6.24::ARMCLANG -F (.\Application\principal.c)(0x69406BAB)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/principal.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Horloge.h)(0x69403A1C) -I (Services\Include\Accelerometre.h)(0x69403A1C) -I (Services\Include\Girouette.h)(0x69403A1C) -I (Services\Include\Servo.h)(0x69403A1C) -I (Pilotes\Include\I2C.h)(0x69403A1C) -F (.\Services\Source\Accelerometre.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/accelerometre.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Horloge.h)(0x69403A1C) -I (Pilotes\Include\MySPI.h)(0x69403A1C) -I (Services\Include\Accelerometre.h)(0x69403A1C) -I (Services\Include\Servo.h)(0x69403A1C) -F (.\Services\Source\Girouette.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/girouette.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Timer.h)(0x69403A1C) -I (Pilotes\Include\DriverGPIO.h)(0x69403A1C) -I (Services\Include\Girouette.h)(0x69403A1C) -I (Pilotes\Include\PWM.h)(0x69403A1C) -F (.\Pilotes\Source\MyUart.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/myuart.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\DriverGPIO.h)(0x69403A1C) -I (Pilotes\Include\MyTimer.h)(0x69403A1C) -F (.\Services\Source\Servo.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/servo.o -MMD) -I (Services\Include\Servo.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\DriverGPIO.h)(0x69403A1C) -I (Pilotes\Include\PWM.h)(0x69403A1C) -I (Pilotes\Include\Horloge.h)(0x69403A1C) -F (.\Pilotes\Source\DriverGPIO.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/drivergpio.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\DriverGPIO.h)(0x69403A1C) -F (.\Pilotes\Source\Horloge.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/horloge.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Horloge.h)(0x69403A1C) -F (.\Pilotes\Source\MYGPIO.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/mygpio.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\MYGPIO.h)(0x69403A1C) -F (.\Pilotes\Source\MyTimer.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/mytimer.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Timer.h)(0x69403A1C) -I (Pilotes\Include\MyTimer.h)(0x69403A1C) -I (Pilotes\Include\PWM.h)(0x69403A1C) -I (Pilotes\Include\DriverGPIO.h)(0x69403A1C) -I (Pilotes\Include\Horloge.h)(0x69403A1C) -F (.\Pilotes\Source\PWM.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/pwm.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\PWM.h)(0x69403A1C) -F (.\Pilotes\Source\Timer.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/timer.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Timer.h)(0x69403A1C) -F (.\Pilotes\Source\I2C.c)(0x69403A1C)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I . -I ./Pilotes/Include -I ./Services/Include -I./RTE/Device/STM32F103RB -I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/i2c.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\I2C.h)(0x69403A1C) -F (RTE/Device/STM32F103RB/RTE_Device.h)(0x69403A1C)() -F (RTE/Device/STM32F103RB/startup_stm32f10x_md.s)(0x69403A1C)(--target=arm-arm-none-eabi -mcpu=cortex-m3 -masm=auto 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-I./RTE/_Reel -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/system_stm32f10x.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69403A1C) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) diff --git a/Objects/ProjetVoilier_Simulation.dep b/Objects/ProjetVoilier_Simulation.dep deleted file mode 100644 index c0983ab..0000000 --- a/Objects/ProjetVoilier_Simulation.dep +++ /dev/null @@ -1,93 +0,0 @@ -Dependencies for Project 'ProjetVoilier', Target 'Simulation': (DO NOT MODIFY !) -CompilerVersion: 6230000::V6.23::ARMCLANG -F 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(C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x6853B9CE) -I (Pilotes\Include\DriverGPIO.h)(0x6941A7A8) -F (.\Services\Source\Servo.c)(0x69419DE7)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I ./Pilotes/Include -I ./Pilotes/Source -I ./Services/Source -I ./Services/Include -I . -I ./Objects -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/ProgramData/Keil/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/ProgramData/Keil/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="542" -DSTM32F10X_MD -D_RTE_ -o ./objects/servo.o -MMD) -I (Services\Include\Servo.h)(0x69419DE7) -I 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(C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x6853B9CE) -I (RTE\_Simulation\RTE_Components.h)(0x69419DE7) -I (C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x6853B99E) -I (C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x6853B9CE) -I (Pilotes\Include\PWM.h)(0x69419DE6) -F (.\Pilotes\Source\I2C.c)(0x69419DE6)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I ./Pilotes/Include -I ./Pilotes/Source -I ./Services/Source -I ./Services/Include -I . -I ./Objects -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/ProgramData/Keil/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/ProgramData/Keil/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="542" -DSTM32F10X_MD -D_RTE_ -o ./objects/i2c.o -MMD) -I (C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x6853B9CE) -I (RTE\_Simulation\RTE_Components.h)(0x69419DE7) -I (C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x6853B99E) -I (C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x6853B9CE) -I (Pilotes\Include\I2C.h)(0x69419DE6) -F (RTE/Device/STM32F103RB/RTE_Device.h)(0x69419DE6)() -F (RTE/Device/STM32F103RB/startup_stm32f10x_md.s)(0x69419DE6)(--target=arm-arm-none-eabi -mcpu=cortex-m3 -masm=auto -Wa,armasm,--diag_suppress=A1950W -c -gdwarf-4 -Wa,armasm,--pd,"__EVAL SETA 1" -I ./Pilotes/Source -I ./Pilotes/Include -I ./Services/Source -I ./Services/Include -I . -I ./Objects -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/ProgramData/Keil/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/ProgramData/Keil/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -Wa,armasm,--pd,"__UVISION_VERSION SETA 542" -Wa,armasm,--pd,"STM32F10X_MD SETA 1" -Wa,armasm,--pd,"_RTE_ SETA 1" -o ./objects/startup_stm32f10x_md.o) -F (RTE/Device/STM32F103RB/system_stm32f10x.c)(0x69419DE6)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I ./Pilotes/Include -I ./Pilotes/Source -I ./Services/Source -I ./Services/Include -I . -I ./Objects -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/ProgramData/Keil/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/ProgramData/Keil/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="542" -DSTM32F10X_MD -D_RTE_ -o ./objects/system_stm32f10x.o -MMD) -I (C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x6853B9CE) -I (RTE\_Simulation\RTE_Components.h)(0x69419DE7) -I (C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x6853B99E) -I (C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x6853B9CE) diff --git a/Objects/accelerometre.d b/Objects/accelerometre.d deleted file mode 100644 index 8364450..0000000 --- a/Objects/accelerometre.d +++ /dev/null @@ -1,7 +0,0 @@ -./objects/accelerometre.o: Services\Source\Accelerometre.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\Horloge.h Pilotes\Include\MySPI.h \ - Services\Include\Accelerometre.h Services\Include\Servo.h diff --git a/Objects/accelerometre.o b/Objects/accelerometre.o deleted file mode 100644 index 0c68fb6..0000000 Binary files a/Objects/accelerometre.o and /dev/null differ diff --git a/Objects/adc.d b/Objects/adc.d deleted file mode 100644 index fb46021..0000000 --- a/Objects/adc.d +++ /dev/null @@ -1 +0,0 @@ -./objects/adc.o: Pilotes\Source\ADC.c diff --git a/Objects/adc.o b/Objects/adc.o deleted file mode 100644 index 4dab66e..0000000 Binary files a/Objects/adc.o and /dev/null differ diff --git a/Objects/drivergpio.d b/Objects/drivergpio.d deleted file mode 100644 index 4a75411..0000000 --- a/Objects/drivergpio.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/drivergpio.o: Pilotes\Source\DriverGPIO.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\DriverGPIO.h diff --git a/Objects/drivergpio.o b/Objects/drivergpio.o deleted file mode 100644 index 61feaf0..0000000 Binary files a/Objects/drivergpio.o and /dev/null differ diff --git a/Objects/girouette.d b/Objects/girouette.d deleted file mode 100644 index 5c2ff9d..0000000 --- a/Objects/girouette.d +++ /dev/null @@ -1,7 +0,0 @@ -./objects/girouette.o: Services\Source\Girouette.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\Horloge.h Pilotes\Include\DriverGPIO.h \ - Services\Include\Girouette.h Pilotes\Include\PWM.h diff --git a/Objects/girouette.o b/Objects/girouette.o deleted file mode 100644 index 17197e7..0000000 Binary files a/Objects/girouette.o and /dev/null differ diff --git a/Objects/horloge.d b/Objects/horloge.d deleted file mode 100644 index 6eed788..0000000 --- a/Objects/horloge.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/horloge.o: Pilotes\Source\Horloge.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\Horloge.h diff --git a/Objects/horloge.o b/Objects/horloge.o deleted file mode 100644 index b9e6e1b..0000000 Binary files a/Objects/horloge.o and /dev/null differ diff --git a/Objects/i2c.d b/Objects/i2c.d deleted file mode 100644 index 79beaf4..0000000 --- a/Objects/i2c.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/i2c.o: Pilotes\Source\I2C.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\I2C.h diff --git a/Objects/i2c.o b/Objects/i2c.o deleted file mode 100644 index c349adb..0000000 Binary files a/Objects/i2c.o and /dev/null differ diff --git a/Objects/it.d b/Objects/it.d deleted file mode 100644 index 9726ce4..0000000 --- a/Objects/it.d +++ /dev/null @@ -1,5 +0,0 @@ -./objects/it.o: Pilotes\Source\IT.c Pilotes\Include\IT.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Reel\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h diff --git a/Objects/it.o b/Objects/it.o deleted file mode 100644 index 6aac42e..0000000 Binary files a/Objects/it.o and /dev/null differ diff --git a/Objects/mygpio.d b/Objects/mygpio.d deleted file mode 100644 index 656b5e0..0000000 --- a/Objects/mygpio.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/mygpio.o: Pilotes\Source\MYGPIO.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\MYGPIO.h diff --git a/Objects/mygpio.o b/Objects/mygpio.o deleted file mode 100644 index 0fc4f81..0000000 Binary files a/Objects/mygpio.o and /dev/null differ diff --git a/Objects/mytimer.d b/Objects/mytimer.d deleted file mode 100644 index 79639a6..0000000 --- a/Objects/mytimer.d +++ /dev/null @@ -1,8 +0,0 @@ -./objects/mytimer.o: Pilotes\Source\MyTimer.c \ - C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\Timer.h Pilotes\Include\MyTimer.h \ - Pilotes\Include\PWM.h Pilotes\Include\DriverGPIO.h \ - Pilotes\Include\Horloge.h diff --git a/Objects/mytimer.o b/Objects/mytimer.o deleted file mode 100644 index 51272b8..0000000 Binary files a/Objects/mytimer.o and /dev/null differ diff --git a/Objects/myuart.d b/Objects/myuart.d deleted file mode 100644 index 715edc0..0000000 --- a/Objects/myuart.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/myuart.o: Pilotes\Source\MyUart.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\DriverGPIO.h diff --git a/Objects/myuart.o b/Objects/myuart.o deleted file mode 100644 index a01ef0e..0000000 Binary files a/Objects/myuart.o and /dev/null differ diff --git a/Objects/plateau.d b/Objects/plateau.d deleted file mode 100644 index 670de8d..0000000 --- a/Objects/plateau.d +++ /dev/null @@ -1,8 +0,0 @@ -./objects/plateau.o: \ - \\netapp2\jdreschler\Documents\ProjetVoilier\BE_VOILIER\Pilotes\Source\Plateau.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\PWM.h Pilotes\Include\DriverGPIO.h \ - Pilotes\Include\Horloge.h diff --git a/Objects/plateau.o b/Objects/plateau.o deleted file mode 100644 index 76189a9..0000000 Binary files a/Objects/plateau.o and /dev/null differ diff --git a/Objects/principal.d b/Objects/principal.d deleted file mode 100644 index d28c550..0000000 --- a/Objects/principal.d +++ /dev/null @@ -1,9 +0,0 @@ -./objects/principal.o: Application\principal.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\Horloge.h Services\Include\Accelerometre.h \ - Services\Include\Girouette.h Services\Include\Servo.h \ - Pilotes\Include\MyUart.h Pilotes\Include\Plateau.h \ - Pilotes\Include\I2C.h Pilotes\Include\RTC.h diff --git a/Objects/principal.o b/Objects/principal.o deleted file mode 100644 index 0fa8804..0000000 Binary files a/Objects/principal.o and /dev/null differ diff --git a/Objects/pwm.d b/Objects/pwm.d deleted file mode 100644 index e6d7900..0000000 --- a/Objects/pwm.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/pwm.o: Pilotes\Source\PWM.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\PWM.h diff --git a/Objects/pwm.o b/Objects/pwm.o deleted file mode 100644 index 84f389f..0000000 Binary files a/Objects/pwm.o and /dev/null differ diff --git a/Objects/servo.d b/Objects/servo.d deleted file mode 100644 index b2bbd6c..0000000 --- a/Objects/servo.d +++ /dev/null @@ -1,7 +0,0 @@ -./objects/servo.o: Services\Source\Servo.c Services\Include\Servo.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\DriverGPIO.h Pilotes\Include\PWM.h \ - Pilotes\Include\Horloge.h diff --git a/Objects/servo.o b/Objects/servo.o deleted file mode 100644 index a31c406..0000000 Binary files a/Objects/servo.o and /dev/null differ diff --git a/Objects/startup_stm32f10x_md.o b/Objects/startup_stm32f10x_md.o deleted file mode 100644 index 01e7066..0000000 Binary files a/Objects/startup_stm32f10x_md.o and /dev/null differ diff --git a/Objects/system_stm32f10x.d b/Objects/system_stm32f10x.d deleted file mode 100644 index 1180923..0000000 --- a/Objects/system_stm32f10x.d +++ /dev/null @@ -1,5 +0,0 @@ -./objects/system_stm32f10x.o: RTE\Device\STM32F103RB\system_stm32f10x.c \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\ProgramData\Keil\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h diff --git a/Objects/system_stm32f10x.o b/Objects/system_stm32f10x.o deleted file mode 100644 index 64cab86..0000000 Binary files a/Objects/system_stm32f10x.o and /dev/null differ diff --git a/Objects/timer.d b/Objects/timer.d deleted file mode 100644 index 2dc3556..0000000 --- a/Objects/timer.d +++ /dev/null @@ -1,6 +0,0 @@ -./objects/timer.o: Pilotes\Source\Timer.c \ - C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h \ - RTE\_Simulation\RTE_Components.h \ - C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h \ - C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h \ - Pilotes\Include\Timer.h diff --git a/Objects/timer.o b/Objects/timer.o deleted file mode 100644 index a4f0cd6..0000000 Binary files a/Objects/timer.o and /dev/null differ diff --git a/Pilotes/Include/DriverGPIO.h b/Pilotes/Include/DriverGPIO.h deleted file mode 100644 index e6bd725..0000000 --- a/Pilotes/Include/DriverGPIO.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef DRIVERGPIO_H_ -#define DRIVERGPIO_H_ -#include "stm32f10x.h" -#define In_Floating 0x4 -#define In_PullDown 0x8 -#define In_PullUp 0x8 -#define In_Analog 0x0 -#define Out_Ppull 0x3 -#define Out_OD 0x7 -#define AltOut_Ppull 0xB -#define AltOut_OD 0xF -extern void MyGPIO_Init(GPIO_TypeDef * GPIO, char pin, char conf ); -extern int MyGPIO_Read(GPIO_TypeDef * GPIO, char GPIO_Pin); // renvoie 0 ou autre chose different de 0 -extern void MyGPIO_Set(GPIO_TypeDef * GPIO, char GPIO_Pin); -extern void MyGPIO_Reset(GPIO_TypeDef * GPIO, char GPIO_Pin); -extern void MyGPIO_Toggle(GPIO_TypeDef * GPIO, char GPIO_Pin); -void MYGPIO_PinOff (GPIO_TypeDef *GPIO , char GPIO_Pin); -void MYGPIO_PinOn (GPIO_TypeDef *GPIO , char GPIO_Pin); -#endif diff --git a/Pilotes/Include/Horloge.h b/Pilotes/Include/Horloge.h deleted file mode 100644 index b57a4c4..0000000 --- a/Pilotes/Include/Horloge.h +++ /dev/null @@ -1,16 +0,0 @@ -#include -#define PSC_VAL 624 -#define ARR_VAL 0xE0FF - -//DUTY CYCLE -#define DUTYC 70 //Chiffre entre 0 et 100, où 100 est 100% duty cycle -//#define POWERMODE 1 // 1 vaut powermode 1, 0 vaut powermode 2 (Powermode pour le config de dutycycle) -//Powermode 1 reste sur la bonne polarité: cad. si DUTY_CYCLE vaut 60 alors le signal reste HIGH pour 60% du periode, inverse pour pwmd2 -//Timer -void Timer_Init(TIM_TypeDef *Timer, unsigned short Autoreload, unsigned short Prescaler); -void MyTimer_ActiveIT(TIM_TypeDef * Timer, char Prio, void(*Interrupt_fonc)(void)); -void TIM2_IRQHandler(void); - -//PWM -void MyTimer_PWM(TIM_TypeDef * Timer , int Channel); -int Set_DutyCycle_PWM(TIM_TypeDef *Timer, int Channel, int DutyC); \ No newline at end of file diff --git a/Pilotes/Include/I2C.h b/Pilotes/Include/I2C.h deleted file mode 100644 index 1cda3b8..0000000 --- a/Pilotes/Include/I2C.h +++ /dev/null @@ -1,2 +0,0 @@ -#include -void initI2C(); \ No newline at end of file diff --git a/Pilotes/Include/MYGPIO.h b/Pilotes/Include/MYGPIO.h deleted file mode 100644 index 5cc4f40..0000000 --- a/Pilotes/Include/MYGPIO.h +++ /dev/null @@ -1,38 +0,0 @@ -//Definitions - -//INTERNE -#define LED_PIN_INTERNE (5) // 5 pour le LED de Arduino -#define BUTTON_GPIO_INTERNE (GPIOA) //GPIOA pour l'Arduion -#define LED_GPIO_INTERNE (GPIOA) //GPIOA pour Arduino -#define BUTTON_PIN_INTERNE (13) //13 pour Arduino - -//EXTERNE -#define LED_PIN_EXTERNE (8) // 8 pour la porte PB8 -#define BUTTON_GPIO_EXTERNE (GPIOB) //GPIOB pour externe -#define LED_GPIO_EXTERNE (GPIOB) //GPIOB pour Externe -#define BUTTON_PIN_EXTERNE (9) //9 pour bouton poussoir - -//STATIQUES -#define GPIO_OUTPUT_PPULL_MODE (2) //Mis en GP output 2MHz en mode PP -#define GPIO_INPUT_PUPD_MODE (8) //Pour mettre à Pull up/down -#define GPIO_INPUT_FLOATING_MODE (4) - -//si on est sur l'arduino ou sur le led externe -#define INTERNE 1 // 1 c'est vrai, 0 faux - -//FONCTIONS -void initGPIO_Interne(void); -int boutonAppuye_Interne(void); -void allumerDEL_Interne(void); -void eteindreDEL_Interne(void); -void commuterDEL_Interne(void); -void allume_bit_Interne(void); - -void initGPIO_Externe(void); -int boutonAppuye_Externe(void); -void allumerDEL_Externe(void); -void eteindreDEL_Externe(void); -void commuterDEL_Externe(void); -void allume_bit_Externe(void); - - diff --git a/Pilotes/Include/MyI2C.h b/Pilotes/Include/MyI2C.h deleted file mode 100644 index 519965c..0000000 --- a/Pilotes/Include/MyI2C.h +++ /dev/null @@ -1,229 +0,0 @@ -#ifndef _I2C_ -#define _I2C_ - -#include "stm32f10x.h" - -/************************************************************************************* -===================== By Periph team INSA GEI 2022 =========================== -*************************************************************************************/ - -/* -************************************************************************************* -===================== I2C les IO STM32F103 ================================= -************************************************************************************* - -Les IO sont pris en charge par la lib, pas besoin de faire les configurations Alt OD. - -**I2C1** -SCL PB6 -SDA PB7 - -**I2C2** -SCL PB10 -SDA PB11 - - -************************************************************************************* -==================== Fondamentaux I2C ========================================== -************************************************************************************* -- Bus synchrone Low speed (<100kHz) ou high speed (=400kHz), Ici Low speed 100kHz. -- Transfert octet par octet, poids fort en premier, avec aquittement pour chaque octet -- Deux lignes SDA et SCL (horloge) en open drain, repos '1' -- bit "normal" = SDA stable lors du pulse SCL (ie durant l'état haut de SCL, SDA est stable) -- bit Start/Stop/Restart = SDA non stable lorsque SCL vaut '1' (violation règle précédente) - * Start : front descendant de SDA lorsque SCL vaut '1' - * Stop : front montant de SDA lorsque SCL = '1' - * Restart = Start en cours de trame (typiquement pour changer Write/read). -- uC en Mode Master uniquement (c'est notre choix) : c'est le uC qui est maître de l'horloge SCL. -- Le Slave a une @ 7 bits. On ajoute un bit LSB qui est /WR (donc 0 pour écriture, 1 pour lecture) -- Une adresse s'écrit donc |a6 a5 a4 a3 a2 a1 a0 /WR| ce qui donne 8 bits. Elle indique une future -lecture ou écriture. -On parle d'@ 7 bits en regroupant |a6 a5 a4 a3 a2 a1 a0| -On parle d'@ 8 bits en regroupant |a6 a5 a4 a3 a2 a1 a0 /WR| (donc une @ écriture, une @ lecture) -NB : préférer le concept @7bits...c'est plus clair. - -- On peut lire ou écrire une ou plusieurs données à la suite. C'est lors de l'envoie de l'adresse Slave -par le Master que le sens à venir pour les datas est indiqué. -- En écriture, - * les Ack sont faits par le slave après chaque octet envoyé par le master (Ack = mise à 0 le bit 9). -- En lecture, - * dès que le l@ slave est transmise (/RW = 1), et le Ack réalisé, le slave positionne le bit 7 - du prochain octet à lire sur SDA par anticipation , - * le master enchaîne ses pulses (9), lors du pulse 9 (le dernier) c'est le master qui acquite. - * Après chaque acquitement, le Slave amorce le prochain octet en positionnant son bit 7 sur SDA - * Après le dernier octet, le Master génère un stop. - * Pour pouvoir générer le stop, le Master doit piloter SDA, or ce n'est pas possible puisque - le Slave positionne le futur bit 7 ... Pour régler ce problème : - lors du dernier transfert, le Master N'acquitte PAS (NACK). Ainsi le Slave ne - propose plus le bit 7 du prochain octet sur SDA et libère SDA. Le Master peut alors clôturer la - communication avec un Stop. - - - - -======= Echange typique avec un Slave ================================================================ -- Une lecture ou écriture se fait vers un Slave et à partir d'une adresse mémoire donnée (pointeur interne). -Ce pointeur est automatiquement incrémenté dans le slave lors des accès écriture ou lecture. - -- Ecriture de N octets , trame complète (@ = adresse slave, pt = valeur de chargement du pointeur interne) -|Start Cond |@6|@5|@4|@3|@2|@1|@0| Wr =0 |Slave ACK| -|pt7|pt6|pt5|pt4|pt3|pt2|pt1|pt0|Slave ACK| -|d7|d6|d5|d4|d3|d2|d1|d0|Slave ACK| (data 1) -..... -|d7|d6|d5|d4|d3|d2|d1|d0|Salve ACK|Stop Cond| (data N) - -- Lecture de N octets à partir d'une adresse de pointeur donnée -|Start Cond |@6|@5|@4|@3|@2|@1|@0| Wr =0 |Slave ACK| -|pt7|pt6|pt5|pt4|pt3|pt2|pt1|pt0|Slave ACK| -|ReStart Cond |@6|@5|@4|@3|@2|@1|@0| Wr =1 |Slave ACK| (NB: restart nécessaire pour changer écriture / lecture) -|d7|d6|d5|d4|d3|d2|d1|d0|Master ACK| (data 1) -..... -|d7|d6|d5|d4|d3|d2|d1|d0|Master ACK| (data N-1) -|d7|d6|d5|d4|d3|d2|d1|d0|Master NACK|Stop Cond| (data N) - - - - - -************************************************************************************* -==================== La lib I2C ========================================== -************************************************************************************* - -3 fonctions essentielles : -MyI2C_Init -MyI2C_PutString -MyI2C_GetString - -1 fonction spéciale : MyI2C_Get_Error - -Les fonctions Put/Get string fonctionnent sur le principe classique décrit précédemment -(Slave@, Pter @, Data...). -La fonction init prend parmi ses paramètres le nom d'une fct callback d'erreur. -En fait, le driver gère en IT les erreurs possibles I2C. La fonction MyI2C_Get_Error permet de -recevoir un code erreur. -Il est conseillé d'utiliser ce callback. Si on tombe dedans, c'est qu'une erreur s'est produite. -Si le code erreur est "inconnu", souvent c'est qu'il y a un soucis à l'adressage slave: -Vérifier alors la connectique physique SDA/SCL ainsi que l'alimentation du slave ou tout simplement -l'@ slave ! - - -==========================================================================================*/ - - - - - -/*========================================================================================= - GESTION ERREURS -========================================================================================= */ -typedef enum -{ - OK, - BusError, // - AckFail, // Pas,d'ack - TimeOut, // SCL est resté plus de 25ms à l'état bas - UnknownError // IT erreur déclenchée mais pas de flag explicite ... -} MyI2C_Err_Enum; - - - - -/** - * @brief Retourne les erreurs I2C - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval Type d'erreur rencontrée , voir MyI2C_Err_Enum - */ - -MyI2C_Err_Enum MyI2C_Get_Error(I2C_TypeDef * I2Cx); - - - -/*========================================================================================= - INITIALISATION I2C -========================================================================================= */ - - -/** - * @brief Initialise l'interface I2C (1 ou 2) - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param char IT_Prio_I2CErr 0 à 15 (utilisé en cas d'erreur, IT courte et non bloquante - * @param *ITErr_function : callback à utiliser pour sortir d'un plantage transmission - * @retval None - * @Example MyI2C_Init(I2C1, 2,My_CallbackErr); - - - - */ -void MyI2C_Init(I2C_TypeDef * I2Cx, char IT_Prio_I2CErr, void (*ITErr_function) (void)); - - - -/*========================================================================================= - EMISSION I2C : PutString -========================================================================================= */ - - -// Structure de données pour l'émission ou la réception I2C : -typedef struct -{ - char SlaveAdress7bits; // l'adresse I2C du slave device - char * Ptr_Data; // l'adresse du début de tableau char à recevoir/émettre (tableau en RAM uC) - char Nb_Data; // le nbre d'octets à envoyer / recevoir -} -MyI2C_RecSendData_Typedef; - - - -/** - * @brief|Start Cond |@6|@5|@4|@3|@2|@1|@0| Wr =0 |Slave ACK| - |pt7|pt6|pt5|pt4|pt3|pt2|pt1|pt0|Slave ACK| - |d7|d6|d5|d4|d3|d2|d1|d0|Slave ACK| (data 1) - ..... - |d7|d6|d5|d4|d3|d2|d1|d0|Salve ACK|Stop Cond| (data N) - - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param PteurAdress = adresse de démarrage écriture à l'interieur du slave I2C - * @param DataToSend, adresse de la structure qui contient les informations à transmettre - voir définition MyI2C_RecSendData_Typedef - * @retval None - * @Example MyI2C_PutString(I2C1,0xAA, &MyI2C_SendTimeData); - * Ecrit dans le slave câblé sur I2C1 à partir de l'@ mémoire interne Slave 0xAA - - */ -void MyI2C_PutString(I2C_TypeDef * I2Cx, char PteurAdress, MyI2C_RecSendData_Typedef * DataToSend); - - - - - - - - - - -/*========================================================================================= - Réception I2C : GetString -========================================================================================= */ - -/** - * @brief |Start Cond |@6|@5|@4|@3|@2|@1|@0| Wr =0 |Slave ACK| - |pt7|pt6|pt5|pt4|pt3|pt2|pt1|pt0|Slave ACK| - |ReStart Cond |@6|@5|@4|@3|@2|@1|@0| Wr =1 |Slave ACK| - |d7|d6|d5|d4|d3|d2|d1|d0|Master ACK| (data 1) - ..... - |d7|d6|d5|d4|d3|d2|d1|d0|Master NACK|Stop Cond| (data N) - - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param PteurAdress = adresse de démarrage lecture à l'interieur du slave I2C - * @param DataToSend, adresse de la structure qui contient les informations nécessaires à la - réception des données voir définition MyI2C_RecSendData_Typedef - * @retval None - * @Example MyI2C_GetString(I2C1,0xAA, &MyI2C_RecevievedTimeData); - Lit dans le slave câblé sur I2C1 à partir de l'@ mémoire interne Slave 0xAA - */ -void MyI2C_GetString(I2C_TypeDef * I2Cx, char PteurAdress, MyI2C_RecSendData_Typedef * DataToReceive); - - - - -#endif diff --git a/Pilotes/Include/MySPI.h b/Pilotes/Include/MySPI.h deleted file mode 100644 index 560404c..0000000 --- a/Pilotes/Include/MySPI.h +++ /dev/null @@ -1,129 +0,0 @@ - -#ifndef INC_MYSPI_H_ -#define INC_MYSPI_H_ - -#include "stm32f10x.h" - -/************************************************************************************* -===================== By Periph team INSA GEI 2022 =========================== -*************************************************************************************/ - -/* -************************************************************************************* -===================== I2C les IO STM32F103 ================================= -************************************************************************************* -Les IO sont pris en charge par la lib, pas besoin de faire les configurations - - -Sur la Nucléo , le SPI1 est perturbé par la LED2 (PA5), mais doit pouvoir subir les front SCK qd même (LED clignote vite..) -le SPI2 n'est pas utilisable car pin non connectées par défaut (sauf à modifier les SB). En fait la Nucléo fait un choix entre SPI1 -et SPI2 par soudage jumper (SB). - --> Utiliser SPI1 avec la carte Nucléo - - * **IO SPI 1** - SPI1_NSS PA4 - SPI1_SCK PA5 - SPI1_MISO PA6 - SPI1_MOSI PA7 - - **IO SPI 2** - SPI2_NSS PB12 - SPI2_SCK PB13 - SPI2_MISO PB14 - SPI2_MOSI PB15 - - - - - -************************************************************************************* -==================== Fondamentaux SPI ========================================== -************************************************************************************* -- Bus Synchrone, 4 fils (même si on peut l'utiliser en 3 fils) -- Transfert à l'octet -- Protocole entre un Master (contrôle SCK) et un Slave -- SCK permet de synchroniser les bits de chaque octet. Il se configure par : - * son niveau de repos : ici niveau '1' - * le front actif de synchronisation pour chaque bit : ici front montant (front up durant bit stable) -- /CS ou /NSS active le slave sur l'état bas -- MOSI : Master Out Slave In (donc data circulant du Master vers le Slave, donc écriture dans le Slave) -- MISO : Master In Slave Out (donc data circulant du Slave vers le Master, donc lecture du Slave) - -Bien que la lib propose une fonction d'écriture et de lecture : - * une écriture s'accompagne obligatoirement d'une lecture (bidon) - * une lecture s'accompagne obligatoirement d'une écriture (bidon) -La gestion /CS = /NSS se fait "à la main". On peut alors lire toute une série d'octets -en laissant /CS à l'état bas pendant toute la durée de circulation des octets. - - -************************************************************************************* -==================== La lib SPI ========================================== -************************************************************************************* - -fonctions essentielles : - -MySPI_Init -MySPI_Send -MySPI_Read -MySPI_Set_NSS -MySPI_Clear_NSS - - -==========================================================================================*/ - - - - -/*========================================================================================= - INITIALISATION SPI -========================================================================================= */ - -/** - * @brief Configure le SPI spécifié : FSCK = 281kHz, Repos SCK = '1', Front actif = up - Gestion /CS logicielle à part, configure les 4 IO - - SCK, MOSI : Out Alt push pull - - MISO : floating input - - /NSS (/CS) : Out push pull - * @param SPI_TypeDef * SPI : SPI1 ou SPI2 - */ -void MySPI_Init(SPI_TypeDef * SPI); - - - -/** - * @brief Envoie un octet (/CS non géré, à faire logiciellement) - Plus en détail, émission de l'octet souhaité sur MOSI - Lecture en même temps d'un octet poubelle sur MISO (non exploité) - * @param : char ByteToSend : l'octet à envoyer - */ -void MySPI_Send(char ByteToSend); - - -/** - * @brief Reçoit un octet (/CS non géré, à faire logiciellement) - Plus en détail, émission d'un octet bidon sur MOSI (0x00) - pour élaborer les 8 fronts sur SCK et donc piloter le slave en lecture - qui répond sur MISO - * @param : none - * @retval : l'octet lu. - */ -char MySPI_Read(void); - - - -/** - * @brief Positionne /CS = /NSS à '1'. A utiliser pour borner les octets à transmettre/recevoir - * @param : none - */ -void MySPI_Set_NSS(void); - - - -/** - * @brief Positionne /CS = /NSS à '0'. A utiliser pour borner les octets à transmettre/recevoir - * @param :none - */ -void MySPI_Clear_NSS(void); - -#endif diff --git a/Pilotes/Include/MyUart.h b/Pilotes/Include/MyUart.h deleted file mode 100644 index fea73da..0000000 --- a/Pilotes/Include/MyUart.h +++ /dev/null @@ -1,8 +0,0 @@ -#include "stm32f10x.h" - - -void My_USART_Config(USART_TypeDef* , uint32_t ); -void USART_Send_Char(USART_TypeDef* , char ); -void USART_Send_String(USART_TypeDef*, char*); -void USART_IT_Receive_Enable(USART_TypeDef*); -void Init_IT_Receive(void (*Receive_IT_function) (int)); \ No newline at end of file diff --git a/Pilotes/Include/PWM.h b/Pilotes/Include/PWM.h deleted file mode 100644 index 1eb59d4..0000000 --- a/Pilotes/Include/PWM.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef PWM_H_ -#define PWM_H_ -#include "stm32f10x.h" -//Variables -#define POWERMODE 2 // 1 vaut powermode 1, 0 vaut powermode 2 (Powermode pour le config de dutycycle) -// Config -extern void MyTimer_PWM(TIM_TypeDef * Timer , int Channel); -extern int Set_DutyCycle_PWM(TIM_TypeDef *Timer, int Channel, int DutyC); -#endif diff --git a/Pilotes/Include/Plateau.h b/Pilotes/Include/Plateau.h deleted file mode 100644 index 84a9138..0000000 --- a/Pilotes/Include/Plateau.h +++ /dev/null @@ -1,4 +0,0 @@ -#include "stm32f10x.h" - -void initPlato(TIM_TypeDef * Timer, int Channel); -void Update_Motor_PWM(int Consigne, TIM_TypeDef * Timer, int Channel); \ No newline at end of file diff --git a/Pilotes/Include/RTC.h b/Pilotes/Include/RTC.h deleted file mode 100644 index 4391b3d..0000000 --- a/Pilotes/Include/RTC.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef RTC_H_ -#define RTC_H_ -#include -void initRTC(); -int getTime(); - - -#endif // RTC_H_ diff --git a/Pilotes/Source/DriverGPIO.c b/Pilotes/Source/DriverGPIO.c deleted file mode 100644 index 30c0fb4..0000000 --- a/Pilotes/Source/DriverGPIO.c +++ /dev/null @@ -1,92 +0,0 @@ -#include -#include "DriverGPIO.h" - -// Constantes -#define In_Floating 0x4 -#define In_PullDown 0x8 -#define In_PullUp 0x8 -#define In_Analog 0x0 -#define Out_Ppull 0x3 -#define Out_OD 0x7 -#define AltOut_Ppull 0xB -#define AltOut_OD 0xF - - -void MyGPIO_Init(GPIO_TypeDef * GPIO, char pin, char conf) { - int shift_pin; - - //Start clock for relevant GPIO - if(GPIO == GPIOA) { - RCC -> APB2ENR |= RCC_APB2ENR_IOPAEN; - } - else if(GPIO == GPIOB) { - RCC -> APB2ENR |= RCC_APB2ENR_IOPBEN; - } - else if(GPIO == GPIOC) { - RCC -> APB2ENR |= RCC_APB2ENR_IOPCEN; - } - else if(GPIO == GPIOD) { - RCC -> APB2ENR |= RCC_APB2ENR_IOPDEN; - } - if(pin < 8) {//CRL zone - shift_pin = pin*4; - GPIO -> CRL &= ~(0xF << shift_pin); - //PullUp and PullDown have the same conf number, so we need to change the ODR to diferenciate them both - if(conf == In_PullUp) { - GPIO -> CRL |= ( In_PullUp << shift_pin); - GPIO -> ODR |= (1< CRL |= ( In_PullDown << shift_pin); - GPIO -> ODR &= ~(1< CRL |= ( conf << shift_pin); - } - } - else {//CRH zone - shift_pin = (pin-8)*4; - GPIO -> CRH &= ~(0xF << shift_pin); - if(conf == In_PullUp) { - GPIO -> CRH |= ( In_PullUp << shift_pin); - GPIO -> ODR |= (1< CRH |= ( In_PullDown << shift_pin); - GPIO -> ODR &= ~(1< CRH |= ( conf << shift_pin); - } - } -} - - -int MyGPIO_Read(GPIO_TypeDef * GPIO, char GPIO_Pin) { - return(GPIO -> IDR & (1 << GPIO_Pin)); -} - - -void MyGPIO_Set(GPIO_TypeDef * GPIO, char GPIO_Pin) { - GPIO -> BSRR = (1< BSRR = (1<<(GPIO_Pin+16));//1 on reset zone -} - - -void MYGPIO_PinOn (GPIO_TypeDef *GPIO , char GPIO_Pin){ - GPIO->ODR |= (1<ODR &= ~(1< ODR = GPIO -> ODR ^ (0x1 << GPIO_Pin); -} - diff --git a/Pilotes/Source/Horloge.c b/Pilotes/Source/Horloge.c deleted file mode 100644 index 71d43bc..0000000 --- a/Pilotes/Source/Horloge.c +++ /dev/null @@ -1,91 +0,0 @@ -#include -#include "Horloge.h" - -static void (*TIM2_Appel)(void) = 0; -static void (*TIM3_Appel)(void) = 0; -static void (*TIM4_Appel)(void) = 0; - - -void Timer_Init(TIM_TypeDef *Timer, unsigned short Autoreload, unsigned short Prescaler) { - if (Timer == TIM1) { - // On ne l'utilise JAMAIS!! - RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; - } - else if (Timer == TIM2) { - TIM2->CR1 |= TIM_CR1_CEN; - RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; - } - else if (Timer == TIM3) { - TIM3->CR1 |= TIM_CR1_CEN; - RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; - } - else if (Timer == TIM4) { - TIM3->CR1 |= TIM_CR1_CEN; - RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; - } - Timer->ARR |= Autoreload; - Timer->PSC |= Prescaler; - Timer->EGR |= TIM_EGR_UG; -} - - - -void MyTimer_ActiveIT(TIM_TypeDef * Timer, char Prio, void(*Interrupt_fonc)(void)) { //On veut créer une fonction qui envoie un signal au cas où il y a debordement, avec une prioritaire, 0 plus importante 15 moins importante - if (Timer == TIM2) { - TIM2_Appel = Interrupt_fonc; - - NVIC_EnableIRQ(TIM2_IRQn); - NVIC_SetPriority(TIM2_IRQn, Prio); - TIM2->DIER |= TIM_DIER_UIE; //Le registre DIER(Interrupt Enable Register) est mis au bit Update Interrupt, qui se commute lors d'un overflow - TIM2->CR1 |= TIM_CR1_CEN; //Clock Enable - } - else if (Timer == TIM3) { - TIM3_Appel = Interrupt_fonc; - - NVIC_EnableIRQ(TIM3_IRQn); - NVIC_SetPriority(TIM2_IRQn, Prio); - TIM3->DIER |= TIM_DIER_UIE; - TIM3->CR1 |= TIM_CR1_CEN; - } - else if (Timer == TIM4) { - TIM4_Appel = Interrupt_fonc; - - NVIC_EnableIRQ(TIM4_IRQn); - NVIC_SetPriority(TIM4_IRQn, Prio); - TIM4->DIER |= TIM_DIER_UIE; - TIM4->CR1 |= TIM_CR1_CEN; - } - else if (Timer == TIM1) { - // On n'utilise pas TIM1 - } - else { - // L'horloge n'existe pas - } -} - -//La fonction TIM2_IRQHandler existe déjà dans le processeur, on l'a juste redifint, tel qu'à chaque overflow on met un bit 1 dans GPIOA_ODR -void TIM2_IRQHandler(void) { //On redefinit le IRQHandler qui est déjà ecrit dans le code source - if (TIM2->SR & TIM_SR_UIF) { //On met le bit de overflow à un dès qu'on a overflow - TIM2->SR &= ~TIM_SR_UIF; //Remise à zero - if (TIM2_Appel){TIM2_Appel();} - } -} - -//La fonction TIM3_IRQHandler existe déjà dans le processeur, on l'a juste redifint, tel qu'à chaque overflow on met un bit 1 dans GPIOA_ODR -void TIM3_IRQHandler(void) { //On redefinit le IRQHandler qui est déjà ecrit dans le code source - if (TIM3->SR & TIM_SR_UIF) { //On met le bit de overflow à un dès qu'on a overflow - TIM3->SR &= ~TIM_SR_UIF; //Remise à zero - if (TIM3_Appel){TIM3_Appel();} - } -} - -//La fonction TIM4_IRQHandler existe déjà dans le processeur, on l'a juste redifint, tel qu'à chaque overflow on met un bit 1 dans GPIOA_ODR -void TIM4_IRQHandler(void) { //On redefinit le IRQHandler qui est déjà ecrit dans le code source - if (TIM4->SR & TIM_SR_UIF) { //On met le bit de overflow à un dès qu'on a overflow - TIM4->SR &= ~TIM_SR_UIF; //Remise à zero - if (TIM4_Appel){TIM4_Appel();} - } -} - - - diff --git a/Pilotes/Source/I2C.c b/Pilotes/Source/I2C.c deleted file mode 100644 index bce50e4..0000000 --- a/Pilotes/Source/I2C.c +++ /dev/null @@ -1,9 +0,0 @@ -#include -#include "I2C.h" - - -void initI2C() { - RCC -> APB1ENR |= 0x1 << 21; // Enable clock - I2C1 -> CR1 |= 0x1 << 0; // Peripheral enable - I2C1 -> CR1 &= ~(0x1 << 1); // I2C mode -} \ No newline at end of file diff --git a/Pilotes/Source/MYGPIO.c b/Pilotes/Source/MYGPIO.c deleted file mode 100644 index a8370d2..0000000 --- a/Pilotes/Source/MYGPIO.c +++ /dev/null @@ -1,95 +0,0 @@ -#include -#include -#include "MYGPIO.h" - - -//FONCTIONS POUR LE DEL INTERNE -void initGPIO_Interne(void) { - RCC->APB2ENR |= (0x01 << 2) | (0x01 << 3) | (0x01 << 4) ; - - //Start - //CRL pour les 8 premiers portes, CRH pour les 8 dernières portes - if (LED_PIN_INTERNE < 8) { - LED_GPIO_INTERNE->CRL &= ~(0xF << (LED_PIN_INTERNE*4)); - LED_GPIO_INTERNE->CRL |= GPIO_OUTPUT_PPULL_MODE<<(LED_PIN_INTERNE*4) ; // On met tous les Pins de broche A à ANalog Input sauf broche PA.5 qui correspond au LED GREEN: Output 2MHz et GP output push-pull - } - else { - LED_GPIO_INTERNE->CRH &= ~(0xF <<((LED_PIN_INTERNE-8)*4)); - LED_GPIO_INTERNE->CRH |= GPIO_OUTPUT_PPULL_MODE<<((LED_PIN_INTERNE-8)*4); - } - - if (BUTTON_PIN_INTERNE < 8) { - BUTTON_GPIO_INTERNE->CRL &= ~(0xF << (BUTTON_PIN_INTERNE*4)); - BUTTON_GPIO_INTERNE->CRL |= GPIO_INPUT_FLOATING_MODE<<(BUTTON_PIN_INTERNE*4) ; // On met tous les Pins de broche A à ANalog Input sauf broche PA.5 qui correspond au LED GREEN: Output 2MHz et GP output push-pull - } - else { - BUTTON_GPIO_INTERNE->CRH &= ~(0xF <<((BUTTON_PIN_INTERNE-8)*4)); - BUTTON_GPIO_INTERNE->CRH |= GPIO_INPUT_FLOATING_MODE<<((BUTTON_PIN_INTERNE-8)*4); - } -} - - -int boutonAppuye_Interne(void) { - return BUTTON_GPIO_INTERNE->IDR &(1<ODR |= (0x01 << LED_PIN_INTERNE) ; //On essaie de mettre en position PA5 de GPIOC_ODR un 1 comme ca allume le LED GREEN -} - - -void eteindreDEL_Interne(void) { // Allumer un LED externe, PB8/D15 OUTPUT, Bouton Poussoir PB9/D14 - LED_GPIO_INTERNE->ODR &= ~(0x01 << LED_PIN_EXTERNE) ; //On essaie de mettre en position PA5 de GPIOC_ODR un 0 comme ca eteint le LED GREEN -} - - -void commuterDEL_Interne(void) { - LED_GPIO_INTERNE->ODR ^= (0x01 << LED_PIN_INTERNE); -} - - - -//FONCTIONS POUR LE DEL EXTERNE -void initGPIO_Externe(void) { - RCC->APB2ENR |= (0x01 << 2) | (0x01 << 3) | (0x01 << 4) ; - - // CRL pour les 8 premiers portes, CRH pour les 8 dernières portes - if (LED_PIN_EXTERNE < 8) { - LED_GPIO_EXTERNE->CRL &= ~(0xF << (LED_PIN_EXTERNE*4)); - LED_GPIO_EXTERNE->CRL |= GPIO_OUTPUT_PPULL_MODE<<(LED_PIN_EXTERNE*4) ; // On met tous les Pins de broche A à ANalog Input sauf broche PA.5 qui correspond au LED GREEN: Output 2MHz et GP output push-pull - } - else { - LED_GPIO_EXTERNE->CRH &= ~(0xF <<((LED_PIN_EXTERNE-8)*4)); - LED_GPIO_EXTERNE->CRH |= GPIO_OUTPUT_PPULL_MODE<<((LED_PIN_EXTERNE-8)*4); - } - if (BUTTON_PIN_EXTERNE < 8) { - BUTTON_GPIO_EXTERNE->CRL &= ~(0xF << (BUTTON_PIN_EXTERNE*4)); - BUTTON_GPIO_EXTERNE->CRL |= GPIO_INPUT_FLOATING_MODE<<(BUTTON_PIN_EXTERNE*4) ; // On met tous les Pins de broche A à ANalog Input sauf broche PA.5 qui correspond au LED GREEN: Output 2MHz et GP output push-pull - } - else { - BUTTON_GPIO_EXTERNE->CRH &= ~(0xF <<((BUTTON_PIN_EXTERNE-8)*4)); - BUTTON_GPIO_EXTERNE->CRH |= GPIO_INPUT_FLOATING_MODE<<((BUTTON_PIN_EXTERNE-8)*4); - } -} - - -int boutonAppuye_Externe(void) { - return BUTTON_GPIO_EXTERNE->IDR &(1<ODR |= (0x01 << LED_PIN_EXTERNE) ; -} - - -void eteindreDEL_Externe(void) { // Allumer un LED externe, PB8/D15 OUTPUT, Bouton Poussoir PB9/D14 - LED_GPIO_EXTERNE->ODR &= ~(0x01 << LED_PIN_EXTERNE) ; // On essaie de mettre en position PA5 de GPIOC_ODR un 0 comme ca eteint le LED GREEN -} - - -void commuterDEL_Externe(void) { - LED_GPIO_EXTERNE->ODR ^= (0x01 << LED_PIN_EXTERNE); -} - diff --git a/Pilotes/Source/MyUart.c b/Pilotes/Source/MyUart.c deleted file mode 100644 index 54889f0..0000000 --- a/Pilotes/Source/MyUart.c +++ /dev/null @@ -1,54 +0,0 @@ -#include -#include "DriverGPIO.h" - - -void My_USART_Config(USART_TypeDef* USARTx, uint32_t baudrate) { //QUE POUR USART_CR1_RE - // Configuration PA9 (Tx) en Alternate Function Push-Pull - MyGPIO_Init(GPIOA, 9 , AltOut_Ppull); - // Configuration PA10 (Rx) en Input Floating - MyGPIO_Init(GPIOA, 10 , In_Floating); - NVIC_EnableIRQ(USART1_IRQn); - NVIC_SetPriority(USART1_IRQn, 3<<4); - - RCC->APB2ENR |= RCC_APB2ENR_USART1EN; - USARTx->CR1 |= USART_CR1_UE; - USARTx->BRR = baudrate; - USARTx->CR1 |= USART_CR1_TE; - USARTx->CR1 |= USART_CR1_RE; -}; - - -void USART_Send_Char(USART_TypeDef* USARTx, char car) { - while ((USARTx->SR & USART_SR_TXE)==0){} - USARTx->DR = car; -}; - - -void USART_Send_String(USART_TypeDef *USARTx, char *pString) { - while (*pString != '\0') { - USART_Send_Char(USARTx, *pString); - pString++; - } -}; - - -void (*pFnc_Receive)(char); - - -void USART_IT_Receive_Enable(USART_TypeDef* USARTx) { - USARTx->CR1 |= USART_CR1_RXNEIE; -}; - - -void Init_IT_Receive(void (*Receive_IT_function) (char)) { - pFnc_Receive = Receive_IT_function; -}; - - -void USART1_IRQHandler(void) { - signed char commande = USART1->DR; - if (pFnc_Receive != 0) { - pFnc_Receive(commande); - } -}; - diff --git a/Pilotes/Source/PWM.c b/Pilotes/Source/PWM.c deleted file mode 100644 index 0a114fd..0000000 --- a/Pilotes/Source/PWM.c +++ /dev/null @@ -1,85 +0,0 @@ -#include "stm32f10x.h" -#include "PWM.h" - - -void MyTimer_PWM(TIM_TypeDef * Timer, int Channel) { - int pwrmd; - #if POWERMODE //Powermode 1 - pwrmd = 0b110; - #else - pwrmd = 0b111; //Powermode 2 - #endif - if (Channel == 1){ - Timer->CCMR1 &= ~(0b111<<4); //On clear les trois bits qui sont de pwm - Timer->CCMR1 |= (pwrmd<<4); //On affecte le powermode au bits de lecture pour le µ-controlleur - Timer->CCMR1 |= TIM_CCMR1_OC1PE; //Update preload, il n'affecte pas le valeur avant que la prochaine cycle - Timer->CCER = TIM_CCER_CC1E; //Enable le pin voulu basculer - } - else if (Channel == 2){ - Timer->CCMR1 &= ~(0b111<<12); //Le TIMx_CCMR1 configure deux channels, de bit [6:4] CH1, [14:12] CH2 (OC2M = Output Channel 2 ) - Timer->CCMR1 |= (pwrmd<<12); - Timer->CCMR1 |= TIM_CCMR1_OC2PE; - Timer->CCER |= TIM_CCER_CC2E; - } - else if (Channel == 3){ - Timer->CCMR1 &= ~(0b111<<4); - Timer->CCMR2 |= (pwrmd<<4); - Timer->CCMR2 |= TIM_CCMR2_OC3PE; - Timer->CCER |= TIM_CCER_CC3E; - } - else if (Channel == 4){ - Timer->CCMR1 &= ~(0b111<<12); - Timer->CCMR2 |= (pwrmd<<12); - Timer->CCMR2 |= TIM_CCMR2_OC4PE; - Timer->CCER |= TIM_CCER_CC4E; - } - - //En dessous d'ici, on a l'aide du plus gentil chat que je connais - // Enable auto-reload preload -- //Ensures that your initial configuration — PWM mode, duty cycle, period — actually takes effect before the timer starts counting. - Timer->CR1 |= TIM_CR1_ARPE; - // Force update event to load ARR and CCR values immediately - Timer->EGR |= TIM_EGR_UG; - // Start the timer - Timer->CR1 |= TIM_CR1_CEN; - - switch (Channel) { - case 1: - if (Timer == TIM1){GPIOA->CRH &= ~(0xF<<0*4); GPIOA->CRH |= (0xA<<0*4); TIM1->BDTR |= 1<<15; } - if (Timer == TIM2){GPIOA->CRL &= ~(0xF<<0*4); GPIOA->CRL |= (0xA<<0*4);} - if (Timer == TIM3){GPIOA->CRL &= ~(0xF<<6*4); GPIOA->CRL |= (0xA<<6*4);} - if (Timer == TIM4){GPIOB->CRL &= ~(0xF<<5*4); GPIOB->CRL |= (0xA<<5*4);} - break; - case 2: - if (Timer == TIM1){GPIOA->CRH &= ~(0xF<<1*4); GPIOA->CRL |= (0xA<<1*4); TIM1->BDTR |= 1<<15;} - if (Timer == TIM2){GPIOA->CRL &= ~(0xF<<1*4); GPIOA->CRL |= (0xA<<1*4);} - if (Timer == TIM3){GPIOA->CRL &= ~(0xF<<7*4); GPIOA->CRL |= (0xA<<7*4);} - if (Timer == TIM4){GPIOB->CRL &= ~(0xF<<7*4); GPIOB->CRL |= (0xA<<7*4);} - break; - case 3: - if (Timer == TIM1){GPIOA->CRH &= ~(0xF<<2*4); GPIOA->CRH |= (0xA<<2*4); TIM1->BDTR |= 1<<15;} - if (Timer == TIM2){GPIOA->CRL &= ~(0xF<<2*4); GPIOA->CRL |= (0xA<<2*4);} - if (Timer == TIM3){GPIOB->CRL &= ~(0xF<<0*4); GPIOB->CRL |= (0xA<<0*4);} - if (Timer == TIM4){GPIOB->CRH &= ~(0xF<<0*4); GPIOB->CRH |= (0xA<<0*4);} - break; - case 4: - if (Timer == TIM1){GPIOA->CRH &= ~(0xF<<3*4); GPIOA->CRH |= (0xA<<3*4); TIM1->BDTR |= 1<<15;} - if (Timer == TIM2){GPIOA->CRL &= ~(0xF<<3*4); GPIOA->CRL |= (0xA<<3*4);} - if (Timer == TIM3){GPIOB->CRL &= ~(0xF<<1*4); GPIOB->CRL |= (0xA<<1*4);} - if (Timer == TIM4){GPIOB->CRH &= ~(0xF<<1*4); GPIOB->CRH |= (0xA<<1*4);} - } -} - - -//Une fonction qui met le bon PWM voulu -int Set_DutyCycle_PWM(TIM_TypeDef *Timer, int Channel, int DutyC){ - int CCR_VAL = (Timer -> ARR + 1) * DutyC / 100; - switch (Channel){ - case 1: Timer->CCR1 = CCR_VAL; - case 2: Timer->CCR2 = CCR_VAL; - case 3: Timer->CCR3 = CCR_VAL; - case 4: Timer->CCR4 = CCR_VAL; - default: break; - } - Timer->EGR |= TIM_EGR_UG; - return 0; -} diff --git a/Pilotes/Source/Plateau.c b/Pilotes/Source/Plateau.c deleted file mode 100644 index 26b55f1..0000000 --- a/Pilotes/Source/Plateau.c +++ /dev/null @@ -1,35 +0,0 @@ -#include "stm32f10x.h" -#include "PWM.h" -#include "DriverGPIO.h" -#include "Horloge.h" - -void initPlato(TIM_TypeDef * Timer, int Channel) { // Config du moteur servo - MyGPIO_Init(GPIOB, 5, AltOut_Ppull); //config pin de direction 0 ou 1 - if (Timer == TIM3) { - Timer_Init(TIM3, 159, 17); // Pour obtenir fréq de 20kHZ - if (Channel == 3) { - MyGPIO_Init(GPIOB, 0, AltOut_Ppull); // Outut push pull alternate, config pin de consigne entre -100 et 100 - MyTimer_PWM(TIM3, 3); //TIM3 CH3 - } - else { - //printf("Ce pilote n'existe pas"); - } - } - else { - //printf("Ce pilote n'existe pas"); - } -} - - -void Update_Motor_PWM(int Consigne, TIM_TypeDef * Timer, int Channel) { - int duty_cycle; - if (Consigne>=0) { - MYGPIO_PinOn(GPIOB, 5); - duty_cycle = Consigne; - } - if (Consigne<0){ - MYGPIO_PinOff(GPIOB,5); - duty_cycle = -Consigne; - } - Set_DutyCycle_PWM(Timer, Channel, duty_cycle); -} diff --git a/ProjetVoilier.uvguix b/ProjetVoilier.uvguix deleted file mode 100644 index b265f70..0000000 --- a/ProjetVoilier.uvguix +++ /dev/null @@ -1,3745 +0,0 @@ - - - - -6.1 - -
    ### uVision Project, (C) Keil Software
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- - - - 0 - 2048 - 1152 - - - - - - 1 - 0 - - 100 - 14 - - .\Pilotes\Source\MyUart.c - 0 - 1 - 4 - 1 - - 0 - - - .\Pilotes\Source\DriverGPIO.c - 55 - 43 - 84 - 1 - - 0 - - - .\Application\principal.c - 17 - 16 - 30 - 1 - - 0 - - - .\Pilotes\Source\Horloge.c - 0 - 23 - 31 - 1 - - 0 - - - RTE/Device/STM32F103RB/startup_stm32f10x_md.s - 0 - 125 - 135 - 1 - - 0 - - - Pilotes\Include\Horloge.h - 0 - 1 - 10 - 1 - - 0 - - - C:\ProgramData\Keil\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h - 0 - 1 - 1 - 1 - - 0 - - - Pilotes\Include\DriverGPIO.h - 15 - 1 - 17 - 1 - - 0 - - - U:\Documents\ProjetVoilier\BE_VOILIER\Pilotes\Source\Plateau.c - 39 - 1 - 20 - 0 - - 0 - - - Pilotes\Include\Plateau.h - 70 - 1 - 4 - 0 - - 0 - - - .\Pilotes\Source\PWM.c - 0 - 1 - 1 - 1 - - 0 - - - Pilotes\Include\MyUart.h - 12 - 1 - 6 - 0 - - 0 - - - .\Services\Source\Girouette.c - 13 - 1 - 15 - 1 - - 0 - - - \\netapp2\jdreschler\Documents\ProjetVoilier\BE_VOILIER\Pilotes\Source\Plateau.c - 22 - 1 - 11 - 1 - - 0 - - - Pilotes\Include\RTC.h - 0 - 1 - 9 - 1 - - 0 - - - - -     diff --git a/ProjetVoilier.uvoptx b/ProjetVoilier.uvoptx deleted file mode 100644 index 272bf8e..0000000 --- a/ProjetVoilier.uvoptx +++ /dev/null @@ -1,554 +0,0 @@ - - - - 1.0 - -
    ### uVision Project, (C) Keil Software
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-Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/girouette.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Timer.h)(0x69407E35) -I (Pilotes\Include\DriverGPIO.h)(0x69407E35) -I (Services\Include\Girouette.h)(0x69407E35) -I (Pilotes\Include\PWM.h)(0x69407E35) -F (.\Pilotes\Source\MyUart.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/myuart.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\DriverGPIO.h)(0x69407E35) -I (Pilotes\Include\MyTimer.h)(0x69407E35) -F (.\Services\Source\Servo.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/servo.o -MMD) -I (Services\Include\Servo.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\DriverGPIO.h)(0x69407E35) -I (Pilotes\Include\PWM.h)(0x69407E35) -I (Pilotes\Include\Horloge.h)(0x69407E35) -F (.\Pilotes\Source\DriverGPIO.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/drivergpio.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\DriverGPIO.h)(0x69407E35) -F (.\Pilotes\Source\Horloge.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/horloge.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Horloge.h)(0x69407E35) -F (.\Pilotes\Source\MYGPIO.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/mygpio.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\MYGPIO.h)(0x69407E35) -F (.\Pilotes\Source\MyTimer.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/mytimer.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Timer.h)(0x69407E35) -I (Pilotes\Include\MyTimer.h)(0x69407E35) -I (Pilotes\Include\PWM.h)(0x69407E35) -I (Pilotes\Include\DriverGPIO.h)(0x69407E35) -I (Pilotes\Include\Horloge.h)(0x69407E35) -F (.\Pilotes\Source\PWM.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/pwm.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\PWM.h)(0x69407E35) -F (.\Pilotes\Source\Timer.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/timer.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\Timer.h)(0x69407E35) -F (.\Pilotes\Source\I2C.c)(0x69407EF8)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/i2c.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Reel\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) -I (Pilotes\Include\I2C.h)(0x69407E35) -F (RTE/Device/STM32F103RB/RTE_Device.h)(0x69407E35)() -F (RTE/Device/STM32F103RB/startup_stm32f10x_md.s)(0x69407E35)(--target=arm-arm-none-eabi -mcpu=cortex-m3 -masm=auto -Wa,armasm,--diag_suppress=A1950W -c -gdwarf-4 -Wa,armasm,--pd,"__EVAL SETA 1" -I ./Services/Include -I ./Services/Source -I ./Pilotes/Include -I ./Pilotes/Source -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -Wa,armasm,--pd,"__UVISION_VERSION SETA 543" -Wa,armasm,--pd,"STM32F10X_MD SETA 1" -Wa,armasm,--pd,"_RTE_ SETA 1" -o ./objects/startup_stm32f10x_md.o) -F (RTE/Device/STM32F103RB/system_stm32f10x.c)(0x69407E35)(-xc --target=arm-arm-none-eabi -mcpu=cortex-m3 -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar -D__EVAL -gdwarf-4 -O0 -ffunction-sections -Wall -Wextra -Wno-packed -Wno-reserved-id-macro -Wno-unused-macros -Wno-documentation-unknown-command -Wno-documentation -Wno-license-management -Wno-parentheses-equality -Wno-reserved-identifier -I./RTE/Device/STM32F103RB -I./RTE/_Simulation -IC:/users/klinx/AppData/Local/Arm/Packs/ARM/CMSIS/6.2.0/CMSIS/Core/Include -IC:/users/klinx/AppData/Local/Arm/Packs/Keil/STM32F1xx_DFP/2.4.1/Device/Include -D__UVISION_VERSION="543" -DSTM32F10X_MD -D_RTE_ -o ./objects/system_stm32f10x.o -MMD) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\stm32f10x.h)(0x68F89DC5) -I (RTE\_Simulation\RTE_Components.h)(0x69407E35) -I (C:\users\klinx\AppData\Local\Arm\Packs\ARM\CMSIS\6.2.0\CMSIS\Core\Include\core_cm3.h)(0x68E55F9D) -I (C:\users\klinx\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include\system_stm32f10x.h)(0x68F89DC5) diff --git a/README.md b/README.md deleted file mode 100644 index c587dc6..0000000 --- a/README.md +++ /dev/null @@ -1,71 +0,0 @@ -# µcontroleurs 4AE-SE 2025 - -Bienvenue dans le projet voilier en µcontroleurs 4AE-SE 2025. - -Velkommen til seilbÃ¥tprosjektet i µkontrollere 4AE-SE 2025. - -Bem vindo ao projeto veleiro de µcontroladores 4AE-SE 2025. - -Welkom bij het microcontroller zeilbootproject 4AE-SE 2025. - - - -License : CC-BY-NC-SA 4.0 - - - -## Les groupes et résponsabilités sont : ->>Nicolas et Jarno : Envoi de UART et PWM dans la bonne fréquence (canal), pour relier le voilier (3.5?) à l'ecran. (3.7) -Ils utilisent les broches PA9 (D8) et PA10 (D2) pour l'USART. - ->>Aleksander et Brage : Acceleromètre par I2C (3.2). La chûte du voilier envoie la commande de faire lâcher les voiles. -Ils utilisent les broches PA4, PA5, PA6 et PA7 pour l'acceleromètre. -PA2 pour la gestion de l'ADC. - ->>Oskar et Tiago : Controler les voiles (3.4) avec les données de la girouette (3.1) -Ils utilisent les broches PA0, PA1 et PA8 pour la girouette et les broches PB8 pour controler les voiles. - ->>En commun : Géstion de la pile avec l'ADC (3.6) et clock interne avec CMOS. (3.3) - - - - - - - -# GIT dans le terminal - -## Comment initialiser son GIT : ->> init git - ->> git config --global user.email "[USER]@insa-toulouse.fr" - ->> git config --global user.name "[NOM]" - ->> git config --global credential.helper manager (Si Windows) - ->> git remote add origin https://git.etud.insa-toulouse.fr/johnse/BE_VOILIER.git - - -## Comment PULL : - ->> git pull - ->> git switch [BRANCHE] - - -## Comment PUSH : - ->> git add [NOMDUFICHIER] - ->> git commit -m "[COMMENTAIRE]" - ->> git push -u origin [BRANCHE] - - - -# Inspiration - -Le voilier Sørlandet au large des côtes canadiennes - -Le voilier Sørlandet au large des côtes canadiennes diff --git a/RTE/Device/STM32F103RB/RTE_Device.h b/RTE/Device/STM32F103RB/RTE_Device.h deleted file mode 100644 index 70c8002..0000000 --- a/RTE/Device/STM32F103RB/RTE_Device.h +++ /dev/null @@ -1,1828 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All - * rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * - * $Date: 09. September 2016 - * $Revision: V1.1.2 - * - * Project: RTE Device Configuration for STMicroelectronics STM32F1xx - * - * -------------------------------------------------------------------------- */ - -//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- - -#ifndef __RTE_DEVICE_H -#define __RTE_DEVICE_H - - -#define GPIO_PORT(num) \ - ((num == 0) ? GPIOA : \ - (num == 1) ? GPIOB : \ - (num == 2) ? GPIOC : \ - (num == 3) ? GPIOD : \ - (num == 4) ? GPIOE : \ - (num == 5) ? GPIOF : \ - (num == 6) ? GPIOG : \ - NULL) - - -// Clock Configuration -// High-speed Internal Clock <1-999999999> -#define RTE_HSI 8000000 -// High-speed External Clock <1-999999999> -#define RTE_HSE 25000000 -// System Clock <1-999999999> -#define RTE_SYSCLK 72000000 -// HCLK Clock <1-999999999> -#define RTE_HCLK 72000000 -// APB1 Clock <1-999999999> -#define RTE_PCLK1 36000000 -// APB2 Clock <1-999999999> -#define RTE_PCLK2 72000000 -// ADC Clock <1-999999999> -#define RTE_ADCCLK 36000000 -// USB Clock -#define RTE_USBCLK 48000000 -// - - -// USART1 (Universal synchronous asynchronous receiver transmitter) -// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART -#define RTE_USART1 0 - -// USART1_TX Pin <0=>Not Used <1=>PA9 -#define RTE_USART1_TX_PORT_ID_DEF 0 -#if (RTE_USART1_TX_PORT_ID_DEF == 0) -#define RTE_USART1_TX_DEF 0 -#elif (RTE_USART1_TX_PORT_ID_DEF == 1) -#define RTE_USART1_TX_DEF 1 -#define RTE_USART1_TX_PORT_DEF GPIOA -#define RTE_USART1_TX_BIT_DEF 9 -#else -#error "Invalid USART1_TX Pin Configuration!" -#endif - -// USART1_RX Pin <0=>Not Used <1=>PA10 -#define RTE_USART1_RX_PORT_ID_DEF 0 -#if (RTE_USART1_RX_PORT_ID_DEF == 0) -#define RTE_USART1_RX_DEF 0 -#elif (RTE_USART1_RX_PORT_ID_DEF == 1) -#define RTE_USART1_RX_DEF 1 -#define RTE_USART1_RX_PORT_DEF GPIOA -#define RTE_USART1_RX_BIT_DEF 10 -#else -#error "Invalid USART1_RX Pin Configuration!" -#endif - -// USART1_CK Pin <0=>Not Used <1=>PA8 -#define RTE_USART1_CK_PORT_ID_DEF 0 -#if (RTE_USART1_CK_PORT_ID_DEF == 0) -#define RTE_USART1_CK 0 -#elif (RTE_USART1_CK_PORT_ID_DEF == 1) -#define RTE_USART1_CK 1 -#define RTE_USART1_CK_PORT_DEF GPIOA -#define RTE_USART1_CK_BIT_DEF 8 -#else -#error "Invalid USART1_CK Pin Configuration!" -#endif - -// USART1_CTS Pin <0=>Not Used <1=>PA11 -#define RTE_USART1_CTS_PORT_ID_DEF 0 -#if (RTE_USART1_CTS_PORT_ID_DEF == 0) -#define RTE_USART1_CTS 0 -#elif (RTE_USART1_CTS_PORT_ID_DEF == 1) -#define RTE_USART1_CTS 1 -#define RTE_USART1_CTS_PORT_DEF GPIOA -#define RTE_USART1_CTS_BIT_DEF 11 -#else -#error "Invalid USART1_CTS Pin Configuration!" -#endif - -// USART1_RTS Pin <0=>Not Used <1=>PA12 -#define RTE_USART1_RTS_PORT_ID_DEF 0 -#if (RTE_USART1_RTS_PORT_ID_DEF == 0) -#define RTE_USART1_RTS 0 -#elif (RTE_USART1_RTS_PORT_ID_DEF == 1) -#define RTE_USART1_RTS 1 -#define RTE_USART1_RTS_PORT_DEF GPIOA -#define RTE_USART1_RTS_BIT_DEF 12 -#else -#error "Invalid USART1_RTS Pin Configuration!" -#endif - -// USART1 Pin Remap -// Enable USART1 Pin Remapping -#define RTE_USART1_REMAP_FULL 0 - -// USART1_TX Pin <0=>Not Used <1=>PB6 -#define RTE_USART1_TX_PORT_ID_FULL 0 -#if (RTE_USART1_TX_PORT_ID_FULL == 0) -#define RTE_USART1_TX_FULL 0 -#elif (RTE_USART1_TX_PORT_ID_FULL == 1) -#define RTE_USART1_TX_FULL 1 -#define RTE_USART1_TX_PORT_FULL GPIOB -#define RTE_USART1_TX_BIT_FULL 6 -#else -#error "Invalid USART1_TX Pin Configuration!" -#endif - -// USART1_RX Pin <0=>Not Used <1=>PB7 -#define RTE_USART1_RX_PORT_ID_FULL 0 -#if (RTE_USART1_RX_PORT_ID_FULL == 0) -#define RTE_USART1_RX_FULL 0 -#elif (RTE_USART1_RX_PORT_ID_FULL == 1) -#define RTE_USART1_RX_FULL 1 -#define RTE_USART1_RX_PORT_FULL GPIOB -#define RTE_USART1_RX_BIT_FULL 7 -#else -#error "Invalid USART1_RX Pin Configuration!" -#endif -// - -#if (RTE_USART1_REMAP_FULL) -#define RTE_USART1_AF_REMAP AFIO_USART1_REMAP -#define RTE_USART1_TX RTE_USART1_TX_FULL -#define RTE_USART1_TX_PORT RTE_USART1_TX_PORT_FULL -#define RTE_USART1_TX_BIT RTE_USART1_TX_BIT_FULL -#define RTE_USART1_RX RTE_USART1_RX_FULL -#define RTE_USART1_RX_PORT RTE_USART1_RX_PORT_FULL -#define RTE_USART1_RX_BIT RTE_USART1_RX_BIT_FULL -#define RTE_USART1_CK_PORT RTE_USART1_CK_PORT_DEF -#define RTE_USART1_CK_BIT RTE_USART1_CK_BIT_DEF -#define RTE_USART1_CTS_PORT RTE_USART1_CTS_PORT_DEF -#define RTE_USART1_CTS_BIT RTE_USART1_CTS_BIT_DEF -#define RTE_USART1_RTS_PORT RTE_USART1_RTS_PORT_DEF -#define RTE_USART1_RTS_BIT RTE_USART1_RTS_BIT_DEF -#else -#define RTE_USART1_AF_REMAP AFIO_USART1_NO_REMAP -#define RTE_USART1_TX RTE_USART1_TX_DEF -#define RTE_USART1_TX_PORT RTE_USART1_TX_PORT_DEF -#define RTE_USART1_TX_BIT RTE_USART1_TX_BIT_DEF -#define RTE_USART1_RX RTE_USART1_RX_DEF -#define RTE_USART1_RX_PORT RTE_USART1_RX_PORT_DEF -#define RTE_USART1_RX_BIT RTE_USART1_RX_BIT_DEF -#define RTE_USART1_CK_PORT RTE_USART1_CK_PORT_DEF -#define RTE_USART1_CK_BIT RTE_USART1_CK_BIT_DEF -#define RTE_USART1_CTS_PORT RTE_USART1_CTS_PORT_DEF -#define RTE_USART1_CTS_BIT RTE_USART1_CTS_BIT_DEF -#define RTE_USART1_RTS_PORT RTE_USART1_RTS_PORT_DEF -#define RTE_USART1_RTS_BIT RTE_USART1_RTS_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART1_RX_DMA 0 -#define RTE_USART1_RX_DMA_NUMBER 1 -#define RTE_USART1_RX_DMA_CHANNEL 5 -#define RTE_USART1_RX_DMA_PRIORITY 0 -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART1_TX_DMA 0 -#define RTE_USART1_TX_DMA_NUMBER 1 -#define RTE_USART1_TX_DMA_CHANNEL 4 -#define RTE_USART1_TX_DMA_PRIORITY 0 -// - - -// USART2 (Universal synchronous asynchronous receiver transmitter) -// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART -#define RTE_USART2 0 - -// USART2_TX Pin <0=>Not Used <1=>PA2 -#define RTE_USART2_TX_PORT_ID_DEF 0 -#if (RTE_USART2_TX_PORT_ID_DEF == 0) -#define RTE_USART2_TX_DEF 0 -#elif (RTE_USART2_TX_PORT_ID_DEF == 1) -#define RTE_USART2_TX_DEF 1 -#define RTE_USART2_TX_PORT_DEF GPIOA -#define RTE_USART2_TX_BIT_DEF 2 -#else -#error "Invalid USART2_TX Pin Configuration!" -#endif - -// USART2_RX Pin <0=>Not Used <1=>PA3 -#define RTE_USART2_RX_PORT_ID_DEF 0 -#if (RTE_USART2_RX_PORT_ID_DEF == 0) -#define RTE_USART2_RX_DEF 0 -#elif (RTE_USART2_RX_PORT_ID_DEF == 1) -#define RTE_USART2_RX_DEF 1 -#define RTE_USART2_RX_PORT_DEF GPIOA -#define RTE_USART2_RX_BIT_DEF 3 -#else -#error "Invalid USART2_RX Pin Configuration!" -#endif - -// USART2_CK Pin <0=>Not Used <1=>PA4 -#define RTE_USART2_CK_PORT_ID_DEF 0 -#if (RTE_USART2_CK_PORT_ID_DEF == 0) -#define RTE_USART2_CK_DEF 0 -#elif (RTE_USART2_CK_PORT_ID_DEF == 1) -#define RTE_USART2_CK_DEF 1 -#define RTE_USART2_CK_PORT_DEF GPIOA -#define RTE_USART2_CK_BIT_DEF 4 -#else -#error "Invalid USART2_CK Pin Configuration!" -#endif - -// USART2_CTS Pin <0=>Not Used <1=>PA0 -#define RTE_USART2_CTS_PORT_ID_DEF 0 -#if (RTE_USART2_CTS_PORT_ID_DEF == 0) -#define RTE_USART2_CTS_DEF 0 -#elif (RTE_USART2_CTS_PORT_ID_DEF == 1) -#define RTE_USART2_CTS_DEF 1 -#define RTE_USART2_CTS_PORT_DEF GPIOA -#define RTE_USART2_CTS_BIT_DEF 0 -#else -#error "Invalid USART2_CTS Pin Configuration!" -#endif - -// USART2_RTS Pin <0=>Not Used <1=>PA1 -#define RTE_USART2_RTS_PORT_ID_DEF 0 -#if (RTE_USART2_RTS_PORT_ID_DEF == 0) -#define RTE_USART2_RTS_DEF 0 -#elif (RTE_USART2_RTS_PORT_ID_DEF == 1) -#define RTE_USART2_RTS_DEF 1 -#define RTE_USART2_RTS_PORT_DEF GPIOA -#define RTE_USART2_RTS_BIT_DEF 1 -#else -#error "Invalid USART2_RTS Pin Configuration!" -#endif - -// USART2 Pin Remap -// Enable USART2 Pin Remapping -#define RTE_USART2_REMAP_FULL 0 - -// USART2_TX Pin <0=>Not Used <1=>PD5 -#define RTE_USART2_TX_PORT_ID_FULL 0 -#if (RTE_USART2_TX_PORT_ID_FULL == 0) -#define RTE_USART2_TX_FULL 0 -#elif (RTE_USART2_TX_PORT_ID_FULL == 1) -#define RTE_USART2_TX_FULL 1 -#define RTE_USART2_TX_PORT_FULL GPIOD -#define RTE_USART2_TX_BIT_FULL 5 -#else -#error "Invalid USART2_TX Pin Configuration!" -#endif - -// USART2_RX Pin <0=>Not Used <1=>PD6 -#define RTE_USART2_RX_PORT_ID_FULL 0 -#if (RTE_USART2_RX_PORT_ID_FULL == 0) -#define RTE_USART2_RX_FULL 0 -#elif (RTE_USART2_RX_PORT_ID_FULL == 1) -#define RTE_USART2_RX_FULL 1 -#define RTE_USART2_RX_PORT_FULL GPIOD -#define RTE_USART2_RX_BIT_FULL 6 -#else -#error "Invalid USART2_RX Pin Configuration!" -#endif - -// USART2_CK Pin <0=>Not Used <1=>PD7 -#define RTE_USART2_CK_PORT_ID_FULL 0 -#if (RTE_USART2_CK_PORT_ID_FULL == 0) -#define RTE_USART2_CK_FULL 0 -#elif (RTE_USART2_CK_PORT_ID_FULL == 1) -#define RTE_USART2_CK_FULL 1 -#define RTE_USART2_CK_PORT_FULL GPIOD -#define RTE_USART2_CK_BIT_FULL 7 -#else -#error "Invalid USART2_CK Pin Configuration!" -#endif - -// USART2_CTS Pin <0=>Not Used <1=>PD3 -#define RTE_USART2_CTS_PORT_ID_FULL 0 -#if (RTE_USART2_CTS_PORT_ID_FULL == 0) -#define RTE_USART2_CTS_FULL 0 -#elif (RTE_USART2_CTS_PORT_ID_FULL == 1) -#define RTE_USART2_CTS_FULL 1 -#define RTE_USART2_CTS_PORT_FULL GPIOD -#define RTE_USART2_CTS_BIT_FULL 3 -#else -#error "Invalid USART2_CTS Pin Configuration!" -#endif - -// USART2_RTS Pin <0=>Not Used <1=>PD4 -#define RTE_USART2_RTS_PORT_ID_FULL 0 -#if (RTE_USART2_RTS_PORT_ID_FULL == 0) -#define RTE_USART2_RTS_FULL 0 -#elif (RTE_USART2_RTS_PORT_ID_FULL == 1) -#define RTE_USART2_RTS_FULL 1 -#define RTE_USART2_RTS_PORT_FULL GPIOD -#define RTE_USART2_RTS_BIT_FULL 4 -#else -#error "Invalid USART2_RTS Pin Configuration!" -#endif -// - -#if (RTE_USART2_REMAP_FULL) -#define RTE_USART2_AF_REMAP AFIO_USART2_REMAP -#define RTE_USART2_TX RTE_USART2_TX_FULL -#define RTE_USART2_TX_PORT RTE_USART2_TX_PORT_FULL -#define RTE_USART2_TX_BIT RTE_USART2_TX_BIT_FULL -#define RTE_USART2_RX RTE_USART2_RX_FULL -#define RTE_USART2_RX_PORT RTE_USART2_RX_PORT_FULL -#define RTE_USART2_RX_BIT RTE_USART2_RX_BIT_FULL -#define RTE_USART2_CK RTE_USART2_CK_FULL -#define RTE_USART2_CK_PORT RTE_USART2_CK_PORT_FULL -#define RTE_USART2_CK_BIT RTE_USART2_CK_BIT_FULL -#define RTE_USART2_CTS RTE_USART2_CTS_FULL -#define RTE_USART2_CTS_PORT RTE_USART2_CTS_PORT_FULL -#define RTE_USART2_CTS_BIT RTE_USART2_CTS_BIT_FULL -#define RTE_USART2_RTS RTE_USART2_RTS_FULL -#define RTE_USART2_RTS_PORT RTE_USART2_RTS_PORT_FULL -#define RTE_USART2_RTS_BIT RTE_USART2_RTS_BIT_FULL -#else -#define RTE_USART2_AF_REMAP AFIO_USART2_NO_REMAP -#define RTE_USART2_TX RTE_USART2_TX_DEF -#define RTE_USART2_TX_PORT RTE_USART2_TX_PORT_DEF -#define RTE_USART2_TX_BIT RTE_USART2_TX_BIT_DEF -#define RTE_USART2_RX RTE_USART2_RX_DEF -#define RTE_USART2_RX_PORT RTE_USART2_RX_PORT_DEF -#define RTE_USART2_RX_BIT RTE_USART2_RX_BIT_DEF -#define RTE_USART2_CK RTE_USART2_CK_DEF -#define RTE_USART2_CK_PORT RTE_USART2_CK_PORT_DEF -#define RTE_USART2_CK_BIT RTE_USART2_CK_BIT_DEF -#define RTE_USART2_CTS RTE_USART2_CTS_DEF -#define RTE_USART2_CTS_PORT RTE_USART2_CTS_PORT_DEF -#define RTE_USART2_CTS_BIT RTE_USART2_CTS_BIT_DEF -#define RTE_USART2_RTS RTE_USART2_RTS_DEF -#define RTE_USART2_RTS_PORT RTE_USART2_RTS_PORT_DEF -#define RTE_USART2_RTS_BIT RTE_USART2_RTS_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <6=>6 -// Selects DMA Channel (only Channel 6 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART2_RX_DMA 0 -#define RTE_USART2_RX_DMA_NUMBER 1 -#define RTE_USART2_RX_DMA_CHANNEL 6 -#define RTE_USART2_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <7=>7 -// Selects DMA Channel (only Channel 7 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART2_TX_DMA 0 -#define RTE_USART2_TX_DMA_NUMBER 1 -#define RTE_USART2_TX_DMA_CHANNEL 7 -#define RTE_USART2_TX_DMA_PRIORITY 0 - -// - - -// USART3 (Universal synchronous asynchronous receiver transmitter) -// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART -#define RTE_USART3 0 - -// USART3_TX Pin <0=>Not Used <1=>PB10 -#define RTE_USART3_TX_PORT_ID_DEF 0 -#if (RTE_USART3_TX_PORT_ID_DEF == 0) -#define RTE_USART3_TX_DEF 0 -#elif (RTE_USART3_TX_PORT_ID_DEF == 1) -#define RTE_USART3_TX_DEF 1 -#define RTE_USART3_TX_PORT_DEF GPIOB -#define RTE_USART3_TX_BIT_DEF 10 -#else -#error "Invalid USART3_TX Pin Configuration!" -#endif - -// USART3_RX Pin <0=>Not Used <1=>PB11 -#define RTE_USART3_RX_PORT_ID_DEF 0 -#if (RTE_USART3_RX_PORT_ID_DEF == 0) -#define RTE_USART3_RX_DEF 0 -#elif (RTE_USART3_RX_PORT_ID_DEF == 1) -#define RTE_USART3_RX_DEF 1 -#define RTE_USART3_RX_PORT_DEF GPIOB -#define RTE_USART3_RX_BIT_DEF 11 -#else -#error "Invalid USART3_RX Pin Configuration!" -#endif - -// USART3_CK Pin <0=>Not Used <1=>PB12 -#define RTE_USART3_CK_PORT_ID_DEF 0 -#if (RTE_USART3_CK_PORT_ID_DEF == 0) -#define RTE_USART3_CK_DEF 0 -#elif (RTE_USART3_CK_PORT_ID_DEF == 1) -#define RTE_USART3_CK_DEF 1 -#define RTE_USART3_CK_PORT_DEF GPIOB -#define RTE_USART3_CK_BIT_DEF 12 -#else -#error "Invalid USART3_CK Pin Configuration!" -#endif - -// USART3_CTS Pin <0=>Not Used <1=>PB13 -#define RTE_USART3_CTS_PORT_ID_DEF 0 -#if (RTE_USART3_CTS_PORT_ID_DEF == 0) -#define RTE_USART3_CTS_DEF 0 -#elif (RTE_USART3_CTS_PORT_ID_DEF == 1) -#define RTE_USART3_CTS_DEF 1 -#define RTE_USART3_CTS_PORT_DEF GPIOB -#define RTE_USART3_CTS_BIT_DEF 13 -#else -#error "Invalid USART3_CTS Pin Configuration!" -#endif - -// USART3_RTS Pin <0=>Not Used <1=>PB14 -#define RTE_USART3_RTS_PORT_ID_DEF 0 -#if (RTE_USART3_RTS_PORT_ID_DEF == 0) -#define RTE_USART3_RTS_DEF 0 -#elif (RTE_USART3_RTS_PORT_ID_DEF == 1) -#define RTE_USART3_RTS_DEF 1 -#define RTE_USART3_RTS_PORT_DEF GPIOB -#define RTE_USART3_RTS_BIT_DEF 14 -#else -#error "Invalid USART3_RTS Pin Configuration!" -#endif - -// USART3 Partial Pin Remap -// Enable USART3 Partial Pin Remapping -#define RTE_USART3_REMAP_PARTIAL 0 - -// USART3_TX Pin <0=>Not Used <1=>PC10 -#define RTE_USART3_TX_PORT_ID_PARTIAL 0 -#if (RTE_USART3_TX_PORT_ID_PARTIAL == 0) -#define RTE_USART3_TX_PARTIAL 0 -#elif (RTE_USART3_TX_PORT_ID_PARTIAL == 1) -#define RTE_USART3_TX_PARTIAL 1 -#define RTE_USART3_TX_PORT_PARTIAL GPIOC -#define RTE_USART3_TX_BIT_PARTIAL 10 -#else -#error "Invalid USART3_TX Pin Configuration!" -#endif - -// USART3_RX Pin <0=>Not Used <1=>PC11 -#define RTE_USART3_RX_PORT_ID_PARTIAL 0 -#if (RTE_USART3_RX_PORT_ID_PARTIAL == 0) -#define RTE_USART3_RX_PARTIAL 0 -#elif (RTE_USART3_RX_PORT_ID_PARTIAL == 1) -#define RTE_USART3_RX_PARTIAL 1 -#define RTE_USART3_RX_PORT_PARTIAL GPIOC -#define RTE_USART3_RX_BIT_PARTIAL 11 -#else -#error "Invalid USART3_RX Pin Configuration!" -#endif - -// USART3_CK Pin <0=>Not Used <1=>PC12 -#define RTE_USART3_CK_PORT_ID_PARTIAL 0 -#if (RTE_USART3_CK_PORT_ID_PARTIAL == 0) -#define RTE_USART3_CK_PARTIAL 0 -#elif (RTE_USART3_CK_PORT_ID_PARTIAL == 1) -#define RTE_USART3_CK_PARTIAL 1 -#define RTE_USART3_CK_PORT_PARTIAL GPIOC -#define RTE_USART3_CK_BIT_PARTIAL 12 -#else -#error "Invalid USART3_CK Pin Configuration!" -#endif -// - -// USART3 Full Pin Remap -// Enable USART3 Full Pin Remapping -#define RTE_USART3_REMAP_FULL 0 - -// USART3_TX Pin <0=>Not Used <1=>PD8 -#define RTE_USART3_TX_PORT_ID_FULL 0 -#if (RTE_USART3_TX_PORT_ID_FULL == 0) -#define RTE_USART3_TX_FULL 0 -#elif (RTE_USART3_TX_PORT_ID_FULL == 1) -#define RTE_USART3_TX_FULL 1 -#define RTE_USART3_TX_PORT_FULL GPIOD -#define RTE_USART3_TX_BIT_FULL 8 -#else -#error "Invalid USART3_TX Pin Configuration!" -#endif - -// USART3_RX Pin <0=>Not Used <1=>PD9 -#define RTE_USART3_RX_PORT_ID_FULL 0 -#if (RTE_USART3_RX_PORT_ID_FULL == 0) -#define RTE_USART3_RX_FULL 0 -#elif (RTE_USART3_RX_PORT_ID_FULL == 1) -#define RTE_USART3_RX_FULL 1 -#define RTE_USART3_RX_PORT_FULL GPIOD -#define RTE_USART3_RX_BIT_FULL 9 -#else -#error "Invalid USART3_RX Pin Configuration!" -#endif - -// USART3_CK Pin <0=>Not Used <1=>PD10 -#define RTE_USART3_CK_PORT_ID_FULL 0 -#if (RTE_USART3_CK_PORT_ID_FULL == 0) -#define RTE_USART3_CK_FULL 0 -#elif (RTE_USART3_CK_PORT_ID_FULL == 1) -#define RTE_USART3_CK_FULL 1 -#define RTE_USART3_CK_PORT_FULL GPIOD -#define RTE_USART3_CK_BIT_FULL 10 -#else -#error "Invalid USART3_CK Pin Configuration!" -#endif - -// USART3_CTS Pin <0=>Not Used <1=>PD11 -#define RTE_USART3_CTS_PORT_ID_FULL 0 -#if (RTE_USART3_CTS_PORT_ID_FULL == 0) -#define RTE_USART3_CTS_FULL 0 -#elif (RTE_USART3_CTS_PORT_ID_FULL == 1) -#define RTE_USART3_CTS_FULL 1 -#define RTE_USART3_CTS_PORT_FULL GPIOD -#define RTE_USART3_CTS_BIT_FULL 11 -#else -#error "Invalid USART3_CTS Pin Configuration!" -#endif - -// USART3_RTS Pin <0=>Not Used <1=>PD12 -#define RTE_USART3_RTS_PORT_ID_FULL 0 -#if (RTE_USART3_RTS_PORT_ID_FULL == 0) -#define RTE_USART3_RTS_FULL 0 -#elif (RTE_USART3_RTS_PORT_ID_FULL == 1) -#define RTE_USART3_RTS_FULL 1 -#define RTE_USART3_RTS_PORT_FULL GPIOD -#define RTE_USART3_RTS_BIT_FULL 12 -#else -#error "Invalid USART3_RTS Pin Configuration!" -#endif -// - -#if ((RTE_USART3_REMAP_PARTIAL == 1) && (RTE_USART3_REMAP_FULL == 1)) -#error "Invalid USART3 Pin Remap Configuration!" -#endif - -#if (RTE_USART3_REMAP_FULL) -#define RTE_USART3_AF_REMAP AFIO_USART3_REMAP_FULL -#define RTE_USART3_TX RTE_USART3_TX_FULL -#define RTE_USART3_TX_PORT RTE_USART3_TX_PORT_FULL -#define RTE_USART3_TX_BIT RTE_USART3_TX_BIT_FULL -#define RTE_USART3_RX RTE_USART3_RX_FULL -#define RTE_USART3_RX_PORT RTE_USART3_RX_PORT_FULL -#define RTE_USART3_RX_BIT RTE_USART3_RX_BIT_FULL -#define RTE_USART3_CK RTE_USART3_CK_FULL -#define RTE_USART3_CK_PORT RTE_USART3_CK_PORT_FULL -#define RTE_USART3_CK_BIT RTE_USART3_CK_BIT_FULL -#define RTE_USART3_CTS RTE_USART3_CTS_FULL -#define RTE_USART3_CTS_PORT RTE_USART3_CTS_PORT_FULL -#define RTE_USART3_CTS_BIT RTE_USART3_CTS_BIT_FULL -#define RTE_USART3_RTS RTE_USART3_RTS_FULL -#define RTE_USART3_RTS_PORT RTE_USART3_RTS_PORT_FULL -#define RTE_USART3_RTS_BIT RTE_USART3_RTS_BIT_FULL -#elif (RTE_USART3_REMAP_PARTIAL) -#define RTE_USART3_AF_REMAP AFIO_USART3_REMAP_PARTIAL -#define RTE_USART3_TX RTE_USART3_TX_PARTIAL -#define RTE_USART3_TX_PORT RTE_USART3_TX_PORT_PARTIAL -#define RTE_USART3_TX_BIT RTE_USART3_TX_BIT_PARTIAL -#define RTE_USART3_RX RTE_USART3_RX_PARTIAL -#define RTE_USART3_RX_PORT RTE_USART3_RX_PORT_PARTIAL -#define RTE_USART3_RX_BIT RTE_USART3_RX_BIT_PARTIAL -#define RTE_USART3_CK RTE_USART3_CK_PARTIAL -#define RTE_USART3_CK_PORT RTE_USART3_CK_PORT_PARTIAL -#define RTE_USART3_CK_BIT RTE_USART3_CK_BIT_PARTIAL -#define RTE_USART3_CTS RTE_USART3_CTS_DEF -#define RTE_USART3_CTS_PORT RTE_USART3_CTS_PORT_DEF -#define RTE_USART3_CTS_BIT RTE_USART3_CTS_BIT_DEF -#define RTE_USART3_RTS RTE_USART3_RTS_DEF -#define RTE_USART3_RTS_PORT RTE_USART3_RTS_PORT_DEF -#define RTE_USART3_RTS_BIT RTE_USART3_RTS_BIT_DEF -#else -#define RTE_USART3_AF_REMAP AFIO_USART3_NO_REMAP -#define RTE_USART3_TX RTE_USART3_TX_DEF -#define RTE_USART3_TX_PORT RTE_USART3_TX_PORT_DEF -#define RTE_USART3_TX_BIT RTE_USART3_TX_BIT_DEF -#define RTE_USART3_RX RTE_USART3_RX_DEF -#define RTE_USART3_RX_PORT RTE_USART3_RX_PORT_DEF -#define RTE_USART3_RX_BIT RTE_USART3_RX_BIT_DEF -#define RTE_USART3_CK RTE_USART3_CK_DEF -#define RTE_USART3_CK_PORT RTE_USART3_CK_PORT_DEF -#define RTE_USART3_CK_BIT RTE_USART3_CK_BIT_DEF -#define RTE_USART3_CTS RTE_USART3_CTS_DEF -#define RTE_USART3_CTS_PORT RTE_USART3_CTS_PORT_DEF -#define RTE_USART3_CTS_BIT RTE_USART3_CTS_BIT_DEF -#define RTE_USART3_RTS RTE_USART3_RTS_DEF -#define RTE_USART3_RTS_PORT RTE_USART3_RTS_PORT_DEF -#define RTE_USART3_RTS_BIT RTE_USART3_RTS_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <3=>3 -// Selects DMA Channel (only Channel 3 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_USART3_RX_DMA 0 -#define RTE_USART3_RX_DMA_NUMBER 1 -#define RTE_USART3_RX_DMA_CHANNEL 3 -#define RTE_USART3_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <2=>2 -// Selects DMA Channel (only Channel 2 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_USART3_TX_DMA 0 -#define RTE_USART3_TX_DMA_NUMBER 1 -#define RTE_USART3_TX_DMA_CHANNEL 2 -#define RTE_USART3_TX_DMA_PRIORITY 0 - -// - - -// UART4 (Universal asynchronous receiver transmitter) -// Configuration settings for Driver_USART4 in component ::CMSIS Driver:USART -#define RTE_UART4 0 -#define RTE_UART4_AF_REMAP AFIO_UNAVAILABLE_REMAP - -// UART4_TX Pin <0=>Not Used <1=>PC10 -#define RTE_UART4_TX_ID 0 -#if (RTE_UART4_TX_ID == 0) -#define RTE_UART4_TX 0 -#elif (RTE_UART4_TX_ID == 1) -#define RTE_UART4_TX 1 -#define RTE_UART4_TX_PORT GPIOC -#define RTE_UART4_TX_BIT 10 -#else -#error "Invalid UART4_TX Pin Configuration!" -#endif - -// UART4_RX Pin <0=>Not Used <1=>PC11 -#define RTE_UART4_RX_ID 0 -#if (RTE_UART4_RX_ID == 0) -#define RTE_UART4_RX 0 -#elif (RTE_UART4_RX_ID == 1) -#define RTE_UART4_RX 1 -#define RTE_UART4_RX_PORT GPIOC -#define RTE_UART4_RX_BIT 11 -#else -#error "Invalid UART4_RX Pin Configuration!" -#endif - - -// DMA Rx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <3=>3 -// Selects DMA Channel (only Channel 3 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_UART4_RX_DMA 0 -#define RTE_UART4_RX_DMA_NUMBER 2 -#define RTE_UART4_RX_DMA_CHANNEL 3 -#define RTE_UART4_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_UART4_TX_DMA 0 -#define RTE_UART4_TX_DMA_NUMBER 2 -#define RTE_UART4_TX_DMA_CHANNEL 5 -#define RTE_UART4_TX_DMA_PRIORITY 0 - -// - - -// UART5 (Universal asynchronous receiver transmitter) -// Configuration settings for Driver_USART5 in component ::CMSIS Driver:USART -#define RTE_UART5 0 -#define RTE_UART5_AF_REMAP AFIO_UNAVAILABLE_REMAP - -// UART5_TX Pin <0=>Not Used <1=>PC12 -#define RTE_UART5_TX_ID 0 -#if (RTE_UART5_TX_ID == 0) -#define RTE_UART5_TX 0 -#elif (RTE_UART5_TX_ID == 1) -#define RTE_UART5_TX 1 -#define RTE_UART5_TX_PORT GPIOC -#define RTE_UART5_TX_BIT 12 -#else -#error "Invalid UART5_TX Pin Configuration!" -#endif - -// UART5_RX Pin <0=>Not Used <1=>PD2 -#define RTE_UART5_RX_ID 0 -#if (RTE_UART5_RX_ID == 0) -#define RTE_UART5_RX 0 -#elif (RTE_UART5_RX_ID == 1) -#define RTE_UART5_RX 1 -#define RTE_UART5_RX_PORT GPIOD -#define RTE_UART5_RX_BIT 2 -#else -#error "Invalid UART5_RX Pin Configuration!" -#endif -// - - -// I2C1 (Inter-integrated Circuit Interface 1) -// Configuration settings for Driver_I2C1 in component ::CMSIS Driver:I2C -#define RTE_I2C1 0 - -// I2C1_SCL Pin <0=>PB6 -#define RTE_I2C1_SCL_PORT_ID_DEF 0 -#if (RTE_I2C1_SCL_PORT_ID_DEF == 0) -#define RTE_I2C1_SCL_PORT_DEF GPIOB -#define RTE_I2C1_SCL_BIT_DEF 6 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// I2C1_SDA Pin <0=>PB7 -#define RTE_I2C1_SDA_PORT_ID_DEF 0 -#if (RTE_I2C1_SDA_PORT_ID_DEF == 0) -#define RTE_I2C1_SDA_PORT_DEF GPIOB -#define RTE_I2C1_SDA_BIT_DEF 7 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// I2C1 Pin Remap -// Enable I2C1 Pin Remapping -#define RTE_I2C1_REMAP_FULL 0 - -// I2C1_SCL Pin <0=>PB8 -#define RTE_I2C1_SCL_PORT_ID_FULL 0 -#if (RTE_I2C1_SCL_PORT_ID_FULL == 0) -#define RTE_I2C1_SCL_PORT_FULL GPIOB -#define RTE_I2C1_SCL_BIT_FULL 8 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// I2C1_SDA Pin <0=>PB9 -#define RTE_I2C1_SDA_PORT_ID_FULL 0 -#if (RTE_I2C1_SDA_PORT_ID_FULL == 0) -#define RTE_I2C1_SDA_PORT_FULL GPIOB -#define RTE_I2C1_SDA_BIT_FULL 9 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// - -#if (RTE_I2C1_REMAP_FULL) -#define RTE_I2C1_AF_REMAP AFIO_I2C1_REMAP -#define RTE_I2C1_SCL_PORT RTE_I2C1_SCL_PORT_FULL -#define RTE_I2C1_SCL_BIT RTE_I2C1_SCL_BIT_FULL -#define RTE_I2C1_SDA_PORT RTE_I2C1_SDA_PORT_FULL -#define RTE_I2C1_SDA_BIT RTE_I2C1_SDA_BIT_FULL -#else -#define RTE_I2C1_AF_REMAP AFIO_I2C1_NO_REMAP -#define RTE_I2C1_SCL_PORT RTE_I2C1_SCL_PORT_DEF -#define RTE_I2C1_SCL_BIT RTE_I2C1_SCL_BIT_DEF -#define RTE_I2C1_SDA_PORT RTE_I2C1_SDA_PORT_DEF -#define RTE_I2C1_SDA_BIT RTE_I2C1_SDA_BIT_DEF -#endif - - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <7=>7 -// Selects DMA Channel (only Channel 7 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C1_RX_DMA 0 -#define RTE_I2C1_RX_DMA_NUMBER 1 -#define RTE_I2C1_RX_DMA_CHANNEL 7 -#define RTE_I2C1_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <6=>6 -// Selects DMA Channel (only Channel 6 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C1_TX_DMA 0 -#define RTE_I2C1_TX_DMA_NUMBER 1 -#define RTE_I2C1_TX_DMA_CHANNEL 6 -#define RTE_I2C1_TX_DMA_PRIORITY 0 - -// - - -// I2C2 (Inter-integrated Circuit Interface 2) -// Configuration settings for Driver_I2C2 in component ::CMSIS Driver:I2C -#define RTE_I2C2 0 -#define RTE_I2C2_AF_REMAP AFIO_UNAVAILABLE_REMAP - -// I2C2_SCL Pin <0=>PB10 -#define RTE_I2C2_SCL_PORT_ID 0 -#if (RTE_I2C2_SCL_PORT_ID == 0) -#define RTE_I2C2_SCL_PORT GPIOB -#define RTE_I2C2_SCL_BIT 10 -#else -#error "Invalid I2C2_SCL Pin Configuration!" -#endif - -// I2C2_SDA Pin <0=>PB11 -#define RTE_I2C2_SDA_PORT_ID 0 -#if (RTE_I2C2_SDA_PORT_ID == 0) -#define RTE_I2C2_SDA_PORT GPIOB -#define RTE_I2C2_SDA_BIT 11 -#else -#error "Invalid I2C2_SCL Pin Configuration!" -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C2_RX_DMA 1 -#define RTE_I2C2_RX_DMA_NUMBER 1 -#define RTE_I2C2_RX_DMA_CHANNEL 5 -#define RTE_I2C2_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C2_TX_DMA 1 -#define RTE_I2C2_TX_DMA_NUMBER 1 -#define RTE_I2C2_TX_DMA_CHANNEL 4 -#define RTE_I2C2_TX_DMA_PRIORITY 0 - -// - - -// SPI1 (Serial Peripheral Interface 1) [Driver_SPI1] -// Configuration settings for Driver_SPI1 in component ::CMSIS Driver:SPI -#define RTE_SPI1 0 - -// SPI1_NSS Pin -// Configure Pin if exists -// GPIO Pxy (x = A..G, y = 0..15) -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SPI1_NSS_PIN 1 -#define RTE_SPI1_NSS_PORT GPIO_PORT(0) -#define RTE_SPI1_NSS_BIT 4 - -// SPI1_SCK Pin <0=>PA5 -#define RTE_SPI1_SCK_PORT_ID_DEF 0 -#if (RTE_SPI1_SCK_PORT_ID_DEF == 0) -#define RTE_SPI1_SCK_PORT_DEF GPIOA -#define RTE_SPI1_SCK_BIT_DEF 5 -#else -#error "Invalid SPI1_SCK Pin Configuration!" -#endif - -// SPI1_MISO Pin <0=>Not Used <1=>PA6 -#define RTE_SPI1_MISO_PORT_ID_DEF 0 -#if (RTE_SPI1_MISO_PORT_ID_DEF == 0) -#define RTE_SPI1_MISO_DEF 0 -#elif (RTE_SPI1_MISO_PORT_ID_DEF == 1) -#define RTE_SPI1_MISO_DEF 1 -#define RTE_SPI1_MISO_PORT_DEF GPIOA -#define RTE_SPI1_MISO_BIT_DEF 6 -#else -#error "Invalid SPI1_MISO Pin Configuration!" -#endif - -// SPI1_MOSI Pin <0=>Not Used <1=>PA7 -#define RTE_SPI1_MOSI_PORT_ID_DEF 0 -#if (RTE_SPI1_MOSI_PORT_ID_DEF == 0) -#define RTE_SPI1_MOSI_DEF 0 -#elif (RTE_SPI1_MOSI_PORT_ID_DEF == 1) -#define RTE_SPI1_MOSI_DEF 1 -#define RTE_SPI1_MOSI_PORT_DEF GPIOA -#define RTE_SPI1_MOSI_BIT_DEF 7 -#else -#error "Invalid SPI1_MISO Pin Configuration!" -#endif - -// SPI1 Pin Remap -// Enable SPI1 Pin Remapping. -#define RTE_SPI1_REMAP 0 - -// SPI1_SCK Pin <0=>PB3 -#define RTE_SPI1_SCK_PORT_ID_FULL 0 -#if (RTE_SPI1_SCK_PORT_ID_FULL == 0) -#define RTE_SPI1_SCK_PORT_FULL GPIOB -#define RTE_SPI1_SCK_BIT_FULL 3 -#else -#error "Invalid SPI1_SCK Pin Configuration!" -#endif - -// SPI1_MISO Pin <0=>Not Used <1=>PB4 -#define RTE_SPI1_MISO_PORT_ID_FULL 0 -#if (RTE_SPI1_MISO_PORT_ID_FULL == 0) -#define RTE_SPI1_MISO_FULL 0 -#elif (RTE_SPI1_MISO_PORT_ID_FULL == 1) -#define RTE_SPI1_MISO_FULL 1 -#define RTE_SPI1_MISO_PORT_FULL GPIOB -#define RTE_SPI1_MISO_BIT_FULL 4 -#else -#error "Invalid SPI1_MISO Pin Configuration!" -#endif -// SPI1_MOSI Pin <0=>Not Used <1=>PB5 -#define RTE_SPI1_MOSI_PORT_ID_FULL 0 -#if (RTE_SPI1_MOSI_PORT_ID_FULL == 0) -#define RTE_SPI1_MOSI_FULL 0 -#elif (RTE_SPI1_MOSI_PORT_ID_FULL == 1) -#define RTE_SPI1_MOSI_FULL 1 -#define RTE_SPI1_MOSI_PORT_FULL GPIOB -#define RTE_SPI1_MOSI_BIT_FULL 5 -#else -#error "Invalid SPI1_MOSI Pin Configuration!" -#endif - -// - -#if (RTE_SPI1_REMAP) -#define RTE_SPI1_AF_REMAP AFIO_SPI1_REMAP -#define RTE_SPI1_SCK_PORT RTE_SPI1_SCK_PORT_FULL -#define RTE_SPI1_SCK_BIT RTE_SPI1_SCK_BIT_FULL -#define RTE_SPI1_MISO RTE_SPI1_MISO_FULL -#define RTE_SPI1_MISO_PORT RTE_SPI1_MISO_PORT_FULL -#define RTE_SPI1_MISO_BIT RTE_SPI1_MISO_BIT_FULL -#define RTE_SPI1_MOSI RTE_SPI1_MOSI_FULL -#define RTE_SPI1_MOSI_PORT RTE_SPI1_MOSI_PORT_FULL -#define RTE_SPI1_MOSI_BIT RTE_SPI1_MOSI_BIT_FULL -#else -#define RTE_SPI1_AF_REMAP AFIO_SPI1_NO_REMAP -#define RTE_SPI1_SCK_PORT RTE_SPI1_SCK_PORT_DEF -#define RTE_SPI1_SCK_BIT RTE_SPI1_SCK_BIT_DEF -#define RTE_SPI1_MISO RTE_SPI1_MISO_DEF -#define RTE_SPI1_MISO_PORT RTE_SPI1_MISO_PORT_DEF -#define RTE_SPI1_MISO_BIT RTE_SPI1_MISO_BIT_DEF -#define RTE_SPI1_MOSI RTE_SPI1_MOSI_DEF -#define RTE_SPI1_MOSI_PORT RTE_SPI1_MOSI_PORT_DEF -#define RTE_SPI1_MOSI_BIT RTE_SPI1_MOSI_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <2=>2 -// Selects DMA Channel (only Channel 2 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI1_RX_DMA 0 -#define RTE_SPI1_RX_DMA_NUMBER 1 -#define RTE_SPI1_RX_DMA_CHANNEL 2 -#define RTE_SPI1_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <3=>3 -// Selects DMA Channel (only Channel 3 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI1_TX_DMA 0 -#define RTE_SPI1_TX_DMA_NUMBER 1 -#define RTE_SPI1_TX_DMA_CHANNEL 3 -#define RTE_SPI1_TX_DMA_PRIORITY 0 - -// - - -// SPI2 (Serial Peripheral Interface 2) [Driver_SPI2] -// Configuration settings for Driver_SPI2 in component ::CMSIS Driver:SPI -#define RTE_SPI2 0 - -// SPI2_NSS Pin -// Configure Pin if exists -// GPIO Pxy (x = A..G, y = 0..15) -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SPI2_NSS_PIN 1 -#define RTE_SPI2_NSS_PORT GPIO_PORT(1) -#define RTE_SPI2_NSS_BIT 12 - -// SPI2_SCK Pin <0=>PB13 -#define RTE_SPI2_SCK_PORT_ID 0 -#if (RTE_SPI2_SCK_PORT_ID == 0) -#define RTE_SPI2_SCK_PORT GPIOB -#define RTE_SPI2_SCK_BIT 13 -#define RTE_SPI2_SCK_REMAP 0 -#else -#error "Invalid SPI2_SCK Pin Configuration!" -#endif - -// SPI2_MISO Pin <0=>Not Used <1=>PB14 -#define RTE_SPI2_MISO_PORT_ID 0 -#if (RTE_SPI2_MISO_PORT_ID == 0) -#define RTE_SPI2_MISO 0 -#elif (RTE_SPI2_MISO_PORT_ID == 1) -#define RTE_SPI2_MISO 1 -#define RTE_SPI2_MISO_PORT GPIOB -#define RTE_SPI2_MISO_BIT 14 -#define RTE_SPI2_MISO_REMAP 0 -#else -#error "Invalid SPI2_MISO Pin Configuration!" -#endif - -// SPI2_MOSI Pin <0=>Not Used <1=>PB15 -#define RTE_SPI2_MOSI_PORT_ID 0 -#if (RTE_SPI2_MOSI_PORT_ID == 0) -#define RTE_SPI2_MOSI 0 -#elif (RTE_SPI2_MOSI_PORT_ID == 1) -#define RTE_SPI2_MOSI 1 -#define RTE_SPI2_MOSI_PORT GPIOB -#define RTE_SPI2_MOSI_BIT 15 -#define RTE_SPI2_MOSI_REMAP 0 -#else -#error "Invalid SPI2_MISO Pin Configuration!" -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI2_RX_DMA 0 -#define RTE_SPI2_RX_DMA_NUMBER 1 -#define RTE_SPI2_RX_DMA_CHANNEL 4 -#define RTE_SPI2_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI2_TX_DMA 0 -#define RTE_SPI2_TX_DMA_NUMBER 1 -#define RTE_SPI2_TX_DMA_CHANNEL 5 -#define RTE_SPI2_TX_DMA_PRIORITY 0 - -// - - -// SPI3 (Serial Peripheral Interface 3) [Driver_SPI3] -// Configuration settings for Driver_SPI3 in component ::CMSIS Driver:SPI -#define RTE_SPI3 0 - -// SPI3_NSS Pin -// Configure Pin if exists -// GPIO Pxy (x = A..G, y = 0..15) -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SPI3_NSS_PIN 1 -#define RTE_SPI3_NSS_PORT GPIO_PORT(0) -#define RTE_SPI3_NSS_BIT 15 - -// SPI3_SCK Pin <0=>PB3 -#define RTE_SPI3_SCK_PORT_ID_DEF 0 -#if (RTE_SPI3_SCK_PORT_ID_DEF == 0) -#define RTE_SPI3_SCK_PORT_DEF GPIOB -#define RTE_SPI3_SCK_BIT_DEF 3 -#else -#error "Invalid SPI3_SCK Pin Configuration!" -#endif - -// SPI3_MISO Pin <0=>Not Used <1=>PB4 -#define RTE_SPI3_MISO_PORT_ID_DEF 0 -#if (RTE_SPI3_MISO_PORT_ID_DEF == 0) -#define RTE_SPI3_MISO_DEF 0 -#elif (RTE_SPI3_MISO_PORT_ID_DEF == 1) -#define RTE_SPI3_MISO_DEF 1 -#define RTE_SPI3_MISO_PORT_DEF GPIOB -#define RTE_SPI3_MISO_BIT_DEF 4 -#else -#error "Invalid SPI3_MISO Pin Configuration!" -#endif - -// SPI3_MOSI <0=>Not Used Pin <1=>PB5 -#define RTE_SPI3_MOSI_PORT_ID_DEF 0 -#if (RTE_SPI3_MOSI_PORT_ID_DEF == 0) -#define RTE_SPI3_MOSI_DEF 0 -#elif (RTE_SPI3_MOSI_PORT_ID_DEF == 1) -#define RTE_SPI3_MOSI_DEF 1 -#define RTE_SPI3_MOSI_PORT_DEF GPIOB -#define RTE_SPI3_MOSI_BIT_DEF 5 -#else -#error "Invalid SPI3_MOSI Pin Configuration!" -#endif - -// SPI3 Pin Remap -// Enable SPI3 Pin Remapping. -// SPI 3 Pin Remapping is available only in connectivity line devices! -#define RTE_SPI3_REMAP 0 - -// SPI3_SCK Pin <0=>PC10 -#define RTE_SPI3_SCK_PORT_ID_FULL 0 -#if (RTE_SPI3_SCK_PORT_ID_FULL == 0) -#define RTE_SPI3_SCK_PORT_FULL GPIOC -#define RTE_SPI3_SCK_BIT_FULL 10 -#else -#error "Invalid SPI3_SCK Pin Configuration!" -#endif - -// SPI3_MISO Pin <0=>Not Used <1=>PC11 -#define RTE_SPI3_MISO_PORT_ID_FULL 0 -#if (RTE_SPI3_MISO_PORT_ID_FULL == 0) -#define RTE_SPI3_MISO_FULL 0 -#elif (RTE_SPI3_MISO_PORT_ID_FULL == 1) -#define RTE_SPI3_MISO_FULL 1 -#define RTE_SPI3_MISO_PORT_FULL GPIOC -#define RTE_SPI3_MISO_BIT_FULL 11 -#else -#error "Invalid SPI3_MISO Pin Configuration!" -#endif -// SPI3_MOSI Pin <0=>Not Used <1=>PC12 -#define RTE_SPI3_MOSI_PORT_ID_FULL 0 -#if (RTE_SPI3_MOSI_PORT_ID_FULL == 0) -#define RTE_SPI3_MOSI_FULL 0 -#elif (RTE_SPI3_MOSI_PORT_ID_FULL == 1) -#define RTE_SPI3_MOSI_FULL 1 -#define RTE_SPI3_MOSI_PORT_FULL GPIOC -#define RTE_SPI3_MOSI_BIT_FULL 12 -#else -#error "Invalid SPI3_MOSI Pin Configuration!" -#endif - -// - -#if (RTE_SPI3_REMAP) -#define RTE_SPI3_AF_REMAP AFIO_SPI3_REMAP -#define RTE_SPI3_SCK_PORT RTE_SPI3_SCK_PORT_FULL -#define RTE_SPI3_SCK_BIT RTE_SPI3_SCK_BIT_FULL -#define RTE_SPI3_MISO RTE_SPI3_MISO_FULL -#define RTE_SPI3_MISO_PORT RTE_SPI3_MISO_PORT_FULL -#define RTE_SPI3_MISO_BIT RTE_SPI3_MISO_BIT_FULL -#define RTE_SPI3_MOSI RTE_SPI3_MOSI_FULL -#define RTE_SPI3_MOSI_PORT RTE_SPI3_MOSI_PORT_FULL -#define RTE_SPI3_MOSI_BIT RTE_SPI3_MOSI_BIT_FULL -#else -#define RTE_SPI3_AF_REMAP AFIO_SPI3_NO_REMAP -#define RTE_SPI3_SCK_PORT RTE_SPI3_SCK_PORT_DEF -#define RTE_SPI3_SCK_BIT RTE_SPI3_SCK_BIT_DEF -#define RTE_SPI3_MISO RTE_SPI3_MISO_DEF -#define RTE_SPI3_MISO_PORT RTE_SPI3_MISO_PORT_DEF -#define RTE_SPI3_MISO_BIT RTE_SPI3_MISO_BIT_DEF -#define RTE_SPI3_MOSI RTE_SPI3_MOSI_DEF -#define RTE_SPI3_MOSI_PORT RTE_SPI3_MOSI_PORT_DEF -#define RTE_SPI3_MOSI_BIT RTE_SPI3_MOSI_BIT_DEF -#endif - -// DMA Rx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <1=>1 -// Selects DMA Channel (only Channel 1 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI3_RX_DMA 0 -#define RTE_SPI3_RX_DMA_NUMBER 2 -#define RTE_SPI3_RX_DMA_CHANNEL 1 -#define RTE_SPI3_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <2=>2 -// Selects DMA Channel (only Channel 2 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI3_TX_DMA 0 -#define RTE_SPI3_TX_DMA_NUMBER 2 -#define RTE_SPI3_TX_DMA_CHANNEL 2 -#define RTE_SPI3_TX_DMA_PRIORITY 0 - -// - - -// SDIO (Secure Digital Input/Output) [Driver_MCI0] -// Configuration settings for Driver_MCI0 in component ::CMSIS Driver:MCI -#define RTE_SDIO 0 - -// SDIO Peripheral Bus -// SDIO_CK Pin <0=>PC12 -#define RTE_SDIO_CK_PORT_ID 0 -#if (RTE_SDIO_CK_PORT_ID == 0) - #define RTE_SDIO_CK_PORT GPIOC - #define RTE_SDIO_CK_PIN 12 -#else - #error "Invalid SDIO_CLK Pin Configuration!" -#endif -// SDIO_CMD Pin <0=>PD2 -#define RTE_SDIO_CMD_PORT_ID 0 -#if (RTE_SDIO_CMD_PORT_ID == 0) - #define RTE_SDIO_CMD_PORT GPIOD - #define RTE_SDIO_CMD_PIN 2 -#else - #error "Invalid SDIO_CMD Pin Configuration!" -#endif -// SDIO_D0 Pin <0=>PC8 -#define RTE_SDIO_D0_PORT_ID 0 -#if (RTE_SDIO_D0_PORT_ID == 0) - #define RTE_SDIO_D0_PORT GPIOC - #define RTE_SDIO_D0_PIN 8 -#else - #error "Invalid SDIO_DAT0 Pin Configuration!" -#endif -// SDIO_D[1 .. 3] -#define RTE_SDIO_BUS_WIDTH_4 1 -// SDIO_D1 Pin <0=>PC9 -#define RTE_SDIO_D1_PORT_ID 0 -#if (RTE_SDIO_D1_PORT_ID == 0) - #define RTE_SDIO_D1_PORT GPIOC - #define RTE_SDIO_D1_PIN 9 -#else - #error "Invalid SDIO_D1 Pin Configuration!" -#endif -// SDIO_D2 Pin <0=>PC10 -#define RTE_SDIO_D2_PORT_ID 0 -#if (RTE_SDIO_D2_PORT_ID == 0) - #define RTE_SDIO_D2_PORT GPIOC - #define RTE_SDIO_D2_PIN 10 -#else - #error "Invalid SDIO_D2 Pin Configuration!" -#endif -// SDIO_D3 Pin <0=>PC11 -#define RTE_SDIO_D3_PORT_ID 0 -#if (RTE_SDIO_D3_PORT_ID == 0) - #define RTE_SDIO_D3_PORT GPIOC - #define RTE_SDIO_D3_PIN 11 -#else - #error "Invalid SDIO_D3 Pin Configuration!" -#endif -// SDIO_D[1 .. 3] -// SDIO_D[4 .. 7] -#define RTE_SDIO_BUS_WIDTH_8 0 -// SDIO_D4 Pin <0=>PB8 -#define RTE_SDIO_D4_PORT_ID 0 -#if (RTE_SDIO_D4_PORT_ID == 0) - #define RTE_SDIO_D4_PORT GPIOB - #define RTE_SDIO_D4_PIN 8 -#else - #error "Invalid SDIO_D4 Pin Configuration!" -#endif -// SDIO_D5 Pin <0=>PB9 -#define RTE_SDIO_D5_PORT_ID 0 -#if (RTE_SDIO_D5_PORT_ID == 0) - #define RTE_SDIO_D5_PORT GPIOB - #define RTE_SDIO_D5_PIN 9 -#else - #error "Invalid SDIO_D5 Pin Configuration!" -#endif -// SDIO_D6 Pin <0=>PC6 -#define RTE_SDIO_D6_PORT_ID 0 -#if (RTE_SDIO_D6_PORT_ID == 0) - #define RTE_SDIO_D6_PORT GPIOC - #define RTE_SDIO_D6_PIN 6 -#else - #error "Invalid SDIO_D6 Pin Configuration!" -#endif -// SDIO_D7 Pin <0=>PC7 -#define RTE_SDIO_D7_PORT_ID 0 -#if (RTE_SDIO_D7_PORT_ID == 0) - #define RTE_SDIO_D7_PORT GPIOC - #define RTE_SDIO_D7_PIN 7 -#else - #error "Invalid SDIO_D7 Pin Configuration!" -#endif -// SDIO_D[4 .. 7] -// SDIO Peripheral Bus - -// Card Detect Pin -// Configure Pin if exists -// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SDIO_CD_EN 1 -#define RTE_SDIO_CD_ACTIVE 0 -#define RTE_SDIO_CD_PORT GPIO_PORT(5) -#define RTE_SDIO_CD_PIN 11 - -// Write Protect Pin -// Configure Pin if exists -// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SDIO_WP_EN 0 -#define RTE_SDIO_WP_ACTIVE 1 -#define RTE_SDIO_WP_PORT GPIO_PORT(0) -#define RTE_SDIO_WP_PIN 10 - -// DMA -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SDIO_DMA_NUMBER 2 -#define RTE_SDIO_DMA_CHANNEL 4 -#define RTE_SDIO_DMA_PRIORITY 0 - -// - - -// CAN1 (Controller Area Network 1) [Driver_CAN1] -// Configuration settings for Driver_CAN1 in component ::CMSIS Driver:CAN -#define RTE_CAN1 0 - -// CAN1_RX Pin <0=>PA11 <1=>PB8 <2=>PD0 -#define RTE_CAN1_RX_PORT_ID 0 -#if (RTE_CAN1_RX_PORT_ID == 0) -#define RTE_CAN1_RX_PORT GPIOA -#define RTE_CAN1_RX_BIT 11 -#elif (RTE_CAN1_RX_PORT_ID == 1) -#define RTE_CAN1_RX_PORT GPIOB -#define RTE_CAN1_RX_BIT 8 -#elif (RTE_CAN1_RX_PORT_ID == 2) -#define RTE_CAN1_RX_PORT GPIOD -#define RTE_CAN1_RX_BIT 0 -#else -#error "Invalid CAN1_RX Pin Configuration!" -#endif - -// CAN1_TX Pin <0=>PA12 <1=>PB9 <2=>PD1 -#define RTE_CAN1_TX_PORT_ID 0 -#if (RTE_CAN1_TX_PORT_ID == 0) -#define RTE_CAN1_TX_PORT GPIOA -#define RTE_CAN1_TX_BIT 12 -#elif (RTE_CAN1_TX_PORT_ID == 1) -#define RTE_CAN1_TX_PORT GPIOB -#define RTE_CAN1_TX_BIT 9 -#elif (RTE_CAN1_TX_PORT_ID == 2) -#define RTE_CAN1_TX_PORT GPIOD -#define RTE_CAN1_TX_BIT 1 -#else -#error "Invalid CAN1_TX Pin Configuration!" -#endif - -// - - -// CAN2 (Controller Area Network 2) [Driver_CAN2] -// Configuration settings for Driver_CAN2 in component ::CMSIS Driver:CAN -#define RTE_CAN2 0 - -// CAN2_RX Pin <0=>PB5 <1=>PB12 -#define RTE_CAN2_RX_PORT_ID 0 -#if (RTE_CAN2_RX_PORT_ID == 0) -#define RTE_CAN2_RX_PORT GPIOB -#define RTE_CAN2_RX_BIT 5 -#elif (RTE_CAN2_RX_PORT_ID == 1) -#define RTE_CAN2_RX_PORT GPIOB -#define RTE_CAN2_RX_BIT 12 -#else -#error "Invalid CAN2_RX Pin Configuration!" -#endif - -// CAN2_TX Pin <0=>PB6 <1=>PB13 -#define RTE_CAN2_TX_PORT_ID 0 -#if (RTE_CAN2_TX_PORT_ID == 0) -#define RTE_CAN2_TX_PORT GPIOB -#define RTE_CAN2_TX_BIT 6 -#elif (RTE_CAN2_TX_PORT_ID == 1) -#define RTE_CAN2_TX_PORT GPIOB -#define RTE_CAN2_TX_BIT 13 -#else -#error "Invalid CAN2_TX Pin Configuration!" -#endif - -// - - -// ETH (Ethernet Interface) [Driver_ETH_MAC0] -// Configuration settings for Driver_ETH_MAC0 in component ::CMSIS Driver:Ethernet MAC -#define RTE_ETH 0 - -// MII (Media Independent Interface) -// Enable Media Independent Interface pin configuration -#define RTE_ETH_MII 0 - -// ETH_MII_TX_CLK Pin <0=>PC3 -#define RTE_ETH_MII_TX_CLK_PORT_ID 0 -#if (RTE_ETH_MII_TX_CLK_PORT_ID == 0) -#define RTE_ETH_MII_TX_CLK_PORT GPIOC -#define RTE_ETH_MII_TX_CLK_PIN 3 -#else -#error "Invalid ETH_MII_TX_CLK Pin Configuration!" -#endif -// ETH_MII_TXD0 Pin <0=>PB12 -#define RTE_ETH_MII_TXD0_PORT_ID 0 -#if (RTE_ETH_MII_TXD0_PORT_ID == 0) -#define RTE_ETH_MII_TXD0_PORT GPIOB -#define RTE_ETH_MII_TXD0_PIN 12 -#else -#error "Invalid ETH_MII_TXD0 Pin Configuration!" -#endif -// ETH_MII_TXD1 Pin <0=>PB13 -#define RTE_ETH_MII_TXD1_PORT_ID 0 -#if (RTE_ETH_MII_TXD1_PORT_ID == 0) -#define RTE_ETH_MII_TXD1_PORT GPIOB -#define RTE_ETH_MII_TXD1_PIN 13 -#else -#error "Invalid ETH_MII_TXD1 Pin Configuration!" -#endif -// ETH_MII_TXD2 Pin <0=>PC2 -#define RTE_ETH_MII_TXD2_PORT_ID 0 -#if (RTE_ETH_MII_TXD2_PORT_ID == 0) -#define RTE_ETH_MII_TXD2_PORT GPIOC -#define RTE_ETH_MII_TXD2_PIN 2 -#else -#error "Invalid ETH_MII_TXD2 Pin Configuration!" -#endif -// ETH_MII_TXD3 Pin <0=>PB8 -#define RTE_ETH_MII_TXD3_PORT_ID 0 -#if (RTE_ETH_MII_TXD3_PORT_ID == 0) -#define RTE_ETH_MII_TXD3_PORT GPIOB -#define RTE_ETH_MII_TXD3_PIN 8 -#else -#error "Invalid ETH_MII_TXD3 Pin Configuration!" -#endif -// ETH_MII_TX_EN Pin <0=>PB11 -#define RTE_ETH_MII_TX_EN_PORT_ID 0 -#if (RTE_ETH_MII_TX_EN_PORT_ID == 0) -#define RTE_ETH_MII_TX_EN_PORT GPIOB -#define RTE_ETH_MII_TX_EN_PIN 11 -#else -#error "Invalid ETH_MII_TX_EN Pin Configuration!" -#endif -// ETH_MII_RX_CLK Pin <0=>PA1 -#define RTE_ETH_MII_RX_CLK_PORT_ID 0 -#if (RTE_ETH_MII_RX_CLK_PORT_ID == 0) -#define RTE_ETH_MII_RX_CLK_PORT GPIOA -#define RTE_ETH_MII_RX_CLK_PIN 1 -#else -#error "Invalid ETH_MII_RX_CLK Pin Configuration!" -#endif -// ETH_MII_RXD0 Pin <0=>PC4 -#define RTE_ETH_MII_RXD0_DEF 0 - -// ETH_MII_RXD1 Pin <0=>PC5 -#define RTE_ETH_MII_RXD1_DEF 0 - -// ETH_MII_RXD2 Pin <0=>PB0 -#define RTE_ETH_MII_RXD2_DEF 0 - -// ETH_MII_RXD3 Pin <0=>PB1 <1=>PD12 -#define RTE_ETH_MII_RXD3_DEF 0 - -// ETH_MII_RX_DV Pin <0=>PA7 -#define RTE_ETH_MII_RX_DV_DEF 0 - -// ETH_MII_RX_ER Pin <0=>PB10 -#define RTE_ETH_MII_RX_ER_PORT_ID 0 -#if (RTE_ETH_MII_RX_ER_PORT_ID == 0) -#define RTE_ETH_MII_RX_ER_PORT GPIOB -#define RTE_ETH_MII_RX_ER_PIN 10 -#else -#error "Invalid ETH_MII_RX_ER Pin Configuration!" -#endif -// ETH_MII_CRS Pin <0=>PA0 -#define RTE_ETH_MII_CRS_PORT_ID 0 -#if (RTE_ETH_MII_CRS_PORT_ID == 0) -#define RTE_ETH_MII_CRS_PORT GPIOA -#define RTE_ETH_MII_CRS_PIN 0 -#else -#error "Invalid ETH_MII_CRS Pin Configuration!" -#endif -// ETH_MII_COL Pin <0=>PA3 -#define RTE_ETH_MII_COL_PORT_ID 0 -#if (RTE_ETH_MII_COL_PORT_ID == 0) -#define RTE_ETH_MII_COL_PORT GPIOA -#define RTE_ETH_MII_COL_PIN 3 -#else -#error "Invalid ETH_MII_COL Pin Configuration!" -#endif - -// Ethernet MAC I/O remapping -// Remap Ethernet pins -#define RTE_ETH_MII_REMAP 0 - -// ETH_MII_RXD0 Pin <1=>PD9 -#define RTE_ETH_MII_RXD0_REMAP 1 - -// ETH_MII_RXD1 Pin <1=>PD10 -#define RTE_ETH_MII_RXD1_REMAP 1 - -// ETH_MII_RXD2 Pin <1=>PD11 -#define RTE_ETH_MII_RXD2_REMAP 1 - -// ETH_MII_RXD3 Pin <1=>PD12 -#define RTE_ETH_MII_RXD3_REMAP 1 - -// ETH_MII_RX_DV Pin <1=>PD8 -#define RTE_ETH_MII_RX_DV_REMAP 1 -// - -// - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD0_DEF == 0)) -#define RTE_ETH_MII_RXD0_PORT GPIOC -#define RTE_ETH_MII_RXD0_PIN 4 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD0_REMAP == 1)) -#define RTE_ETH_MII_RXD0_PORT GPIOD -#define RTE_ETH_MII_RXD0_PIN 9 -#else -#error "Invalid ETH_MII_RXD0 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD1_DEF == 0)) -#define RTE_ETH_MII_RXD1_PORT GPIOC -#define RTE_ETH_MII_RXD1_PIN 5 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD1_REMAP == 1)) -#define RTE_ETH_MII_RXD1_PORT GPIOD -#define RTE_ETH_MII_RXD1_PIN 10 -#else -#error "Invalid ETH_MII_RXD1 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD2_DEF == 0)) -#define RTE_ETH_MII_RXD2_PORT GPIOB -#define RTE_ETH_MII_RXD2_PIN 0 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD2_REMAP == 1)) -#define RTE_ETH_MII_RXD2_PORT GPIOD -#define RTE_ETH_MII_RXD2_PIN 11 -#else -#error "Invalid ETH_MII_RXD2 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD3_DEF == 0)) -#define RTE_ETH_MII_RXD3_PORT GPIOB -#define RTE_ETH_MII_RXD3_PIN 1 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD3_REMAP == 1)) -#define RTE_ETH_MII_RXD3_PORT GPIOD -#define RTE_ETH_MII_RXD3_PIN 12 -#else -#error "Invalid ETH_MII_RXD3 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RX_DV_DEF == 0)) -#define RTE_ETH_MII_RX_DV_PORT GPIOA -#define RTE_ETH_MII_RX_DV_PIN 7 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RX_DV_REMAP == 1)) -#define RTE_ETH_MII_RX_DV_PORT GPIOD -#define RTE_ETH_MII_RX_DV_PIN 8 -#else -#error "Invalid ETH_MII_RX_DV Pin Configuration!" -#endif - -// RMII (Reduced Media Independent Interface) -#define RTE_ETH_RMII 0 - -// ETH_RMII_TXD0 Pin <0=>PB12 -#define RTE_ETH_RMII_TXD0_PORT_ID 0 -#if (RTE_ETH_RMII_TXD0_PORT_ID == 0) -#define RTE_ETH_RMII_TXD0_PORT GPIOB -#define RTE_ETH_RMII_TXD0_PIN 12 -#else -#error "Invalid ETH_RMII_TXD0 Pin Configuration!" -#endif -// ETH_RMII_TXD1 Pin <0=>PB13 -#define RTE_ETH_RMII_TXD1_PORT_ID 0 -#if (RTE_ETH_RMII_TXD1_PORT_ID == 0) -#define RTE_ETH_RMII_TXD1_PORT GPIOB -#define RTE_ETH_RMII_TXD1_PIN 13 -#else -#error "Invalid ETH_RMII_TXD1 Pin Configuration!" -#endif -// ETH_RMII_TX_EN Pin <0=>PB11 -#define RTE_ETH_RMII_TX_EN_PORT_ID 0 -#if (RTE_ETH_RMII_TX_EN_PORT_ID == 0) -#define RTE_ETH_RMII_TX_EN_PORT GPIOB -#define RTE_ETH_RMII_TX_EN_PIN 11 -#else -#error "Invalid ETH_RMII_TX_EN Pin Configuration!" -#endif -// ETH_RMII_RXD0 Pin <0=>PC4 -#define RTE_ETH_RMII_RXD0_DEF 0 - -// ETH_RMII_RXD1 Pin <0=>PC5 -#define RTE_ETH_RMII_RXD1_DEF 0 - -// ETH_RMII_REF_CLK Pin <0=>PA1 -#define RTE_ETH_RMII_REF_CLK_PORT_ID 0 -#if (RTE_ETH_RMII_REF_CLK_PORT_ID == 0) -#define RTE_ETH_RMII_REF_CLK_PORT GPIOA -#define RTE_ETH_RMII_REF_CLK_PIN 1 -#else -#error "Invalid ETH_RMII_REF_CLK Pin Configuration!" -#endif -// ETH_RMII_CRS_DV Pin <0=>PA7 -#define RTE_ETH_RMII_CRS_DV_DEF 0 - -// Ethernet MAC I/O remapping -// Remap Ethernet pins -#define RTE_ETH_RMII_REMAP 0 -// ETH_RMII_RXD0 Pin <1=>PD9 -#define RTE_ETH_RMII_RXD0_REMAP 1 - -// ETH_RMII_RXD1 Pin <1=>PD10 -#define RTE_ETH_RMII_RXD1_REMAP 1 - -// ETH_RMII_CRS_DV Pin <1=>PD8 -#define RTE_ETH_RMII_CRS_DV_REMAP 1 -// - -#if ((RTE_ETH_RMII_REMAP == 0) && (RTE_ETH_RMII_RXD0_DEF == 0)) -#define RTE_ETH_RMII_RXD0_PORT GPIOC -#define RTE_ETH_RMII_RXD0_PIN 4 -#elif ((RTE_ETH_RMII_REMAP == 1) && (RTE_ETH_RMII_RXD0_REMAP == 1)) -#define RTE_ETH_RMII_RXD0_PORT GPIOD -#define RTE_ETH_RMII_RXD0_PIN 9 -#else -#error "Invalid ETH_RMII_RXD0 Pin Configuration!" -#endif - -#if ((RTE_ETH_RMII_REMAP == 0) && (RTE_ETH_RMII_RXD1_DEF == 0)) -#define RTE_ETH_RMII_RXD1_PORT GPIOC -#define RTE_ETH_RMII_RXD1_PIN 5 -#elif ((RTE_ETH_RMII_REMAP == 1) && (RTE_ETH_RMII_RXD1_REMAP == 1)) -#define RTE_ETH_RMII_RXD1_PORT GPIOD -#define RTE_ETH_RMII_RXD1_PIN 10 -#else -#error "Invalid ETH_RMII_RXD1 Pin Configuration!" -#endif - -#if ((RTE_ETH_RMII_REMAP == 0) && (RTE_ETH_RMII_CRS_DV_DEF == 0)) -#define RTE_ETH_RMII_CRS_DV_PORT GPIOA -#define RTE_ETH_RMII_CRS_DV_PIN 7 -#elif ((RTE_ETH_RMII_REMAP == 1) && (RTE_ETH_RMII_CRS_DV_REMAP == 1)) -#define RTE_ETH_RMII_CRS_DV_PORT GPIOD -#define RTE_ETH_RMII_CRS_DV_PIN 8 -#else -#error "Invalid ETH_RMII_CRS_DV Pin Configuration!" -#endif - -// - -// Management Data Interface -// ETH_MDC Pin <0=>PC1 -#define RTE_ETH_MDI_MDC_PORT_ID 0 -#if (RTE_ETH_MDI_MDC_PORT_ID == 0) -#define RTE_ETH_MDI_MDC_PORT GPIOC -#define RTE_ETH_MDI_MDC_PIN 1 -#else -#error "Invalid ETH_MDC Pin Configuration!" -#endif -// ETH_MDIO Pin <0=>PA2 -#define RTE_ETH_MDI_MDIO_PORT_ID 0 -#if (RTE_ETH_MDI_MDIO_PORT_ID == 0) -#define RTE_ETH_MDI_MDIO_PORT GPIOA -#define RTE_ETH_MDI_MDIO_PIN 2 -#else -#error "Invalid ETH_MDIO Pin Configuration!" -#endif -// - -// Reference 25MHz Clock generation on MCO pin <0=>Disabled <1=>Enabled -#define RTE_ETH_REF_CLOCK_ID 0 -#if (RTE_ETH_REF_CLOCK_ID == 0) -#define RTE_ETH_REF_CLOCK 0 -#elif (RTE_ETH_REF_CLOCK_ID == 1) -#define RTE_ETH_REF_CLOCK 1 -#else -#error "Invalid MCO Ethernet Reference Clock Configuration!" -#endif -// - - -// USB Device Full-speed -// Configuration settings for Driver_USBD0 in component ::Drivers:USB Device -#define RTE_USB_DEVICE 0 - -// CON On/Off Pin -// Configure Pin for driving D+ pull-up -// GPIO Pxy (x = A..G, y = 0..15) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_USB_DEVICE_CON_PIN 1 -#define RTE_USB_DEVICE_CON_ACTIVE 0 -#define RTE_USB_DEVICE_CON_PORT GPIO_PORT(1) -#define RTE_USB_DEVICE_CON_BIT 14 - -// - - -// USB OTG Full-speed -#define RTE_USB_OTG_FS 0 - -// Host [Driver_USBH0] -// Configuration settings for Driver_USBH0 in component ::Drivers:USB Host - -#define RTE_USB_OTG_FS_HOST 0 - -// VBUS Power On/Off Pin -// Configure Pin for driving VBUS -// GPIO Pxy (x = A..G, y = 0..15) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_OTG_FS_VBUS_PIN 1 -#define RTE_OTG_FS_VBUS_ACTIVE 0 -#define RTE_OTG_FS_VBUS_PORT GPIO_PORT(2) -#define RTE_OTG_FS_VBUS_BIT 9 - -// Overcurrent Detection Pin -// Configure Pin for overcurrent detection -// GPIO Pxy (x = A..G, y = 0..15) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_OTG_FS_OC_PIN 1 -#define RTE_OTG_FS_OC_ACTIVE 0 -#define RTE_OTG_FS_OC_PORT GPIO_PORT(4) -#define RTE_OTG_FS_OC_BIT 1 -// - -// - - -#endif /* __RTE_DEVICE_H */ diff --git a/RTE/Device/STM32F103RB/RTE_Device.h.base@1.1.2 b/RTE/Device/STM32F103RB/RTE_Device.h.base@1.1.2 deleted file mode 100644 index 70c8002..0000000 --- a/RTE/Device/STM32F103RB/RTE_Device.h.base@1.1.2 +++ /dev/null @@ -1,1828 +0,0 @@ -/* ----------------------------------------------------------------------------- - * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All - * rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * - * $Date: 09. September 2016 - * $Revision: V1.1.2 - * - * Project: RTE Device Configuration for STMicroelectronics STM32F1xx - * - * -------------------------------------------------------------------------- */ - -//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- - -#ifndef __RTE_DEVICE_H -#define __RTE_DEVICE_H - - -#define GPIO_PORT(num) \ - ((num == 0) ? GPIOA : \ - (num == 1) ? GPIOB : \ - (num == 2) ? GPIOC : \ - (num == 3) ? GPIOD : \ - (num == 4) ? GPIOE : \ - (num == 5) ? GPIOF : \ - (num == 6) ? GPIOG : \ - NULL) - - -// Clock Configuration -// High-speed Internal Clock <1-999999999> -#define RTE_HSI 8000000 -// High-speed External Clock <1-999999999> -#define RTE_HSE 25000000 -// System Clock <1-999999999> -#define RTE_SYSCLK 72000000 -// HCLK Clock <1-999999999> -#define RTE_HCLK 72000000 -// APB1 Clock <1-999999999> -#define RTE_PCLK1 36000000 -// APB2 Clock <1-999999999> -#define RTE_PCLK2 72000000 -// ADC Clock <1-999999999> -#define RTE_ADCCLK 36000000 -// USB Clock -#define RTE_USBCLK 48000000 -// - - -// USART1 (Universal synchronous asynchronous receiver transmitter) -// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART -#define RTE_USART1 0 - -// USART1_TX Pin <0=>Not Used <1=>PA9 -#define RTE_USART1_TX_PORT_ID_DEF 0 -#if (RTE_USART1_TX_PORT_ID_DEF == 0) -#define RTE_USART1_TX_DEF 0 -#elif (RTE_USART1_TX_PORT_ID_DEF == 1) -#define RTE_USART1_TX_DEF 1 -#define RTE_USART1_TX_PORT_DEF GPIOA -#define RTE_USART1_TX_BIT_DEF 9 -#else -#error "Invalid USART1_TX Pin Configuration!" -#endif - -// USART1_RX Pin <0=>Not Used <1=>PA10 -#define RTE_USART1_RX_PORT_ID_DEF 0 -#if (RTE_USART1_RX_PORT_ID_DEF == 0) -#define RTE_USART1_RX_DEF 0 -#elif (RTE_USART1_RX_PORT_ID_DEF == 1) -#define RTE_USART1_RX_DEF 1 -#define RTE_USART1_RX_PORT_DEF GPIOA -#define RTE_USART1_RX_BIT_DEF 10 -#else -#error "Invalid USART1_RX Pin Configuration!" -#endif - -// USART1_CK Pin <0=>Not Used <1=>PA8 -#define RTE_USART1_CK_PORT_ID_DEF 0 -#if (RTE_USART1_CK_PORT_ID_DEF == 0) -#define RTE_USART1_CK 0 -#elif (RTE_USART1_CK_PORT_ID_DEF == 1) -#define RTE_USART1_CK 1 -#define RTE_USART1_CK_PORT_DEF GPIOA -#define RTE_USART1_CK_BIT_DEF 8 -#else -#error "Invalid USART1_CK Pin Configuration!" -#endif - -// USART1_CTS Pin <0=>Not Used <1=>PA11 -#define RTE_USART1_CTS_PORT_ID_DEF 0 -#if (RTE_USART1_CTS_PORT_ID_DEF == 0) -#define RTE_USART1_CTS 0 -#elif (RTE_USART1_CTS_PORT_ID_DEF == 1) -#define RTE_USART1_CTS 1 -#define RTE_USART1_CTS_PORT_DEF GPIOA -#define RTE_USART1_CTS_BIT_DEF 11 -#else -#error "Invalid USART1_CTS Pin Configuration!" -#endif - -// USART1_RTS Pin <0=>Not Used <1=>PA12 -#define RTE_USART1_RTS_PORT_ID_DEF 0 -#if (RTE_USART1_RTS_PORT_ID_DEF == 0) -#define RTE_USART1_RTS 0 -#elif (RTE_USART1_RTS_PORT_ID_DEF == 1) -#define RTE_USART1_RTS 1 -#define RTE_USART1_RTS_PORT_DEF GPIOA -#define RTE_USART1_RTS_BIT_DEF 12 -#else -#error "Invalid USART1_RTS Pin Configuration!" -#endif - -// USART1 Pin Remap -// Enable USART1 Pin Remapping -#define RTE_USART1_REMAP_FULL 0 - -// USART1_TX Pin <0=>Not Used <1=>PB6 -#define RTE_USART1_TX_PORT_ID_FULL 0 -#if (RTE_USART1_TX_PORT_ID_FULL == 0) -#define RTE_USART1_TX_FULL 0 -#elif (RTE_USART1_TX_PORT_ID_FULL == 1) -#define RTE_USART1_TX_FULL 1 -#define RTE_USART1_TX_PORT_FULL GPIOB -#define RTE_USART1_TX_BIT_FULL 6 -#else -#error "Invalid USART1_TX Pin Configuration!" -#endif - -// USART1_RX Pin <0=>Not Used <1=>PB7 -#define RTE_USART1_RX_PORT_ID_FULL 0 -#if (RTE_USART1_RX_PORT_ID_FULL == 0) -#define RTE_USART1_RX_FULL 0 -#elif (RTE_USART1_RX_PORT_ID_FULL == 1) -#define RTE_USART1_RX_FULL 1 -#define RTE_USART1_RX_PORT_FULL GPIOB -#define RTE_USART1_RX_BIT_FULL 7 -#else -#error "Invalid USART1_RX Pin Configuration!" -#endif -// - -#if (RTE_USART1_REMAP_FULL) -#define RTE_USART1_AF_REMAP AFIO_USART1_REMAP -#define RTE_USART1_TX RTE_USART1_TX_FULL -#define RTE_USART1_TX_PORT RTE_USART1_TX_PORT_FULL -#define RTE_USART1_TX_BIT RTE_USART1_TX_BIT_FULL -#define RTE_USART1_RX RTE_USART1_RX_FULL -#define RTE_USART1_RX_PORT RTE_USART1_RX_PORT_FULL -#define RTE_USART1_RX_BIT RTE_USART1_RX_BIT_FULL -#define RTE_USART1_CK_PORT RTE_USART1_CK_PORT_DEF -#define RTE_USART1_CK_BIT RTE_USART1_CK_BIT_DEF -#define RTE_USART1_CTS_PORT RTE_USART1_CTS_PORT_DEF -#define RTE_USART1_CTS_BIT RTE_USART1_CTS_BIT_DEF -#define RTE_USART1_RTS_PORT RTE_USART1_RTS_PORT_DEF -#define RTE_USART1_RTS_BIT RTE_USART1_RTS_BIT_DEF -#else -#define RTE_USART1_AF_REMAP AFIO_USART1_NO_REMAP -#define RTE_USART1_TX RTE_USART1_TX_DEF -#define RTE_USART1_TX_PORT RTE_USART1_TX_PORT_DEF -#define RTE_USART1_TX_BIT RTE_USART1_TX_BIT_DEF -#define RTE_USART1_RX RTE_USART1_RX_DEF -#define RTE_USART1_RX_PORT RTE_USART1_RX_PORT_DEF -#define RTE_USART1_RX_BIT RTE_USART1_RX_BIT_DEF -#define RTE_USART1_CK_PORT RTE_USART1_CK_PORT_DEF -#define RTE_USART1_CK_BIT RTE_USART1_CK_BIT_DEF -#define RTE_USART1_CTS_PORT RTE_USART1_CTS_PORT_DEF -#define RTE_USART1_CTS_BIT RTE_USART1_CTS_BIT_DEF -#define RTE_USART1_RTS_PORT RTE_USART1_RTS_PORT_DEF -#define RTE_USART1_RTS_BIT RTE_USART1_RTS_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART1_RX_DMA 0 -#define RTE_USART1_RX_DMA_NUMBER 1 -#define RTE_USART1_RX_DMA_CHANNEL 5 -#define RTE_USART1_RX_DMA_PRIORITY 0 -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART1_TX_DMA 0 -#define RTE_USART1_TX_DMA_NUMBER 1 -#define RTE_USART1_TX_DMA_CHANNEL 4 -#define RTE_USART1_TX_DMA_PRIORITY 0 -// - - -// USART2 (Universal synchronous asynchronous receiver transmitter) -// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART -#define RTE_USART2 0 - -// USART2_TX Pin <0=>Not Used <1=>PA2 -#define RTE_USART2_TX_PORT_ID_DEF 0 -#if (RTE_USART2_TX_PORT_ID_DEF == 0) -#define RTE_USART2_TX_DEF 0 -#elif (RTE_USART2_TX_PORT_ID_DEF == 1) -#define RTE_USART2_TX_DEF 1 -#define RTE_USART2_TX_PORT_DEF GPIOA -#define RTE_USART2_TX_BIT_DEF 2 -#else -#error "Invalid USART2_TX Pin Configuration!" -#endif - -// USART2_RX Pin <0=>Not Used <1=>PA3 -#define RTE_USART2_RX_PORT_ID_DEF 0 -#if (RTE_USART2_RX_PORT_ID_DEF == 0) -#define RTE_USART2_RX_DEF 0 -#elif (RTE_USART2_RX_PORT_ID_DEF == 1) -#define RTE_USART2_RX_DEF 1 -#define RTE_USART2_RX_PORT_DEF GPIOA -#define RTE_USART2_RX_BIT_DEF 3 -#else -#error "Invalid USART2_RX Pin Configuration!" -#endif - -// USART2_CK Pin <0=>Not Used <1=>PA4 -#define RTE_USART2_CK_PORT_ID_DEF 0 -#if (RTE_USART2_CK_PORT_ID_DEF == 0) -#define RTE_USART2_CK_DEF 0 -#elif (RTE_USART2_CK_PORT_ID_DEF == 1) -#define RTE_USART2_CK_DEF 1 -#define RTE_USART2_CK_PORT_DEF GPIOA -#define RTE_USART2_CK_BIT_DEF 4 -#else -#error "Invalid USART2_CK Pin Configuration!" -#endif - -// USART2_CTS Pin <0=>Not Used <1=>PA0 -#define RTE_USART2_CTS_PORT_ID_DEF 0 -#if (RTE_USART2_CTS_PORT_ID_DEF == 0) -#define RTE_USART2_CTS_DEF 0 -#elif (RTE_USART2_CTS_PORT_ID_DEF == 1) -#define RTE_USART2_CTS_DEF 1 -#define RTE_USART2_CTS_PORT_DEF GPIOA -#define RTE_USART2_CTS_BIT_DEF 0 -#else -#error "Invalid USART2_CTS Pin Configuration!" -#endif - -// USART2_RTS Pin <0=>Not Used <1=>PA1 -#define RTE_USART2_RTS_PORT_ID_DEF 0 -#if (RTE_USART2_RTS_PORT_ID_DEF == 0) -#define RTE_USART2_RTS_DEF 0 -#elif (RTE_USART2_RTS_PORT_ID_DEF == 1) -#define RTE_USART2_RTS_DEF 1 -#define RTE_USART2_RTS_PORT_DEF GPIOA -#define RTE_USART2_RTS_BIT_DEF 1 -#else -#error "Invalid USART2_RTS Pin Configuration!" -#endif - -// USART2 Pin Remap -// Enable USART2 Pin Remapping -#define RTE_USART2_REMAP_FULL 0 - -// USART2_TX Pin <0=>Not Used <1=>PD5 -#define RTE_USART2_TX_PORT_ID_FULL 0 -#if (RTE_USART2_TX_PORT_ID_FULL == 0) -#define RTE_USART2_TX_FULL 0 -#elif (RTE_USART2_TX_PORT_ID_FULL == 1) -#define RTE_USART2_TX_FULL 1 -#define RTE_USART2_TX_PORT_FULL GPIOD -#define RTE_USART2_TX_BIT_FULL 5 -#else -#error "Invalid USART2_TX Pin Configuration!" -#endif - -// USART2_RX Pin <0=>Not Used <1=>PD6 -#define RTE_USART2_RX_PORT_ID_FULL 0 -#if (RTE_USART2_RX_PORT_ID_FULL == 0) -#define RTE_USART2_RX_FULL 0 -#elif (RTE_USART2_RX_PORT_ID_FULL == 1) -#define RTE_USART2_RX_FULL 1 -#define RTE_USART2_RX_PORT_FULL GPIOD -#define RTE_USART2_RX_BIT_FULL 6 -#else -#error "Invalid USART2_RX Pin Configuration!" -#endif - -// USART2_CK Pin <0=>Not Used <1=>PD7 -#define RTE_USART2_CK_PORT_ID_FULL 0 -#if (RTE_USART2_CK_PORT_ID_FULL == 0) -#define RTE_USART2_CK_FULL 0 -#elif (RTE_USART2_CK_PORT_ID_FULL == 1) -#define RTE_USART2_CK_FULL 1 -#define RTE_USART2_CK_PORT_FULL GPIOD -#define RTE_USART2_CK_BIT_FULL 7 -#else -#error "Invalid USART2_CK Pin Configuration!" -#endif - -// USART2_CTS Pin <0=>Not Used <1=>PD3 -#define RTE_USART2_CTS_PORT_ID_FULL 0 -#if (RTE_USART2_CTS_PORT_ID_FULL == 0) -#define RTE_USART2_CTS_FULL 0 -#elif (RTE_USART2_CTS_PORT_ID_FULL == 1) -#define RTE_USART2_CTS_FULL 1 -#define RTE_USART2_CTS_PORT_FULL GPIOD -#define RTE_USART2_CTS_BIT_FULL 3 -#else -#error "Invalid USART2_CTS Pin Configuration!" -#endif - -// USART2_RTS Pin <0=>Not Used <1=>PD4 -#define RTE_USART2_RTS_PORT_ID_FULL 0 -#if (RTE_USART2_RTS_PORT_ID_FULL == 0) -#define RTE_USART2_RTS_FULL 0 -#elif (RTE_USART2_RTS_PORT_ID_FULL == 1) -#define RTE_USART2_RTS_FULL 1 -#define RTE_USART2_RTS_PORT_FULL GPIOD -#define RTE_USART2_RTS_BIT_FULL 4 -#else -#error "Invalid USART2_RTS Pin Configuration!" -#endif -// - -#if (RTE_USART2_REMAP_FULL) -#define RTE_USART2_AF_REMAP AFIO_USART2_REMAP -#define RTE_USART2_TX RTE_USART2_TX_FULL -#define RTE_USART2_TX_PORT RTE_USART2_TX_PORT_FULL -#define RTE_USART2_TX_BIT RTE_USART2_TX_BIT_FULL -#define RTE_USART2_RX RTE_USART2_RX_FULL -#define RTE_USART2_RX_PORT RTE_USART2_RX_PORT_FULL -#define RTE_USART2_RX_BIT RTE_USART2_RX_BIT_FULL -#define RTE_USART2_CK RTE_USART2_CK_FULL -#define RTE_USART2_CK_PORT RTE_USART2_CK_PORT_FULL -#define RTE_USART2_CK_BIT RTE_USART2_CK_BIT_FULL -#define RTE_USART2_CTS RTE_USART2_CTS_FULL -#define RTE_USART2_CTS_PORT RTE_USART2_CTS_PORT_FULL -#define RTE_USART2_CTS_BIT RTE_USART2_CTS_BIT_FULL -#define RTE_USART2_RTS RTE_USART2_RTS_FULL -#define RTE_USART2_RTS_PORT RTE_USART2_RTS_PORT_FULL -#define RTE_USART2_RTS_BIT RTE_USART2_RTS_BIT_FULL -#else -#define RTE_USART2_AF_REMAP AFIO_USART2_NO_REMAP -#define RTE_USART2_TX RTE_USART2_TX_DEF -#define RTE_USART2_TX_PORT RTE_USART2_TX_PORT_DEF -#define RTE_USART2_TX_BIT RTE_USART2_TX_BIT_DEF -#define RTE_USART2_RX RTE_USART2_RX_DEF -#define RTE_USART2_RX_PORT RTE_USART2_RX_PORT_DEF -#define RTE_USART2_RX_BIT RTE_USART2_RX_BIT_DEF -#define RTE_USART2_CK RTE_USART2_CK_DEF -#define RTE_USART2_CK_PORT RTE_USART2_CK_PORT_DEF -#define RTE_USART2_CK_BIT RTE_USART2_CK_BIT_DEF -#define RTE_USART2_CTS RTE_USART2_CTS_DEF -#define RTE_USART2_CTS_PORT RTE_USART2_CTS_PORT_DEF -#define RTE_USART2_CTS_BIT RTE_USART2_CTS_BIT_DEF -#define RTE_USART2_RTS RTE_USART2_RTS_DEF -#define RTE_USART2_RTS_PORT RTE_USART2_RTS_PORT_DEF -#define RTE_USART2_RTS_BIT RTE_USART2_RTS_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <6=>6 -// Selects DMA Channel (only Channel 6 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART2_RX_DMA 0 -#define RTE_USART2_RX_DMA_NUMBER 1 -#define RTE_USART2_RX_DMA_CHANNEL 6 -#define RTE_USART2_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <7=>7 -// Selects DMA Channel (only Channel 7 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Set DMA Channel priority -// -#define RTE_USART2_TX_DMA 0 -#define RTE_USART2_TX_DMA_NUMBER 1 -#define RTE_USART2_TX_DMA_CHANNEL 7 -#define RTE_USART2_TX_DMA_PRIORITY 0 - -// - - -// USART3 (Universal synchronous asynchronous receiver transmitter) -// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART -#define RTE_USART3 0 - -// USART3_TX Pin <0=>Not Used <1=>PB10 -#define RTE_USART3_TX_PORT_ID_DEF 0 -#if (RTE_USART3_TX_PORT_ID_DEF == 0) -#define RTE_USART3_TX_DEF 0 -#elif (RTE_USART3_TX_PORT_ID_DEF == 1) -#define RTE_USART3_TX_DEF 1 -#define RTE_USART3_TX_PORT_DEF GPIOB -#define RTE_USART3_TX_BIT_DEF 10 -#else -#error "Invalid USART3_TX Pin Configuration!" -#endif - -// USART3_RX Pin <0=>Not Used <1=>PB11 -#define RTE_USART3_RX_PORT_ID_DEF 0 -#if (RTE_USART3_RX_PORT_ID_DEF == 0) -#define RTE_USART3_RX_DEF 0 -#elif (RTE_USART3_RX_PORT_ID_DEF == 1) -#define RTE_USART3_RX_DEF 1 -#define RTE_USART3_RX_PORT_DEF GPIOB -#define RTE_USART3_RX_BIT_DEF 11 -#else -#error "Invalid USART3_RX Pin Configuration!" -#endif - -// USART3_CK Pin <0=>Not Used <1=>PB12 -#define RTE_USART3_CK_PORT_ID_DEF 0 -#if (RTE_USART3_CK_PORT_ID_DEF == 0) -#define RTE_USART3_CK_DEF 0 -#elif (RTE_USART3_CK_PORT_ID_DEF == 1) -#define RTE_USART3_CK_DEF 1 -#define RTE_USART3_CK_PORT_DEF GPIOB -#define RTE_USART3_CK_BIT_DEF 12 -#else -#error "Invalid USART3_CK Pin Configuration!" -#endif - -// USART3_CTS Pin <0=>Not Used <1=>PB13 -#define RTE_USART3_CTS_PORT_ID_DEF 0 -#if (RTE_USART3_CTS_PORT_ID_DEF == 0) -#define RTE_USART3_CTS_DEF 0 -#elif (RTE_USART3_CTS_PORT_ID_DEF == 1) -#define RTE_USART3_CTS_DEF 1 -#define RTE_USART3_CTS_PORT_DEF GPIOB -#define RTE_USART3_CTS_BIT_DEF 13 -#else -#error "Invalid USART3_CTS Pin Configuration!" -#endif - -// USART3_RTS Pin <0=>Not Used <1=>PB14 -#define RTE_USART3_RTS_PORT_ID_DEF 0 -#if (RTE_USART3_RTS_PORT_ID_DEF == 0) -#define RTE_USART3_RTS_DEF 0 -#elif (RTE_USART3_RTS_PORT_ID_DEF == 1) -#define RTE_USART3_RTS_DEF 1 -#define RTE_USART3_RTS_PORT_DEF GPIOB -#define RTE_USART3_RTS_BIT_DEF 14 -#else -#error "Invalid USART3_RTS Pin Configuration!" -#endif - -// USART3 Partial Pin Remap -// Enable USART3 Partial Pin Remapping -#define RTE_USART3_REMAP_PARTIAL 0 - -// USART3_TX Pin <0=>Not Used <1=>PC10 -#define RTE_USART3_TX_PORT_ID_PARTIAL 0 -#if (RTE_USART3_TX_PORT_ID_PARTIAL == 0) -#define RTE_USART3_TX_PARTIAL 0 -#elif (RTE_USART3_TX_PORT_ID_PARTIAL == 1) -#define RTE_USART3_TX_PARTIAL 1 -#define RTE_USART3_TX_PORT_PARTIAL GPIOC -#define RTE_USART3_TX_BIT_PARTIAL 10 -#else -#error "Invalid USART3_TX Pin Configuration!" -#endif - -// USART3_RX Pin <0=>Not Used <1=>PC11 -#define RTE_USART3_RX_PORT_ID_PARTIAL 0 -#if (RTE_USART3_RX_PORT_ID_PARTIAL == 0) -#define RTE_USART3_RX_PARTIAL 0 -#elif (RTE_USART3_RX_PORT_ID_PARTIAL == 1) -#define RTE_USART3_RX_PARTIAL 1 -#define RTE_USART3_RX_PORT_PARTIAL GPIOC -#define RTE_USART3_RX_BIT_PARTIAL 11 -#else -#error "Invalid USART3_RX Pin Configuration!" -#endif - -// USART3_CK Pin <0=>Not Used <1=>PC12 -#define RTE_USART3_CK_PORT_ID_PARTIAL 0 -#if (RTE_USART3_CK_PORT_ID_PARTIAL == 0) -#define RTE_USART3_CK_PARTIAL 0 -#elif (RTE_USART3_CK_PORT_ID_PARTIAL == 1) -#define RTE_USART3_CK_PARTIAL 1 -#define RTE_USART3_CK_PORT_PARTIAL GPIOC -#define RTE_USART3_CK_BIT_PARTIAL 12 -#else -#error "Invalid USART3_CK Pin Configuration!" -#endif -// - -// USART3 Full Pin Remap -// Enable USART3 Full Pin Remapping -#define RTE_USART3_REMAP_FULL 0 - -// USART3_TX Pin <0=>Not Used <1=>PD8 -#define RTE_USART3_TX_PORT_ID_FULL 0 -#if (RTE_USART3_TX_PORT_ID_FULL == 0) -#define RTE_USART3_TX_FULL 0 -#elif (RTE_USART3_TX_PORT_ID_FULL == 1) -#define RTE_USART3_TX_FULL 1 -#define RTE_USART3_TX_PORT_FULL GPIOD -#define RTE_USART3_TX_BIT_FULL 8 -#else -#error "Invalid USART3_TX Pin Configuration!" -#endif - -// USART3_RX Pin <0=>Not Used <1=>PD9 -#define RTE_USART3_RX_PORT_ID_FULL 0 -#if (RTE_USART3_RX_PORT_ID_FULL == 0) -#define RTE_USART3_RX_FULL 0 -#elif (RTE_USART3_RX_PORT_ID_FULL == 1) -#define RTE_USART3_RX_FULL 1 -#define RTE_USART3_RX_PORT_FULL GPIOD -#define RTE_USART3_RX_BIT_FULL 9 -#else -#error "Invalid USART3_RX Pin Configuration!" -#endif - -// USART3_CK Pin <0=>Not Used <1=>PD10 -#define RTE_USART3_CK_PORT_ID_FULL 0 -#if (RTE_USART3_CK_PORT_ID_FULL == 0) -#define RTE_USART3_CK_FULL 0 -#elif (RTE_USART3_CK_PORT_ID_FULL == 1) -#define RTE_USART3_CK_FULL 1 -#define RTE_USART3_CK_PORT_FULL GPIOD -#define RTE_USART3_CK_BIT_FULL 10 -#else -#error "Invalid USART3_CK Pin Configuration!" -#endif - -// USART3_CTS Pin <0=>Not Used <1=>PD11 -#define RTE_USART3_CTS_PORT_ID_FULL 0 -#if (RTE_USART3_CTS_PORT_ID_FULL == 0) -#define RTE_USART3_CTS_FULL 0 -#elif (RTE_USART3_CTS_PORT_ID_FULL == 1) -#define RTE_USART3_CTS_FULL 1 -#define RTE_USART3_CTS_PORT_FULL GPIOD -#define RTE_USART3_CTS_BIT_FULL 11 -#else -#error "Invalid USART3_CTS Pin Configuration!" -#endif - -// USART3_RTS Pin <0=>Not Used <1=>PD12 -#define RTE_USART3_RTS_PORT_ID_FULL 0 -#if (RTE_USART3_RTS_PORT_ID_FULL == 0) -#define RTE_USART3_RTS_FULL 0 -#elif (RTE_USART3_RTS_PORT_ID_FULL == 1) -#define RTE_USART3_RTS_FULL 1 -#define RTE_USART3_RTS_PORT_FULL GPIOD -#define RTE_USART3_RTS_BIT_FULL 12 -#else -#error "Invalid USART3_RTS Pin Configuration!" -#endif -// - -#if ((RTE_USART3_REMAP_PARTIAL == 1) && (RTE_USART3_REMAP_FULL == 1)) -#error "Invalid USART3 Pin Remap Configuration!" -#endif - -#if (RTE_USART3_REMAP_FULL) -#define RTE_USART3_AF_REMAP AFIO_USART3_REMAP_FULL -#define RTE_USART3_TX RTE_USART3_TX_FULL -#define RTE_USART3_TX_PORT RTE_USART3_TX_PORT_FULL -#define RTE_USART3_TX_BIT RTE_USART3_TX_BIT_FULL -#define RTE_USART3_RX RTE_USART3_RX_FULL -#define RTE_USART3_RX_PORT RTE_USART3_RX_PORT_FULL -#define RTE_USART3_RX_BIT RTE_USART3_RX_BIT_FULL -#define RTE_USART3_CK RTE_USART3_CK_FULL -#define RTE_USART3_CK_PORT RTE_USART3_CK_PORT_FULL -#define RTE_USART3_CK_BIT RTE_USART3_CK_BIT_FULL -#define RTE_USART3_CTS RTE_USART3_CTS_FULL -#define RTE_USART3_CTS_PORT RTE_USART3_CTS_PORT_FULL -#define RTE_USART3_CTS_BIT RTE_USART3_CTS_BIT_FULL -#define RTE_USART3_RTS RTE_USART3_RTS_FULL -#define RTE_USART3_RTS_PORT RTE_USART3_RTS_PORT_FULL -#define RTE_USART3_RTS_BIT RTE_USART3_RTS_BIT_FULL -#elif (RTE_USART3_REMAP_PARTIAL) -#define RTE_USART3_AF_REMAP AFIO_USART3_REMAP_PARTIAL -#define RTE_USART3_TX RTE_USART3_TX_PARTIAL -#define RTE_USART3_TX_PORT RTE_USART3_TX_PORT_PARTIAL -#define RTE_USART3_TX_BIT RTE_USART3_TX_BIT_PARTIAL -#define RTE_USART3_RX RTE_USART3_RX_PARTIAL -#define RTE_USART3_RX_PORT RTE_USART3_RX_PORT_PARTIAL -#define RTE_USART3_RX_BIT RTE_USART3_RX_BIT_PARTIAL -#define RTE_USART3_CK RTE_USART3_CK_PARTIAL -#define RTE_USART3_CK_PORT RTE_USART3_CK_PORT_PARTIAL -#define RTE_USART3_CK_BIT RTE_USART3_CK_BIT_PARTIAL -#define RTE_USART3_CTS RTE_USART3_CTS_DEF -#define RTE_USART3_CTS_PORT RTE_USART3_CTS_PORT_DEF -#define RTE_USART3_CTS_BIT RTE_USART3_CTS_BIT_DEF -#define RTE_USART3_RTS RTE_USART3_RTS_DEF -#define RTE_USART3_RTS_PORT RTE_USART3_RTS_PORT_DEF -#define RTE_USART3_RTS_BIT RTE_USART3_RTS_BIT_DEF -#else -#define RTE_USART3_AF_REMAP AFIO_USART3_NO_REMAP -#define RTE_USART3_TX RTE_USART3_TX_DEF -#define RTE_USART3_TX_PORT RTE_USART3_TX_PORT_DEF -#define RTE_USART3_TX_BIT RTE_USART3_TX_BIT_DEF -#define RTE_USART3_RX RTE_USART3_RX_DEF -#define RTE_USART3_RX_PORT RTE_USART3_RX_PORT_DEF -#define RTE_USART3_RX_BIT RTE_USART3_RX_BIT_DEF -#define RTE_USART3_CK RTE_USART3_CK_DEF -#define RTE_USART3_CK_PORT RTE_USART3_CK_PORT_DEF -#define RTE_USART3_CK_BIT RTE_USART3_CK_BIT_DEF -#define RTE_USART3_CTS RTE_USART3_CTS_DEF -#define RTE_USART3_CTS_PORT RTE_USART3_CTS_PORT_DEF -#define RTE_USART3_CTS_BIT RTE_USART3_CTS_BIT_DEF -#define RTE_USART3_RTS RTE_USART3_RTS_DEF -#define RTE_USART3_RTS_PORT RTE_USART3_RTS_PORT_DEF -#define RTE_USART3_RTS_BIT RTE_USART3_RTS_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <3=>3 -// Selects DMA Channel (only Channel 3 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_USART3_RX_DMA 0 -#define RTE_USART3_RX_DMA_NUMBER 1 -#define RTE_USART3_RX_DMA_CHANNEL 3 -#define RTE_USART3_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <2=>2 -// Selects DMA Channel (only Channel 2 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_USART3_TX_DMA 0 -#define RTE_USART3_TX_DMA_NUMBER 1 -#define RTE_USART3_TX_DMA_CHANNEL 2 -#define RTE_USART3_TX_DMA_PRIORITY 0 - -// - - -// UART4 (Universal asynchronous receiver transmitter) -// Configuration settings for Driver_USART4 in component ::CMSIS Driver:USART -#define RTE_UART4 0 -#define RTE_UART4_AF_REMAP AFIO_UNAVAILABLE_REMAP - -// UART4_TX Pin <0=>Not Used <1=>PC10 -#define RTE_UART4_TX_ID 0 -#if (RTE_UART4_TX_ID == 0) -#define RTE_UART4_TX 0 -#elif (RTE_UART4_TX_ID == 1) -#define RTE_UART4_TX 1 -#define RTE_UART4_TX_PORT GPIOC -#define RTE_UART4_TX_BIT 10 -#else -#error "Invalid UART4_TX Pin Configuration!" -#endif - -// UART4_RX Pin <0=>Not Used <1=>PC11 -#define RTE_UART4_RX_ID 0 -#if (RTE_UART4_RX_ID == 0) -#define RTE_UART4_RX 0 -#elif (RTE_UART4_RX_ID == 1) -#define RTE_UART4_RX 1 -#define RTE_UART4_RX_PORT GPIOC -#define RTE_UART4_RX_BIT 11 -#else -#error "Invalid UART4_RX Pin Configuration!" -#endif - - -// DMA Rx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <3=>3 -// Selects DMA Channel (only Channel 3 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_UART4_RX_DMA 0 -#define RTE_UART4_RX_DMA_NUMBER 2 -#define RTE_UART4_RX_DMA_CHANNEL 3 -#define RTE_UART4_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very high -// Sets DMA Channel priority -// -#define RTE_UART4_TX_DMA 0 -#define RTE_UART4_TX_DMA_NUMBER 2 -#define RTE_UART4_TX_DMA_CHANNEL 5 -#define RTE_UART4_TX_DMA_PRIORITY 0 - -// - - -// UART5 (Universal asynchronous receiver transmitter) -// Configuration settings for Driver_USART5 in component ::CMSIS Driver:USART -#define RTE_UART5 0 -#define RTE_UART5_AF_REMAP AFIO_UNAVAILABLE_REMAP - -// UART5_TX Pin <0=>Not Used <1=>PC12 -#define RTE_UART5_TX_ID 0 -#if (RTE_UART5_TX_ID == 0) -#define RTE_UART5_TX 0 -#elif (RTE_UART5_TX_ID == 1) -#define RTE_UART5_TX 1 -#define RTE_UART5_TX_PORT GPIOC -#define RTE_UART5_TX_BIT 12 -#else -#error "Invalid UART5_TX Pin Configuration!" -#endif - -// UART5_RX Pin <0=>Not Used <1=>PD2 -#define RTE_UART5_RX_ID 0 -#if (RTE_UART5_RX_ID == 0) -#define RTE_UART5_RX 0 -#elif (RTE_UART5_RX_ID == 1) -#define RTE_UART5_RX 1 -#define RTE_UART5_RX_PORT GPIOD -#define RTE_UART5_RX_BIT 2 -#else -#error "Invalid UART5_RX Pin Configuration!" -#endif -// - - -// I2C1 (Inter-integrated Circuit Interface 1) -// Configuration settings for Driver_I2C1 in component ::CMSIS Driver:I2C -#define RTE_I2C1 0 - -// I2C1_SCL Pin <0=>PB6 -#define RTE_I2C1_SCL_PORT_ID_DEF 0 -#if (RTE_I2C1_SCL_PORT_ID_DEF == 0) -#define RTE_I2C1_SCL_PORT_DEF GPIOB -#define RTE_I2C1_SCL_BIT_DEF 6 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// I2C1_SDA Pin <0=>PB7 -#define RTE_I2C1_SDA_PORT_ID_DEF 0 -#if (RTE_I2C1_SDA_PORT_ID_DEF == 0) -#define RTE_I2C1_SDA_PORT_DEF GPIOB -#define RTE_I2C1_SDA_BIT_DEF 7 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// I2C1 Pin Remap -// Enable I2C1 Pin Remapping -#define RTE_I2C1_REMAP_FULL 0 - -// I2C1_SCL Pin <0=>PB8 -#define RTE_I2C1_SCL_PORT_ID_FULL 0 -#if (RTE_I2C1_SCL_PORT_ID_FULL == 0) -#define RTE_I2C1_SCL_PORT_FULL GPIOB -#define RTE_I2C1_SCL_BIT_FULL 8 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// I2C1_SDA Pin <0=>PB9 -#define RTE_I2C1_SDA_PORT_ID_FULL 0 -#if (RTE_I2C1_SDA_PORT_ID_FULL == 0) -#define RTE_I2C1_SDA_PORT_FULL GPIOB -#define RTE_I2C1_SDA_BIT_FULL 9 -#else -#error "Invalid I2C1_SCL Pin Configuration!" -#endif - -// - -#if (RTE_I2C1_REMAP_FULL) -#define RTE_I2C1_AF_REMAP AFIO_I2C1_REMAP -#define RTE_I2C1_SCL_PORT RTE_I2C1_SCL_PORT_FULL -#define RTE_I2C1_SCL_BIT RTE_I2C1_SCL_BIT_FULL -#define RTE_I2C1_SDA_PORT RTE_I2C1_SDA_PORT_FULL -#define RTE_I2C1_SDA_BIT RTE_I2C1_SDA_BIT_FULL -#else -#define RTE_I2C1_AF_REMAP AFIO_I2C1_NO_REMAP -#define RTE_I2C1_SCL_PORT RTE_I2C1_SCL_PORT_DEF -#define RTE_I2C1_SCL_BIT RTE_I2C1_SCL_BIT_DEF -#define RTE_I2C1_SDA_PORT RTE_I2C1_SDA_PORT_DEF -#define RTE_I2C1_SDA_BIT RTE_I2C1_SDA_BIT_DEF -#endif - - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <7=>7 -// Selects DMA Channel (only Channel 7 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C1_RX_DMA 0 -#define RTE_I2C1_RX_DMA_NUMBER 1 -#define RTE_I2C1_RX_DMA_CHANNEL 7 -#define RTE_I2C1_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <6=>6 -// Selects DMA Channel (only Channel 6 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C1_TX_DMA 0 -#define RTE_I2C1_TX_DMA_NUMBER 1 -#define RTE_I2C1_TX_DMA_CHANNEL 6 -#define RTE_I2C1_TX_DMA_PRIORITY 0 - -// - - -// I2C2 (Inter-integrated Circuit Interface 2) -// Configuration settings for Driver_I2C2 in component ::CMSIS Driver:I2C -#define RTE_I2C2 0 -#define RTE_I2C2_AF_REMAP AFIO_UNAVAILABLE_REMAP - -// I2C2_SCL Pin <0=>PB10 -#define RTE_I2C2_SCL_PORT_ID 0 -#if (RTE_I2C2_SCL_PORT_ID == 0) -#define RTE_I2C2_SCL_PORT GPIOB -#define RTE_I2C2_SCL_BIT 10 -#else -#error "Invalid I2C2_SCL Pin Configuration!" -#endif - -// I2C2_SDA Pin <0=>PB11 -#define RTE_I2C2_SDA_PORT_ID 0 -#if (RTE_I2C2_SDA_PORT_ID == 0) -#define RTE_I2C2_SDA_PORT GPIOB -#define RTE_I2C2_SDA_BIT 11 -#else -#error "Invalid I2C2_SCL Pin Configuration!" -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C2_RX_DMA 1 -#define RTE_I2C2_RX_DMA_NUMBER 1 -#define RTE_I2C2_RX_DMA_CHANNEL 5 -#define RTE_I2C2_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_I2C2_TX_DMA 1 -#define RTE_I2C2_TX_DMA_NUMBER 1 -#define RTE_I2C2_TX_DMA_CHANNEL 4 -#define RTE_I2C2_TX_DMA_PRIORITY 0 - -// - - -// SPI1 (Serial Peripheral Interface 1) [Driver_SPI1] -// Configuration settings for Driver_SPI1 in component ::CMSIS Driver:SPI -#define RTE_SPI1 0 - -// SPI1_NSS Pin -// Configure Pin if exists -// GPIO Pxy (x = A..G, y = 0..15) -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SPI1_NSS_PIN 1 -#define RTE_SPI1_NSS_PORT GPIO_PORT(0) -#define RTE_SPI1_NSS_BIT 4 - -// SPI1_SCK Pin <0=>PA5 -#define RTE_SPI1_SCK_PORT_ID_DEF 0 -#if (RTE_SPI1_SCK_PORT_ID_DEF == 0) -#define RTE_SPI1_SCK_PORT_DEF GPIOA -#define RTE_SPI1_SCK_BIT_DEF 5 -#else -#error "Invalid SPI1_SCK Pin Configuration!" -#endif - -// SPI1_MISO Pin <0=>Not Used <1=>PA6 -#define RTE_SPI1_MISO_PORT_ID_DEF 0 -#if (RTE_SPI1_MISO_PORT_ID_DEF == 0) -#define RTE_SPI1_MISO_DEF 0 -#elif (RTE_SPI1_MISO_PORT_ID_DEF == 1) -#define RTE_SPI1_MISO_DEF 1 -#define RTE_SPI1_MISO_PORT_DEF GPIOA -#define RTE_SPI1_MISO_BIT_DEF 6 -#else -#error "Invalid SPI1_MISO Pin Configuration!" -#endif - -// SPI1_MOSI Pin <0=>Not Used <1=>PA7 -#define RTE_SPI1_MOSI_PORT_ID_DEF 0 -#if (RTE_SPI1_MOSI_PORT_ID_DEF == 0) -#define RTE_SPI1_MOSI_DEF 0 -#elif (RTE_SPI1_MOSI_PORT_ID_DEF == 1) -#define RTE_SPI1_MOSI_DEF 1 -#define RTE_SPI1_MOSI_PORT_DEF GPIOA -#define RTE_SPI1_MOSI_BIT_DEF 7 -#else -#error "Invalid SPI1_MISO Pin Configuration!" -#endif - -// SPI1 Pin Remap -// Enable SPI1 Pin Remapping. -#define RTE_SPI1_REMAP 0 - -// SPI1_SCK Pin <0=>PB3 -#define RTE_SPI1_SCK_PORT_ID_FULL 0 -#if (RTE_SPI1_SCK_PORT_ID_FULL == 0) -#define RTE_SPI1_SCK_PORT_FULL GPIOB -#define RTE_SPI1_SCK_BIT_FULL 3 -#else -#error "Invalid SPI1_SCK Pin Configuration!" -#endif - -// SPI1_MISO Pin <0=>Not Used <1=>PB4 -#define RTE_SPI1_MISO_PORT_ID_FULL 0 -#if (RTE_SPI1_MISO_PORT_ID_FULL == 0) -#define RTE_SPI1_MISO_FULL 0 -#elif (RTE_SPI1_MISO_PORT_ID_FULL == 1) -#define RTE_SPI1_MISO_FULL 1 -#define RTE_SPI1_MISO_PORT_FULL GPIOB -#define RTE_SPI1_MISO_BIT_FULL 4 -#else -#error "Invalid SPI1_MISO Pin Configuration!" -#endif -// SPI1_MOSI Pin <0=>Not Used <1=>PB5 -#define RTE_SPI1_MOSI_PORT_ID_FULL 0 -#if (RTE_SPI1_MOSI_PORT_ID_FULL == 0) -#define RTE_SPI1_MOSI_FULL 0 -#elif (RTE_SPI1_MOSI_PORT_ID_FULL == 1) -#define RTE_SPI1_MOSI_FULL 1 -#define RTE_SPI1_MOSI_PORT_FULL GPIOB -#define RTE_SPI1_MOSI_BIT_FULL 5 -#else -#error "Invalid SPI1_MOSI Pin Configuration!" -#endif - -// - -#if (RTE_SPI1_REMAP) -#define RTE_SPI1_AF_REMAP AFIO_SPI1_REMAP -#define RTE_SPI1_SCK_PORT RTE_SPI1_SCK_PORT_FULL -#define RTE_SPI1_SCK_BIT RTE_SPI1_SCK_BIT_FULL -#define RTE_SPI1_MISO RTE_SPI1_MISO_FULL -#define RTE_SPI1_MISO_PORT RTE_SPI1_MISO_PORT_FULL -#define RTE_SPI1_MISO_BIT RTE_SPI1_MISO_BIT_FULL -#define RTE_SPI1_MOSI RTE_SPI1_MOSI_FULL -#define RTE_SPI1_MOSI_PORT RTE_SPI1_MOSI_PORT_FULL -#define RTE_SPI1_MOSI_BIT RTE_SPI1_MOSI_BIT_FULL -#else -#define RTE_SPI1_AF_REMAP AFIO_SPI1_NO_REMAP -#define RTE_SPI1_SCK_PORT RTE_SPI1_SCK_PORT_DEF -#define RTE_SPI1_SCK_BIT RTE_SPI1_SCK_BIT_DEF -#define RTE_SPI1_MISO RTE_SPI1_MISO_DEF -#define RTE_SPI1_MISO_PORT RTE_SPI1_MISO_PORT_DEF -#define RTE_SPI1_MISO_BIT RTE_SPI1_MISO_BIT_DEF -#define RTE_SPI1_MOSI RTE_SPI1_MOSI_DEF -#define RTE_SPI1_MOSI_PORT RTE_SPI1_MOSI_PORT_DEF -#define RTE_SPI1_MOSI_BIT RTE_SPI1_MOSI_BIT_DEF -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <2=>2 -// Selects DMA Channel (only Channel 2 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI1_RX_DMA 0 -#define RTE_SPI1_RX_DMA_NUMBER 1 -#define RTE_SPI1_RX_DMA_CHANNEL 2 -#define RTE_SPI1_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <3=>3 -// Selects DMA Channel (only Channel 3 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI1_TX_DMA 0 -#define RTE_SPI1_TX_DMA_NUMBER 1 -#define RTE_SPI1_TX_DMA_CHANNEL 3 -#define RTE_SPI1_TX_DMA_PRIORITY 0 - -// - - -// SPI2 (Serial Peripheral Interface 2) [Driver_SPI2] -// Configuration settings for Driver_SPI2 in component ::CMSIS Driver:SPI -#define RTE_SPI2 0 - -// SPI2_NSS Pin -// Configure Pin if exists -// GPIO Pxy (x = A..G, y = 0..15) -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SPI2_NSS_PIN 1 -#define RTE_SPI2_NSS_PORT GPIO_PORT(1) -#define RTE_SPI2_NSS_BIT 12 - -// SPI2_SCK Pin <0=>PB13 -#define RTE_SPI2_SCK_PORT_ID 0 -#if (RTE_SPI2_SCK_PORT_ID == 0) -#define RTE_SPI2_SCK_PORT GPIOB -#define RTE_SPI2_SCK_BIT 13 -#define RTE_SPI2_SCK_REMAP 0 -#else -#error "Invalid SPI2_SCK Pin Configuration!" -#endif - -// SPI2_MISO Pin <0=>Not Used <1=>PB14 -#define RTE_SPI2_MISO_PORT_ID 0 -#if (RTE_SPI2_MISO_PORT_ID == 0) -#define RTE_SPI2_MISO 0 -#elif (RTE_SPI2_MISO_PORT_ID == 1) -#define RTE_SPI2_MISO 1 -#define RTE_SPI2_MISO_PORT GPIOB -#define RTE_SPI2_MISO_BIT 14 -#define RTE_SPI2_MISO_REMAP 0 -#else -#error "Invalid SPI2_MISO Pin Configuration!" -#endif - -// SPI2_MOSI Pin <0=>Not Used <1=>PB15 -#define RTE_SPI2_MOSI_PORT_ID 0 -#if (RTE_SPI2_MOSI_PORT_ID == 0) -#define RTE_SPI2_MOSI 0 -#elif (RTE_SPI2_MOSI_PORT_ID == 1) -#define RTE_SPI2_MOSI 1 -#define RTE_SPI2_MOSI_PORT GPIOB -#define RTE_SPI2_MOSI_BIT 15 -#define RTE_SPI2_MOSI_REMAP 0 -#else -#error "Invalid SPI2_MISO Pin Configuration!" -#endif - -// DMA Rx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI2_RX_DMA 0 -#define RTE_SPI2_RX_DMA_NUMBER 1 -#define RTE_SPI2_RX_DMA_CHANNEL 4 -#define RTE_SPI2_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <1=>1 -// Selects DMA Number (only DMA1 can be used) -// Channel <5=>5 -// Selects DMA Channel (only Channel 5 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI2_TX_DMA 0 -#define RTE_SPI2_TX_DMA_NUMBER 1 -#define RTE_SPI2_TX_DMA_CHANNEL 5 -#define RTE_SPI2_TX_DMA_PRIORITY 0 - -// - - -// SPI3 (Serial Peripheral Interface 3) [Driver_SPI3] -// Configuration settings for Driver_SPI3 in component ::CMSIS Driver:SPI -#define RTE_SPI3 0 - -// SPI3_NSS Pin -// Configure Pin if exists -// GPIO Pxy (x = A..G, y = 0..15) -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SPI3_NSS_PIN 1 -#define RTE_SPI3_NSS_PORT GPIO_PORT(0) -#define RTE_SPI3_NSS_BIT 15 - -// SPI3_SCK Pin <0=>PB3 -#define RTE_SPI3_SCK_PORT_ID_DEF 0 -#if (RTE_SPI3_SCK_PORT_ID_DEF == 0) -#define RTE_SPI3_SCK_PORT_DEF GPIOB -#define RTE_SPI3_SCK_BIT_DEF 3 -#else -#error "Invalid SPI3_SCK Pin Configuration!" -#endif - -// SPI3_MISO Pin <0=>Not Used <1=>PB4 -#define RTE_SPI3_MISO_PORT_ID_DEF 0 -#if (RTE_SPI3_MISO_PORT_ID_DEF == 0) -#define RTE_SPI3_MISO_DEF 0 -#elif (RTE_SPI3_MISO_PORT_ID_DEF == 1) -#define RTE_SPI3_MISO_DEF 1 -#define RTE_SPI3_MISO_PORT_DEF GPIOB -#define RTE_SPI3_MISO_BIT_DEF 4 -#else -#error "Invalid SPI3_MISO Pin Configuration!" -#endif - -// SPI3_MOSI <0=>Not Used Pin <1=>PB5 -#define RTE_SPI3_MOSI_PORT_ID_DEF 0 -#if (RTE_SPI3_MOSI_PORT_ID_DEF == 0) -#define RTE_SPI3_MOSI_DEF 0 -#elif (RTE_SPI3_MOSI_PORT_ID_DEF == 1) -#define RTE_SPI3_MOSI_DEF 1 -#define RTE_SPI3_MOSI_PORT_DEF GPIOB -#define RTE_SPI3_MOSI_BIT_DEF 5 -#else -#error "Invalid SPI3_MOSI Pin Configuration!" -#endif - -// SPI3 Pin Remap -// Enable SPI3 Pin Remapping. -// SPI 3 Pin Remapping is available only in connectivity line devices! -#define RTE_SPI3_REMAP 0 - -// SPI3_SCK Pin <0=>PC10 -#define RTE_SPI3_SCK_PORT_ID_FULL 0 -#if (RTE_SPI3_SCK_PORT_ID_FULL == 0) -#define RTE_SPI3_SCK_PORT_FULL GPIOC -#define RTE_SPI3_SCK_BIT_FULL 10 -#else -#error "Invalid SPI3_SCK Pin Configuration!" -#endif - -// SPI3_MISO Pin <0=>Not Used <1=>PC11 -#define RTE_SPI3_MISO_PORT_ID_FULL 0 -#if (RTE_SPI3_MISO_PORT_ID_FULL == 0) -#define RTE_SPI3_MISO_FULL 0 -#elif (RTE_SPI3_MISO_PORT_ID_FULL == 1) -#define RTE_SPI3_MISO_FULL 1 -#define RTE_SPI3_MISO_PORT_FULL GPIOC -#define RTE_SPI3_MISO_BIT_FULL 11 -#else -#error "Invalid SPI3_MISO Pin Configuration!" -#endif -// SPI3_MOSI Pin <0=>Not Used <1=>PC12 -#define RTE_SPI3_MOSI_PORT_ID_FULL 0 -#if (RTE_SPI3_MOSI_PORT_ID_FULL == 0) -#define RTE_SPI3_MOSI_FULL 0 -#elif (RTE_SPI3_MOSI_PORT_ID_FULL == 1) -#define RTE_SPI3_MOSI_FULL 1 -#define RTE_SPI3_MOSI_PORT_FULL GPIOC -#define RTE_SPI3_MOSI_BIT_FULL 12 -#else -#error "Invalid SPI3_MOSI Pin Configuration!" -#endif - -// - -#if (RTE_SPI3_REMAP) -#define RTE_SPI3_AF_REMAP AFIO_SPI3_REMAP -#define RTE_SPI3_SCK_PORT RTE_SPI3_SCK_PORT_FULL -#define RTE_SPI3_SCK_BIT RTE_SPI3_SCK_BIT_FULL -#define RTE_SPI3_MISO RTE_SPI3_MISO_FULL -#define RTE_SPI3_MISO_PORT RTE_SPI3_MISO_PORT_FULL -#define RTE_SPI3_MISO_BIT RTE_SPI3_MISO_BIT_FULL -#define RTE_SPI3_MOSI RTE_SPI3_MOSI_FULL -#define RTE_SPI3_MOSI_PORT RTE_SPI3_MOSI_PORT_FULL -#define RTE_SPI3_MOSI_BIT RTE_SPI3_MOSI_BIT_FULL -#else -#define RTE_SPI3_AF_REMAP AFIO_SPI3_NO_REMAP -#define RTE_SPI3_SCK_PORT RTE_SPI3_SCK_PORT_DEF -#define RTE_SPI3_SCK_BIT RTE_SPI3_SCK_BIT_DEF -#define RTE_SPI3_MISO RTE_SPI3_MISO_DEF -#define RTE_SPI3_MISO_PORT RTE_SPI3_MISO_PORT_DEF -#define RTE_SPI3_MISO_BIT RTE_SPI3_MISO_BIT_DEF -#define RTE_SPI3_MOSI RTE_SPI3_MOSI_DEF -#define RTE_SPI3_MOSI_PORT RTE_SPI3_MOSI_PORT_DEF -#define RTE_SPI3_MOSI_BIT RTE_SPI3_MOSI_BIT_DEF -#endif - -// DMA Rx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <1=>1 -// Selects DMA Channel (only Channel 1 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI3_RX_DMA 0 -#define RTE_SPI3_RX_DMA_NUMBER 2 -#define RTE_SPI3_RX_DMA_CHANNEL 1 -#define RTE_SPI3_RX_DMA_PRIORITY 0 - -// DMA Tx -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <2=>2 -// Selects DMA Channel (only Channel 2 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SPI3_TX_DMA 0 -#define RTE_SPI3_TX_DMA_NUMBER 2 -#define RTE_SPI3_TX_DMA_CHANNEL 2 -#define RTE_SPI3_TX_DMA_PRIORITY 0 - -// - - -// SDIO (Secure Digital Input/Output) [Driver_MCI0] -// Configuration settings for Driver_MCI0 in component ::CMSIS Driver:MCI -#define RTE_SDIO 0 - -// SDIO Peripheral Bus -// SDIO_CK Pin <0=>PC12 -#define RTE_SDIO_CK_PORT_ID 0 -#if (RTE_SDIO_CK_PORT_ID == 0) - #define RTE_SDIO_CK_PORT GPIOC - #define RTE_SDIO_CK_PIN 12 -#else - #error "Invalid SDIO_CLK Pin Configuration!" -#endif -// SDIO_CMD Pin <0=>PD2 -#define RTE_SDIO_CMD_PORT_ID 0 -#if (RTE_SDIO_CMD_PORT_ID == 0) - #define RTE_SDIO_CMD_PORT GPIOD - #define RTE_SDIO_CMD_PIN 2 -#else - #error "Invalid SDIO_CMD Pin Configuration!" -#endif -// SDIO_D0 Pin <0=>PC8 -#define RTE_SDIO_D0_PORT_ID 0 -#if (RTE_SDIO_D0_PORT_ID == 0) - #define RTE_SDIO_D0_PORT GPIOC - #define RTE_SDIO_D0_PIN 8 -#else - #error "Invalid SDIO_DAT0 Pin Configuration!" -#endif -// SDIO_D[1 .. 3] -#define RTE_SDIO_BUS_WIDTH_4 1 -// SDIO_D1 Pin <0=>PC9 -#define RTE_SDIO_D1_PORT_ID 0 -#if (RTE_SDIO_D1_PORT_ID == 0) - #define RTE_SDIO_D1_PORT GPIOC - #define RTE_SDIO_D1_PIN 9 -#else - #error "Invalid SDIO_D1 Pin Configuration!" -#endif -// SDIO_D2 Pin <0=>PC10 -#define RTE_SDIO_D2_PORT_ID 0 -#if (RTE_SDIO_D2_PORT_ID == 0) - #define RTE_SDIO_D2_PORT GPIOC - #define RTE_SDIO_D2_PIN 10 -#else - #error "Invalid SDIO_D2 Pin Configuration!" -#endif -// SDIO_D3 Pin <0=>PC11 -#define RTE_SDIO_D3_PORT_ID 0 -#if (RTE_SDIO_D3_PORT_ID == 0) - #define RTE_SDIO_D3_PORT GPIOC - #define RTE_SDIO_D3_PIN 11 -#else - #error "Invalid SDIO_D3 Pin Configuration!" -#endif -// SDIO_D[1 .. 3] -// SDIO_D[4 .. 7] -#define RTE_SDIO_BUS_WIDTH_8 0 -// SDIO_D4 Pin <0=>PB8 -#define RTE_SDIO_D4_PORT_ID 0 -#if (RTE_SDIO_D4_PORT_ID == 0) - #define RTE_SDIO_D4_PORT GPIOB - #define RTE_SDIO_D4_PIN 8 -#else - #error "Invalid SDIO_D4 Pin Configuration!" -#endif -// SDIO_D5 Pin <0=>PB9 -#define RTE_SDIO_D5_PORT_ID 0 -#if (RTE_SDIO_D5_PORT_ID == 0) - #define RTE_SDIO_D5_PORT GPIOB - #define RTE_SDIO_D5_PIN 9 -#else - #error "Invalid SDIO_D5 Pin Configuration!" -#endif -// SDIO_D6 Pin <0=>PC6 -#define RTE_SDIO_D6_PORT_ID 0 -#if (RTE_SDIO_D6_PORT_ID == 0) - #define RTE_SDIO_D6_PORT GPIOC - #define RTE_SDIO_D6_PIN 6 -#else - #error "Invalid SDIO_D6 Pin Configuration!" -#endif -// SDIO_D7 Pin <0=>PC7 -#define RTE_SDIO_D7_PORT_ID 0 -#if (RTE_SDIO_D7_PORT_ID == 0) - #define RTE_SDIO_D7_PORT GPIOC - #define RTE_SDIO_D7_PIN 7 -#else - #error "Invalid SDIO_D7 Pin Configuration!" -#endif -// SDIO_D[4 .. 7] -// SDIO Peripheral Bus - -// Card Detect Pin -// Configure Pin if exists -// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SDIO_CD_EN 1 -#define RTE_SDIO_CD_ACTIVE 0 -#define RTE_SDIO_CD_PORT GPIO_PORT(5) -#define RTE_SDIO_CD_PIN 11 - -// Write Protect Pin -// Configure Pin if exists -// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_SDIO_WP_EN 0 -#define RTE_SDIO_WP_ACTIVE 1 -#define RTE_SDIO_WP_PORT GPIO_PORT(0) -#define RTE_SDIO_WP_PIN 10 - -// DMA -// Number <2=>2 -// Selects DMA Number (only DMA2 can be used) -// Channel <4=>4 -// Selects DMA Channel (only Channel 4 can be used) -// Priority <0=>Low <1=>Medium <2=>High <3=>Very High -// Selects DMA Priority -// -#define RTE_SDIO_DMA_NUMBER 2 -#define RTE_SDIO_DMA_CHANNEL 4 -#define RTE_SDIO_DMA_PRIORITY 0 - -// - - -// CAN1 (Controller Area Network 1) [Driver_CAN1] -// Configuration settings for Driver_CAN1 in component ::CMSIS Driver:CAN -#define RTE_CAN1 0 - -// CAN1_RX Pin <0=>PA11 <1=>PB8 <2=>PD0 -#define RTE_CAN1_RX_PORT_ID 0 -#if (RTE_CAN1_RX_PORT_ID == 0) -#define RTE_CAN1_RX_PORT GPIOA -#define RTE_CAN1_RX_BIT 11 -#elif (RTE_CAN1_RX_PORT_ID == 1) -#define RTE_CAN1_RX_PORT GPIOB -#define RTE_CAN1_RX_BIT 8 -#elif (RTE_CAN1_RX_PORT_ID == 2) -#define RTE_CAN1_RX_PORT GPIOD -#define RTE_CAN1_RX_BIT 0 -#else -#error "Invalid CAN1_RX Pin Configuration!" -#endif - -// CAN1_TX Pin <0=>PA12 <1=>PB9 <2=>PD1 -#define RTE_CAN1_TX_PORT_ID 0 -#if (RTE_CAN1_TX_PORT_ID == 0) -#define RTE_CAN1_TX_PORT GPIOA -#define RTE_CAN1_TX_BIT 12 -#elif (RTE_CAN1_TX_PORT_ID == 1) -#define RTE_CAN1_TX_PORT GPIOB -#define RTE_CAN1_TX_BIT 9 -#elif (RTE_CAN1_TX_PORT_ID == 2) -#define RTE_CAN1_TX_PORT GPIOD -#define RTE_CAN1_TX_BIT 1 -#else -#error "Invalid CAN1_TX Pin Configuration!" -#endif - -// - - -// CAN2 (Controller Area Network 2) [Driver_CAN2] -// Configuration settings for Driver_CAN2 in component ::CMSIS Driver:CAN -#define RTE_CAN2 0 - -// CAN2_RX Pin <0=>PB5 <1=>PB12 -#define RTE_CAN2_RX_PORT_ID 0 -#if (RTE_CAN2_RX_PORT_ID == 0) -#define RTE_CAN2_RX_PORT GPIOB -#define RTE_CAN2_RX_BIT 5 -#elif (RTE_CAN2_RX_PORT_ID == 1) -#define RTE_CAN2_RX_PORT GPIOB -#define RTE_CAN2_RX_BIT 12 -#else -#error "Invalid CAN2_RX Pin Configuration!" -#endif - -// CAN2_TX Pin <0=>PB6 <1=>PB13 -#define RTE_CAN2_TX_PORT_ID 0 -#if (RTE_CAN2_TX_PORT_ID == 0) -#define RTE_CAN2_TX_PORT GPIOB -#define RTE_CAN2_TX_BIT 6 -#elif (RTE_CAN2_TX_PORT_ID == 1) -#define RTE_CAN2_TX_PORT GPIOB -#define RTE_CAN2_TX_BIT 13 -#else -#error "Invalid CAN2_TX Pin Configuration!" -#endif - -// - - -// ETH (Ethernet Interface) [Driver_ETH_MAC0] -// Configuration settings for Driver_ETH_MAC0 in component ::CMSIS Driver:Ethernet MAC -#define RTE_ETH 0 - -// MII (Media Independent Interface) -// Enable Media Independent Interface pin configuration -#define RTE_ETH_MII 0 - -// ETH_MII_TX_CLK Pin <0=>PC3 -#define RTE_ETH_MII_TX_CLK_PORT_ID 0 -#if (RTE_ETH_MII_TX_CLK_PORT_ID == 0) -#define RTE_ETH_MII_TX_CLK_PORT GPIOC -#define RTE_ETH_MII_TX_CLK_PIN 3 -#else -#error "Invalid ETH_MII_TX_CLK Pin Configuration!" -#endif -// ETH_MII_TXD0 Pin <0=>PB12 -#define RTE_ETH_MII_TXD0_PORT_ID 0 -#if (RTE_ETH_MII_TXD0_PORT_ID == 0) -#define RTE_ETH_MII_TXD0_PORT GPIOB -#define RTE_ETH_MII_TXD0_PIN 12 -#else -#error "Invalid ETH_MII_TXD0 Pin Configuration!" -#endif -// ETH_MII_TXD1 Pin <0=>PB13 -#define RTE_ETH_MII_TXD1_PORT_ID 0 -#if (RTE_ETH_MII_TXD1_PORT_ID == 0) -#define RTE_ETH_MII_TXD1_PORT GPIOB -#define RTE_ETH_MII_TXD1_PIN 13 -#else -#error "Invalid ETH_MII_TXD1 Pin Configuration!" -#endif -// ETH_MII_TXD2 Pin <0=>PC2 -#define RTE_ETH_MII_TXD2_PORT_ID 0 -#if (RTE_ETH_MII_TXD2_PORT_ID == 0) -#define RTE_ETH_MII_TXD2_PORT GPIOC -#define RTE_ETH_MII_TXD2_PIN 2 -#else -#error "Invalid ETH_MII_TXD2 Pin Configuration!" -#endif -// ETH_MII_TXD3 Pin <0=>PB8 -#define RTE_ETH_MII_TXD3_PORT_ID 0 -#if (RTE_ETH_MII_TXD3_PORT_ID == 0) -#define RTE_ETH_MII_TXD3_PORT GPIOB -#define RTE_ETH_MII_TXD3_PIN 8 -#else -#error "Invalid ETH_MII_TXD3 Pin Configuration!" -#endif -// ETH_MII_TX_EN Pin <0=>PB11 -#define RTE_ETH_MII_TX_EN_PORT_ID 0 -#if (RTE_ETH_MII_TX_EN_PORT_ID == 0) -#define RTE_ETH_MII_TX_EN_PORT GPIOB -#define RTE_ETH_MII_TX_EN_PIN 11 -#else -#error "Invalid ETH_MII_TX_EN Pin Configuration!" -#endif -// ETH_MII_RX_CLK Pin <0=>PA1 -#define RTE_ETH_MII_RX_CLK_PORT_ID 0 -#if (RTE_ETH_MII_RX_CLK_PORT_ID == 0) -#define RTE_ETH_MII_RX_CLK_PORT GPIOA -#define RTE_ETH_MII_RX_CLK_PIN 1 -#else -#error "Invalid ETH_MII_RX_CLK Pin Configuration!" -#endif -// ETH_MII_RXD0 Pin <0=>PC4 -#define RTE_ETH_MII_RXD0_DEF 0 - -// ETH_MII_RXD1 Pin <0=>PC5 -#define RTE_ETH_MII_RXD1_DEF 0 - -// ETH_MII_RXD2 Pin <0=>PB0 -#define RTE_ETH_MII_RXD2_DEF 0 - -// ETH_MII_RXD3 Pin <0=>PB1 <1=>PD12 -#define RTE_ETH_MII_RXD3_DEF 0 - -// ETH_MII_RX_DV Pin <0=>PA7 -#define RTE_ETH_MII_RX_DV_DEF 0 - -// ETH_MII_RX_ER Pin <0=>PB10 -#define RTE_ETH_MII_RX_ER_PORT_ID 0 -#if (RTE_ETH_MII_RX_ER_PORT_ID == 0) -#define RTE_ETH_MII_RX_ER_PORT GPIOB -#define RTE_ETH_MII_RX_ER_PIN 10 -#else -#error "Invalid ETH_MII_RX_ER Pin Configuration!" -#endif -// ETH_MII_CRS Pin <0=>PA0 -#define RTE_ETH_MII_CRS_PORT_ID 0 -#if (RTE_ETH_MII_CRS_PORT_ID == 0) -#define RTE_ETH_MII_CRS_PORT GPIOA -#define RTE_ETH_MII_CRS_PIN 0 -#else -#error "Invalid ETH_MII_CRS Pin Configuration!" -#endif -// ETH_MII_COL Pin <0=>PA3 -#define RTE_ETH_MII_COL_PORT_ID 0 -#if (RTE_ETH_MII_COL_PORT_ID == 0) -#define RTE_ETH_MII_COL_PORT GPIOA -#define RTE_ETH_MII_COL_PIN 3 -#else -#error "Invalid ETH_MII_COL Pin Configuration!" -#endif - -// Ethernet MAC I/O remapping -// Remap Ethernet pins -#define RTE_ETH_MII_REMAP 0 - -// ETH_MII_RXD0 Pin <1=>PD9 -#define RTE_ETH_MII_RXD0_REMAP 1 - -// ETH_MII_RXD1 Pin <1=>PD10 -#define RTE_ETH_MII_RXD1_REMAP 1 - -// ETH_MII_RXD2 Pin <1=>PD11 -#define RTE_ETH_MII_RXD2_REMAP 1 - -// ETH_MII_RXD3 Pin <1=>PD12 -#define RTE_ETH_MII_RXD3_REMAP 1 - -// ETH_MII_RX_DV Pin <1=>PD8 -#define RTE_ETH_MII_RX_DV_REMAP 1 -// - -// - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD0_DEF == 0)) -#define RTE_ETH_MII_RXD0_PORT GPIOC -#define RTE_ETH_MII_RXD0_PIN 4 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD0_REMAP == 1)) -#define RTE_ETH_MII_RXD0_PORT GPIOD -#define RTE_ETH_MII_RXD0_PIN 9 -#else -#error "Invalid ETH_MII_RXD0 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD1_DEF == 0)) -#define RTE_ETH_MII_RXD1_PORT GPIOC -#define RTE_ETH_MII_RXD1_PIN 5 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD1_REMAP == 1)) -#define RTE_ETH_MII_RXD1_PORT GPIOD -#define RTE_ETH_MII_RXD1_PIN 10 -#else -#error "Invalid ETH_MII_RXD1 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD2_DEF == 0)) -#define RTE_ETH_MII_RXD2_PORT GPIOB -#define RTE_ETH_MII_RXD2_PIN 0 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD2_REMAP == 1)) -#define RTE_ETH_MII_RXD2_PORT GPIOD -#define RTE_ETH_MII_RXD2_PIN 11 -#else -#error "Invalid ETH_MII_RXD2 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RXD3_DEF == 0)) -#define RTE_ETH_MII_RXD3_PORT GPIOB -#define RTE_ETH_MII_RXD3_PIN 1 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RXD3_REMAP == 1)) -#define RTE_ETH_MII_RXD3_PORT GPIOD -#define RTE_ETH_MII_RXD3_PIN 12 -#else -#error "Invalid ETH_MII_RXD3 Pin Configuration!" -#endif - -#if ((RTE_ETH_MII_REMAP == 0) && (RTE_ETH_MII_RX_DV_DEF == 0)) -#define RTE_ETH_MII_RX_DV_PORT GPIOA -#define RTE_ETH_MII_RX_DV_PIN 7 -#elif ((RTE_ETH_MII_REMAP == 1) && (RTE_ETH_MII_RX_DV_REMAP == 1)) -#define RTE_ETH_MII_RX_DV_PORT GPIOD -#define RTE_ETH_MII_RX_DV_PIN 8 -#else -#error "Invalid ETH_MII_RX_DV Pin Configuration!" -#endif - -// RMII (Reduced Media Independent Interface) -#define RTE_ETH_RMII 0 - -// ETH_RMII_TXD0 Pin <0=>PB12 -#define RTE_ETH_RMII_TXD0_PORT_ID 0 -#if (RTE_ETH_RMII_TXD0_PORT_ID == 0) -#define RTE_ETH_RMII_TXD0_PORT GPIOB -#define RTE_ETH_RMII_TXD0_PIN 12 -#else -#error "Invalid ETH_RMII_TXD0 Pin Configuration!" -#endif -// ETH_RMII_TXD1 Pin <0=>PB13 -#define RTE_ETH_RMII_TXD1_PORT_ID 0 -#if (RTE_ETH_RMII_TXD1_PORT_ID == 0) -#define RTE_ETH_RMII_TXD1_PORT GPIOB -#define RTE_ETH_RMII_TXD1_PIN 13 -#else -#error "Invalid ETH_RMII_TXD1 Pin Configuration!" -#endif -// ETH_RMII_TX_EN Pin <0=>PB11 -#define RTE_ETH_RMII_TX_EN_PORT_ID 0 -#if (RTE_ETH_RMII_TX_EN_PORT_ID == 0) -#define RTE_ETH_RMII_TX_EN_PORT GPIOB -#define RTE_ETH_RMII_TX_EN_PIN 11 -#else -#error "Invalid ETH_RMII_TX_EN Pin Configuration!" -#endif -// ETH_RMII_RXD0 Pin <0=>PC4 -#define RTE_ETH_RMII_RXD0_DEF 0 - -// ETH_RMII_RXD1 Pin <0=>PC5 -#define RTE_ETH_RMII_RXD1_DEF 0 - -// ETH_RMII_REF_CLK Pin <0=>PA1 -#define RTE_ETH_RMII_REF_CLK_PORT_ID 0 -#if (RTE_ETH_RMII_REF_CLK_PORT_ID == 0) -#define RTE_ETH_RMII_REF_CLK_PORT GPIOA -#define RTE_ETH_RMII_REF_CLK_PIN 1 -#else -#error "Invalid ETH_RMII_REF_CLK Pin Configuration!" -#endif -// ETH_RMII_CRS_DV Pin <0=>PA7 -#define RTE_ETH_RMII_CRS_DV_DEF 0 - -// Ethernet MAC I/O remapping -// Remap Ethernet pins -#define RTE_ETH_RMII_REMAP 0 -// ETH_RMII_RXD0 Pin <1=>PD9 -#define RTE_ETH_RMII_RXD0_REMAP 1 - -// ETH_RMII_RXD1 Pin <1=>PD10 -#define RTE_ETH_RMII_RXD1_REMAP 1 - -// ETH_RMII_CRS_DV Pin <1=>PD8 -#define RTE_ETH_RMII_CRS_DV_REMAP 1 -// - -#if ((RTE_ETH_RMII_REMAP == 0) && (RTE_ETH_RMII_RXD0_DEF == 0)) -#define RTE_ETH_RMII_RXD0_PORT GPIOC -#define RTE_ETH_RMII_RXD0_PIN 4 -#elif ((RTE_ETH_RMII_REMAP == 1) && (RTE_ETH_RMII_RXD0_REMAP == 1)) -#define RTE_ETH_RMII_RXD0_PORT GPIOD -#define RTE_ETH_RMII_RXD0_PIN 9 -#else -#error "Invalid ETH_RMII_RXD0 Pin Configuration!" -#endif - -#if ((RTE_ETH_RMII_REMAP == 0) && (RTE_ETH_RMII_RXD1_DEF == 0)) -#define RTE_ETH_RMII_RXD1_PORT GPIOC -#define RTE_ETH_RMII_RXD1_PIN 5 -#elif ((RTE_ETH_RMII_REMAP == 1) && (RTE_ETH_RMII_RXD1_REMAP == 1)) -#define RTE_ETH_RMII_RXD1_PORT GPIOD -#define RTE_ETH_RMII_RXD1_PIN 10 -#else -#error "Invalid ETH_RMII_RXD1 Pin Configuration!" -#endif - -#if ((RTE_ETH_RMII_REMAP == 0) && (RTE_ETH_RMII_CRS_DV_DEF == 0)) -#define RTE_ETH_RMII_CRS_DV_PORT GPIOA -#define RTE_ETH_RMII_CRS_DV_PIN 7 -#elif ((RTE_ETH_RMII_REMAP == 1) && (RTE_ETH_RMII_CRS_DV_REMAP == 1)) -#define RTE_ETH_RMII_CRS_DV_PORT GPIOD -#define RTE_ETH_RMII_CRS_DV_PIN 8 -#else -#error "Invalid ETH_RMII_CRS_DV Pin Configuration!" -#endif - -// - -// Management Data Interface -// ETH_MDC Pin <0=>PC1 -#define RTE_ETH_MDI_MDC_PORT_ID 0 -#if (RTE_ETH_MDI_MDC_PORT_ID == 0) -#define RTE_ETH_MDI_MDC_PORT GPIOC -#define RTE_ETH_MDI_MDC_PIN 1 -#else -#error "Invalid ETH_MDC Pin Configuration!" -#endif -// ETH_MDIO Pin <0=>PA2 -#define RTE_ETH_MDI_MDIO_PORT_ID 0 -#if (RTE_ETH_MDI_MDIO_PORT_ID == 0) -#define RTE_ETH_MDI_MDIO_PORT GPIOA -#define RTE_ETH_MDI_MDIO_PIN 2 -#else -#error "Invalid ETH_MDIO Pin Configuration!" -#endif -// - -// Reference 25MHz Clock generation on MCO pin <0=>Disabled <1=>Enabled -#define RTE_ETH_REF_CLOCK_ID 0 -#if (RTE_ETH_REF_CLOCK_ID == 0) -#define RTE_ETH_REF_CLOCK 0 -#elif (RTE_ETH_REF_CLOCK_ID == 1) -#define RTE_ETH_REF_CLOCK 1 -#else -#error "Invalid MCO Ethernet Reference Clock Configuration!" -#endif -// - - -// USB Device Full-speed -// Configuration settings for Driver_USBD0 in component ::Drivers:USB Device -#define RTE_USB_DEVICE 0 - -// CON On/Off Pin -// Configure Pin for driving D+ pull-up -// GPIO Pxy (x = A..G, y = 0..15) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_USB_DEVICE_CON_PIN 1 -#define RTE_USB_DEVICE_CON_ACTIVE 0 -#define RTE_USB_DEVICE_CON_PORT GPIO_PORT(1) -#define RTE_USB_DEVICE_CON_BIT 14 - -// - - -// USB OTG Full-speed -#define RTE_USB_OTG_FS 0 - -// Host [Driver_USBH0] -// Configuration settings for Driver_USBH0 in component ::Drivers:USB Host - -#define RTE_USB_OTG_FS_HOST 0 - -// VBUS Power On/Off Pin -// Configure Pin for driving VBUS -// GPIO Pxy (x = A..G, y = 0..15) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_OTG_FS_VBUS_PIN 1 -#define RTE_OTG_FS_VBUS_ACTIVE 0 -#define RTE_OTG_FS_VBUS_PORT GPIO_PORT(2) -#define RTE_OTG_FS_VBUS_BIT 9 - -// Overcurrent Detection Pin -// Configure Pin for overcurrent detection -// GPIO Pxy (x = A..G, y = 0..15) -// Active State <0=>Low <1=>High -// Selects Active State Logical Level -// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD -// <4=>GPIOE <5=>GPIOF <6=>GPIOG -// Selects Port Name -// Bit <0-15> -// Selects Port Bit -// -#define RTE_OTG_FS_OC_PIN 1 -#define RTE_OTG_FS_OC_ACTIVE 0 -#define RTE_OTG_FS_OC_PORT GPIO_PORT(4) -#define RTE_OTG_FS_OC_BIT 1 -// - -// - - -#endif /* __RTE_DEVICE_H */ diff --git a/RTE/Device/STM32F103RB/STM32F101_102_103_105_107.dbgconf b/RTE/Device/STM32F103RB/STM32F101_102_103_105_107.dbgconf deleted file mode 100644 index 9c4804d..0000000 --- a/RTE/Device/STM32F103RB/STM32F101_102_103_105_107.dbgconf +++ /dev/null @@ -1,36 +0,0 @@ -// File: STM32F101_102_103_105_107.dbgconf -// Version: 1.0.0 -// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) -// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets - -// <<< Use Configuration Wizard in Context Menu >>> - -// Debug MCU configuration register (DBGMCU_CR) -// Reserved bits must be kept at reset value -// DBG_TIM11_STOP TIM11 counter stopped when core is halted -// DBG_TIM10_STOP TIM10 counter stopped when core is halted -// DBG_TIM9_STOP TIM9 counter stopped when core is halted -// DBG_TIM14_STOP TIM14 counter stopped when core is halted -// DBG_TIM13_STOP TIM13 counter stopped when core is halted -// DBG_TIM12_STOP TIM12 counter stopped when core is halted -// DBG_CAN2_STOP Debug CAN2 stopped when core is halted -// DBG_TIM7_STOP TIM7 counter stopped when core is halted -// DBG_TIM6_STOP TIM6 counter stopped when core is halted -// DBG_TIM5_STOP TIM5 counter stopped when core is halted -// DBG_TIM8_STOP TIM8 counter stopped when core is halted -// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted -// DBG_TIM4_STOP TIM4 counter stopped when core is halted -// DBG_TIM3_STOP TIM3 counter stopped when core is halted -// DBG_TIM2_STOP TIM2 counter stopped when core is halted -// DBG_TIM1_STOP TIM1 counter stopped when core is halted -// DBG_WWDG_STOP Debug window watchdog stopped when core is halted -// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted -// DBG_STANDBY Debug standby mode -// DBG_STOP Debug stop mode -// DBG_SLEEP Debug sleep mode -// -DbgMCU_CR = 0x00000007; - -// <<< end of configuration section >>> diff --git a/RTE/Device/STM32F103RB/STM32F101_102_103_105_107.dbgconf.base@1.0.0 b/RTE/Device/STM32F103RB/STM32F101_102_103_105_107.dbgconf.base@1.0.0 deleted file mode 100644 index 9c4804d..0000000 --- a/RTE/Device/STM32F103RB/STM32F101_102_103_105_107.dbgconf.base@1.0.0 +++ /dev/null @@ -1,36 +0,0 @@ -// File: STM32F101_102_103_105_107.dbgconf -// Version: 1.0.0 -// Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008) -// STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets - -// <<< Use Configuration Wizard in Context Menu >>> - -// Debug MCU configuration register (DBGMCU_CR) -// Reserved bits must be kept at reset value -// DBG_TIM11_STOP TIM11 counter stopped when core is halted -// DBG_TIM10_STOP TIM10 counter stopped when core is halted -// DBG_TIM9_STOP TIM9 counter stopped when core is halted -// DBG_TIM14_STOP TIM14 counter stopped when core is halted -// DBG_TIM13_STOP TIM13 counter stopped when core is halted -// DBG_TIM12_STOP TIM12 counter stopped when core is halted -// DBG_CAN2_STOP Debug CAN2 stopped when core is halted -// DBG_TIM7_STOP TIM7 counter stopped when core is halted -// DBG_TIM6_STOP TIM6 counter stopped when core is halted -// DBG_TIM5_STOP TIM5 counter stopped when core is halted -// DBG_TIM8_STOP TIM8 counter stopped when core is halted -// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted -// DBG_CAN1_STOP Debug CAN1 stopped when Core is halted -// DBG_TIM4_STOP TIM4 counter stopped when core is halted -// DBG_TIM3_STOP TIM3 counter stopped when core is halted -// DBG_TIM2_STOP TIM2 counter stopped when core is halted -// DBG_TIM1_STOP TIM1 counter stopped when core is halted -// DBG_WWDG_STOP Debug window watchdog stopped when core is halted -// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted -// DBG_STANDBY Debug standby mode -// DBG_STOP Debug stop mode -// DBG_SLEEP Debug sleep mode -// -DbgMCU_CR = 0x00000007; - -// <<< end of configuration section >>> diff --git a/RTE/Device/STM32F103RB/startup_stm32f10x_md.s b/RTE/Device/STM32F103RB/startup_stm32f10x_md.s deleted file mode 100644 index 3db5920..0000000 --- a/RTE/Device/STM32F103RB/startup_stm32f10x_md.s +++ /dev/null @@ -1,308 +0,0 @@ -;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_md.s -;* Author : MCD Application Team -;* Version : V3.5.1 -;* Date : 08-September-2021 -;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -;* -;* Copyright (c) 2011 STMicroelectronics. -;* All rights reserved. -;* -;* This software is licensed under terms that can be found in the LICENSE file -;* in the root directory of this software component. -;* If no LICENSE file comes with this software, it is provided AS-IS. -; -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1_2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] - EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT USBWakeUp_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -USB_HP_CAN1_TX_IRQHandler -USB_LP_CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -USBWakeUp_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - diff --git a/RTE/Device/STM32F103RB/startup_stm32f10x_md.s.base@1.0.1 b/RTE/Device/STM32F103RB/startup_stm32f10x_md.s.base@1.0.1 deleted file mode 100644 index 3db5920..0000000 --- a/RTE/Device/STM32F103RB/startup_stm32f10x_md.s.base@1.0.1 +++ /dev/null @@ -1,308 +0,0 @@ -;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_md.s -;* Author : MCD Application Team -;* Version : V3.5.1 -;* Date : 08-September-2021 -;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -;* -;* Copyright (c) 2011 STMicroelectronics. -;* All rights reserved. -;* -;* This software is licensed under terms that can be found in the LICENSE file -;* in the root directory of this software component. -;* If no LICENSE file comes with this software, it is provided AS-IS. -; -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1_2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] - EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT USBWakeUp_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -USB_HP_CAN1_TX_IRQHandler -USB_LP_CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -USBWakeUp_IRQHandler - - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - diff --git a/RTE/Device/STM32F103RB/system_stm32f10x.c b/RTE/Device/STM32F103RB/system_stm32f10x.c deleted file mode 100644 index 3301967..0000000 --- a/RTE/Device/STM32F103RB/system_stm32f10x.c +++ /dev/null @@ -1,1092 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f10x.c - * @author MCD Application Team - * @version V3.5.1 - * @date 08-September-2021 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. - * - * 1. This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier - * factors, AHB/APBx prescalers and Flash settings). - * This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32f10x_xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * 2. After each device reset the HSI (8 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to - * configure the system clock before to branch to main program. - * - * 3. If the system clock source selected by user fails to startup, the SystemInit() - * function will do nothing and HSI still used as system clock source. User can - * add some code to deal with this issue inside the SetSysClock() function. - * - * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on - * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. - * When HSE is used as system clock source, directly or through PLL, and you - * are using different crystal you have to adapt the HSE value to your own - * configuration. - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2011 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x_system - * @{ - */ - -/** @addtogroup STM32F10x_System_Private_Includes - * @{ - */ - -#include "stm32f10x.h" - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Defines - * @{ - */ - -/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) - frequency (after reset the HSI is used as SYSCLK source) - - IMPORTANT NOTE: - ============== - 1. After each device reset the HSI is used as System clock source. - - 2. Please make sure that the selected System clock doesn't exceed your device's - maximum frequency. - - 3. If none of the define below is enabled, the HSI is used as System clock - source. - - 4. The System clock configuration functions provided within this file assume that: - - For Low, Medium and High density Value line devices an external 8MHz - crystal is used to drive the System clock. - - For Low, Medium and High density devices an external 8MHz crystal is - used to drive the System clock. - - For Connectivity line devices an external 25MHz crystal is used to drive - the System clock. - If you are using different crystal you have to adapt those functions accordingly. - */ - -#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) -/* #define SYSCLK_FREQ_HSE HSE_VALUE */ - #define SYSCLK_FREQ_24MHz 24000000 -#else -/* #define SYSCLK_FREQ_HSE HSE_VALUE */ -/* #define SYSCLK_FREQ_24MHz 24000000 */ -/* #define SYSCLK_FREQ_36MHz 36000000 */ -/* #define SYSCLK_FREQ_48MHz 48000000 */ -/* #define SYSCLK_FREQ_56MHz 56000000 */ -#define SYSCLK_FREQ_72MHz 72000000 -#endif - -/*!< Uncomment the following line if you need to use external SRAM mounted - on STM3210E-EVAL board (STM32 High density and XL-density devices) or on - STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ -#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) -/* #define DATA_IN_ExtSRAM */ -#endif - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ - - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Variables - * @{ - */ - -/******************************************************************************* -* Clock Definitions -*******************************************************************************/ -#ifdef SYSCLK_FREQ_HSE - uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_24MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_36MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_48MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_56MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_72MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ -#else /*!< HSI Selected as System Clock source */ - uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ -#endif - -__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_FunctionPrototypes - * @{ - */ - -static void SetSysClock(void); - -#ifdef SYSCLK_FREQ_HSE - static void SetSysClockToHSE(void); -#elif defined SYSCLK_FREQ_24MHz - static void SetSysClockTo24(void); -#elif defined SYSCLK_FREQ_36MHz - static void SetSysClockTo36(void); -#elif defined SYSCLK_FREQ_48MHz - static void SetSysClockTo48(void); -#elif defined SYSCLK_FREQ_56MHz - static void SetSysClockTo56(void); -#elif defined SYSCLK_FREQ_72MHz - static void SetSysClockTo72(void); -#endif - -#ifdef DATA_IN_ExtSRAM - static void SystemInit_ExtMemCtl(void); -#endif /* DATA_IN_ExtSRAM */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system - * Initialize the Embedded Flash Interface, the PLL and update the - * SystemCoreClock variable. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -void SystemInit (void) -{ - /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ -#ifndef STM32F10X_CL - RCC->CFGR &= (uint32_t)0xF8FF0000; -#else - RCC->CFGR &= (uint32_t)0xF0FF0000; -#endif /* STM32F10X_CL */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ - RCC->CFGR &= (uint32_t)0xFF80FFFF; - -#ifdef STM32F10X_CL - /* Reset PLL2ON and PLL3ON bits */ - RCC->CR &= (uint32_t)0xEBFFFFFF; - - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x00FF0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#else - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) - #ifdef DATA_IN_ExtSRAM - SystemInit_ExtMemCtl(); - #endif /* DATA_IN_ExtSRAM */ -#endif - - /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ - /* Configure the Flash Latency cycles and enable prefetch buffer */ - SetSysClock(); - -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) - * or HSI_VALUE(*) multiplied by the PLL factors. - * - * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value - * 8 MHz or 25 MHz, depending on the product used), user has to ensure - * that HSE_VALUE is same as the real frequency of the crystal used. - * Otherwise, this function may have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0; - -#ifdef STM32F10X_CL - uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - uint32_t prediv1factor = 0; -#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - case 0x04: /* HSE used as system clock */ - SystemCoreClock = HSE_VALUE; - break; - case 0x08: /* PLL used as system clock */ - - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - -#ifndef STM32F10X_CL - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - { - #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - #else - /* HSE selected as PLL clock entry */ - if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) - {/* HSE oscillator clock divided by 2 */ - SystemCoreClock = (HSE_VALUE >> 1) * pllmull; - } - else - { - SystemCoreClock = HSE_VALUE * pllmull; - } - #endif - } -#else - pllmull = pllmull >> 18; - - if (pllmull != 0x0D) - { - pllmull += 2; - } - else - { /* PLL multiplication factor = PLL input clock * 6.5 */ - pllmull = 13 / 2; - } - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - {/* PREDIV1 selected as PLL clock entry */ - - /* Get PREDIV1 clock source and division factor */ - prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - - if (prediv1source == 0) - { - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - } - else - {/* PLL2 clock selected as PREDIV1 clock entry */ - - /* Get PREDIV2 division factor and PLL2 multiplication factor */ - prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; - pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; - SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; - } - } -#endif /* STM32F10X_CL */ - break; - - default: - SystemCoreClock = HSI_VALUE; - break; - } - - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. - * @param None - * @retval None - */ -static void SetSysClock(void) -{ -#ifdef SYSCLK_FREQ_HSE - SetSysClockToHSE(); -#elif defined SYSCLK_FREQ_24MHz - SetSysClockTo24(); -#elif defined SYSCLK_FREQ_36MHz - SetSysClockTo36(); -#elif defined SYSCLK_FREQ_48MHz - SetSysClockTo48(); -#elif defined SYSCLK_FREQ_56MHz - SetSysClockTo56(); -#elif defined SYSCLK_FREQ_72MHz - SetSysClockTo72(); -#endif - - /* If none of the define above is enabled, the HSI is used as System clock - source (default after reset) */ -} - -/** - * @brief Setup the external memory controller. Called in startup_stm32f10x.s - * before jump to __main - * @param None - * @retval None - */ -#ifdef DATA_IN_ExtSRAM -/** - * @brief Setup the external memory controller. - * Called in startup_stm32f10x_xx.s/.c before jump to main. - * This function configures the external SRAM mounted on STM3210E-EVAL - * board (STM32 High density devices). This SRAM will be used as program - * data memory (including heap and stack). - * @param None - * @retval None - */ -void SystemInit_ExtMemCtl(void) -{ -/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is - required, then adjust the Register Addresses */ - - /* Enable FSMC clock */ - RCC->AHBENR = 0x00000114; - - /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ - RCC->APB2ENR = 0x000001E0; - -/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ -/*---------------- SRAM Address lines configuration -------------------------*/ -/*---------------- NOE and NWE configuration --------------------------------*/ -/*---------------- NE3 configuration ----------------------------------------*/ -/*---------------- NBL0, NBL1 configuration ---------------------------------*/ - - GPIOD->CRL = 0x44BB44BB; - GPIOD->CRH = 0xBBBBBBBB; - - GPIOE->CRL = 0xB44444BB; - GPIOE->CRH = 0xBBBBBBBB; - - GPIOF->CRL = 0x44BBBBBB; - GPIOF->CRH = 0xBBBB4444; - - GPIOG->CRL = 0x44BBBBBB; - GPIOG->CRH = 0x44444B44; - -/*---------------- FSMC Configuration ---------------------------------------*/ -/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ - - FSMC_Bank1->BTCR[4] = 0x00001011; - FSMC_Bank1->BTCR[5] = 0x00000200; -} -#endif /* DATA_IN_ExtSRAM */ - -#ifdef SYSCLK_FREQ_HSE -/** - * @brief Selects HSE as System clock source and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockToHSE(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - -#ifndef STM32F10X_CL - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#else - if (HSE_VALUE <= 24000000) - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; - } - else - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - } -#endif /* STM32F10X_CL */ -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - - /* Select HSE as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; - - /* Wait till HSE is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_24MHz -/** - * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo24(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); - - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_36MHz -/** - * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo36(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); - - /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - -#else - /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_48MHz -/** - * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo48(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_56MHz -/** - * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo56(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL7); -#else - /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); - -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_72MHz -/** - * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo72(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); -#else - /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | - RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/RTE/Device/STM32F103RB/system_stm32f10x.c.base@1.0.1 b/RTE/Device/STM32F103RB/system_stm32f10x.c.base@1.0.1 deleted file mode 100644 index 3301967..0000000 --- a/RTE/Device/STM32F103RB/system_stm32f10x.c.base@1.0.1 +++ /dev/null @@ -1,1092 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f10x.c - * @author MCD Application Team - * @version V3.5.1 - * @date 08-September-2021 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. - * - * 1. This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier - * factors, AHB/APBx prescalers and Flash settings). - * This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32f10x_xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * 2. After each device reset the HSI (8 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to - * configure the system clock before to branch to main program. - * - * 3. If the system clock source selected by user fails to startup, the SystemInit() - * function will do nothing and HSI still used as system clock source. User can - * add some code to deal with this issue inside the SetSysClock() function. - * - * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on - * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. - * When HSE is used as system clock source, directly or through PLL, and you - * are using different crystal you have to adapt the HSE value to your own - * configuration. - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2011 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x_system - * @{ - */ - -/** @addtogroup STM32F10x_System_Private_Includes - * @{ - */ - -#include "stm32f10x.h" - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Defines - * @{ - */ - -/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) - frequency (after reset the HSI is used as SYSCLK source) - - IMPORTANT NOTE: - ============== - 1. After each device reset the HSI is used as System clock source. - - 2. Please make sure that the selected System clock doesn't exceed your device's - maximum frequency. - - 3. If none of the define below is enabled, the HSI is used as System clock - source. - - 4. The System clock configuration functions provided within this file assume that: - - For Low, Medium and High density Value line devices an external 8MHz - crystal is used to drive the System clock. - - For Low, Medium and High density devices an external 8MHz crystal is - used to drive the System clock. - - For Connectivity line devices an external 25MHz crystal is used to drive - the System clock. - If you are using different crystal you have to adapt those functions accordingly. - */ - -#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) -/* #define SYSCLK_FREQ_HSE HSE_VALUE */ - #define SYSCLK_FREQ_24MHz 24000000 -#else -/* #define SYSCLK_FREQ_HSE HSE_VALUE */ -/* #define SYSCLK_FREQ_24MHz 24000000 */ -/* #define SYSCLK_FREQ_36MHz 36000000 */ -/* #define SYSCLK_FREQ_48MHz 48000000 */ -/* #define SYSCLK_FREQ_56MHz 56000000 */ -#define SYSCLK_FREQ_72MHz 72000000 -#endif - -/*!< Uncomment the following line if you need to use external SRAM mounted - on STM3210E-EVAL board (STM32 High density and XL-density devices) or on - STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ -#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) -/* #define DATA_IN_ExtSRAM */ -#endif - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ - - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Variables - * @{ - */ - -/******************************************************************************* -* Clock Definitions -*******************************************************************************/ -#ifdef SYSCLK_FREQ_HSE - uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_24MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_36MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_48MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_56MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_72MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ -#else /*!< HSI Selected as System Clock source */ - uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ -#endif - -__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_FunctionPrototypes - * @{ - */ - -static void SetSysClock(void); - -#ifdef SYSCLK_FREQ_HSE - static void SetSysClockToHSE(void); -#elif defined SYSCLK_FREQ_24MHz - static void SetSysClockTo24(void); -#elif defined SYSCLK_FREQ_36MHz - static void SetSysClockTo36(void); -#elif defined SYSCLK_FREQ_48MHz - static void SetSysClockTo48(void); -#elif defined SYSCLK_FREQ_56MHz - static void SetSysClockTo56(void); -#elif defined SYSCLK_FREQ_72MHz - static void SetSysClockTo72(void); -#endif - -#ifdef DATA_IN_ExtSRAM - static void SystemInit_ExtMemCtl(void); -#endif /* DATA_IN_ExtSRAM */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system - * Initialize the Embedded Flash Interface, the PLL and update the - * SystemCoreClock variable. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -void SystemInit (void) -{ - /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ -#ifndef STM32F10X_CL - RCC->CFGR &= (uint32_t)0xF8FF0000; -#else - RCC->CFGR &= (uint32_t)0xF0FF0000; -#endif /* STM32F10X_CL */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ - RCC->CFGR &= (uint32_t)0xFF80FFFF; - -#ifdef STM32F10X_CL - /* Reset PLL2ON and PLL3ON bits */ - RCC->CR &= (uint32_t)0xEBFFFFFF; - - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x00FF0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#else - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) - #ifdef DATA_IN_ExtSRAM - SystemInit_ExtMemCtl(); - #endif /* DATA_IN_ExtSRAM */ -#endif - - /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ - /* Configure the Flash Latency cycles and enable prefetch buffer */ - SetSysClock(); - -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) - * or HSI_VALUE(*) multiplied by the PLL factors. - * - * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value - * 8 MHz or 25 MHz, depending on the product used), user has to ensure - * that HSE_VALUE is same as the real frequency of the crystal used. - * Otherwise, this function may have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0; - -#ifdef STM32F10X_CL - uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - uint32_t prediv1factor = 0; -#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - case 0x04: /* HSE used as system clock */ - SystemCoreClock = HSE_VALUE; - break; - case 0x08: /* PLL used as system clock */ - - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - -#ifndef STM32F10X_CL - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - { - #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - #else - /* HSE selected as PLL clock entry */ - if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) - {/* HSE oscillator clock divided by 2 */ - SystemCoreClock = (HSE_VALUE >> 1) * pllmull; - } - else - { - SystemCoreClock = HSE_VALUE * pllmull; - } - #endif - } -#else - pllmull = pllmull >> 18; - - if (pllmull != 0x0D) - { - pllmull += 2; - } - else - { /* PLL multiplication factor = PLL input clock * 6.5 */ - pllmull = 13 / 2; - } - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - {/* PREDIV1 selected as PLL clock entry */ - - /* Get PREDIV1 clock source and division factor */ - prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - - if (prediv1source == 0) - { - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - } - else - {/* PLL2 clock selected as PREDIV1 clock entry */ - - /* Get PREDIV2 division factor and PLL2 multiplication factor */ - prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; - pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; - SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; - } - } -#endif /* STM32F10X_CL */ - break; - - default: - SystemCoreClock = HSI_VALUE; - break; - } - - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. - * @param None - * @retval None - */ -static void SetSysClock(void) -{ -#ifdef SYSCLK_FREQ_HSE - SetSysClockToHSE(); -#elif defined SYSCLK_FREQ_24MHz - SetSysClockTo24(); -#elif defined SYSCLK_FREQ_36MHz - SetSysClockTo36(); -#elif defined SYSCLK_FREQ_48MHz - SetSysClockTo48(); -#elif defined SYSCLK_FREQ_56MHz - SetSysClockTo56(); -#elif defined SYSCLK_FREQ_72MHz - SetSysClockTo72(); -#endif - - /* If none of the define above is enabled, the HSI is used as System clock - source (default after reset) */ -} - -/** - * @brief Setup the external memory controller. Called in startup_stm32f10x.s - * before jump to __main - * @param None - * @retval None - */ -#ifdef DATA_IN_ExtSRAM -/** - * @brief Setup the external memory controller. - * Called in startup_stm32f10x_xx.s/.c before jump to main. - * This function configures the external SRAM mounted on STM3210E-EVAL - * board (STM32 High density devices). This SRAM will be used as program - * data memory (including heap and stack). - * @param None - * @retval None - */ -void SystemInit_ExtMemCtl(void) -{ -/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is - required, then adjust the Register Addresses */ - - /* Enable FSMC clock */ - RCC->AHBENR = 0x00000114; - - /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ - RCC->APB2ENR = 0x000001E0; - -/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ -/*---------------- SRAM Address lines configuration -------------------------*/ -/*---------------- NOE and NWE configuration --------------------------------*/ -/*---------------- NE3 configuration ----------------------------------------*/ -/*---------------- NBL0, NBL1 configuration ---------------------------------*/ - - GPIOD->CRL = 0x44BB44BB; - GPIOD->CRH = 0xBBBBBBBB; - - GPIOE->CRL = 0xB44444BB; - GPIOE->CRH = 0xBBBBBBBB; - - GPIOF->CRL = 0x44BBBBBB; - GPIOF->CRH = 0xBBBB4444; - - GPIOG->CRL = 0x44BBBBBB; - GPIOG->CRH = 0x44444B44; - -/*---------------- FSMC Configuration ---------------------------------------*/ -/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ - - FSMC_Bank1->BTCR[4] = 0x00001011; - FSMC_Bank1->BTCR[5] = 0x00000200; -} -#endif /* DATA_IN_ExtSRAM */ - -#ifdef SYSCLK_FREQ_HSE -/** - * @brief Selects HSE as System clock source and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockToHSE(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - -#ifndef STM32F10X_CL - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#else - if (HSE_VALUE <= 24000000) - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; - } - else - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - } -#endif /* STM32F10X_CL */ -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - - /* Select HSE as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; - - /* Wait till HSE is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_24MHz -/** - * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo24(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); - - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_36MHz -/** - * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo36(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); - - /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - -#else - /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_48MHz -/** - * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo48(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_56MHz -/** - * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo56(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL7); -#else - /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); - -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_72MHz -/** - * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo72(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); -#else - /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | - RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/RTE/_Reel/RTE_Components.h b/RTE/_Reel/RTE_Components.h deleted file mode 100644 index f313aca..0000000 --- a/RTE/_Reel/RTE_Components.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * UVISION generated file: DO NOT EDIT! - * Generated by: uVision version 5.42.0.0 - * - * Project: 'ProjetVoilier' - * Target: 'Reel' - */ - -#ifndef RTE_COMPONENTS_H -#define RTE_COMPONENTS_H - - -/* - * Define the Device Header File: - */ -#define CMSIS_device_header "stm32f10x.h" - - - -#endif /* RTE_COMPONENTS_H */ diff --git a/RTE/_Simulation/RTE_Components.h b/RTE/_Simulation/RTE_Components.h deleted file mode 100644 index 0ce3f00..0000000 --- a/RTE/_Simulation/RTE_Components.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * UVISION generated file: DO NOT EDIT! - * Generated by: uVision version 5.42.0.0 - * - * Project: 'ProjetVoilier' - * Target: 'Simulation' - */ - -#ifndef RTE_COMPONENTS_H -#define RTE_COMPONENTS_H - - -/* - * Define the Device Header File: - */ -#define CMSIS_device_header "stm32f10x.h" - - - -#endif /* RTE_COMPONENTS_H */ diff --git a/Services/Include/Accelerometre.h b/Services/Include/Accelerometre.h deleted file mode 100644 index f2354b1..0000000 --- a/Services/Include/Accelerometre.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef ACC_H -#define ACC_H -#include -#include - -#define LONGUEUR_MOY 10 -#define ANGLE_LIMITE 60 // Angle ou les voiles seront lachés, SE MODIFIE - -//uint16_t moyenne[LONGUEUR_MOY]; -//uint32_t sum; -//uint16_t i; -//volatile uint32_t moy; // Volatile pour pouvoir le regarder dans Keil µVision - -void initAccelo(void); -void initLacheur(void); -uint16_t * RecupAccelo(void); -void LacheVoile(int AngelLim, uint16_t moyennen); - -//uint16_t moyenneGlissante(); -//int actualiserTableau(int i ); -#endif \ No newline at end of file diff --git a/Services/Include/Girouette.h b/Services/Include/Girouette.h deleted file mode 100644 index 04d03b3..0000000 --- a/Services/Include/Girouette.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _GIROUETTE_H -#define _GIROUETTE_H -#include "stm32f10x.h" -extern void configEncoder(TIM_TypeDef * Timer); -extern int angleVent (TIM_TypeDef * Timer); -extern int vent2voile(int angle); -extern void LocaliserZero(void); -#endif diff --git a/Services/Include/Servo.h b/Services/Include/Servo.h deleted file mode 100644 index 81ace88..0000000 --- a/Services/Include/Servo.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef SERVO_H_ -#define SERVO_H_ -#include -void Servo_Moteur(int angle, TIM_TypeDef * Timer, int Channel); -extern void initServo(TIM_TypeDef * Timer, int Channel); - -#endif // SERVO_H_ diff --git a/Services/Source/Accelerometre.c b/Services/Source/Accelerometre.c deleted file mode 100644 index c6a6ad0..0000000 --- a/Services/Source/Accelerometre.c +++ /dev/null @@ -1,74 +0,0 @@ -#include -#include "Horloge.h" -#include "stdlib.h" -#include "MySPI.h" -#include "stdint.h" -#include "Accelerometre.h" -#include "Servo.h" - - -void initAccelo(void) { - MySPI_Init(SPI1); - // Power_CTL register = 0x2D ? write 0x08 (MEASURE = 1) - MySPI_Clear_NSS(); - MySPI_Send(0x31); // DATA_FORMAT - MySPI_Send(0b00001101); // Justify met le MSB à gauche et b0 et b1 donne une resolution de +-2g - MySPI_Set_NSS(); - - MySPI_Clear_NSS(); - MySPI_Send(0x2D & 0x3F); // Écriture de l'adresse (pas de bit de read!) - MySPI_Send(0x08); // Affectation du bit MEASURE - MySPI_Set_NSS(); - RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; // Activation de l'horloge Utiliser une service pour cela peut-être ??? - for (volatile int i = 0; i < 10000; i++); // small delay -} - - -uint16_t * RecupAccelo(void) { // Recuperation des donnees de l'accelerometre - static uint16_t Messie[3]; - uint8_t buf[6]; - MySPI_Clear_NSS(); - // Lecture multi-octet à partir de 0x32 (X0, X1, Y0, Y1, Z0 et Z1) - MySPI_Send(0x80 | 0x40 | 0x32); // On envoie RW MB A5 ... A0 pour recuperer les données - for (int i = 0; i < 6; i++) {buf[i] = (uint8_t)MySPI_Read();} // Lecture des 6 registres en séquenciel - MySPI_Set_NSS(); - - // Conversion des données récupérés en uint16_t - Messie[0] = (uint16_t)(buf[1] << 8 | buf[0]); // X - Messie[1] = (uint16_t)(buf[3] << 8 | buf[2]); // Y - Messie[2] = (uint16_t)(buf[5] << 8 | buf[4]); // Z - return Messie; -} - - -void initLacheur(void) { - GPIOB->CRH &= ~(0xF << (0 * 4)); - GPIOB->CRH |= (0xA << (0 * 4)); //On met GPIOB.8 en mode output 2Mhz, alternate pp - - Timer_Init(TIM4, 0xFFFF, 22); -} - - -void LacheVoile(int AngelLim, uint16_t moyennen) { - volatile uint16_t Val_lim = 0x1E20 - 60*AngelLim; - if (moyennen= LONGUEUR_MOY) {i = 0;} // Géstion de la position i dans le tableau pour la moyenne glissante -// return i; -//} - - -//uint16_t moyenneGlissante() { -// sum = 0; -// for (int j = 0; j < LONGUEUR_MOY; j++){sum += moyenne[j];} moy = sum / LONGUEUR_MOY; // Calcul de la moyenne glissante -// return(moy); -// } -// À faire : Gestion par interruption - diff --git a/Services/Source/Girouette.c b/Services/Source/Girouette.c deleted file mode 100644 index 99cdae2..0000000 --- a/Services/Source/Girouette.c +++ /dev/null @@ -1,62 +0,0 @@ -#include "stm32f10x.h" -#include "Horloge.h" -#include "DriverGPIO.h" -#include "Girouette.h" -#include "PWM.h" - -#include // Pour abs() - -#define POSITIONS (360*4) //0x5A0 - -void configEncoder(TIM_TypeDef * Timer) { - // Timer - Timer_Init(Timer, 0, 0); - - // Settings - Timer -> CCMR1 |= TIM_CCMR1_CC1S; // TI1FP1 mapped on TI1 - Timer -> CCMR1 |= TIM_CCMR1_CC2S; // TI1FP2 mapped on TI2 - Timer -> CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); // TI1FP1 output non-inverted - Timer -> CCMR1 &= ~(TIM_CCMR1_IC1F); // Input capture 1 filter, no filter - Timer -> CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); // TI1FP2 output non-inverted - Timer -> CCMR2 &= ~(TIM_CCMR1_IC2F); // Input capture 2 filter, no filter - Timer -> SMCR &= ~TIM_SMCR_SMS; // Reset SMS-bits - Timer -> SMCR |= TIM_SMCR_SMS_0 | TIM_SMCR_SMS_1;// SMS = "011" - Timer -> CR1 |= TIM_CR1_CEN; // Enable counter - Timer -> ARR = 0x5A0; // Setting ARR as 1440 - - // GPIO - MyGPIO_Init(GPIOA,0,In_Floating ); // GPIOA pin 0 in mode floating TIM2_CH1 - MyGPIO_Init(GPIOA,1,In_Floating ); // GPIOA pin 1 in mode floating TIM2_CH2 - MyGPIO_Init(GPIOA,8,In_PullDown ); // GPIOA pin 8 in mode floating Index -} - - -int angleVent(TIM_TypeDef * Timer) { // Returner l'angle du vent - int angle =(((Timer -> CNT*360)/POSITIONS )); - if (angle > 180){ - angle = 360 - angle; // Pour que l'angle soit entre 0 et 180 - } - return(angle); -} - - -int vent2voile(int angle) { // Conversion angle vent à angle voile - if(angle < 45){ - return 0;// Les voiles restent immobiles - } - else{ - return(2*(angle-45)/3); // Augmentation linéaire - } -} - - -void LocaliserZero(void) { // Localisation de z -int Z_trouve = 0; - while (Z_trouve != 1){ - if(MyGPIO_Read(GPIOA,8)){ // Index - TIM2 -> CNT = 0x0; // Remet angle à zero - Z_trouve = 1; - } - } -} - diff --git a/Services/Source/RTC.c b/Services/Source/RTC.c deleted file mode 100644 index fa2f2ff..0000000 --- a/Services/Source/RTC.c +++ /dev/null @@ -1,13 +0,0 @@ -#include "RTC.h" - - -initRTC() { - RTC -> PRLL = 0x7FFF; // Obtenir un période de 1 seconde - RTC -> PRLH = 0xFFFF; // Le plus grand possible -} - - -int getTime() { - return(RTC -> PRLH); -} - diff --git a/Services/Source/Servo.c b/Services/Source/Servo.c deleted file mode 100644 index 7a1ea5a..0000000 --- a/Services/Source/Servo.c +++ /dev/null @@ -1,29 +0,0 @@ -#include "Servo.h" -#include "DriverGPIO.h" -#include "PWM.h" -#include "Horloge.h" - - -void Servo_Moteur(int angle, TIM_TypeDef * Timer, int Channel) { // Controle du moteur - int dutyCycle = (5* angle + 5*90)/90; // 5-10 % Duty Cycle - Set_DutyCycle_PWM(Timer, Channel, dutyCycle); -} - - -void initServo(TIM_TypeDef * Timer, int Channel) { // Config du moteur servo - if (Timer == TIM4) { - Timer_Init(TIM4, 0xFFFF, 22); // Pour obtenir un période de 20 ms - - if (Channel == 3){ - MyGPIO_Init(GPIOB, 8, AltOut_Ppull); // Output push pull alternate - MyTimer_PWM(TIM4, 3); // TIM4 CH3 pour PB8 - } - else{ - //printf("Ce pilote n'existe pas"); - } - } - else{ - //printf("Ce pilote n'existe pas"); - } -} - diff --git a/reel.ini b/reel.ini deleted file mode 100644 index 7442113..0000000 --- a/reel.ini +++ /dev/null @@ -1 +0,0 @@ -OSC = 8000000 diff --git a/simu.ini b/simu.ini deleted file mode 100644 index 7442113..0000000 --- a/simu.ini +++ /dev/null @@ -1 +0,0 @@ -OSC = 8000000