From 5295172d76ba938b49431fc451f6968ff162dec4 Mon Sep 17 00:00:00 2001 From: Vincent Goncalves Date: Fri, 14 Nov 2025 13:52:38 +0100 Subject: [PATCH] Ajout drivers --- drivers/ADC.c | 43 ++++++++++++++++++++++ drivers/ADC.h | 10 ++++++ drivers/GPIO.c | 58 ++++++++++++++++++++++++++++++ drivers/GPIO.h | 20 +++++++++++ drivers/MyTimer.c | 91 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/MyTimer.h | 13 +++++++ drivers/USART.c | 78 ++++++++++++++++++++++++++++++++++++++++ drivers/USART.h | 14 ++++++++ 8 files changed, 327 insertions(+) create mode 100644 drivers/ADC.c create mode 100644 drivers/ADC.h create mode 100644 drivers/GPIO.c create mode 100644 drivers/GPIO.h create mode 100644 drivers/MyTimer.c create mode 100644 drivers/MyTimer.h create mode 100644 drivers/USART.c create mode 100644 drivers/USART.h diff --git a/drivers/ADC.c b/drivers/ADC.c new file mode 100644 index 0000000..d4f8910 --- /dev/null +++ b/drivers/ADC.c @@ -0,0 +1,43 @@ +#include +#include + +void (*ptr_function) (void); + +void MyADC_Init(ADC_TypeDef *ADC, char channel){ + if (ADC == ADC1) RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; + else if (ADC == ADC2) RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; + RCC->CFGR |= RCC_CFGR_ADCPRE_DIV6; // Passage de l'horloge a 12MHz + ADC->CR2 |= ADC_CR2_ADON; // Démarrage ADC + ADC->SQR1 &= ADC_SQR1_L; // Fixe nb de conversion à faire : 1 + ADC->SQR3 = channel; // Fixe la voie à convertir +} + +void start_conversion(ADC_TypeDef *ADC){ + ADC->CR2 |= ADC_CR2_EXTSEL; + ADC->CR2 |= ADC_CR2_EXTTRIG; // Permettre le démarage externe + ADC->CR2 |= ADC_CR2_SWSTART; // demander une conversion externe + //Si on veut faire par scrutation et non par intéruption, laisser les lignes suivantes + //while(!(ADC->SR & ADC_SR_EOC)); // attendre la fin (EOC = 1) + //ADC->SR &=~ ADC_SR_EOC; // clear EOC + //return ADC->DR &~ (0xF << 12); // retourne 12 bits +} + +void MyADC_ActiveIT(ADC_TypeDef *ADC, int prio, void (*IT_function) (void)){ + ptr_function = IT_function; + NVIC->ISER[0] |= 1<<18; + NVIC->IPR[25] |= prio << 4; + ADC->CR1 |= ADC_CR1_EOCIE; +} + +void ADC1_2_IRQHandler(void){ + ADC1->CR1 &=~ ADC_SR_EOC; + ptr_function(); +} + +//void Set_samp_ts(ADC_TypeDef *ADC, int Rain){ +// float ts; +// float cylcle; +// ts = 9.010913347*(Rain +1000.00)*0.000000000008; +// cycle = ts*12/0.000001; +// ADC->SMPR1 |= +//} \ No newline at end of file diff --git a/drivers/ADC.h b/drivers/ADC.h new file mode 100644 index 0000000..3179de7 --- /dev/null +++ b/drivers/ADC.h @@ -0,0 +1,10 @@ +#ifndef MYADC_H +#define MYADC_H +#include + +void MyADC_Init(ADC_TypeDef *ADC, char channel); +void start_conversion(ADC_TypeDef *ADC); +void MyADC_ActiveIT(ADC_TypeDef *ADC, int prio, void (*IT_function) (void)); +//void Set_samp_ts(ADC_TypeDef *ADC, int Rain); + +#endif \ No newline at end of file diff --git a/drivers/GPIO.c b/drivers/GPIO.c new file mode 100644 index 0000000..b390aaa --- /dev/null +++ b/drivers/GPIO.c @@ -0,0 +1,58 @@ +#include "stm32f10x.h" +#include "GPIO.h" + +void MyGPIO_Init(GPIO_TypeDef *GPIO, char pin, char conf){ + if (GPIO == GPIOA) {RCC->APB2ENR |= (RCC_APB2ENR_IOPAEN);} + else if (GPIO == GPIOB) {RCC->APB2ENR |= (RCC_APB2ENR_IOPBEN);} + else if (GPIO == GPIOC) {RCC->APB2ENR |= (RCC_APB2ENR_IOPCEN);} + else if (GPIO == GPIOD) {RCC->APB2ENR |= (RCC_APB2ENR_IOPDEN);} + if (pin < 8) { + if (conf == 0xF) { + GPIO->CRL&=~(0xF<<4*pin); + GPIO->CRL|=(0x8<<4*pin); + GPIO->ODR|=(1<CRL&=~(0xF<<4*pin); + GPIO->CRL|=(conf<<4*pin); + GPIO->ODR&=~(1<CRL&=~(0xF<<4*pin); + GPIO->CRL|=(conf<<4*pin); + } + } + else { + if (conf == 0xF) { + GPIO->CRH&=~(0xF<<4*(pin-8)); + GPIO->CRH|=(0x8<<4*(pin-8)); + GPIO->ODR|=(1<CRH&=~(0xF<<4*(pin-8)); + GPIO->CRH|=(conf<<4*(pin-8)); + GPIO->ODR&=~(1<CRH&=~(0xF<<4*(pin-8)); + GPIO->CRH|=(conf<<4*(pin-8)); + } + } +} + +int MyGPIO_Read(GPIO_TypeDef *GPIO, char GPIO_Pin){ + return (GPIO->IDR&(1<BSRR=(1<BSRR=(1<<(GPIO_Pin+16)); +} + +void MyGPIO_Toggle(GPIO_TypeDef *GPIO, char GPIO_Pin){ + if (((GPIO->ODR>>GPIO_Pin)&1) == 1) MyGPIO_Reset(GPIO, GPIO_Pin); + else MyGPIO_Set(GPIO, GPIO_Pin); +} \ No newline at end of file diff --git a/drivers/GPIO.h b/drivers/GPIO.h new file mode 100644 index 0000000..4b8c01b --- /dev/null +++ b/drivers/GPIO.h @@ -0,0 +1,20 @@ +#ifndef MYGPIO_H +#define MYGPIO_H +#include "stm32f10x.h" + +#define In_Floating 0x4 +#define In_PullDown 0x8 +#define In_PullUp 0xF +#define In_Analog 0x0 +#define Out_Ppull 0x2 +#define Out_OD 0x6 +#define AltOut_Ppull 0xA +#define AltOut_OD 0xE + +void MyGPIO_Init(GPIO_TypeDef *GPIO, char pin, char conf); +int MyGPIO_Read(GPIO_TypeDef *GPIO, char GPIO_Pin); +void MyGPIO_Set(GPIO_TypeDef *GPIO, char GPIO_Pin); +void MyGPIO_Reset(GPIO_TypeDef *GPIO, char GPIO_Pin); +void MyGPIO_Toggle(GPIO_TypeDef *GPIO, char GPIO_Pin); + +#endif \ No newline at end of file diff --git a/drivers/MyTimer.c b/drivers/MyTimer.c new file mode 100644 index 0000000..0f92a55 --- /dev/null +++ b/drivers/MyTimer.c @@ -0,0 +1,91 @@ +#include +#include + +void (*Ptr_fct_t1) (void); +void (*Ptr_fct_t2) (void); +void (*Ptr_fct_t3) (void); +void (*Ptr_fct_t4) (void); + +void MyTimer_Init(TIM_TypeDef *Timer, unsigned short ValARR, unsigned short ValPSC){ + if (Timer == TIM2) {RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;} + else if (Timer == TIM3) {RCC->APB1ENR |= (RCC_APB1ENR_TIM3EN);} + else if (Timer == TIM4) {RCC->APB1ENR |= (RCC_APB1ENR_TIM4EN);} + else if (Timer == TIM1) {RCC->APB2ENR |= (RCC_APB2ENR_TIM1EN);} + Timer->ARR=ValARR-1; + Timer->PSC=ValPSC-1; +} + +void MyTimer_ActiveIT (TIM_TypeDef *Timer, char Prio, void (*IT_function) (void)){ + if (Timer == TIM2){ + Ptr_fct_t2 = IT_function; + NVIC->ISER[0] |= 1<<28; + NVIC->IPR[35] = Prio<<4; + } + else if (Timer == TIM3){ + Ptr_fct_t3 = IT_function; + NVIC->ISER[0] |= 1<<29; + NVIC->IPR[36] = Prio<<4; + } + else if (Timer == TIM4){ + Ptr_fct_t4 = IT_function; + NVIC->ISER[0] |= 1<<30; + NVIC->IPR[37] = Prio<<4; + } + else if (Timer == TIM1){ + Ptr_fct_t1 = IT_function; + NVIC->ISER[0] |= 1<<25; + NVIC->IPR[32] = Prio<<4; + } + Timer->DIER|=TIM_DIER_UIE; +} + +void Mytimer_PWM(TIM_TypeDef *Timer, char Channel){ + if (Channel == 1) { + Timer->CCMR1 &=~ TIM_CCMR1_OC1M; + Timer->CCMR1 |= 0x6 << 4; + Timer->CCER |= TIM_CCER_CC1E; + } + else if (Channel == 2) { + Timer->CCMR1 &=~ TIM_CCMR1_OC2M; + Timer->CCMR1 |= 0x6 << 12; + Timer->CCER |= TIM_CCER_CC2E; + } + else if (Channel == 3) { + Timer->CCMR2 &=~ TIM_CCMR2_OC3M; + Timer->CCMR2 |= 0x6 << 4; + Timer->CCER |= TIM_CCER_CC3E; + } + else if (Channel == 4) { + Timer->CCMR2 &=~ TIM_CCMR2_OC4M; + Timer->CCMR2 |= 0x6 << 12; + Timer->CCER |= TIM_CCER_CC4E; + } +} + +void Mytimer_PWM_cycle(TIM_TypeDef *Timer, char Channel, int pulse){ + if (Channel == 1) Timer->CCR1 = Timer->ARR*pulse/100; + else if (Channel == 2) Timer->CCR2 = Timer->ARR*pulse/100; + else if (Channel == 3) Timer->CCR3 = (Timer->ARR)*pulse/100; + else if (Channel == 4) Timer->CCR4 = Timer->ARR*pulse/100; +} + + +void TIM2_IRQHandler(void){ + TIM2->SR&=~TIM_SR_UIF; + Ptr_fct_t2(); +} + +void TIM1_UP_IRQHandler(void){ + TIM1->SR&=~TIM_SR_UIF; + Ptr_fct_t1(); +} + +void TIM3_IRQHandler(void){ + TIM3->SR&=~TIM_SR_UIF; + Ptr_fct_t3(); +} + +void TIM4_IRQHandler(void){ + TIM4->SR&=~TIM_SR_UIF; + Ptr_fct_t4(); +} \ No newline at end of file diff --git a/drivers/MyTimer.h b/drivers/MyTimer.h new file mode 100644 index 0000000..985701d --- /dev/null +++ b/drivers/MyTimer.h @@ -0,0 +1,13 @@ +#ifndef MYTIMER_H +#define MYTIMER_H +#include "stm32f10x.h" + +#define MyTimer_Base_Start(Timer) Timer->CR1|=TIM_CR1_CEN; +#define MyTimer_Base_Stop(Timer) Timer->CR1&=~TIM_CR1_CEN; + +void MyTimer_Init(TIM_TypeDef *Timer, unsigned short ValARR, unsigned short ValPSC); +void MyTimer_ActiveIT (TIM_TypeDef *Timer, char Prio, void (*IT_function) (void)); +void Mytimer_PWM(TIM_TypeDef *Timer, char Channel); +void Mytimer_PWM_cycle(TIM_TypeDef *Timer, char Channel, int CCR); + +#endif \ No newline at end of file diff --git a/drivers/USART.c b/drivers/USART.c new file mode 100644 index 0000000..113100f --- /dev/null +++ b/drivers/USART.c @@ -0,0 +1,78 @@ +#include +#include +#include + +void (*ptr_fct_u1) (void); +void (*ptr_fct_u2) (void); +void (*ptr_fct_u3) (void); + +void My_USART_Init(USART_TypeDef *USART){ + if (USART == USART1) { + RCC->APB2ENR |= RCC_APB2ENR_USART1EN; + MyGPIO_Init(GPIOA,9,AltOut_Ppull); + MyGPIO_Init(GPIOA,10, In_Floating); + USART->BRR = 72000000/9600; + } + else if (USART == USART2) { + RCC->APB1ENR |= RCC_APB1ENR_USART2EN; + MyGPIO_Init(GPIOA,2,AltOut_Ppull); + MyGPIO_Init(GPIOA,3,In_Floating); + USART->BRR = 36000000/9600; + } + else if (USART == USART3) { + RCC->APB1ENR |= RCC_APB1ENR_USART3EN; + MyGPIO_Init(GPIOB,10,AltOut_Ppull); + MyGPIO_Init(GPIOB,11,In_Floating); + USART->BRR = 36000000/9600; + } + USART->CR1 |= USART_CR1_UE; // Activation de l'USART + USART->CR1 &= ~USART_CR1_M; // Choix d'une taille de 8 bits de données + USART->CR2 &= USART_CR2_STOP; // Choix d'un seul bit de stop + USART->CR1 |= USART_CR1_TE; // Transmission validée + USART->CR1 |= USART_CR1_RE; // réception validée + +} + +void send_USART(USART_TypeDef *USART, char data){ + USART->DR |= data; // Ecriture de la donnée dans le registre DR + while(!(USART->SR & USART_SR_TXE)) {} // Attente de la fin de transmission +} + +char read_USART(USART_TypeDef *USART){ + while (!(USART->SR & USART_SR_RXNE)){} + return USART->DR; +} + +void MyUSART_ActiveIT(USART_TypeDef *USART, int Prio, void (*IT_function) (void)){ + USART->CR1 |= USART_CR1_RXNEIE; + if (USART == USART1){ + ptr_fct_u1 = IT_function; + NVIC->ISER[1] |= 1<<5; + NVIC->IPR[44] = Prio<<4; + } + else if (USART == USART2){ + ptr_fct_u2 = IT_function; + NVIC->ISER[1] |= 1<<6; + NVIC->IPR[45] = Prio<<4; + } + else if (USART == USART3){ + ptr_fct_u3 = IT_function; + NVIC->ISER[1] |= 1<<7; + NVIC->IPR[46] = Prio<<4; + } +} + +void USART2_IRQHandler(void){ + USART2->SR&=~USART_SR_RXNE; + ptr_fct_u2(); +} + +void USART1_IRQHandler(void){ + USART1->SR&=~USART_SR_RXNE; + ptr_fct_u1(); +} + +void USART3_IRQHandler(void){ + USART3->SR&=~USART_SR_RXNE; + ptr_fct_u3(); +} \ No newline at end of file diff --git a/drivers/USART.h b/drivers/USART.h new file mode 100644 index 0000000..70bd457 --- /dev/null +++ b/drivers/USART.h @@ -0,0 +1,14 @@ +#ifndef MYUSART_H +#define MYUSART_H +#include + +#define send_USART_init(USART) USART->CR1 |= USART_CR1_TE; // Envoi de la première trame d'attente +#define read_USART_init(USART) USART->CR1 |= USART_CR1_RE; // En attente du premier bit de start + +void My_USART_Init(USART_TypeDef *USART); +void send_USART(USART_TypeDef *USART, char data); +char read_USART(USART_TypeDef *USART); +void My_USART_ActiveIT_send(USART_TypeDef *USART); +void My_USART_ActiveIT_read(USART_TypeDef *USART); + +#endif \ No newline at end of file