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fuse.log 2.3KB

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  1. Running: /usr/local/insa/Xilinx.ISE/13.4/ISE_DS/ISE/bin/lin64/unwrapped/fuse -relaunch -intstyle "ise" -incremental -lib "secureip" -o "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_isim_beh.exe" -prj "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_beh.prj" "work.process_test"
  2. ISim O.87xd (signature 0x8ddf5b5d)
  3. Number of CPUs detected in this system: 8
  4. Turning on mult-threading, number of parallel sub-compilation jobs: 16
  5. Determining compilation order of HDL files
  6. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/pipeline.vhd" into library work
  7. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/br.vhd" into library work
  8. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_instr.vhd" into library work
  9. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm.vhd" into library work
  10. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/alu.vhd" into library work
  11. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd" into library work
  12. Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test.vhd" into library work
  13. Starting static elaboration
  14. Completed static elaboration
  15. Fuse Memory Usage: 98520 KB
  16. Fuse CPU Usage: 870 ms
  17. Compiling package standard
  18. Compiling package std_logic_1164
  19. Compiling package std_logic_arith
  20. Compiling package std_logic_unsigned
  21. Compiling package numeric_std
  22. Compiling architecture behavioral of entity bm_instr [bm_instr_default]
  23. Compiling architecture behavioral of entity pipeline [pipeline_default]
  24. Compiling architecture behavioral of entity br [br_default]
  25. Compiling architecture behavioral of entity alu [alu_default]
  26. Compiling architecture behavioral of entity bm_data [bm_data_default]
  27. Compiling architecture behavioral of entity processeur [processeur_default]
  28. Compiling architecture behavior of entity process_test
  29. Time Resolution for simulation is 1ps.
  30. Waiting for 1 sub-compilation(s) to finish...
  31. Compiled 18 VHDL Units
  32. Built simulation executable /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_isim_beh.exe
  33. Fuse Memory Usage: 1198968 KB
  34. Fuse CPU Usage: 1010 ms
  35. GCC CPU Usage: 250 ms