Running: /usr/local/insa/Xilinx.ISE/13.4/ISE_DS/ISE/bin/lin64/unwrapped/fuse -intstyle ise -incremental -lib secureip -o /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_data_test_isim_beh.exe -prj /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_data_test_beh.prj work.bm_data_test 
ISim O.87xd (signature 0x8ddf5b5d)
Number of CPUs detected in this system: 12
Turning on mult-threading, number of parallel sub-compilation jobs: 24 
Determining compilation order of HDL files
Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm.vhd" into library work
Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_data_test.vhd" into library work
Starting static elaboration
Completed static elaboration
Fuse Memory Usage: 98496 KB
Fuse CPU Usage: 730 ms
Compiling package standard
Compiling package std_logic_1164
Compiling package std_logic_arith
Compiling package std_logic_unsigned
Compiling package numeric_std
Compiling architecture behavioral of entity bm_data [bm_data_default]
Compiling architecture behavior of entity bm_data_test
Time Resolution for simulation is 1ps.
Waiting for 1 sub-compilation(s) to finish...
Compiled 8 VHDL Units
Built simulation executable /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_data_test_isim_beh.exe
Fuse Memory Usage: 1722956 KB
Fuse CPU Usage: 850 ms
GCC CPU Usage: 1640 ms