diff --git a/xilinx/ALU/ALU.gise b/xilinx/ALU/ALU.gise index ad8d0fc..7a6fa15 100644 --- a/xilinx/ALU/ALU.gise +++ b/xilinx/ALU/ALU.gise @@ -49,13 +49,9 @@ - + - - - - @@ -80,14 +76,9 @@ - + - - - - - @@ -100,15 +91,9 @@ - + - - - - - - @@ -116,13 +101,9 @@ - + - - - - diff --git a/xilinx/ALU/ALU.xise b/xilinx/ALU/ALU.xise index ca1a58f..ecd5fc7 100644 --- a/xilinx/ALU/ALU.xise +++ b/xilinx/ALU/ALU.xise @@ -311,8 +311,8 @@ - - + + @@ -330,7 +330,7 @@ - + diff --git a/xilinx/ALU/_xmsgs/pn_parser.xmsgs b/xilinx/ALU/_xmsgs/pn_parser.xmsgs index e6bbd48..0e8e45c 100644 --- a/xilinx/ALU/_xmsgs/pn_parser.xmsgs +++ b/xilinx/ALU/_xmsgs/pn_parser.xmsgs @@ -8,7 +8,7 @@ -Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_instr.vhd" into library work +Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd" into library work diff --git a/xilinx/ALU/bm_instr.vhd b/xilinx/ALU/bm_instr.vhd index bd9facd..a51c05d 100644 --- a/xilinx/ALU/bm_instr.vhd +++ b/xilinx/ALU/bm_instr.vhd @@ -37,21 +37,9 @@ type mem is array (0 to 255) of STD_LOGIC_VECTOR(31 downto 0); --signal instr_memory: mem := (1 => "00000110000000010000001000000000", others =>"00000000000000000000000000000000"); --test afc cop ---signal instr_memory: mem := (1 => "00000110000000010000011000000000", 6 =>"00000101000000100000000100000000", others =>"00000000000000000000000000000000"); +signal instr_memory: mem := (1 => "00000110000000010000011000000000", 6 =>"00000101000000100000000100000000", others =>"00000000000000000000000000000000"); --test add --signal instr_memory: mem := (1 => "00000110000000010000011000000000", 2 => "00000110000000100000000100000000", 10 =>"00000001000000110000000100000010", others =>"00000000000000000000000000000000"); ---test sub ---signal instr_memory: mem := (1 => "00000110000000010000011000000000", 2 => "00000110000000100000000100000000", 10 =>"00000011000000110000000100000010", others =>"00000000000000000000000000000000"); ---test mul -signal instr_memory: mem := (1 => "00000110000000010000011000000000", 2 => "00000110000000100000000100000000", 10 =>"00000010000000110000000100000010", others =>"00000000000000000000000000000000"); - ---test store ---signal instr_memory: mem := (1 => "00000110000000010000011000000000", 6 => "00001000000000000000000100000000", others =>"00000000000000000000000000000000"); - ---test load ---signal instr_memory: mem := (1 => "00000110000000010000011000000000", 6 => "00001000000000000000000100000000", 15 => "00000111000000110000000000000000", others =>"00000000000000000000000000000000"); - - begin OUT_data <= instr_memory(to_integer(unsigned(IN_addr))); diff --git a/xilinx/ALU/fuse.log b/xilinx/ALU/fuse.log index 3e7fe82..8225c6d 100644 --- a/xilinx/ALU/fuse.log +++ b/xilinx/ALU/fuse.log @@ -1,7 +1,7 @@ Running: /usr/local/insa/Xilinx.ISE/13.4/ISE_DS/ISE/bin/lin64/unwrapped/fuse -relaunch -intstyle "ise" -incremental -lib "secureip" -o "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_isim_beh.exe" -prj "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_beh.prj" "work.process_test" ISim O.87xd (signature 0x8ddf5b5d) -Number of CPUs detected in this system: 8 -Turning on mult-threading, number of parallel sub-compilation jobs: 16 +Number of CPUs detected in this system: 12 +Turning on mult-threading, number of parallel sub-compilation jobs: 24 Determining compilation order of HDL files Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/pipeline.vhd" into library work Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/br.vhd" into library work @@ -13,7 +13,7 @@ Parsing VHDL file "/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU Starting static elaboration Completed static elaboration Fuse Memory Usage: 98520 KB -Fuse CPU Usage: 880 ms +Fuse CPU Usage: 760 ms Compiling package standard Compiling package std_logic_1164 Compiling package std_logic_arith @@ -30,6 +30,6 @@ Time Resolution for simulation is 1ps. Waiting for 1 sub-compilation(s) to finish... Compiled 18 VHDL Units Built simulation executable /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/process_test_isim_beh.exe -Fuse Memory Usage: 1198916 KB -Fuse CPU Usage: 1010 ms -GCC CPU Usage: 140 ms +Fuse Memory Usage: 1723208 KB +Fuse CPU Usage: 850 ms +GCC CPU Usage: 120 ms diff --git a/xilinx/ALU/iseconfig/ALU.projectmgr b/xilinx/ALU/iseconfig/ALU.projectmgr index d23e46b..322e466 100644 --- a/xilinx/ALU/iseconfig/ALU.projectmgr +++ b/xilinx/ALU/iseconfig/ALU.projectmgr @@ -9,13 +9,13 @@ 2 - addr_instructions - bm_instr - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_instr.vhd) + processeur - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd) 0 0 - 000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001c5000000020000000000000000000000000200000064ffffffff000000810000000300000002000001c50000000100000003000000000000000100000003 + 000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001e4000000020000000000000000000000000200000064ffffffff000000810000000300000002000001e40000000100000003000000000000000100000003 true - addr_instructions - bm_instr - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm_instr.vhd) + processeur - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd) @@ -23,13 +23,13 @@ Design Utilities - + 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000103000000010000000100000000000000000000000064ffffffff000000810000000000000001000001030000000100000000 false - + @@ -50,7 +50,7 @@ 0 0 - 000000ff00000000000000010000000000000000010000000000000000000000000000000000000132000000010001000100000000000000000000000064ffffffff000000810000000000000001000001320000000100000000 + 000000ff00000000000000010000000000000000010000000000000000000000000000000000000148000000010001000100000000000000000000000064ffffffff000000810000000000000001000001480000000100000000 false work @@ -79,31 +79,17 @@ /bm_data_test - behavior |home|foussats|Bureau|projet_system|projet_systeme|xilinx|ALU|bm_data_test.vhd /bm_instr_test - behavior |home|foussats|Bureau|projet_system|projet_systeme|xilinx|ALU|bm_instr_test.vhd /br_test - behavior |home|foussats|Bureau|projet_system|projet_systeme|xilinx|ALU|br_test.vhd - /processeur - Behavioral |home|foussats|Bureau|projet_system|projet_systeme|xilinx|ALU|processeur.vhd - data_memory - bm_data - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm.vhd) + processeur - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd) 0 0 - 000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001d9000000020000000000000000000000000200000064ffffffff000000810000000300000002000001d90000000100000003000000000000000100000003 + 000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001e4000000020000000000000000000000000200000064ffffffff000000810000000300000002000001e40000000100000003000000000000000100000003 true - data_memory - bm_data - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/bm.vhd) + processeur - Behavioral (/home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/processeur.vhd) - - 1 - - - - - 0 - 0 - 000000ff00000000000000010000000100000000000000000000000000000000000000000000000176000000010000000100000000000000000000000064ffffffff000000810000000000000001000001760000000100000000 - false - - - 1 @@ -116,6 +102,19 @@ false + + + 1 + + + Simulate Behavioral Model + + 0 + 0 + 000000ff00000000000000010000000100000000000000000000000000000000000000000000000176000000010000000100000000000000000000000064ffffffff000000810000000000000001000001760000000100000000 + false + Simulate Behavioral Model + 1 diff --git a/xilinx/ALU/iseconfig/processeur.xreport b/xilinx/ALU/iseconfig/processeur.xreport index 85abfd6..a144ac5 100644 --- a/xilinx/ALU/iseconfig/processeur.xreport +++ b/xilinx/ALU/iseconfig/processeur.xreport @@ -1,11 +1,11 @@
- 2021-05-11T15:38:05 + 2021-05-10T10:47:06 processeur Unknown /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/iseconfig/processeur.xreport - /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU/ + /home/foussats/Bureau/projet_system/projet_systeme/xilinx/ALU 2021-05-10T09:34:56 false
diff --git a/xilinx/ALU/isim.log b/xilinx/ALU/isim.log index 90619ec..ac9885d 100644 --- a/xilinx/ALU/isim.log +++ b/xilinx/ALU/isim.log @@ -45,129 +45,4 @@ at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_IN at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -ISim O.87xd (signature 0x8ddf5b5d) -WARNING: A WEBPACK license was found. -WARNING: Please use Xilinx License Configuration Manager to check out a full ISim license. -WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version. -This is a Lite version of ISim. -# run 1000 ns -Simulator is doing circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). -Finished circuit initialization process. -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 0 ps, Instance /process_test/uut/banc_registres/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 5 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 15 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 -at 25 ns(1), Instance /process_test/uut/data_memory/ : Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0 +# exit 0 diff --git a/xilinx/ALU/isim/isim_usage_statistics.html b/xilinx/ALU/isim/isim_usage_statistics.html index 76876d9..8db4a1e 100644 --- a/xilinx/ALU/isim/isim_usage_statistics.html +++ b/xilinx/ALU/isim/isim_usage_statistics.html @@ -2,4 +2,15 @@ ISim Statistics Xilinx HDL Libraries Used=ieee -Fuse Resource Usage=1010 ms, 1198916 KB +Fuse Resource Usage=850 ms, 1723208 KB + +Total Signals=109 +Total Nets=10695 +Total Blocks=14 +Total Processes=31 +Total Simulation Time=1 us +Simulation Resource Usage=0.04 sec, 264146 KB +Simulation Mode=gui +Hardware CoSim=0 + + diff --git a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_1242562249.didat b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_1242562249.didat index 5a2364d..286651d 100644 Binary files a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_1242562249.didat and b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_1242562249.didat differ diff --git a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_2592010699.didat b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_2592010699.didat index 924531f..b00d7b6 100644 Binary files a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_2592010699.didat and b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_2592010699.didat differ diff --git a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3499444699.didat b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3499444699.didat index f0964af..56ad3f8 100644 Binary files a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3499444699.didat and b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3499444699.didat differ diff --git a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3620187407.didat b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3620187407.didat index b243993..8385230 100644 Binary files a/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3620187407.didat and b/xilinx/ALU/isim/precompiled.exe.sim/ieee/p_3620187407.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg index a394547..c4844f4 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/isimkernel.log b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/isimkernel.log index b276284..43b3bf6 100644 --- a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/isimkernel.log +++ b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/isimkernel.log @@ -2,9 +2,28 @@ Command line: process_test_isim_beh.exe -simmode gui -simrunnum 0 - -socket 54129 + -socket 43981 -Tue May 11 16:30:48 2021 +Mon May 10 12:31:07 2021 - Elaboration Time: 0.02 sec + Elaboration Time: 0.01 sec + + Current Memory Usage: 189.698 Meg + + Total Signals : 109 + Total Nets : 10695 + Total Signal Drivers : 44 + Total Blocks : 14 + Total Primitive Blocks : 12 + Total Processes : 31 + Total Traceable Variables : 16 + Total Scalar Nets and Variables : 11197 +Total Line Count : 66 + + Total Simulation Time: 0.04 sec + + Current Memory Usage: 265.2 Meg + +Mon May 10 12:32:41 2021 + diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/netId.dat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/netId.dat index ce8782e..b6daf1e 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/netId.dat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/netId.dat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/process_test_isim_beh.exe b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/process_test_isim_beh.exe index 44b3666..b761c0b 100755 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/process_test_isim_beh.exe and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/process_test_isim_beh.exe differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/tmp_save/_1 b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/tmp_save/_1 index 7be284b..d89b164 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/tmp_save/_1 and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/tmp_save/_1 differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_0832606739_3212880686.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_0832606739_3212880686.didat index a1e50e8..9380503 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_0832606739_3212880686.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_0832606739_3212880686.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1229531095_2372691052.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1229531095_2372691052.didat index 6c32d3f..dab3502 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1229531095_2372691052.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1229531095_2372691052.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1466808984_3212880686.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1466808984_3212880686.didat index 2fd7c42..d0b248f 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1466808984_3212880686.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1466808984_3212880686.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.c b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.c index 2a86ea7..a5b42f6 100644 --- a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.c +++ b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.c @@ -45,7 +45,7 @@ static void work_a_1802466774_3212880686_p_0(char *t0) char *t14; char *t15; -LAB0: xsi_set_current_line(57, ng0); +LAB0: xsi_set_current_line(45, ng0); LAB3: t1 = (t0 + 1512U); t2 = *((char **)t1); diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.didat index 2d09ee1..8b36ff9 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.lin64.o b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.lin64.o index 4791499..921e541 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.lin64.o and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_1802466774_3212880686.lin64.o differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3650175700_3212880686.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3650175700_3212880686.didat index d6cd8f5..767be67 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3650175700_3212880686.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3650175700_3212880686.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3998322972_3212880686.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3998322972_3212880686.didat index e04f43c..01c7692 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3998322972_3212880686.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_3998322972_3212880686.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.c b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.c index 67bcd2a..d7ee46a 100644 --- a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.c +++ b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.c @@ -298,223 +298,193 @@ LAB24: goto LAB2; static void work_a_4150868852_3212880686_p_1(char *t0) { - char t10[16]; - char t19[16]; - char t27[16]; - char t35[16]; - char t43[16]; - char t51[16]; + char t9[16]; + char t18[16]; + char t26[16]; + char t34[16]; + char t42[16]; unsigned char t1; unsigned char t2; unsigned char t3; unsigned char t4; - unsigned char t5; + char *t5; char *t6; char *t7; - char *t8; + char *t10; char *t11; - char *t12; - int t13; - unsigned int t14; - unsigned char t15; + int t12; + unsigned int t13; + unsigned char t14; + char *t15; char *t16; - char *t17; + char *t19; char *t20; - char *t21; - int t22; - unsigned char t23; + int t21; + unsigned char t22; + char *t23; char *t24; - char *t25; + char *t27; char *t28; - char *t29; - int t30; - unsigned char t31; + int t29; + unsigned char t30; + char *t31; char *t32; - char *t33; + char *t35; char *t36; - char *t37; - int t38; - unsigned char t39; + int t37; + unsigned char t38; + char *t39; char *t40; - char *t41; + char *t43; char *t44; - char *t45; - int t46; - unsigned char t47; + int t45; + unsigned char t46; + char *t47; char *t48; char *t49; + char *t50; + char *t51; char *t52; char *t53; - int t54; - unsigned char t55; + char *t54; + char *t55; char *t56; char *t57; char *t58; - char *t59; - char *t60; - char *t61; - char *t62; - char *t63; - char *t64; - char *t65; - char *t66; - char *t67; LAB0: xsi_set_current_line(181, ng0); - t6 = (t0 + 2152U); - t7 = *((char **)t6); - t6 = (t0 + 17640U); - t8 = (t0 + 18323); + t5 = (t0 + 2152U); + t6 = *((char **)t5); + t5 = (t0 + 17640U); + t7 = (t0 + 18323); + t10 = (t9 + 0U); t11 = (t10 + 0U); - t12 = (t11 + 0U); - *((int *)t12) = 0; - t12 = (t11 + 4U); - *((int *)t12) = 7; - t12 = (t11 + 8U); - *((int *)t12) = 1; - t13 = (7 - 0); - t14 = (t13 * 1); - t14 = (t14 + 1); - t12 = (t11 + 12U); - *((unsigned int *)t12) = t14; - t15 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t7, t6, t8, t10); - if (t15 == 1) - goto LAB17; - -LAB18: t12 = (t0 + 2152U); - t16 = *((char **)t12); - t12 = (t0 + 17640U); - t17 = (t0 + 18331); - t20 = (t19 + 0U); - t21 = (t20 + 0U); - *((int *)t21) = 0; - t21 = (t20 + 4U); - *((int *)t21) = 7; - t21 = (t20 + 8U); - *((int *)t21) = 1; - t22 = (7 - 0); - t14 = (t22 * 1); - t14 = (t14 + 1); - t21 = (t20 + 12U); - *((unsigned int *)t21) = t14; - t23 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t16, t12, t17, t19); - t5 = t23; - -LAB19: if (t5 == 1) + *((int *)t11) = 0; + t11 = (t10 + 4U); + *((int *)t11) = 7; + t11 = (t10 + 8U); + *((int *)t11) = 1; + t12 = (7 - 0); + t13 = (t12 * 1); + t13 = (t13 + 1); + t11 = (t10 + 12U); + *((unsigned int *)t11) = t13; + t14 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t6, t5, t7, t9); + if (t14 == 1) goto LAB14; -LAB15: t21 = (t0 + 2152U); - t24 = *((char **)t21); - t21 = (t0 + 17640U); - t25 = (t0 + 18339); - t28 = (t27 + 0U); - t29 = (t28 + 0U); - *((int *)t29) = 0; - t29 = (t28 + 4U); - *((int *)t29) = 7; - t29 = (t28 + 8U); - *((int *)t29) = 1; - t30 = (7 - 0); - t14 = (t30 * 1); - t14 = (t14 + 1); - t29 = (t28 + 12U); - *((unsigned int *)t29) = t14; - t31 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t24, t21, t25, t27); - t4 = t31; +LAB15: t11 = (t0 + 2152U); + t15 = *((char **)t11); + t11 = (t0 + 17640U); + t16 = (t0 + 18331); + t19 = (t18 + 0U); + t20 = (t19 + 0U); + *((int *)t20) = 0; + t20 = (t19 + 4U); + *((int *)t20) = 7; + t20 = (t19 + 8U); + *((int *)t20) = 1; + t21 = (7 - 0); + t13 = (t21 * 1); + t13 = (t13 + 1); + t20 = (t19 + 12U); + *((unsigned int *)t20) = t13; + t22 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t15, t11, t16, t18); + t4 = t22; LAB16: if (t4 == 1) goto LAB11; -LAB12: t29 = (t0 + 2152U); - t32 = *((char **)t29); - t29 = (t0 + 17640U); - t33 = (t0 + 18347); - t36 = (t35 + 0U); - t37 = (t36 + 0U); - *((int *)t37) = 0; - t37 = (t36 + 4U); - *((int *)t37) = 7; - t37 = (t36 + 8U); - *((int *)t37) = 1; - t38 = (7 - 0); - t14 = (t38 * 1); - t14 = (t14 + 1); - t37 = (t36 + 12U); - *((unsigned int *)t37) = t14; - t39 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t32, t29, t33, t35); - t3 = t39; +LAB12: t20 = (t0 + 2152U); + t23 = *((char **)t20); + t20 = (t0 + 17640U); + t24 = (t0 + 18339); + t27 = (t26 + 0U); + t28 = (t27 + 0U); + *((int *)t28) = 0; + t28 = (t27 + 4U); + *((int *)t28) = 7; + t28 = (t27 + 8U); + *((int *)t28) = 1; + t29 = (7 - 0); + t13 = (t29 * 1); + t13 = (t13 + 1); + t28 = (t27 + 12U); + *((unsigned int *)t28) = t13; + t30 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t23, t20, t24, t26); + t3 = t30; LAB13: if (t3 == 1) goto LAB8; -LAB9: t37 = (t0 + 2152U); - t40 = *((char **)t37); - t37 = (t0 + 17640U); - t41 = (t0 + 18355); - t44 = (t43 + 0U); - t45 = (t44 + 0U); - *((int *)t45) = 0; - t45 = (t44 + 4U); - *((int *)t45) = 7; - t45 = (t44 + 8U); - *((int *)t45) = 1; - t46 = (7 - 0); - t14 = (t46 * 1); - t14 = (t14 + 1); - t45 = (t44 + 12U); - *((unsigned int *)t45) = t14; - t47 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t40, t37, t41, t43); - t2 = t47; +LAB9: t28 = (t0 + 2152U); + t31 = *((char **)t28); + t28 = (t0 + 17640U); + t32 = (t0 + 18347); + t35 = (t34 + 0U); + t36 = (t35 + 0U); + *((int *)t36) = 0; + t36 = (t35 + 4U); + *((int *)t36) = 7; + t36 = (t35 + 8U); + *((int *)t36) = 1; + t37 = (7 - 0); + t13 = (t37 * 1); + t13 = (t13 + 1); + t36 = (t35 + 12U); + *((unsigned int *)t36) = t13; + t38 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t31, t28, t32, t34); + t2 = t38; LAB10: if (t2 == 1) goto LAB5; -LAB6: t45 = (t0 + 2152U); - t48 = *((char **)t45); - t45 = (t0 + 17640U); - t49 = (t0 + 18363); - t52 = (t51 + 0U); - t53 = (t52 + 0U); - *((int *)t53) = 0; - t53 = (t52 + 4U); - *((int *)t53) = 7; - t53 = (t52 + 8U); - *((int *)t53) = 1; - t54 = (7 - 0); - t14 = (t54 * 1); - t14 = (t14 + 1); - t53 = (t52 + 12U); - *((unsigned int *)t53) = t14; - t55 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t48, t45, t49, t51); - t1 = t55; +LAB6: t36 = (t0 + 2152U); + t39 = *((char **)t36); + t36 = (t0 + 17640U); + t40 = (t0 + 18355); + t43 = (t42 + 0U); + t44 = (t43 + 0U); + *((int *)t44) = 0; + t44 = (t43 + 4U); + *((int *)t44) = 7; + t44 = (t43 + 8U); + *((int *)t44) = 1; + t45 = (7 - 0); + t13 = (t45 * 1); + t13 = (t13 + 1); + t44 = (t43 + 12U); + *((unsigned int *)t44) = t13; + t46 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t39, t36, t40, t42); + t1 = t46; LAB7: if (t1 != 0) goto LAB3; LAB4: -LAB20: t61 = (t0 + 2472U); - t62 = *((char **)t61); - t61 = (t0 + 10360); - t63 = (t61 + 56U); - t64 = *((char **)t63); - t65 = (t64 + 56U); - t66 = *((char **)t65); - memcpy(t66, t62, 8U); - xsi_driver_first_trans_fast(t61); +LAB17: t52 = (t0 + 2472U); + t53 = *((char **)t52); + t52 = (t0 + 10360); + t54 = (t52 + 56U); + t55 = *((char **)t54); + t56 = (t55 + 56U); + t57 = *((char **)t56); + memcpy(t57, t53, 8U); + xsi_driver_first_trans_fast(t52); -LAB2: t67 = (t0 + 10104); - *((int *)t67) = 1; +LAB2: t58 = (t0 + 10104); + *((int *)t58) = 1; LAB1: return; -LAB3: t53 = (t0 + 1512U); - t56 = *((char **)t53); - t53 = (t0 + 10360); - t57 = (t53 + 56U); - t58 = *((char **)t57); - t59 = (t58 + 56U); - t60 = *((char **)t59); - memcpy(t60, t56, 8U); - xsi_driver_first_trans_fast(t53); +LAB3: t44 = (t0 + 1512U); + t47 = *((char **)t44); + t44 = (t0 + 10360); + t48 = (t44 + 56U); + t49 = *((char **)t48); + t50 = (t49 + 56U); + t51 = *((char **)t50); + memcpy(t51, t47, 8U); + xsi_driver_first_trans_fast(t44); goto LAB2; LAB5: t1 = (unsigned char)1; @@ -529,10 +499,7 @@ LAB11: t3 = (unsigned char)1; LAB14: t4 = (unsigned char)1; goto LAB16; -LAB17: t5 = (unsigned char)1; - goto LAB19; - -LAB21: goto LAB2; +LAB18: goto LAB2; } @@ -590,7 +557,7 @@ LAB0: xsi_set_current_line(197, ng0); t1 = (t0 + 2792U); t2 = *((char **)t1); t1 = (t0 + 17704U); - t3 = (t0 + 18371); + t3 = (t0 + 18363); t6 = (t5 + 0U); t7 = (t6 + 0U); *((int *)t7) = 0; @@ -610,7 +577,7 @@ LAB0: xsi_set_current_line(197, ng0); LAB4: t17 = (t0 + 2792U); t18 = *((char **)t17); t17 = (t0 + 17704U); - t19 = (t0 + 18382); + t19 = (t0 + 18374); t22 = (t21 + 0U); t23 = (t22 + 0U); *((int *)t23) = 0; @@ -630,7 +597,7 @@ LAB4: t17 = (t0 + 2792U); LAB6: t32 = (t0 + 2792U); t33 = *((char **)t32); t32 = (t0 + 17704U); - t34 = (t0 + 18393); + t34 = (t0 + 18385); t37 = (t36 + 0U); t38 = (t37 + 0U); *((int *)t38) = 0; @@ -648,7 +615,7 @@ LAB6: t32 = (t0 + 2792U); goto LAB7; LAB8: -LAB9: t47 = (t0 + 18404); +LAB9: t47 = (t0 + 18396); t49 = (t0 + 10424); t50 = (t49 + 56U); t51 = *((char **)t50); @@ -661,7 +628,7 @@ LAB2: t54 = (t0 + 10120); *((int *)t54) = 1; LAB1: return; -LAB3: t7 = (t0 + 18379); +LAB3: t7 = (t0 + 18371); t12 = (t0 + 10424); t13 = (t12 + 56U); t14 = *((char **)t13); @@ -671,7 +638,7 @@ LAB3: t7 = (t0 + 18379); xsi_driver_first_trans_fast(t12); goto LAB2; -LAB5: t23 = (t0 + 18390); +LAB5: t23 = (t0 + 18382); t27 = (t0 + 10424); t28 = (t27 + 56U); t29 = *((char **)t28); @@ -681,7 +648,7 @@ LAB5: t23 = (t0 + 18390); xsi_driver_first_trans_fast(t27); goto LAB2; -LAB7: t38 = (t0 + 18401); +LAB7: t38 = (t0 + 18393); t42 = (t0 + 10424); t43 = (t42 + 56U); t44 = *((char **)t43); @@ -739,7 +706,7 @@ LAB0: xsi_set_current_line(214, ng0); t3 = (t0 + 2792U); t4 = *((char **)t3); t3 = (t0 + 17704U); - t5 = (t0 + 18407); + t5 = (t0 + 18399); t8 = (t7 + 0U); t9 = (t8 + 0U); *((int *)t9) = 0; @@ -759,7 +726,7 @@ LAB0: xsi_set_current_line(214, ng0); LAB9: t9 = (t0 + 2792U); t13 = *((char **)t9); t9 = (t0 + 17704U); - t14 = (t0 + 18415); + t14 = (t0 + 18407); t17 = (t16 + 0U); t18 = (t17 + 0U); *((int *)t18) = 0; @@ -781,7 +748,7 @@ LAB10: if (t2 == 1) LAB6: t18 = (t0 + 2792U); t21 = *((char **)t18); t18 = (t0 + 17704U); - t22 = (t0 + 18423); + t22 = (t0 + 18415); t25 = (t24 + 0U); t26 = (t25 + 0U); *((int *)t26) = 0; @@ -862,7 +829,7 @@ LAB0: xsi_set_current_line(231, ng0); t1 = (t0 + 4392U); t2 = *((char **)t1); t1 = (t0 + 17800U); - t3 = (t0 + 18431); + t3 = (t0 + 18423); t6 = (t5 + 0U); t7 = (t6 + 0U); *((int *)t7) = 0; @@ -933,7 +900,7 @@ LAB0: xsi_set_current_line(233, ng0); t1 = (t0 + 4392U); t2 = *((char **)t1); t1 = (t0 + 17800U); - t3 = (t0 + 18439); + t3 = (t0 + 18431); t6 = (t5 + 0U); t7 = (t6 + 0U); *((int *)t7) = 0; @@ -1002,7 +969,7 @@ LAB0: xsi_set_current_line(235, ng0); t1 = (t0 + 4392U); t2 = *((char **)t1); t1 = (t0 + 17800U); - t3 = (t0 + 18447); + t3 = (t0 + 18439); t6 = (t5 + 0U); t7 = (t6 + 0U); *((int *)t7) = 0; @@ -1039,109 +1006,76 @@ LAB3: t7 = (t0 + 4232U); static void work_a_4150868852_3212880686_p_7(char *t0) { - char t6[16]; - char t15[16]; - unsigned char t1; + char t5[16]; + char *t1; char *t2; char *t3; - char *t4; + char *t6; char *t7; - char *t8; - int t9; - unsigned int t10; - unsigned char t11; + int t8; + unsigned int t9; + unsigned char t10; + char *t11; char *t12; char *t13; + char *t14; + char *t15; char *t16; char *t17; - int t18; - unsigned char t19; + char *t18; + char *t19; char *t20; char *t21; char *t22; - char *t23; - char *t24; - char *t25; - char *t26; - char *t27; - char *t28; - char *t29; - char *t30; - char *t31; LAB0: xsi_set_current_line(236, ng0); - t2 = (t0 + 4392U); - t3 = *((char **)t2); - t2 = (t0 + 17800U); - t4 = (t0 + 18455); + t1 = (t0 + 4392U); + t2 = *((char **)t1); + t1 = (t0 + 17800U); + t3 = (t0 + 18447); + t6 = (t5 + 0U); t7 = (t6 + 0U); - t8 = (t7 + 0U); - *((int *)t8) = 0; - t8 = (t7 + 4U); - *((int *)t8) = 7; - t8 = (t7 + 8U); - *((int *)t8) = 1; - t9 = (7 - 0); - t10 = (t9 * 1); - t10 = (t10 + 1); - t8 = (t7 + 12U); - *((unsigned int *)t8) = t10; - t11 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t3, t2, t4, t6); - if (t11 == 1) - goto LAB5; - -LAB6: t8 = (t0 + 4392U); - t12 = *((char **)t8); - t8 = (t0 + 17800U); - t13 = (t0 + 18463); - t16 = (t15 + 0U); - t17 = (t16 + 0U); - *((int *)t17) = 0; - t17 = (t16 + 4U); - *((int *)t17) = 7; - t17 = (t16 + 8U); - *((int *)t17) = 1; - t18 = (7 - 0); - t10 = (t18 * 1); - t10 = (t10 + 1); - t17 = (t16 + 12U); - *((unsigned int *)t17) = t10; - t19 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t12, t8, t13, t15); - t1 = t19; - -LAB7: if (t1 != 0) + *((int *)t7) = 0; + t7 = (t6 + 4U); + *((int *)t7) = 7; + t7 = (t6 + 8U); + *((int *)t7) = 1; + t8 = (7 - 0); + t9 = (t8 * 1); + t9 = (t9 + 1); + t7 = (t6 + 12U); + *((unsigned int *)t7) = t9; + t10 = ieee_std_logic_unsigned_equal_stdv_stdv(IEEE_P_3620187407, t2, t1, t3, t5); + if (t10 != 0) goto LAB3; LAB4: -LAB8: t25 = (t0 + 4232U); - t26 = *((char **)t25); - t25 = (t0 + 10744); - t27 = (t25 + 56U); - t28 = *((char **)t27); - t29 = (t28 + 56U); - t30 = *((char **)t29); - memcpy(t30, t26, 8U); - xsi_driver_first_trans_fast(t25); +LAB5: t16 = (t0 + 4232U); + t17 = *((char **)t16); + t16 = (t0 + 10744); + t18 = (t16 + 56U); + t19 = *((char **)t18); + t20 = (t19 + 56U); + t21 = *((char **)t20); + memcpy(t21, t17, 8U); + xsi_driver_first_trans_fast(t16); -LAB2: t31 = (t0 + 10200); - *((int *)t31) = 1; +LAB2: t22 = (t0 + 10200); + *((int *)t22) = 1; LAB1: return; -LAB3: t17 = (t0 + 5672U); - t20 = *((char **)t17); - t17 = (t0 + 10744); - t21 = (t17 + 56U); - t22 = *((char **)t21); - t23 = (t22 + 56U); - t24 = *((char **)t23); - memcpy(t24, t20, 8U); - xsi_driver_first_trans_fast(t17); +LAB3: t7 = (t0 + 5672U); + t11 = *((char **)t7); + t7 = (t0 + 10744); + t12 = (t7 + 56U); + t13 = *((char **)t12); + t14 = (t13 + 56U); + t15 = *((char **)t14); + memcpy(t15, t11, 8U); + xsi_driver_first_trans_fast(t7); goto LAB2; -LAB5: t1 = (unsigned char)1; - goto LAB7; - -LAB9: goto LAB2; +LAB6: goto LAB2; } @@ -1196,7 +1130,7 @@ LAB10: xsi_set_current_line(266, ng0); t2 = (t0 + 1352U); t3 = *((char **)t2); t2 = (t0 + 17560U); - t5 = (t0 + 18479); + t5 = (t0 + 18463); t8 = (t13 + 0U); t9 = (t8 + 0U); *((int *)t9) = 0; @@ -1237,7 +1171,7 @@ LAB5: t3 = (t0 + 992U); LAB7: goto LAB5; LAB8: xsi_set_current_line(264, ng0); - t2 = (t0 + 18471); + t2 = (t0 + 18455); t7 = (t0 + 10808); t8 = (t7 + 56U); t9 = *((char **)t8); diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.didat b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.didat index b88ab6b..e84fb20 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.didat and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.didat differ diff --git a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.lin64.o b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.lin64.o index 002dbe1..ef6a22d 100644 Binary files a/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.lin64.o and b/xilinx/ALU/isim/process_test_isim_beh.exe.sim/work/a_4150868852_3212880686.lin64.o differ diff --git a/xilinx/ALU/isim/work/alu.vdb b/xilinx/ALU/isim/work/alu.vdb index e4ddd92..3d69e0f 100644 Binary files a/xilinx/ALU/isim/work/alu.vdb and b/xilinx/ALU/isim/work/alu.vdb differ diff --git a/xilinx/ALU/isim/work/bm_data.vdb b/xilinx/ALU/isim/work/bm_data.vdb index aef5b35..c50550a 100644 Binary files a/xilinx/ALU/isim/work/bm_data.vdb and b/xilinx/ALU/isim/work/bm_data.vdb differ diff --git a/xilinx/ALU/isim/work/bm_instr.vdb b/xilinx/ALU/isim/work/bm_instr.vdb index bd39d3f..a590406 100644 Binary files a/xilinx/ALU/isim/work/bm_instr.vdb and b/xilinx/ALU/isim/work/bm_instr.vdb differ diff --git a/xilinx/ALU/isim/work/br.vdb b/xilinx/ALU/isim/work/br.vdb index ac66230..cb363ad 100644 Binary files a/xilinx/ALU/isim/work/br.vdb and b/xilinx/ALU/isim/work/br.vdb differ diff --git a/xilinx/ALU/isim/work/pipeline.vdb b/xilinx/ALU/isim/work/pipeline.vdb index 72f4604..14165e2 100644 Binary files a/xilinx/ALU/isim/work/pipeline.vdb and b/xilinx/ALU/isim/work/pipeline.vdb differ diff --git a/xilinx/ALU/isim/work/process_test.vdb b/xilinx/ALU/isim/work/process_test.vdb index 5804d70..7e7008d 100644 Binary files a/xilinx/ALU/isim/work/process_test.vdb and b/xilinx/ALU/isim/work/process_test.vdb differ diff --git a/xilinx/ALU/isim/work/processeur.vdb b/xilinx/ALU/isim/work/processeur.vdb index bfa6ef5..37a8687 100644 Binary files a/xilinx/ALU/isim/work/processeur.vdb and b/xilinx/ALU/isim/work/processeur.vdb differ diff --git a/xilinx/ALU/process_test_isim_beh.wdb b/xilinx/ALU/process_test_isim_beh.wdb index e69de29..6c339fb 100644 Binary files a/xilinx/ALU/process_test_isim_beh.wdb and b/xilinx/ALU/process_test_isim_beh.wdb differ diff --git a/xilinx/ALU/processeur.vhd b/xilinx/ALU/processeur.vhd index 2a606ad..04b95cd 100644 --- a/xilinx/ALU/processeur.vhd +++ b/xilinx/ALU/processeur.vhd @@ -178,7 +178,7 @@ begin QB => C_DIEX_IN ); - B_DIEX_IN <= QA_IN_MUX when OP_LIDI_OUT = x"05" or OP_LIDI_OUT = x"01" or OP_LIDI_OUT = x"02" or OP_LIDI_OUT = x"03" or OP_LIDI_OUT = x"04" or OP_LIDI_OUT = x"08" else B_LIDI_OUT ; + B_DIEX_IN <= QA_IN_MUX when OP_LIDI_OUT = x"05" or OP_LIDI_OUT = x"01" or OP_LIDI_OUT = x"02" or OP_LIDI_OUT = x"03" or OP_LIDI_OUT = x"04" else B_LIDI_OUT ; -- Instantiate pipeline DI_EX @@ -233,12 +233,12 @@ begin addr_dm_MUX <= B_EXMem_OUT when OP_EXMem_OUT = x"07" else A_EXMem_OUT; in_dm_MUX <= B_EXMem_OUT when OP_EXMem_OUT = x"08"; - B_MemRE_IN <= out_dm_MUX when OP_EXMem_OUT = x"08" or OP_EXMem_OUT = x"07" else + B_MemRE_IN <= out_dm_MUX when OP_EXMem_OUT = x"08" else B_EXMem_OUT; -- Instantiate banc de donnĂ©es data_memory: bm_data PORT MAP ( IN_addr => addr_dm_MUX, - IN_data => in_dm_MUX, + IN_data => B_MemRE_IN, RW => RW_LC, RST => RST, CLK => CLK, @@ -249,7 +249,7 @@ begin Mem_RE : pipeline PORT MAP ( OP_IN => OP_EXMem_OUT, A_IN => A_EXMem_OUT, - B_IN => B_MemRE_IN, + B_IN => B_EXMem_OUT, C_IN => x"00", CLK => CLK, A_OUT => A_MemRE_OUT, diff --git a/xilinx/ALU/processeur_summary.html b/xilinx/ALU/processeur_summary.html index ba130be..23acf3d 100644 --- a/xilinx/ALU/processeur_summary.html +++ b/xilinx/ALU/processeur_summary.html @@ -72,9 +72,9 @@  
- +
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogCurrentlun. mai 10 12:32:42 2021
ISIM Simulator LogOut of Datelun. mai 10 10:45:43 2021
-
Date Generated: 05/11/2021 - 15:38:05
+
Date Generated: 05/10/2021 - 10:47:06
\ No newline at end of file diff --git a/xilinx/ALU/tests/test_load.wcfg b/xilinx/ALU/tests/test_load.wcfg deleted file mode 100644 index b04da08..0000000 --- a/xilinx/ALU/tests/test_load.wcfg +++ /dev/null @@ -1,165 +0,0 @@ - - - - - - - - - - - - - - - - - - clk - clk - - - rst - rst - - - clk_period - clk_period - - - out_data[31:0] - out_data[31:0] - - - op_in[7:0] - op_in[7:0] - - - a_in[7:0] - a_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - op_in[7:0] - op_in[7:0] - - - a_in[7:0] - a_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - op_in[7:0] - op_in[7:0] - - - a_in[7:0] - a_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - in_addr[7:0] - in_addr[7:0] - - - in_data[7:0] - in_data[7:0] - - - rw - rw - - - out_data[7:0] - out_data[7:0] - - - data_memory[0:255] - data_memory[0:255] - - - a_in[7:0] - a_in[7:0] - - - op_in[7:0] - op_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - registres[0:15] - registres[0:15] - - - w_addr[3:0] - w_addr[3:0] - - - w - w - - - data[7:0] - data[7:0] - - diff --git a/xilinx/ALU/tests/test_store.wcfg b/xilinx/ALU/tests/test_store.wcfg deleted file mode 100644 index b04da08..0000000 --- a/xilinx/ALU/tests/test_store.wcfg +++ /dev/null @@ -1,165 +0,0 @@ - - - - - - - - - - - - - - - - - - clk - clk - - - rst - rst - - - clk_period - clk_period - - - out_data[31:0] - out_data[31:0] - - - op_in[7:0] - op_in[7:0] - - - a_in[7:0] - a_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - op_in[7:0] - op_in[7:0] - - - a_in[7:0] - a_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - op_in[7:0] - op_in[7:0] - - - a_in[7:0] - a_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - in_addr[7:0] - in_addr[7:0] - - - in_data[7:0] - in_data[7:0] - - - rw - rw - - - out_data[7:0] - out_data[7:0] - - - data_memory[0:255] - data_memory[0:255] - - - a_in[7:0] - a_in[7:0] - - - op_in[7:0] - op_in[7:0] - - - b_in[7:0] - b_in[7:0] - - - op_out[7:0] - op_out[7:0] - - - a_out[7:0] - a_out[7:0] - - - b_out[7:0] - b_out[7:0] - - - registres[0:15] - registres[0:15] - - - w_addr[3:0] - w_addr[3:0] - - - w - w - - - data[7:0] - data[7:0] - -