chauzy/TP_microcontroleur
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partie PWM

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This commit is contained in:
Celia 2021-09-30 17:04:56 +02:00
parent 77f499f436
commit f83753a722
22 changed files with 3458 additions and 150 deletions
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51
timer_act2/Includes/Driver_TIMER.c
View file

@ -22,6 +22,10 @@ void Activate_TIM(int i) {
}
}
//////////////////////////////////////////////////////////
//-----------------Partie interruptions-----------------//
//////////////////////////////////////////////////////////
void MyTimer_Active_IT ( TIM_TypeDef * Timer , char Prio , void (* IT_function) (void)) {
//active l'interruption sur timer et pointe vers la fonction IT_function avec la priorité prio
@ -78,6 +82,10 @@ void TIM4_IRQHandler(void) {
(* IT_function_TIM4) ();
}
//////////////////////////////////////////////////////////
//----------------------Partie PWM----------------------//
//////////////////////////////////////////////////////////
void MyTimer_PWM(TIM_TypeDef * Timer, char Channel) {
if (Timer == TIM1) {
TIM1 -> BDTR |= 1 << 15 ;
@ -85,40 +93,51 @@ void MyTimer_PWM(TIM_TypeDef * Timer, char Channel) {
switch (Channel) {
case 1 :
//7=0b111 et 6=0b110
Timer -> CCMR1 &= ~(7 << 4) ;
//on rajoute un OU sur le OC1PE
Timer -> CCMR1 |= ~(6 << 4) | (1<<3);
//On choisit le mode 1
//on écrit donc '110' dans le registre OC1M de TIM1_CCMR1
Timer->CCMR1 &= ~TIM_CCMR1_OC1M_0;
Timer->CCMR1 |= TIM_CCMR1_OC1M_1| TIM_CCMR1_OC1M_2;
//On autorise le registre de preload correspondant en écrivant 1 dans OC1PE
Timer->CCMR1 |= TIM_CCMR1_OC1PE ;
//On autorise la sortie OCx en mettant à 1 le registre CCxE
Timer->CCER |= TIM_CCER_CC1E;
break ;
case 2 :
Timer -> CCMR1 &= ~(7 << 12) ;
Timer -> CCMR1 |= ~(6 << 12) | (1<<11);
Timer->CCMR1 &= ~TIM_CCMR1_OC2M_0;
Timer->CCMR1 |= TIM_CCMR1_OC2M_1| TIM_CCMR1_OC2M_2;
Timer->CCMR1 |= TIM_CCMR1_OC1PE ;
Timer->CCER |= TIM_CCER_CC2E;
break ;
case 3 :
Timer -> CCMR2 &= ~(7 << 4) ;
Timer -> CCMR2 |= ~(6 << 4) | (1<<3);
Timer->CCMR2 &= ~TIM_CCMR2_OC3M_0;
Timer->CCMR2 |= TIM_CCMR2_OC3M_1| TIM_CCMR2_OC3M_2;
Timer->CCMR2 |= TIM_CCMR1_OC1PE ;
Timer->CCER |= TIM_CCER_CC3E;
break ;
case 4 :
Timer -> CCMR2 &= ~(7 << 12) ;
Timer -> CCMR2 |= ~(6 << 12) | (1<<11);
Timer->CCMR2 &= ~TIM_CCMR2_OC4M_0;
Timer->CCMR2 |= TIM_CCMR2_OC4M_1| TIM_CCMR2_OC4M_2;
Timer->CCMR2 |= TIM_CCMR1_OC1PE ;
Timer->CCER |= TIM_CCER_CC4E;
break ;
}
Timer -> CR1 |= 1 << 7 ;
//on autorise le registre de auto-reload preload en écrivant 1 dans le registre ARPE de CR1
Timer -> CR1 |= TIM_CR1_ARPE ;
}
void MyTimer_PWM_set_cycle(TIM_TypeDef * Timer, float prop, char channel) {
void MyTimer_PWM_set_cycle(TIM_TypeDef * Timer, float rapport, char channel) {
switch (channel) {
case 1 :
Timer->CCR1 = (int) (Timer -> ARR * prop) ;
Timer->CCR1 = (int) (Timer -> ARR * rapport) ;
break ;
case 2 :
Timer->CCR2 = (int) (Timer -> ARR * prop) ;
Timer->CCR2 = (int) (Timer -> ARR * rapport) ;
break ;
case 3 :
Timer->CCR3 = (int) (Timer -> ARR * prop) ;
Timer->CCR3 = (int) (Timer -> ARR * rapport) ;
break ;
case 4 :
Timer->CCR4 = (int) (Timer -> ARR * prop) ;
Timer->CCR4 = (int) (Timer -> ARR * rapport) ;
break ;
}
}

40
timer_act2/Includes/Driver_TIMER.h
View file

@ -9,18 +9,56 @@ typedef struct {
uint16_t PSC ;
} MyTimer_Struct_TypeDef ;
/*
*****************************************************************************************
* @brief
* @param -> Paramètre sous forme d’une structure (son adresse) contenant les informations de base
* @Note -> Fonction à lancer systématiquement avant d’aller plus en détail dans les conf plus fines
***********************************************************************************************
*/
void MyTimer_Base_Init(MyTimer_Struct_TypeDef * Timer) ;
void Activate_TIM(int) ;
/*
**************************************************************************************************
* @brief
* @param : - TIM_TypeDef * Timer : Timer concerné
- char Prio : de 0 a 15
* @Note : La fonction MyTimer_Base_Init doit avoir été lancée au préalable
**************************************************************************************************
*/
void MyTimer_Active_IT ( TIM_TypeDef * , char , void (*) (void)) ;
void TIM1_TRG_COM_IRQHandler(void) ;
void TIM2_IRQHandler(void) ;
void TIM3_IRQHandler(void) ;
void TIM4_IRQHandler(void) ;
/*
**************************************************************************************************
* @brief
* @param : - TIM_TypeDef * Timer : Timer concerné
* - char Channel : canal concerné, de 1 a 4
* @Note : Active le channel spécifié sur le timer spécifié, la gestion de la configuration I/O n’est
* pas faite dans cette fonction ni le réglage de la période de la PWM (ARR, PSC)
**************************************************************************************************
*/
void MyTimer_PWM( TIM_TypeDef *, char) ;
/*
**************************************************************************************************
* @brief
* @param : - TIM_TypeDef * Timer : Timer concerné
* - float rapport : rapport cyclique, de 0 à 1
* - char Channel : canal concerné, de 1 a 4
**************************************************************************************************
*/
void MyTimer_PWM_set_cycle(TIM_TypeDef *, float, char) ;
#define MyTimer_Base_Start(Timer) (Timer->CR1 |= 0x1)
#define MyTimer_Base_Stop(Timer) (Timer->CR1 &= ~0x1)
//#define MyTimer_PWM_set_cycle(Timer, prop, channel) (Timer->CCRchannel = (int) (Timer -> ARR * prop)
#endif

120
timer_act2/Listings/timer_act2.map
View file

@ -4,15 +4,15 @@ Component: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601]
Section Cross References
principal.o(i.handle_TIM2) refers to driver_gpio.o(i.MyGPIO_Toggle) for MyGPIO_Toggle
principal.o(i.handle_TIM2) refers to principal.o(.data) for greenLed
principal.o(i.callback_TIM2) refers to driver_gpio.o(i.MyGPIO_Toggle) for MyGPIO_Toggle
principal.o(i.callback_TIM2) refers to principal.o(.data) for greenLed
principal.o(i.main) refers to driver_timer.o(i.Activate_TIM) for Activate_TIM
principal.o(i.main) refers to driver_gpio.o(i.MyGPIO_Activate) for MyGPIO_Activate
principal.o(i.main) refers to driver_gpio.o(i.MyGPIO_Init) for MyGPIO_Init
principal.o(i.main) refers to driver_timer.o(i.MyTimer_Base_Init) for MyTimer_Base_Init
principal.o(i.main) refers to driver_gpio.o(i.MyGPIO_Init) for MyGPIO_Init
principal.o(i.main) refers to driver_timer.o(i.MyTimer_PWM) for MyTimer_PWM
principal.o(i.main) refers to driver_timer.o(i.MyTimer_PWM_set_cycle) for MyTimer_PWM_set_cycle
principal.o(i.main) refers to principal.o(.data) for sortiePWM
principal.o(i.main) refers to principal.o(.data) for MonTimer
driver_gpio.o(i.MyGPIO_Init) refers to driver_gpio.o(i.MyGPIO_Set) for MyGPIO_Set
driver_gpio.o(i.MyGPIO_Toggle) refers to driver_gpio.o(i.MyGPIO_Reset) for MyGPIO_Reset
driver_gpio.o(i.MyGPIO_Toggle) refers to driver_gpio.o(i.MyGPIO_Set) for MyGPIO_Set
@ -66,7 +66,7 @@ Removing Unused input sections from the image.
Removing principal.o(.rev16_text), (4 bytes).
Removing principal.o(.revsh_text), (4 bytes).
Removing principal.o(.rrx_text), (6 bytes).
Removing principal.o(i.handle_TIM2), (20 bytes).
Removing principal.o(i.callback_TIM2), (20 bytes).
Removing driver_gpio.o(.rev16_text), (4 bytes).
Removing driver_gpio.o(.revsh_text), (4 bytes).
Removing driver_gpio.o(.rrx_text), (6 bytes).
@ -153,20 +153,20 @@ Image Symbol Table
i.MyGPIO_Set 0x08000388 Section 0 driver_gpio.o(i.MyGPIO_Set)
i.MyTimer_Base_Init 0x08000390 Section 0 driver_timer.o(i.MyTimer_Base_Init)
i.MyTimer_PWM 0x080003a4 Section 0 driver_timer.o(i.MyTimer_PWM)
i.MyTimer_PWM_set_cycle 0x08000424 Section 0 driver_timer.o(i.MyTimer_PWM_set_cycle)
i.SetSysClock 0x080004a8 Section 0 system_stm32f10x.o(i.SetSysClock)
SetSysClock 0x080004a9 Thumb Code 8 system_stm32f10x.o(i.SetSysClock)
i.SetSysClockTo72 0x080004b0 Section 0 system_stm32f10x.o(i.SetSysClockTo72)
SetSysClockTo72 0x080004b1 Thumb Code 214 system_stm32f10x.o(i.SetSysClockTo72)
i.SystemInit 0x08000590 Section 0 system_stm32f10x.o(i.SystemInit)
i.TIM1_TRG_COM_IRQHandler 0x080005f0 Section 0 driver_timer.o(i.TIM1_TRG_COM_IRQHandler)
i.TIM2_IRQHandler 0x08000614 Section 0 driver_timer.o(i.TIM2_IRQHandler)
i.TIM3_IRQHandler 0x08000638 Section 0 driver_timer.o(i.TIM3_IRQHandler)
i.TIM4_IRQHandler 0x0800065c Section 0 driver_timer.o(i.TIM4_IRQHandler)
i.__scatterload_copy 0x08000680 Section 14 handlers.o(i.__scatterload_copy)
i.__scatterload_null 0x0800068e Section 2 handlers.o(i.__scatterload_null)
i.__scatterload_zeroinit 0x08000690 Section 14 handlers.o(i.__scatterload_zeroinit)
i.main 0x080006a0 Section 0 principal.o(i.main)
i.MyTimer_PWM_set_cycle 0x08000464 Section 0 driver_timer.o(i.MyTimer_PWM_set_cycle)
i.SetSysClock 0x080004e8 Section 0 system_stm32f10x.o(i.SetSysClock)
SetSysClock 0x080004e9 Thumb Code 8 system_stm32f10x.o(i.SetSysClock)
i.SetSysClockTo72 0x080004f0 Section 0 system_stm32f10x.o(i.SetSysClockTo72)
SetSysClockTo72 0x080004f1 Thumb Code 214 system_stm32f10x.o(i.SetSysClockTo72)
i.SystemInit 0x080005d0 Section 0 system_stm32f10x.o(i.SystemInit)
i.TIM1_TRG_COM_IRQHandler 0x08000630 Section 0 driver_timer.o(i.TIM1_TRG_COM_IRQHandler)
i.TIM2_IRQHandler 0x08000654 Section 0 driver_timer.o(i.TIM2_IRQHandler)
i.TIM3_IRQHandler 0x08000678 Section 0 driver_timer.o(i.TIM3_IRQHandler)
i.TIM4_IRQHandler 0x0800069c Section 0 driver_timer.o(i.TIM4_IRQHandler)
i.__scatterload_copy 0x080006c0 Section 14 handlers.o(i.__scatterload_copy)
i.__scatterload_null 0x080006ce Section 2 handlers.o(i.__scatterload_null)
i.__scatterload_zeroinit 0x080006d0 Section 14 handlers.o(i.__scatterload_zeroinit)
i.main 0x080006e0 Section 0 principal.o(i.main)
.data 0x20000000 Section 24 principal.o(.data)
.data 0x20000018 Section 16 driver_timer.o(.data)
STACK 0x20000028 Section 1024 startup_stm32f10x_md.o(STACK)
@ -258,19 +258,19 @@ Image Symbol Table
MyGPIO_Init 0x0800029d Thumb Code 236 driver_gpio.o(i.MyGPIO_Init)
MyGPIO_Set 0x08000389 Thumb Code 8 driver_gpio.o(i.MyGPIO_Set)
MyTimer_Base_Init 0x08000391 Thumb Code 18 driver_timer.o(i.MyTimer_Base_Init)
MyTimer_PWM 0x080003a5 Thumb Code 124 driver_timer.o(i.MyTimer_PWM)
MyTimer_PWM_set_cycle 0x08000425 Thumb Code 132 driver_timer.o(i.MyTimer_PWM_set_cycle)
SystemInit 0x08000591 Thumb Code 78 system_stm32f10x.o(i.SystemInit)
TIM1_TRG_COM_IRQHandler 0x080005f1 Thumb Code 28 driver_timer.o(i.TIM1_TRG_COM_IRQHandler)
TIM2_IRQHandler 0x08000615 Thumb Code 32 driver_timer.o(i.TIM2_IRQHandler)
TIM3_IRQHandler 0x08000639 Thumb Code 28 driver_timer.o(i.TIM3_IRQHandler)
TIM4_IRQHandler 0x0800065d Thumb Code 28 driver_timer.o(i.TIM4_IRQHandler)
__scatterload_copy 0x08000681 Thumb Code 14 handlers.o(i.__scatterload_copy)
__scatterload_null 0x0800068f Thumb Code 2 handlers.o(i.__scatterload_null)
__scatterload_zeroinit 0x08000691 Thumb Code 14 handlers.o(i.__scatterload_zeroinit)
main 0x080006a1 Thumb Code 98 principal.o(i.main)
Region$$Table$$Base 0x08000714 Number 0 anon$$obj.o(Region$$Table)
Region$$Table$$Limit 0x08000734 Number 0 anon$$obj.o(Region$$Table)
MyTimer_PWM 0x080003a5 Thumb Code 188 driver_timer.o(i.MyTimer_PWM)
MyTimer_PWM_set_cycle 0x08000465 Thumb Code 132 driver_timer.o(i.MyTimer_PWM_set_cycle)
SystemInit 0x080005d1 Thumb Code 78 system_stm32f10x.o(i.SystemInit)
TIM1_TRG_COM_IRQHandler 0x08000631 Thumb Code 28 driver_timer.o(i.TIM1_TRG_COM_IRQHandler)
TIM2_IRQHandler 0x08000655 Thumb Code 32 driver_timer.o(i.TIM2_IRQHandler)
TIM3_IRQHandler 0x08000679 Thumb Code 28 driver_timer.o(i.TIM3_IRQHandler)
TIM4_IRQHandler 0x0800069d Thumb Code 28 driver_timer.o(i.TIM4_IRQHandler)
__scatterload_copy 0x080006c1 Thumb Code 14 handlers.o(i.__scatterload_copy)
__scatterload_null 0x080006cf Thumb Code 2 handlers.o(i.__scatterload_null)
__scatterload_zeroinit 0x080006d1 Thumb Code 14 handlers.o(i.__scatterload_zeroinit)
main 0x080006e1 Thumb Code 98 principal.o(i.main)
Region$$Table$$Base 0x08000754 Number 0 anon$$obj.o(Region$$Table)
Region$$Table$$Limit 0x08000774 Number 0 anon$$obj.o(Region$$Table)
MonTimer 0x20000000 Data 8 principal.o(.data)
greenLed 0x20000008 Data 8 principal.o(.data)
sortiePWM 0x20000010 Data 8 principal.o(.data)
@ -288,9 +288,9 @@ Memory Map of the image
Image Entry point : 0x08000105
Load Region LR_1 (Base: 0x08000000, Size: 0x0000075c, Max: 0xffffffff, ABSOLUTE)
Load Region LR_1 (Base: 0x08000000, Size: 0x0000079c, Max: 0xffffffff, ABSOLUTE)
Execution Region ER_RO (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00000734, Max: 0xffffffff, ABSOLUTE)
Execution Region ER_RO (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00000774, Max: 0xffffffff, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
@ -319,32 +319,32 @@ Memory Map of the image
0x08000388 0x08000388 0x00000008 Code RO 76 i.MyGPIO_Set driver_gpio.o
0x08000390 0x08000390 0x00000012 Code RO 131 i.MyTimer_Base_Init driver_timer.o
0x080003a2 0x080003a2 0x00000002 PAD
0x080003a4 0x080003a4 0x00000080 Code RO 132 i.MyTimer_PWM driver_timer.o
0x08000424 0x08000424 0x00000084 Code RO 133 i.MyTimer_PWM_set_cycle driver_timer.o
0x080004a8 0x080004a8 0x00000008 Code RO 228 i.SetSysClock system_stm32f10x.o
0x080004b0 0x080004b0 0x000000e0 Code RO 229 i.SetSysClockTo72 system_stm32f10x.o
0x08000590 0x08000590 0x00000060 Code RO 231 i.SystemInit system_stm32f10x.o
0x080005f0 0x080005f0 0x00000024 Code RO 134 i.TIM1_TRG_COM_IRQHandler driver_timer.o
0x08000614 0x08000614 0x00000024 Code RO 135 i.TIM2_IRQHandler driver_timer.o
0x08000638 0x08000638 0x00000024 Code RO 136 i.TIM3_IRQHandler driver_timer.o
0x0800065c 0x0800065c 0x00000024 Code RO 137 i.TIM4_IRQHandler driver_timer.o
0x08000680 0x08000680 0x0000000e Code RO 303 i.__scatterload_copy mc_w.l(handlers.o)
0x0800068e 0x0800068e 0x00000002 Code RO 304 i.__scatterload_null mc_w.l(handlers.o)
0x08000690 0x08000690 0x0000000e Code RO 305 i.__scatterload_zeroinit mc_w.l(handlers.o)
0x0800069e 0x0800069e 0x00000002 PAD
0x080006a0 0x080006a0 0x00000074 Code RO 5 i.main principal.o
0x08000714 0x08000714 0x00000020 Data RO 301 Region$$Table anon$$obj.o
0x080003a4 0x080003a4 0x000000c0 Code RO 132 i.MyTimer_PWM driver_timer.o
0x08000464 0x08000464 0x00000084 Code RO 133 i.MyTimer_PWM_set_cycle driver_timer.o
0x080004e8 0x080004e8 0x00000008 Code RO 228 i.SetSysClock system_stm32f10x.o
0x080004f0 0x080004f0 0x000000e0 Code RO 229 i.SetSysClockTo72 system_stm32f10x.o
0x080005d0 0x080005d0 0x00000060 Code RO 231 i.SystemInit system_stm32f10x.o
0x08000630 0x08000630 0x00000024 Code RO 134 i.TIM1_TRG_COM_IRQHandler driver_timer.o
0x08000654 0x08000654 0x00000024 Code RO 135 i.TIM2_IRQHandler driver_timer.o
0x08000678 0x08000678 0x00000024 Code RO 136 i.TIM3_IRQHandler driver_timer.o
0x0800069c 0x0800069c 0x00000024 Code RO 137 i.TIM4_IRQHandler driver_timer.o
0x080006c0 0x080006c0 0x0000000e Code RO 303 i.__scatterload_copy mc_w.l(handlers.o)
0x080006ce 0x080006ce 0x00000002 Code RO 304 i.__scatterload_null mc_w.l(handlers.o)
0x080006d0 0x080006d0 0x0000000e Code RO 305 i.__scatterload_zeroinit mc_w.l(handlers.o)
0x080006de 0x080006de 0x00000002 PAD
0x080006e0 0x080006e0 0x00000074 Code RO 5 i.main principal.o
0x08000754 0x08000754 0x00000020 Data RO 301 Region$$Table anon$$obj.o
Execution Region ER_RW (Exec base: 0x20000000, Load base: 0x08000734, Size: 0x00000028, Max: 0xffffffff, ABSOLUTE)
Execution Region ER_RW (Exec base: 0x20000000, Load base: 0x08000774, Size: 0x00000028, Max: 0xffffffff, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
0x20000000 0x08000734 0x00000018 Data RW 6 .data principal.o
0x20000018 0x0800074c 0x00000010 Data RW 140 .data driver_timer.o
0x20000000 0x08000774 0x00000018 Data RW 6 .data principal.o
0x20000018 0x0800078c 0x00000010 Data RW 140 .data driver_timer.o
Execution Region ER_ZI (Exec base: 0x20000028, Load base: 0x0800075c, Size: 0x00000400, Max: 0xffffffff, ABSOLUTE)
Execution Region ER_ZI (Exec base: 0x20000028, Load base: 0x0800079c, Size: 0x00000400, Max: 0xffffffff, ABSOLUTE)
Exec Addr Load Addr Size Type Attr Idx E Section Name Object
@ -359,13 +359,13 @@ Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug Object Name
268 6 0 0 0 2517 driver_gpio.o
462 36 0 16 0 5475 driver_timer.o
526 36 0 16 0 5511 driver_timer.o
116 18 0 24 0 208365 principal.o
36 8 236 0 1024 840 startup_stm32f10x_md.o
328 28 0 0 0 2101 system_stm32f10x.o
----------------------------------------------------------------------
1212 96 268 40 1024 219298 Object Totals
1276 96 268 40 1024 219334 Object Totals
0 0 32 0 0 0 (incl. Generated)
2 0 0 0 0 0 (incl. Padding)
@ -411,15 +411,15 @@ Image component sizes
Code (inc. data) RO Data RW Data ZI Data Debug
1576 112 268 40 1024 219118 Grand Totals
1576 112 268 40 1024 219118 ELF Image Totals
1576 112 268 40 0 0 ROM Totals
1640 112 268 40 1024 219154 Grand Totals
1640 112 268 40 1024 219154 ELF Image Totals
1640 112 268 40 0 0 ROM Totals
==============================================================================
Total RO Size (Code + RO Data) 1844 ( 1.80kB)
Total RO Size (Code + RO Data) 1908 ( 1.86kB)
Total RW Size (RW Data + ZI Data) 1064 ( 1.04kB)
Total ROM Size (Code + RO Data + RW Data) 1884 ( 1.84kB)
Total ROM Size (Code + RO Data + RW Data) 1948 ( 1.90kB)
==============================================================================

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timer_act2/Objects/driver_gpio.crf
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timer_act2/Objects/driver_gpio.o
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timer_act2/Objects/driver_timer.crf
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timer_act2/Objects/driver_timer.o
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timer_act2/Objects/principal.crf
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timer_act2/Objects/principal.o
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timer_act2/Objects/system_stm32f10x.crf
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timer_act2/Objects/system_stm32f10x.o
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timer_act2/Objects/timer_act2.axf
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19
timer_act2/Objects/timer_act2.build_log.htm
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@ -26,14 +26,15 @@ Project File Date: 09/20/2021
<h2>Output:</h2>
*** Using Compiler 'V5.06 update 7 (build 960)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
Build target 'Simulation'
Rebuild target 'Simulation'
assembling startup_stm32f10x_md.s...
compiling principal.c...
Source\principal.c(52): warning: #111-D: statement is unreachable
return 0;
Source\principal.c: 1 warning, 0 errors
compiling Driver_TIMER.c...
compiling Driver_GPIO.c...
compiling system_stm32f10x.c...
linking...
Program Size: Code=1576 RO-data=268 RW-data=40 ZI-data=1024
".\Objects\timer_act2.axf" - 0 Error(s), 1 Warning(s).
Program Size: Code=1640 RO-data=268 RW-data=40 ZI-data=1024
".\Objects\timer_act2.axf" - 0 Error(s), 0 Warning(s).
<h2>Software Packages used:</h2>
@ -60,11 +61,11 @@ Package Vendor: Keil
* Component: ARM::CMSIS:CORE:5.4.0
* Component: Keil::Device:Startup:1.0.0
Source file: Device\Source\ARM\STM32F1xx_OPT.s
Include file: RTE_Driver\Config\RTE_Device.h
Source file: Device\Source\ARM\startup_stm32f10x_md.s
Source file: Device\Source\system_stm32f10x.c
Build Time Elapsed: 00:00:00
Include file: RTE_Driver\Config\RTE_Device.h
Source file: Device\Source\ARM\STM32F1xx_OPT.s
Build Time Elapsed: 00:00:01
</pre>
</body>
</html>

4
timer_act2/Objects/timer_act2.htm
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@ -3,7 +3,7 @@
<title>Static Call Graph - [.\Objects\timer_act2.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\Objects\timer_act2.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Mon Sep 27 16:44:54 2021
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Thu Sep 30 17:00:44 2021
<BR><P>
<H3>Maximum Stack Usage = 32 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
@ -358,7 +358,7 @@ Global Symbols
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>
<P><STRONG><a name="[48]"></a>MyTimer_PWM</STRONG> (Thumb, 124 bytes, Stack size 0 bytes, driver_timer.o(i.MyTimer_PWM))
<P><STRONG><a name="[48]"></a>MyTimer_PWM</STRONG> (Thumb, 188 bytes, Stack size 0 bytes, driver_timer.o(i.MyTimer_PWM))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

24
timer_act2/Objects/timer_act2_Simulation.dep
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@ -1,43 +1,43 @@
Dependencies for Project 'timer_act2', Target 'Simulation': (DO NOT MODIFY !)
CompilerVersion: 5060960::V5.06 update 7 (build 960)::.\ARMCC
F (.\Source\principal.c)(0x6151D8E4)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Includes -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="533" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -o .\objects\principal.o --omf_browse .\objects\principal.crf --depend .\objects\principal.d)
F (.\Source\principal.c)(0x6155BFA1)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Includes -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="533" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -o .\objects\principal.o --omf_browse .\objects\principal.crf --depend .\objects\principal.d)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\stm32f10x.h)(0x58259ADC)
I (.\RTE\_Simulation\RTE_Components.h)(0x61487B1E)
I (.\RTE\_Simulation\RTE_Components.h)(0x6155BC26)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F3392)
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5E8E9122)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F3392)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E836932)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F3392)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\system_stm32f10x.h)(0x58259ADC)
I (.\Includes\Driver_GPIO.h)(0x61476D7E)
I (.\Includes\Driver_TIMER.h)(0x6151D19D)
I (.\Includes\Driver_GPIO.h)(0x6155C0E0)
I (.\Includes\Driver_TIMER.h)(0x6155D118)
F (.\Includes\Driver_GPIO.c)(0x614DFC28)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Includes -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="533" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -o .\objects\driver_gpio.o --omf_browse .\objects\driver_gpio.crf --depend .\objects\driver_gpio.d)
I (Includes\Driver_GPIO.h)(0x61476D7E)
I (Includes\Driver_GPIO.h)(0x6155C0E0)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\stm32f10x.h)(0x58259ADC)
I (.\RTE\_Simulation\RTE_Components.h)(0x61487B1E)
I (.\RTE\_Simulation\RTE_Components.h)(0x6155BC26)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F3392)
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5E8E9122)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F3392)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E836932)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F3392)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\system_stm32f10x.h)(0x58259ADC)
F (.\Includes\Driver_GPIO.h)(0x61476D7E)()
F (.\Includes\Driver_TIMER.c)(0x6151D220)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Includes -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="533" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -o .\objects\driver_timer.o --omf_browse .\objects\driver_timer.crf --depend .\objects\driver_timer.d)
I (Includes\Driver_TIMER.h)(0x6151D19D)
F (.\Includes\Driver_GPIO.h)(0x6155C0E0)()
F (.\Includes\Driver_TIMER.c)(0x6155D111)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Includes -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="533" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -o .\objects\driver_timer.o --omf_browse .\objects\driver_timer.crf --depend .\objects\driver_timer.d)
I (Includes\Driver_TIMER.h)(0x6155D118)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\stm32f10x.h)(0x58259ADC)
I (.\RTE\_Simulation\RTE_Components.h)(0x61487B1E)
I (.\RTE\_Simulation\RTE_Components.h)(0x6155BC26)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F3392)
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5E8E9122)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F3392)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E836932)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F3392)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\system_stm32f10x.h)(0x58259ADC)
F (.\Includes\Driver_TIMER.h)(0x6151D19D)()
F (.\Includes\Driver_TIMER.h)(0x6155D118)()
F (RTE\Device\STM32F103RB\RTE_Device.h)(0x59284216)()
F (RTE\Device\STM32F103RB\startup_stm32f10x_md.s)(0x58259ADC)(--cpu Cortex-M3 --pd "__EVAL SETA 1" -g --apcs=interwork --pd "__MICROLIB SETA 1" -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include --pd "__UVISION_VERSION SETA 533" --pd "_RTE_ SETA 1" --pd "STM32F10X_MD SETA 1" --pd "_RTE_ SETA 1" --list .\listings\startup_stm32f10x_md.lst --xref -o .\objects\startup_stm32f10x_md.o --depend .\objects\startup_stm32f10x_md.d)
F (RTE\Device\STM32F103RB\system_stm32f10x.c)(0x58259ADC)(-c --cpu Cortex-M3 -D__EVAL -D__MICROLIB -g -O0 --apcs=interwork --split_sections -I .\Includes -I.\RTE\Device\STM32F103RB -I.\RTE\_Simulation -IC:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include -D__UVISION_VERSION="533" -D_RTE_ -DSTM32F10X_MD -D_RTE_ -o .\objects\system_stm32f10x.o --omf_browse .\objects\system_stm32f10x.crf --depend .\objects\system_stm32f10x.d)
I (C:\Users\chauz\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.3.0\Device\Include\stm32f10x.h)(0x58259ADC)
I (.\RTE\_Simulation\RTE_Components.h)(0x61487B1E)
I (.\RTE\_Simulation\RTE_Components.h)(0x6155BC26)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F3392)
I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5E8E9122)
I (C:\Users\chauz\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F3392)

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timer_act2/RTE/Device/STM32F103RB/RTE_Device.h Normal file
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307
timer_act2/RTE/Device/STM32F103RB/startup_stm32f10x_md.s Normal file
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@ -0,0 +1,307 @@
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****

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timer_act2/RTE/Device/STM32F103RB/system_stm32f10x.c Normal file
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timer_act2/RTE/_Simulation/RTE_Components.h Normal file
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/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'timer_act2'
* Target: 'Simulation'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "stm32f10x.h"
#endif /* RTE_COMPONENTS_H */

32
timer_act2/Source/principal.c
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@ -6,27 +6,16 @@ MyTimer_Struct_TypeDef MonTimer ;
MyGPIO_Struct_TypeDef greenLed ;
MyGPIO_Struct_TypeDef sortiePWM ;
void handle_TIM2(void) {
void callback_TIM2(void) {
MyGPIO_Toggle(greenLed.GPIO, greenLed.GPIO_Pin);
}
int main(void) {
//activation du timer 2 et du GPIO A
Activate_TIM(2);
MyGPIO_Activate(1);
//sortie PWM timer 2 channel 3 sur pin PA2
sortiePWM.GPIO = GPIOA;
sortiePWM.GPIO_Pin = 2 ;
sortiePWM.GPIO_Conf = AltOut_Ppull ;
MyGPIO_Init(&sortiePWM);
/*greenLed.GPIO = GPIOA;
greenLed.GPIO_Pin = 5 ;
greenLed.GPIO_Conf = Out_Ppull ;
MyGPIO_Init(&greenLed); */
//Configuration du timer 2
MonTimer.Timer = TIM2 ;
//méthode PGCD
@ -40,14 +29,25 @@ int main(void) {
MonTimer.PSC = 0 ;
MyTimer_Base_Init(&MonTimer);
//Configuration de la sortie PWM timer 2 channel 3 sur pin PA2
sortiePWM.GPIO = GPIOA;
sortiePWM.GPIO_Pin = 2 ;
sortiePWM.GPIO_Conf = AltOut_Ppull ;
MyGPIO_Init(&sortiePWM);
/*greenLed.GPIO = GPIOA;
greenLed.GPIO_Pin = 5 ;
greenLed.GPIO_Conf = Out_Ppull ;
MyGPIO_Init(&greenLed); */
/*MyGPIO_Set(greenLed.GPIO,greenLed.GPIO_Pin);
MyTimer_Active_IT(TIM2, 1, handle_TIM2);*/
MyTimer_Active_IT(TIM2, 1, callback_TIM2);*/
MyTimer_Base_Start(MonTimer.Timer);
MyTimer_PWM(MonTimer.Timer, 3);
MyTimer_PWM_set_cycle(MonTimer.Timer, 0.20, 3);
while(1) {}
return 0;
}

62
timer_act2/timer_act2.uvguix.chauz
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6
timer_act2/timer_act2.uvoptx
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@ -125,7 +125,7 @@
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
<Name>(1010=75,104,451,661,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=60,88,280,548,0)(111=91,141,311,601,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=672,91,1093,518,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=791,113,1385,864,0)(131=530,21,1124,772,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
<Name>(1010=75,104,451,661,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=60,88,280,548,0)(111=91,141,311,601,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=672,91,1093,518,0)(121=75,104,496,531,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=791,113,1385,864,0)(131=530,21,1124,772,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(234=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
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@ -185,12 +185,12 @@
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