Step_DFT - étapes 1 et 2 fonctionnelles, étape 3 non testée

This commit is contained in:
Marie Brunetto 2023-04-19 12:45:06 +02:00
parent b4f148a288
commit e6a35c8006
3 changed files with 104 additions and 29 deletions

View file

@ -13,37 +13,54 @@
; ===============================================================================================
EXPORT DFT_ModuleAuCarre
;Section ROM code (read only) :
area moncode,code,readonly
; écrire le code ici
DFT_ModuleAuCarre proc
push {lr}
;partie reelle
;push {r0}
ldr r2,=TabCos
bl DFT_Partie
;mov r3 ,r0
;partie imaginaire
;pop {r0}
;ldr r2,=TabSin
;bl DFT_Partie
; calcul dft
;mul r0, r0
;mul r3, r3
;add r0, r3
pop {pc}
endp
; ====================== DFT Partie ======================================
DFT_Partie proc
push {lr, r4, r5, r6}
mov r2, #0 ;Compteur de boucle
mov r5, #0 ;Compteur de boucle
mov r3, #0 ;Partie Réelle
ldr r5, =TabCos
BOUCLER
cmp r2, #63
bgt FINBOUCLER
mul r4, r1, r2
BOUCLERR
cmp r5, #63
bgt FINBOUCLERR
mul r4, r1, r5 ; k*n
and r4, #63 ; p
ldrh r4, [r5, r4, LSL #1] ; TabCos(p)
ldrh r6, [r0, r2, LSL #1] ; LeSignal(n)
mul r4, r6
add r3, r4
add r2, #1
bl BOUCLER
FINBOUCLER
mov r0, r3
ldrsh r4, [r2, r4, LSL #1] ; TabCos(p) 1.15
ldrh r6, [r0, r5, LSL #1] ; LeSignal(n) 1.12
mul r4, r6 ; 2.27
asr r4, #2 ; 4.25
add r3, r4 ; 7.25
add r5, #1
b BOUCLERR
FINBOUCLERR
mov r0, r3
pop {pc, r4, r5, r6}
endp
;Section ROM code (read only) :
AREA Trigo, DATA, READONLY

View file

@ -4,6 +4,10 @@
int DFT_ModuleAuCarre( short int * Signal64ech, char k);
extern short int LeSignal;
int tab [64];
int main(void)
{
@ -12,16 +16,18 @@ int main(void)
// ===========================================================================
// Après exécution : le coeur CPU est clocké à 72MHz ainsi que tous les timers
CLOCK_Configure();
//CLOCK_Configure();
//============================================================================
for (int i=0;i<64;i++)
{
char k = (char)i;
tab[i]= DFT_ModuleAuCarre( &LeSignal, k);
}
while (1)
{
//DFT_ModuleAuCarre( LeSignal, 17);
}
}

View file

@ -153,14 +153,66 @@
<Name>-U066CFF574857847167074929 -O2254 -S0 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32F103RB$Flash\STM32F10x_128.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>29</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>134218158</Address>
<ByteObject>0</ByteObject>
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<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>1</BreakIfRCount>
<Filename>.\Src\principal.c</Filename>
<ExecCommand></ExecCommand>
<Expression>\\\Src/principal.c\29</Expression>
</Bp>
</Breakpoint>
<WatchWindow1>
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>r4,0x0A</ItemText>
</Ww>
<Ww>
<count>1</count>
<WinNumber>1</WinNumber>
<ItemText>r6,0x0A</ItemText>
</Ww>
<Ww>
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<WinNumber>1</WinNumber>
<ItemText>r0,0x0A</ItemText>
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<ItemText>i,0x0A</ItemText>
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<Ww>
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<WinNumber>1</WinNumber>
<ItemText>k,0x0A</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>0</SubType>
<ItemText>tab</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
@ -174,7 +226,7 @@
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aLa>1</aLa>
<aPa1>0</aPa1>
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<aSer4>0</aSer4>
@ -200,7 +252,7 @@
<Wi>
<IntNumber>0</IntNumber>
<FirstString>((portb &amp; 0x00000002) &gt;&gt; 1 &amp; 0x2) &gt;&gt; 1</FirstString>
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</Wi>
</LogicAnalyzers>
<DebugDescription>